slide.c revision 1.16.10.1 1 /* $NetBSD: slide.c,v 1.16.10.1 2007/03/29 19:27:52 reinoud Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: slide.c,v 1.16.10.1 2007/03/29 19:27:52 reinoud Exp $");
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcidevs.h>
47 #include <dev/pci/pciidereg.h>
48 #include <dev/pci/pciidevar.h>
49 #include <dev/pci/pciide_sl82c105_reg.h>
50
51 static void sl82c105_chip_map(struct pciide_softc*, struct pci_attach_args*);
52 static void sl82c105_setup_channel(struct ata_channel*);
53
54 static int slide_match(struct device *, struct cfdata *, void *);
55 static void slide_attach(struct device *, struct device *, void *);
56
57 CFATTACH_DECL(slide, sizeof(struct pciide_softc),
58 slide_match, slide_attach, NULL, NULL);
59
60 static const struct pciide_product_desc pciide_symphony_products[] = {
61 { PCI_PRODUCT_SYMPHONY_82C105,
62 0,
63 "Symphony Labs 82C105 IDE controller",
64 sl82c105_chip_map,
65 },
66 { 0,
67 0,
68 NULL,
69 NULL,
70 }
71 };
72
73 static const struct pciide_product_desc pciide_winbond_products[] = {
74 { PCI_PRODUCT_WINBOND_W83C553F_1,
75 0,
76 "Winbond W83C553F IDE controller",
77 sl82c105_chip_map,
78 },
79 { 0,
80 0,
81 NULL,
82 NULL,
83 }
84 };
85
86 static int
87 slide_match(struct device *parent, struct cfdata *match,
88 void *aux)
89 {
90 struct pci_attach_args *pa = aux;
91
92 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) {
93 if (pciide_lookup_product(pa->pa_id, pciide_symphony_products))
94 return (2);
95 }
96 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) {
97 if (pciide_lookup_product(pa->pa_id, pciide_winbond_products))
98 return (2);
99 }
100 return (0);
101 }
102
103 static void
104 slide_attach(struct device *parent, struct device *self, void *aux)
105 {
106 struct pci_attach_args *pa = aux;
107 struct pciide_softc *sc = (struct pciide_softc *)self;
108 const struct pciide_product_desc *pp = NULL;
109
110 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY)
111 pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products);
112 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND)
113 pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products);
114 if (pp == NULL)
115 panic("slide_attach");
116 pciide_common_attach(sc, pa, pp);
117 }
118
119 static int
120 sl82c105_bugchk(struct pci_attach_args *pa)
121 {
122
123 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND ||
124 PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0)
125 return (0);
126
127 if (PCI_REVISION(pa->pa_class) <= 0x05)
128 return (1);
129
130 return (0);
131 }
132
133 static void
134 sl82c105_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
135 {
136 struct pciide_channel *cp;
137 bus_size_t cmdsize, ctlsize;
138 pcireg_t interface, idecr;
139 int channel;
140
141 if (pciide_chipen(sc, pa) == 0)
142 return;
143
144 aprint_verbose("%s: bus-master DMA support present",
145 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
146
147 /*
148 * Check to see if we're part of the Winbond 83c553 Southbridge.
149 * If so, we need to disable DMA on rev. <= 5 of that chip.
150 */
151 if (pci_find_device(pa, sl82c105_bugchk)) {
152 aprint_verbose(" but disabled due to 83c553 rev. <= 0x05");
153 sc->sc_dma_ok = 0;
154 } else
155 pciide_mapreg_dma(sc, pa);
156 aprint_verbose("\n");
157
158 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16;
159 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
160 if (sc->sc_dma_ok) {
161 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
162 sc->sc_wdcdev.irqack = pciide_irqack;
163 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
164 }
165 sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel;
166
167 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
168 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
169
170 idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR);
171 #ifdef PCIIDE_SLIDE_SETIRQA
172 idecr |= IDECR_IDE_IRQA;
173 pci_conf_write(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR, idecr);
174 #endif
175
176 interface = PCI_INTERFACE(pa->pa_class);
177
178 wdc_allocate_regs(&sc->sc_wdcdev);
179
180 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
181 channel++) {
182 cp = &sc->pciide_channels[channel];
183 if (pciide_chansetup(sc, channel, interface) == 0)
184 continue;
185 if ((channel == 0 && (idecr & IDECR_P0EN) == 0) ||
186 (channel == 1 && (idecr & IDECR_P1EN) == 0)) {
187 aprint_normal("%s: %s channel ignored (disabled)\n",
188 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
189 cp->ata_channel.ch_flags |= ATACH_DISABLED;
190 continue;
191 }
192 pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
193 pciide_pci_intr);
194 }
195 }
196
197 static void
198 sl82c105_setup_channel(struct ata_channel *chp)
199 {
200 struct ata_drive_datas *drvp;
201 struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
202 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
203 int pxdx_reg, drive, s;
204 pcireg_t pxdx;
205
206 /* Set up DMA if needed. */
207 pciide_channel_dma_setup(cp);
208
209 for (drive = 0; drive < 2; drive++) {
210 pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR
211 : SYMPH_P1D0CR) +
212 (drive * 4);
213
214 pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg);
215
216 pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK);
217 pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN);
218
219 drvp = &chp->ch_drive[drive];
220 /* If no drive, skip. */
221 if ((drvp->drive_flags & DRIVE) == 0) {
222 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
223 continue;
224 }
225
226 if (drvp->drive_flags & DRIVE_DMA) {
227 /*
228 * Timings will be used for both PIO and DMA,
229 * so adjust DMA mode if needed.
230 */
231 if (drvp->PIO_mode >= 3) {
232 if ((drvp->DMA_mode + 2) > drvp->PIO_mode)
233 drvp->DMA_mode = drvp->PIO_mode - 2;
234 if (drvp->DMA_mode < 1) {
235 /*
236 * Can't mix both PIO and DMA.
237 * Disable DMA.
238 */
239 s = splbio();
240 drvp->drive_flags &= ~DRIVE_DMA;
241 splx(s);
242 }
243 } else {
244 /*
245 * Can't mix both PIO and DMA. Disable
246 * DMA.
247 */
248 s = splbio();
249 drvp->drive_flags &= ~DRIVE_DMA;
250 splx(s);
251 }
252 }
253
254 if (drvp->drive_flags & DRIVE_DMA) {
255 /* Use multi-word DMA. */
256 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on <<
257 PxDx_CMD_ON_SHIFT;
258 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off;
259 } else {
260 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on <<
261 PxDx_CMD_ON_SHIFT;
262 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off;
263 }
264
265 /* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */
266
267 /* ...and set the mode for this drive. */
268 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
269 }
270 }
271