slide.c revision 1.21
1 /* $NetBSD: slide.c,v 1.21 2010/11/05 18:07:24 jakllsch Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: slide.c,v 1.21 2010/11/05 18:07:24 jakllsch Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 38 #include <dev/pci/pcivar.h> 39 #include <dev/pci/pcidevs.h> 40 #include <dev/pci/pciidereg.h> 41 #include <dev/pci/pciidevar.h> 42 #include <dev/pci/pciide_sl82c105_reg.h> 43 44 static void sl82c105_chip_map(struct pciide_softc*, struct pci_attach_args*); 45 static void sl82c105_setup_channel(struct ata_channel*); 46 47 static int slide_match(device_t, cfdata_t, void *); 48 static void slide_attach(device_t, device_t, void *); 49 50 CFATTACH_DECL_NEW(slide, sizeof(struct pciide_softc), 51 slide_match, slide_attach, NULL, NULL); 52 53 static const struct pciide_product_desc pciide_symphony_products[] = { 54 { PCI_PRODUCT_SYMPHONY_82C105, 55 0, 56 "Symphony Labs 82C105 IDE controller", 57 sl82c105_chip_map, 58 }, 59 { 0, 60 0, 61 NULL, 62 NULL, 63 } 64 }; 65 66 static const struct pciide_product_desc pciide_winbond_products[] = { 67 { PCI_PRODUCT_WINBOND_W83C553F_1, 68 0, 69 "Winbond W83C553F IDE controller", 70 sl82c105_chip_map, 71 }, 72 { 0, 73 0, 74 NULL, 75 NULL, 76 } 77 }; 78 79 static int 80 slide_match(device_t parent, cfdata_t match, void *aux) 81 { 82 struct pci_attach_args *pa = aux; 83 84 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) { 85 if (pciide_lookup_product(pa->pa_id, pciide_symphony_products)) 86 return (2); 87 } 88 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) { 89 if (pciide_lookup_product(pa->pa_id, pciide_winbond_products)) 90 return (2); 91 } 92 return (0); 93 } 94 95 static void 96 slide_attach(device_t parent, device_t self, void *aux) 97 { 98 struct pci_attach_args *pa = aux; 99 struct pciide_softc *sc = device_private(self); 100 const struct pciide_product_desc *pp = NULL; 101 102 sc->sc_wdcdev.sc_atac.atac_dev = self; 103 104 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) 105 pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products); 106 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) 107 pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products); 108 if (pp == NULL) 109 panic("slide_attach"); 110 pciide_common_attach(sc, pa, pp); 111 } 112 113 static int 114 sl82c105_bugchk(struct pci_attach_args *pa) 115 { 116 117 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND || 118 PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0) 119 return (0); 120 121 if (PCI_REVISION(pa->pa_class) <= 0x05) 122 return (1); 123 124 return (0); 125 } 126 127 static void 128 sl82c105_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 129 { 130 struct pciide_channel *cp; 131 pcireg_t interface, idecr; 132 int channel; 133 134 if (pciide_chipen(sc, pa) == 0) 135 return; 136 137 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, 138 "bus-master DMA support present"); 139 140 /* 141 * Check to see if we're part of the Winbond 83c553 Southbridge. 142 * If so, we need to disable DMA on rev. <= 5 of that chip. 143 */ 144 if (pci_find_device(pa, sl82c105_bugchk)) { 145 aprint_verbose(" but disabled due to 83c553 rev. <= 0x05"); 146 sc->sc_dma_ok = 0; 147 } else 148 pciide_mapreg_dma(sc, pa); 149 aprint_verbose("\n"); 150 151 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16; 152 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 153 if (sc->sc_dma_ok) { 154 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; 155 sc->sc_wdcdev.irqack = pciide_irqack; 156 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 157 } 158 sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel; 159 160 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 161 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 162 163 idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR); 164 165 interface = PCI_INTERFACE(pa->pa_class); 166 167 wdc_allocate_regs(&sc->sc_wdcdev); 168 169 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 170 channel++) { 171 cp = &sc->pciide_channels[channel]; 172 if (pciide_chansetup(sc, channel, interface) == 0) 173 continue; 174 if ((channel == 0 && (idecr & IDECR_P0EN) == 0) || 175 (channel == 1 && (idecr & IDECR_P1EN) == 0)) { 176 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, 177 "%s channel ignored (disabled)\n", cp->name); 178 cp->ata_channel.ch_flags |= ATACH_DISABLED; 179 continue; 180 } 181 pciide_mapchan(pa, cp, interface, pciide_pci_intr); 182 } 183 } 184 185 static void 186 sl82c105_setup_channel(struct ata_channel *chp) 187 { 188 struct ata_drive_datas *drvp; 189 struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 190 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 191 int pxdx_reg, drive, s; 192 pcireg_t pxdx; 193 194 /* Set up DMA if needed. */ 195 pciide_channel_dma_setup(cp); 196 197 for (drive = 0; drive < 2; drive++) { 198 pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR 199 : SYMPH_P1D0CR) + 200 (drive * 4); 201 202 pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg); 203 204 pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK); 205 pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN); 206 207 drvp = &chp->ch_drive[drive]; 208 /* If no drive, skip. */ 209 if ((drvp->drive_flags & DRIVE) == 0) { 210 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx); 211 continue; 212 } 213 214 if (drvp->drive_flags & DRIVE_DMA) { 215 /* 216 * Timings will be used for both PIO and DMA, 217 * so adjust DMA mode if needed. 218 */ 219 if (drvp->PIO_mode >= 3) { 220 if ((drvp->DMA_mode + 2) > drvp->PIO_mode) 221 drvp->DMA_mode = drvp->PIO_mode - 2; 222 if (drvp->DMA_mode < 1) { 223 /* 224 * Can't mix both PIO and DMA. 225 * Disable DMA. 226 */ 227 s = splbio(); 228 drvp->drive_flags &= ~DRIVE_DMA; 229 splx(s); 230 } 231 } else { 232 /* 233 * Can't mix both PIO and DMA. Disable 234 * DMA. 235 */ 236 s = splbio(); 237 drvp->drive_flags &= ~DRIVE_DMA; 238 splx(s); 239 } 240 } 241 242 if (drvp->drive_flags & DRIVE_DMA) { 243 /* Use multi-word DMA. */ 244 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on << 245 PxDx_CMD_ON_SHIFT; 246 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off; 247 } else { 248 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on << 249 PxDx_CMD_ON_SHIFT; 250 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off; 251 } 252 253 /* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */ 254 255 /* ...and set the mode for this drive. */ 256 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx); 257 } 258 } 259
Indexes created Thu Oct 02 01:09:59 GMT 2025