slide.c revision 1.22
1 /* $NetBSD: slide.c,v 1.22 2011/04/04 20:37:56 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: slide.c,v 1.22 2011/04/04 20:37:56 dyoung Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 38 #include <dev/pci/pcivar.h> 39 #include <dev/pci/pcidevs.h> 40 #include <dev/pci/pciidereg.h> 41 #include <dev/pci/pciidevar.h> 42 #include <dev/pci/pciide_sl82c105_reg.h> 43 44 static void sl82c105_chip_map(struct pciide_softc*, 45 const struct pci_attach_args*); 46 static void sl82c105_setup_channel(struct ata_channel*); 47 48 static int slide_match(device_t, cfdata_t, void *); 49 static void slide_attach(device_t, device_t, void *); 50 51 CFATTACH_DECL_NEW(slide, sizeof(struct pciide_softc), 52 slide_match, slide_attach, NULL, NULL); 53 54 static const struct pciide_product_desc pciide_symphony_products[] = { 55 { PCI_PRODUCT_SYMPHONY_82C105, 56 0, 57 "Symphony Labs 82C105 IDE controller", 58 sl82c105_chip_map, 59 }, 60 { 0, 61 0, 62 NULL, 63 NULL, 64 } 65 }; 66 67 static const struct pciide_product_desc pciide_winbond_products[] = { 68 { PCI_PRODUCT_WINBOND_W83C553F_1, 69 0, 70 "Winbond W83C553F IDE controller", 71 sl82c105_chip_map, 72 }, 73 { 0, 74 0, 75 NULL, 76 NULL, 77 } 78 }; 79 80 static int 81 slide_match(device_t parent, cfdata_t match, void *aux) 82 { 83 struct pci_attach_args *pa = aux; 84 85 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) { 86 if (pciide_lookup_product(pa->pa_id, pciide_symphony_products)) 87 return (2); 88 } 89 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) { 90 if (pciide_lookup_product(pa->pa_id, pciide_winbond_products)) 91 return (2); 92 } 93 return (0); 94 } 95 96 static void 97 slide_attach(device_t parent, device_t self, void *aux) 98 { 99 struct pci_attach_args *pa = aux; 100 struct pciide_softc *sc = device_private(self); 101 const struct pciide_product_desc *pp = NULL; 102 103 sc->sc_wdcdev.sc_atac.atac_dev = self; 104 105 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) 106 pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products); 107 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) 108 pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products); 109 if (pp == NULL) 110 panic("slide_attach"); 111 pciide_common_attach(sc, pa, pp); 112 } 113 114 static int 115 sl82c105_bugchk(const struct pci_attach_args *pa) 116 { 117 118 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND || 119 PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0) 120 return (0); 121 122 if (PCI_REVISION(pa->pa_class) <= 0x05) 123 return (1); 124 125 return (0); 126 } 127 128 static void 129 sl82c105_chip_map(struct pciide_softc *sc, const struct pci_attach_args *pa) 130 { 131 struct pci_attach_args pa0; 132 struct pciide_channel *cp; 133 pcireg_t interface, idecr; 134 int channel; 135 136 if (pciide_chipen(sc, pa) == 0) 137 return; 138 139 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev, 140 "bus-master DMA support present"); 141 142 /* 143 * Check to see if we're part of the Winbond 83c553 Southbridge. 144 * If so, we need to disable DMA on rev. <= 5 of that chip. 145 */ 146 if (pci_find_device(&pa0, sl82c105_bugchk)) { 147 pa = &pa0; 148 aprint_verbose(" but disabled due to 83c553 rev. <= 0x05"); 149 sc->sc_dma_ok = 0; 150 } else 151 pciide_mapreg_dma(sc, pa); 152 aprint_verbose("\n"); 153 154 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16; 155 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 156 if (sc->sc_dma_ok) { 157 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA; 158 sc->sc_wdcdev.irqack = pciide_irqack; 159 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 160 } 161 sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel; 162 163 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 164 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS; 165 166 idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR); 167 168 interface = PCI_INTERFACE(pa->pa_class); 169 170 wdc_allocate_regs(&sc->sc_wdcdev); 171 172 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 173 channel++) { 174 cp = &sc->pciide_channels[channel]; 175 if (pciide_chansetup(sc, channel, interface) == 0) 176 continue; 177 if ((channel == 0 && (idecr & IDECR_P0EN) == 0) || 178 (channel == 1 && (idecr & IDECR_P1EN) == 0)) { 179 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev, 180 "%s channel ignored (disabled)\n", cp->name); 181 cp->ata_channel.ch_flags |= ATACH_DISABLED; 182 continue; 183 } 184 pciide_mapchan(pa, cp, interface, pciide_pci_intr); 185 } 186 } 187 188 static void 189 sl82c105_setup_channel(struct ata_channel *chp) 190 { 191 struct ata_drive_datas *drvp; 192 struct pciide_channel *cp = CHAN_TO_PCHAN(chp); 193 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 194 int pxdx_reg, drive, s; 195 pcireg_t pxdx; 196 197 /* Set up DMA if needed. */ 198 pciide_channel_dma_setup(cp); 199 200 for (drive = 0; drive < 2; drive++) { 201 pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR 202 : SYMPH_P1D0CR) + 203 (drive * 4); 204 205 pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg); 206 207 pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK); 208 pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN); 209 210 drvp = &chp->ch_drive[drive]; 211 /* If no drive, skip. */ 212 if ((drvp->drive_flags & DRIVE) == 0) { 213 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx); 214 continue; 215 } 216 217 if (drvp->drive_flags & DRIVE_DMA) { 218 /* 219 * Timings will be used for both PIO and DMA, 220 * so adjust DMA mode if needed. 221 */ 222 if (drvp->PIO_mode >= 3) { 223 if ((drvp->DMA_mode + 2) > drvp->PIO_mode) 224 drvp->DMA_mode = drvp->PIO_mode - 2; 225 if (drvp->DMA_mode < 1) { 226 /* 227 * Can't mix both PIO and DMA. 228 * Disable DMA. 229 */ 230 s = splbio(); 231 drvp->drive_flags &= ~DRIVE_DMA; 232 splx(s); 233 } 234 } else { 235 /* 236 * Can't mix both PIO and DMA. Disable 237 * DMA. 238 */ 239 s = splbio(); 240 drvp->drive_flags &= ~DRIVE_DMA; 241 splx(s); 242 } 243 } 244 245 if (drvp->drive_flags & DRIVE_DMA) { 246 /* Use multi-word DMA. */ 247 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on << 248 PxDx_CMD_ON_SHIFT; 249 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off; 250 } else { 251 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on << 252 PxDx_CMD_ON_SHIFT; 253 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off; 254 } 255 256 /* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */ 257 258 /* ...and set the mode for this drive. */ 259 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx); 260 } 261 } 262
Indexes created Thu Oct 02 01:09:59 GMT 2025