sv.c revision 1.20
1 /* $NetBSD: sv.c,v 1.20 2003/02/20 12:24:05 hannken Exp $ */ 2 /* $OpenBSD: sv.c,v 1.2 1998/07/13 01:50:15 csapuntz Exp $ */ 3 4 /* 5 * Copyright (c) 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1998 Constantine Paul Sapuntzakis 42 * All rights reserved 43 * 44 * Author: Constantine Paul Sapuntzakis (csapuntz (at) cvs.openbsd.org) 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. The author's name or those of the contributors may be used to 55 * endorse or promote products derived from this software without 56 * specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) AND CONTRIBUTORS 59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * S3 SonicVibes driver 73 * Heavily based on the eap driver by Lennart Augustsson 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: sv.c,v 1.20 2003/02/20 12:24:05 hannken Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/malloc.h> 83 #include <sys/device.h> 84 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcivar.h> 87 #include <dev/pci/pcidevs.h> 88 89 #include <sys/audioio.h> 90 #include <dev/audio_if.h> 91 #include <dev/mulaw.h> 92 #include <dev/auconv.h> 93 94 #include <dev/ic/i8237reg.h> 95 #include <dev/pci/svreg.h> 96 #include <dev/pci/svvar.h> 97 98 #include <machine/bus.h> 99 100 /* XXX 101 * The SonicVibes DMA is broken and only works on 24-bit addresses. 102 * As long as bus_dmamem_alloc_range() is missing we use the ISA 103 * dma tag on i386. 104 */ 105 #if defined(i386) 106 #include "isa.h" 107 #if NISA > 0 108 #include <dev/isa/isavar.h> 109 #endif 110 #endif 111 112 #ifdef AUDIO_DEBUG 113 #define DPRINTF(x) if (svdebug) printf x 114 #define DPRINTFN(n,x) if (svdebug>(n)) printf x 115 int svdebug = 0; 116 #else 117 #define DPRINTF(x) 118 #define DPRINTFN(n,x) 119 #endif 120 121 int sv_match __P((struct device *, struct cfdata *, void *)); 122 void sv_attach __P((struct device *, struct device *, void *)); 123 int sv_intr __P((void *)); 124 125 struct sv_dma { 126 bus_dmamap_t map; 127 caddr_t addr; 128 bus_dma_segment_t segs[1]; 129 int nsegs; 130 size_t size; 131 struct sv_dma *next; 132 }; 133 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 134 #define KERNADDR(p) ((void *)((p)->addr)) 135 136 CFATTACH_DECL(sv, sizeof(struct sv_softc), 137 sv_match, sv_attach, NULL, NULL); 138 139 struct audio_device sv_device = { 140 "S3 SonicVibes", 141 "", 142 "sv" 143 }; 144 145 #define ARRAY_SIZE(foo) ((sizeof(foo)) / sizeof(foo[0])) 146 147 int sv_allocmem __P((struct sv_softc *, size_t, size_t, int, struct sv_dma *)); 148 int sv_freemem __P((struct sv_softc *, struct sv_dma *)); 149 150 int sv_open __P((void *, int)); 151 void sv_close __P((void *)); 152 int sv_query_encoding __P((void *, struct audio_encoding *)); 153 int sv_set_params __P((void *, int, int, struct audio_params *, struct audio_params *)); 154 int sv_round_blocksize __P((void *, int)); 155 int sv_trigger_output __P((void *, void *, void *, int, void (*)(void *), 156 void *, struct audio_params *)); 157 int sv_trigger_input __P((void *, void *, void *, int, void (*)(void *), 158 void *, struct audio_params *)); 159 int sv_halt_output __P((void *)); 160 int sv_halt_input __P((void *)); 161 int sv_getdev __P((void *, struct audio_device *)); 162 int sv_mixer_set_port __P((void *, mixer_ctrl_t *)); 163 int sv_mixer_get_port __P((void *, mixer_ctrl_t *)); 164 int sv_query_devinfo __P((void *, mixer_devinfo_t *)); 165 void *sv_malloc __P((void *, int, size_t, struct malloc_type *, int)); 166 void sv_free __P((void *, void *, struct malloc_type *)); 167 size_t sv_round_buffersize __P((void *, int, size_t)); 168 paddr_t sv_mappage __P((void *, void *, off_t, int)); 169 int sv_get_props __P((void *)); 170 171 #ifdef AUDIO_DEBUG 172 void sv_dumpregs __P((struct sv_softc *sc)); 173 #endif 174 175 struct audio_hw_if sv_hw_if = { 176 sv_open, 177 sv_close, 178 NULL, 179 sv_query_encoding, 180 sv_set_params, 181 sv_round_blocksize, 182 NULL, 183 NULL, 184 NULL, 185 NULL, 186 NULL, 187 sv_halt_output, 188 sv_halt_input, 189 NULL, 190 sv_getdev, 191 NULL, 192 sv_mixer_set_port, 193 sv_mixer_get_port, 194 sv_query_devinfo, 195 sv_malloc, 196 sv_free, 197 sv_round_buffersize, 198 sv_mappage, 199 sv_get_props, 200 sv_trigger_output, 201 sv_trigger_input, 202 NULL, 203 }; 204 205 206 static u_int8_t sv_read __P((struct sv_softc *, u_int8_t)); 207 static u_int8_t sv_read_indirect __P((struct sv_softc *, u_int8_t)); 208 static void sv_write __P((struct sv_softc *, u_int8_t, u_int8_t )); 209 static void sv_write_indirect __P((struct sv_softc *, u_int8_t, u_int8_t )); 210 static void sv_init_mixer __P((struct sv_softc *)); 211 212 static void sv_defer __P((struct device *self)); 213 214 static void 215 sv_write (sc, reg, val) 216 struct sv_softc *sc; 217 u_int8_t reg, val; 218 219 { 220 DPRINTFN(8,("sv_write(0x%x, 0x%x)\n", reg, val)); 221 bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val); 222 } 223 224 static u_int8_t 225 sv_read(sc, reg) 226 struct sv_softc *sc; 227 u_int8_t reg; 228 229 { 230 u_int8_t val; 231 232 val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg); 233 DPRINTFN(8,("sv_read(0x%x) = 0x%x\n", reg, val)); 234 return val; 235 } 236 237 static u_int8_t 238 sv_read_indirect(sc, reg) 239 struct sv_softc *sc; 240 u_int8_t reg; 241 { 242 u_int8_t val; 243 int s = splaudio(); 244 245 sv_write(sc, SV_CODEC_IADDR, reg & SV_IADDR_MASK); 246 val = sv_read(sc, SV_CODEC_IDATA); 247 splx(s); 248 return (val); 249 } 250 251 static void 252 sv_write_indirect(sc, reg, val) 253 struct sv_softc *sc; 254 u_int8_t reg, val; 255 { 256 u_int8_t iaddr = reg & SV_IADDR_MASK; 257 int s = splaudio(); 258 259 if (reg == SV_DMA_DATA_FORMAT) 260 iaddr |= SV_IADDR_MCE; 261 262 sv_write(sc, SV_CODEC_IADDR, iaddr); 263 sv_write(sc, SV_CODEC_IDATA, val); 264 splx(s); 265 } 266 267 int 268 sv_match(parent, match, aux) 269 struct device *parent; 270 struct cfdata *match; 271 void *aux; 272 { 273 struct pci_attach_args *pa = aux; 274 275 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_S3 && 276 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_S3_SONICVIBES) 277 return (1); 278 279 return (0); 280 } 281 282 int pci_alloc_io __P((pci_chipset_tag_t pc, pcitag_t pt, 283 int pcioffs, 284 bus_space_tag_t iot, bus_size_t size, 285 bus_size_t align, bus_size_t bound, int flags, 286 bus_space_handle_t *ioh)); 287 288 static pcireg_t pci_io_alloc_low, pci_io_alloc_high; 289 290 int 291 pci_alloc_io(pc, pt, pcioffs, iot, size, align, bound, flags, ioh) 292 pci_chipset_tag_t pc; 293 pcitag_t pt; 294 int pcioffs; 295 bus_space_tag_t iot; 296 bus_size_t size; 297 bus_size_t align; 298 bus_size_t bound; 299 int flags; 300 bus_space_handle_t *ioh; 301 { 302 bus_addr_t addr; 303 int error; 304 305 error = bus_space_alloc(iot, pci_io_alloc_low, pci_io_alloc_high, 306 size, align, bound, flags, &addr, ioh); 307 if (error) 308 return(error); 309 310 pci_conf_write(pc, pt, pcioffs, addr); 311 return (0); 312 } 313 314 /* 315 * Allocate IO addresses when all other configuration is done. 316 */ 317 void 318 sv_defer(self) 319 struct device *self; 320 { 321 struct sv_softc *sc = (struct sv_softc *)self; 322 pci_chipset_tag_t pc = sc->sc_pa.pa_pc; 323 pcitag_t pt = sc->sc_pa.pa_tag; 324 pcireg_t dmaio; 325 326 DPRINTF(("sv_defer: %p\n", sc)); 327 328 /* XXX 329 * Get a reasonable default for the I/O range. 330 * Assume the range around SB_PORTBASE is valid on this PCI bus. 331 */ 332 pci_io_alloc_low = pci_conf_read(pc, pt, SV_SB_PORTBASE_SLOT); 333 pci_io_alloc_high = pci_io_alloc_low + 0x1000; 334 335 if (pci_alloc_io(pc, pt, SV_DMAA_CONFIG_OFF, 336 sc->sc_iot, SV_DMAA_SIZE, SV_DMAA_ALIGN, 0, 337 0, &sc->sc_dmaa_ioh)) { 338 printf("sv_attach: cannot allocate DMA A range\n"); 339 return; 340 } 341 dmaio = pci_conf_read(pc, pt, SV_DMAA_CONFIG_OFF); 342 DPRINTF(("sv_attach: addr a dmaio=0x%lx\n", (u_long)dmaio)); 343 pci_conf_write(pc, pt, SV_DMAA_CONFIG_OFF, 344 dmaio | SV_DMA_CHANNEL_ENABLE | SV_DMAA_EXTENDED_ADDR); 345 346 if (pci_alloc_io(pc, pt, SV_DMAC_CONFIG_OFF, 347 sc->sc_iot, SV_DMAC_SIZE, SV_DMAC_ALIGN, 0, 348 0, &sc->sc_dmac_ioh)) { 349 printf("sv_attach: cannot allocate DMA C range\n"); 350 return; 351 } 352 dmaio = pci_conf_read(pc, pt, SV_DMAC_CONFIG_OFF); 353 DPRINTF(("sv_attach: addr c dmaio=0x%lx\n", (u_long)dmaio)); 354 pci_conf_write(pc, pt, SV_DMAC_CONFIG_OFF, 355 dmaio | SV_DMA_CHANNEL_ENABLE); 356 357 sc->sc_dmaset = 1; 358 } 359 360 void 361 sv_attach(parent, self, aux) 362 struct device *parent, *self; 363 void *aux; 364 { 365 struct sv_softc *sc = (struct sv_softc *)self; 366 struct pci_attach_args *pa = aux; 367 pci_chipset_tag_t pc = pa->pa_pc; 368 pcitag_t pt = pa->pa_tag; 369 pci_intr_handle_t ih; 370 pcireg_t csr; 371 char const *intrstr; 372 u_int8_t reg; 373 struct audio_attach_args arg; 374 375 printf ("\n"); 376 377 /* Map I/O registers */ 378 if (pci_mapreg_map(pa, SV_ENHANCED_PORTBASE_SLOT, 379 PCI_MAPREG_TYPE_IO, 0, 380 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 381 printf("%s: can't map enhanced i/o space\n", 382 sc->sc_dev.dv_xname); 383 return; 384 } 385 if (pci_mapreg_map(pa, SV_FM_PORTBASE_SLOT, 386 PCI_MAPREG_TYPE_IO, 0, 387 &sc->sc_opliot, &sc->sc_oplioh, NULL, NULL)) { 388 printf("%s: can't map FM i/o space\n", sc->sc_dev.dv_xname); 389 return; 390 } 391 if (pci_mapreg_map(pa, SV_MIDI_PORTBASE_SLOT, 392 PCI_MAPREG_TYPE_IO, 0, 393 &sc->sc_midiiot, &sc->sc_midiioh, NULL, NULL)) { 394 printf("%s: can't map MIDI i/o space\n", sc->sc_dev.dv_xname); 395 return; 396 } 397 DPRINTF(("sv: IO ports: enhanced=0x%x, OPL=0x%x, MIDI=0x%x\n", 398 (int)sc->sc_ioh, (int)sc->sc_oplioh, (int)sc->sc_midiioh)); 399 400 #if defined(alpha) 401 /* XXX Force allocation through the SGMAP. */ 402 sc->sc_dmatag = alphabus_dma_get_tag(pa->pa_dmat, ALPHA_BUS_ISA); 403 #elif defined(i386) && NISA > 0 404 /* XXX 405 * The SonicVibes DMA is broken and only works on 24-bit addresses. 406 * As long as bus_dmamem_alloc_range() is missing we use the ISA 407 * dma tag on i386. 408 */ 409 sc->sc_dmatag = &isa_bus_dma_tag; 410 #else 411 sc->sc_dmatag = pa->pa_dmat; 412 #endif 413 414 pci_conf_write(pc, pt, SV_DMAA_CONFIG_OFF, SV_DMAA_EXTENDED_ADDR); 415 pci_conf_write(pc, pt, SV_DMAC_CONFIG_OFF, 0); 416 417 /* Enable the device. */ 418 csr = pci_conf_read(pc, pt, PCI_COMMAND_STATUS_REG); 419 pci_conf_write(pc, pt, PCI_COMMAND_STATUS_REG, 420 csr | PCI_COMMAND_MASTER_ENABLE); 421 422 sv_write_indirect(sc, SV_ANALOG_POWER_DOWN_CONTROL, 0); 423 sv_write_indirect(sc, SV_DIGITAL_POWER_DOWN_CONTROL, 0); 424 425 /* initialize codec registers */ 426 reg = sv_read(sc, SV_CODEC_CONTROL); 427 reg |= SV_CTL_RESET; 428 sv_write(sc, SV_CODEC_CONTROL, reg); 429 delay(50); 430 431 reg = sv_read(sc, SV_CODEC_CONTROL); 432 reg &= ~SV_CTL_RESET; 433 reg |= SV_CTL_INTA | SV_CTL_ENHANCED; 434 435 /* This write clears the reset */ 436 sv_write(sc, SV_CODEC_CONTROL, reg); 437 delay(50); 438 439 /* This write actually shoves the new values in */ 440 sv_write(sc, SV_CODEC_CONTROL, reg); 441 442 DPRINTF(("sv_attach: control=0x%x\n", sv_read(sc, SV_CODEC_CONTROL))); 443 444 /* Enable DMA interrupts */ 445 reg = sv_read(sc, SV_CODEC_INTMASK); 446 reg &= ~(SV_INTMASK_DMAA | SV_INTMASK_DMAC); 447 reg |= SV_INTMASK_UD | SV_INTMASK_SINT | SV_INTMASK_MIDI; 448 sv_write(sc, SV_CODEC_INTMASK, reg); 449 450 sv_read(sc, SV_CODEC_STATUS); 451 452 /* Map and establish the interrupt. */ 453 if (pci_intr_map(pa, &ih)) { 454 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 455 return; 456 } 457 intrstr = pci_intr_string(pc, ih); 458 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, sv_intr, sc); 459 if (sc->sc_ih == NULL) { 460 printf("%s: couldn't establish interrupt", 461 sc->sc_dev.dv_xname); 462 if (intrstr != NULL) 463 printf(" at %s", intrstr); 464 printf("\n"); 465 return; 466 } 467 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 468 printf("%s: rev %d", sc->sc_dev.dv_xname, 469 sv_read_indirect(sc, SV_REVISION_LEVEL)); 470 if (sv_read(sc, SV_CODEC_CONTROL) & SV_CTL_MD1) 471 printf(", reverb SRAM present"); 472 if (!(sv_read_indirect(sc, SV_WAVETABLE_SOURCE_SELECT) & SV_WSS_WT0)) 473 printf(", wavetable ROM present"); 474 printf("\n"); 475 476 sv_init_mixer(sc); 477 478 audio_attach_mi(&sv_hw_if, sc, &sc->sc_dev); 479 480 arg.type = AUDIODEV_TYPE_OPL; 481 arg.hwif = 0; 482 arg.hdl = 0; 483 (void)config_found(&sc->sc_dev, &arg, audioprint); 484 485 sc->sc_pa = *pa; /* for deferred setup */ 486 config_defer(self, sv_defer); 487 } 488 489 #ifdef AUDIO_DEBUG 490 void 491 sv_dumpregs(sc) 492 struct sv_softc *sc; 493 { 494 int idx; 495 496 #if 0 497 for (idx = 0; idx < 0x50; idx += 4) 498 printf ("%02x = %x\n", idx, 499 pci_conf_read(pa->pa_pc, pa->pa_tag, idx)); 500 #endif 501 502 for (idx = 0; idx < 6; idx++) 503 printf ("REG %02x = %02x\n", idx, sv_read(sc, idx)); 504 505 for (idx = 0; idx < 0x32; idx++) 506 printf ("IREG %02x = %02x\n", idx, sv_read_indirect(sc, idx)); 507 508 for (idx = 0; idx < 0x10; idx++) 509 printf ("DMA %02x = %02x\n", idx, 510 bus_space_read_1(sc->sc_iot, sc->sc_dmaa_ioh, idx)); 511 } 512 #endif 513 514 int 515 sv_intr(p) 516 void *p; 517 { 518 struct sv_softc *sc = p; 519 u_int8_t intr; 520 521 intr = sv_read(sc, SV_CODEC_STATUS); 522 DPRINTFN(5,("sv_intr: intr=0x%x\n", intr)); 523 524 if (!(intr & (SV_INTSTATUS_DMAA | SV_INTSTATUS_DMAC))) 525 return (0); 526 527 if (intr & SV_INTSTATUS_DMAA) { 528 if (sc->sc_pintr) 529 sc->sc_pintr(sc->sc_parg); 530 } 531 532 if (intr & SV_INTSTATUS_DMAC) { 533 if (sc->sc_rintr) 534 sc->sc_rintr(sc->sc_rarg); 535 } 536 537 return (1); 538 } 539 540 int 541 sv_allocmem(sc, size, align, direction, p) 542 struct sv_softc *sc; 543 size_t size; 544 size_t align; 545 int direction; 546 struct sv_dma *p; 547 { 548 int error; 549 550 p->size = size; 551 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 552 p->segs, ARRAY_SIZE(p->segs), 553 &p->nsegs, BUS_DMA_NOWAIT); 554 if (error) 555 return (error); 556 557 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 558 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 559 if (error) 560 goto free; 561 562 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 563 0, BUS_DMA_NOWAIT, &p->map); 564 if (error) 565 goto unmap; 566 567 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 568 BUS_DMA_NOWAIT | 569 (direction == AUMODE_RECORD) ? BUS_DMA_READ : BUS_DMA_WRITE); 570 if (error) 571 goto destroy; 572 DPRINTF(("sv_allocmem: pa=%lx va=%lx pba=%lx\n", 573 (long)p->segs[0].ds_addr, (long)KERNADDR(p), (long)DMAADDR(p))); 574 return (0); 575 576 destroy: 577 bus_dmamap_destroy(sc->sc_dmatag, p->map); 578 unmap: 579 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 580 free: 581 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 582 return (error); 583 } 584 585 int 586 sv_freemem(sc, p) 587 struct sv_softc *sc; 588 struct sv_dma *p; 589 { 590 bus_dmamap_unload(sc->sc_dmatag, p->map); 591 bus_dmamap_destroy(sc->sc_dmatag, p->map); 592 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 593 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 594 return (0); 595 } 596 597 int 598 sv_open(addr, flags) 599 void *addr; 600 int flags; 601 { 602 struct sv_softc *sc = addr; 603 604 DPRINTF(("sv_open\n")); 605 if (!sc->sc_dmaset) 606 return (ENXIO); 607 sc->sc_pintr = 0; 608 sc->sc_rintr = 0; 609 610 return (0); 611 } 612 613 /* 614 * Close function is called at splaudio(). 615 */ 616 void 617 sv_close(addr) 618 void *addr; 619 { 620 struct sv_softc *sc = addr; 621 622 DPRINTF(("sv_close\n")); 623 sv_halt_output(sc); 624 sv_halt_input(sc); 625 626 sc->sc_pintr = 0; 627 sc->sc_rintr = 0; 628 } 629 630 int 631 sv_query_encoding(addr, fp) 632 void *addr; 633 struct audio_encoding *fp; 634 { 635 switch (fp->index) { 636 case 0: 637 strcpy(fp->name, AudioEulinear); 638 fp->encoding = AUDIO_ENCODING_ULINEAR; 639 fp->precision = 8; 640 fp->flags = 0; 641 return (0); 642 case 1: 643 strcpy(fp->name, AudioEmulaw); 644 fp->encoding = AUDIO_ENCODING_ULAW; 645 fp->precision = 8; 646 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 647 return (0); 648 case 2: 649 strcpy(fp->name, AudioEalaw); 650 fp->encoding = AUDIO_ENCODING_ALAW; 651 fp->precision = 8; 652 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 653 return (0); 654 case 3: 655 strcpy(fp->name, AudioEslinear); 656 fp->encoding = AUDIO_ENCODING_SLINEAR; 657 fp->precision = 8; 658 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 659 return (0); 660 case 4: 661 strcpy(fp->name, AudioEslinear_le); 662 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 663 fp->precision = 16; 664 fp->flags = 0; 665 return (0); 666 case 5: 667 strcpy(fp->name, AudioEulinear_le); 668 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 669 fp->precision = 16; 670 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 671 return (0); 672 case 6: 673 strcpy(fp->name, AudioEslinear_be); 674 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 675 fp->precision = 16; 676 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 677 return (0); 678 case 7: 679 strcpy(fp->name, AudioEulinear_be); 680 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 681 fp->precision = 16; 682 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 683 return (0); 684 default: 685 return (EINVAL); 686 } 687 } 688 689 int 690 sv_set_params(addr, setmode, usemode, play, rec) 691 void *addr; 692 int setmode, usemode; 693 struct audio_params *play, *rec; 694 { 695 struct sv_softc *sc = addr; 696 struct audio_params *p = NULL; 697 int mode; 698 u_int32_t val; 699 700 /* 701 * This device only has one clock, so make the sample rates match. 702 */ 703 if (play->sample_rate != rec->sample_rate && 704 usemode == (AUMODE_PLAY | AUMODE_RECORD)) { 705 if (setmode == AUMODE_PLAY) { 706 rec->sample_rate = play->sample_rate; 707 setmode |= AUMODE_RECORD; 708 } else if (setmode == AUMODE_RECORD) { 709 play->sample_rate = rec->sample_rate; 710 setmode |= AUMODE_PLAY; 711 } else 712 return (EINVAL); 713 } 714 715 for (mode = AUMODE_RECORD; mode != -1; 716 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 717 if ((setmode & mode) == 0) 718 continue; 719 720 p = mode == AUMODE_PLAY ? play : rec; 721 722 if (p->sample_rate < 2000 || p->sample_rate > 48000 || 723 (p->precision != 8 && p->precision != 16) || 724 (p->channels != 1 && p->channels != 2)) 725 return (EINVAL); 726 727 p->factor = 1; 728 p->sw_code = 0; 729 switch (p->encoding) { 730 case AUDIO_ENCODING_SLINEAR_BE: 731 if (p->precision == 16) 732 p->sw_code = swap_bytes; 733 else 734 p->sw_code = change_sign8; 735 break; 736 case AUDIO_ENCODING_SLINEAR_LE: 737 if (p->precision != 16) 738 p->sw_code = change_sign8; 739 break; 740 case AUDIO_ENCODING_ULINEAR_BE: 741 if (p->precision == 16) { 742 if (mode == AUMODE_PLAY) 743 p->sw_code = swap_bytes_change_sign16_le; 744 else 745 p->sw_code = change_sign16_swap_bytes_le; 746 } 747 break; 748 case AUDIO_ENCODING_ULINEAR_LE: 749 if (p->precision == 16) 750 p->sw_code = change_sign16_le; 751 break; 752 case AUDIO_ENCODING_ULAW: 753 if (mode == AUMODE_PLAY) { 754 p->factor = 2; 755 p->sw_code = mulaw_to_slinear16_le; 756 } else 757 p->sw_code = ulinear8_to_mulaw; 758 break; 759 case AUDIO_ENCODING_ALAW: 760 if (mode == AUMODE_PLAY) { 761 p->factor = 2; 762 p->sw_code = alaw_to_slinear16_le; 763 } else 764 p->sw_code = ulinear8_to_alaw; 765 break; 766 default: 767 return (EINVAL); 768 } 769 } 770 771 val = p->sample_rate * 65536 / 48000; 772 /* 773 * If the sample rate is exactly 48KHz, the fraction would overflow the 774 * register, so we have to bias it. This causes a little clock drift. 775 * The drift is below normal crystal tolerance (.0001%), so although 776 * this seems a little silly, we can pretty much ignore it. 777 * (I tested the output speed with values of 1-20, just to be sure this 778 * register isn't *supposed* to have a bias. It isn't.) 779 * - mycroft 780 */ 781 if (val > 65535) 782 val = 65535; 783 784 sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_0, val & 0xff); 785 sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_1, val >> 8); 786 787 #define F_REF 24576000 788 789 #define ABS(x) (((x) < 0) ? (-x) : (x)) 790 791 if (setmode & AUMODE_RECORD) { 792 /* The ADC reference frequency (f_out) is 512 * sample rate */ 793 794 /* f_out is dervied from the 24.576MHZ crystal by three values: 795 M & N & R. The equation is as follows: 796 797 f_out = (m + 2) * f_ref / ((n + 2) * (2 ^ a)) 798 799 with the constraint that: 800 801 80 MhZ < (m + 2) / (n + 2) * f_ref <= 150Mhz 802 and n, m >= 1 803 */ 804 805 int goal_f_out = 512 * rec->sample_rate; 806 int a, n, m, best_n = 0, best_m = 0, best_error = 10000000; 807 int pll_sample; 808 int error; 809 810 for (a = 0; a < 8; a++) { 811 if ((goal_f_out * (1 << a)) >= 80000000) 812 break; 813 } 814 815 /* a != 8 because sample_rate >= 2000 */ 816 817 for (n = 33; n > 2; n--) { 818 m = (goal_f_out * n * (1 << a)) / F_REF; 819 if ((m > 257) || (m < 3)) 820 continue; 821 822 pll_sample = (m * F_REF) / (n * (1 << a)); 823 pll_sample /= 512; 824 825 /* Threshold might be good here */ 826 error = pll_sample - rec->sample_rate; 827 error = ABS(error); 828 829 if (error < best_error) { 830 best_error = error; 831 best_n = n; 832 best_m = m; 833 if (error == 0) break; 834 } 835 } 836 837 best_n -= 2; 838 best_m -= 2; 839 840 sv_write_indirect(sc, SV_ADC_PLL_M, best_m); 841 sv_write_indirect(sc, SV_ADC_PLL_N, 842 best_n | (a << SV_PLL_R_SHIFT)); 843 } 844 845 return (0); 846 } 847 848 int 849 sv_round_blocksize(addr, blk) 850 void *addr; 851 int blk; 852 { 853 return (blk & -32); /* keep good alignment */ 854 } 855 856 int 857 sv_trigger_output(addr, start, end, blksize, intr, arg, param) 858 void *addr; 859 void *start, *end; 860 int blksize; 861 void (*intr) __P((void *)); 862 void *arg; 863 struct audio_params *param; 864 { 865 struct sv_softc *sc = addr; 866 struct sv_dma *p; 867 u_int8_t mode; 868 int dma_count; 869 870 DPRINTFN(1, ("sv_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 871 addr, start, end, blksize, intr, arg)); 872 sc->sc_pintr = intr; 873 sc->sc_parg = arg; 874 875 mode = sv_read_indirect(sc, SV_DMA_DATA_FORMAT); 876 mode &= ~(SV_DMAA_FORMAT16 | SV_DMAA_STEREO); 877 if (param->precision * param->factor == 16) 878 mode |= SV_DMAA_FORMAT16; 879 if (param->channels == 2) 880 mode |= SV_DMAA_STEREO; 881 sv_write_indirect(sc, SV_DMA_DATA_FORMAT, mode); 882 883 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 884 ; 885 if (!p) { 886 printf("sv_trigger_output: bad addr %p\n", start); 887 return (EINVAL); 888 } 889 890 dma_count = ((char *)end - (char *)start) - 1; 891 DPRINTF(("sv_trigger_output: dma start loop input addr=%x cc=%d\n", 892 (int)DMAADDR(p), dma_count)); 893 894 bus_space_write_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_ADDR0, 895 DMAADDR(p)); 896 bus_space_write_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_COUNT0, 897 dma_count); 898 bus_space_write_1(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_MODE, 899 DMA37MD_READ | DMA37MD_LOOP); 900 901 DPRINTF(("sv_trigger_output: current addr=%x\n", 902 bus_space_read_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_ADDR0))); 903 904 dma_count = blksize - 1; 905 906 sv_write_indirect(sc, SV_DMAA_COUNT1, dma_count >> 8); 907 sv_write_indirect(sc, SV_DMAA_COUNT0, dma_count & 0xFF); 908 909 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE); 910 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode | SV_PLAY_ENABLE); 911 912 return (0); 913 } 914 915 int 916 sv_trigger_input(addr, start, end, blksize, intr, arg, param) 917 void *addr; 918 void *start, *end; 919 int blksize; 920 void (*intr) __P((void *)); 921 void *arg; 922 struct audio_params *param; 923 { 924 struct sv_softc *sc = addr; 925 struct sv_dma *p; 926 u_int8_t mode; 927 int dma_count; 928 929 DPRINTFN(1, ("sv_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 930 addr, start, end, blksize, intr, arg)); 931 sc->sc_rintr = intr; 932 sc->sc_rarg = arg; 933 934 mode = sv_read_indirect(sc, SV_DMA_DATA_FORMAT); 935 mode &= ~(SV_DMAC_FORMAT16 | SV_DMAC_STEREO); 936 if (param->precision * param->factor == 16) 937 mode |= SV_DMAC_FORMAT16; 938 if (param->channels == 2) 939 mode |= SV_DMAC_STEREO; 940 sv_write_indirect(sc, SV_DMA_DATA_FORMAT, mode); 941 942 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 943 ; 944 if (!p) { 945 printf("sv_trigger_input: bad addr %p\n", start); 946 return (EINVAL); 947 } 948 949 dma_count = (((char *)end - (char *)start) >> 1) - 1; 950 DPRINTF(("sv_trigger_input: dma start loop input addr=%x cc=%d\n", 951 (int)DMAADDR(p), dma_count)); 952 953 bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_ADDR0, 954 DMAADDR(p)); 955 bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_COUNT0, 956 dma_count); 957 bus_space_write_1(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_MODE, 958 DMA37MD_WRITE | DMA37MD_LOOP); 959 960 DPRINTF(("sv_trigger_input: current addr=%x\n", 961 bus_space_read_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_ADDR0))); 962 963 dma_count = (blksize >> 1) - 1; 964 965 sv_write_indirect(sc, SV_DMAC_COUNT1, dma_count >> 8); 966 sv_write_indirect(sc, SV_DMAC_COUNT0, dma_count & 0xFF); 967 968 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE); 969 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode | SV_RECORD_ENABLE); 970 971 return (0); 972 } 973 974 int 975 sv_halt_output(addr) 976 void *addr; 977 { 978 struct sv_softc *sc = addr; 979 u_int8_t mode; 980 981 DPRINTF(("sv: sv_halt_output\n")); 982 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE); 983 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode & ~SV_PLAY_ENABLE); 984 985 return (0); 986 } 987 988 int 989 sv_halt_input(addr) 990 void *addr; 991 { 992 struct sv_softc *sc = addr; 993 u_int8_t mode; 994 995 DPRINTF(("sv: sv_halt_input\n")); 996 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE); 997 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode & ~SV_RECORD_ENABLE); 998 999 return (0); 1000 } 1001 1002 int 1003 sv_getdev(addr, retp) 1004 void *addr; 1005 struct audio_device *retp; 1006 { 1007 *retp = sv_device; 1008 return (0); 1009 } 1010 1011 1012 /* 1013 * Mixer related code is here 1014 * 1015 */ 1016 1017 #define SV_INPUT_CLASS 0 1018 #define SV_OUTPUT_CLASS 1 1019 #define SV_RECORD_CLASS 2 1020 1021 #define SV_LAST_CLASS 2 1022 1023 static const char *mixer_classes[] = 1024 { AudioCinputs, AudioCoutputs, AudioCrecord }; 1025 1026 static const struct { 1027 u_int8_t l_port; 1028 u_int8_t r_port; 1029 u_int8_t mask; 1030 u_int8_t class; 1031 const char *audio; 1032 } ports[] = { 1033 { SV_LEFT_AUX1_INPUT_CONTROL, SV_RIGHT_AUX1_INPUT_CONTROL, SV_AUX1_MASK, 1034 SV_INPUT_CLASS, "aux1" }, 1035 { SV_LEFT_CD_INPUT_CONTROL, SV_RIGHT_CD_INPUT_CONTROL, SV_CD_MASK, 1036 SV_INPUT_CLASS, AudioNcd }, 1037 { SV_LEFT_LINE_IN_INPUT_CONTROL, SV_RIGHT_LINE_IN_INPUT_CONTROL, SV_LINE_IN_MASK, 1038 SV_INPUT_CLASS, AudioNline }, 1039 { SV_MIC_INPUT_CONTROL, 0, SV_MIC_MASK, SV_INPUT_CLASS, AudioNmicrophone }, 1040 { SV_LEFT_SYNTH_INPUT_CONTROL, SV_RIGHT_SYNTH_INPUT_CONTROL, 1041 SV_SYNTH_MASK, SV_INPUT_CLASS, AudioNfmsynth }, 1042 { SV_LEFT_AUX2_INPUT_CONTROL, SV_RIGHT_AUX2_INPUT_CONTROL, SV_AUX2_MASK, 1043 SV_INPUT_CLASS, "aux2" }, 1044 { SV_LEFT_PCM_INPUT_CONTROL, SV_RIGHT_PCM_INPUT_CONTROL, SV_PCM_MASK, 1045 SV_INPUT_CLASS, AudioNdac }, 1046 { SV_LEFT_MIXER_OUTPUT_CONTROL, SV_RIGHT_MIXER_OUTPUT_CONTROL, 1047 SV_MIXER_OUT_MASK, SV_OUTPUT_CLASS, AudioNmaster } 1048 }; 1049 1050 1051 static const struct { 1052 int idx; 1053 const char *name; 1054 } record_sources[] = { 1055 { SV_REC_CD, AudioNcd }, 1056 { SV_REC_DAC, AudioNdac }, 1057 { SV_REC_AUX2, "aux2" }, 1058 { SV_REC_LINE, AudioNline }, 1059 { SV_REC_AUX1, "aux1" }, 1060 { SV_REC_MIC, AudioNmicrophone }, 1061 { SV_REC_MIXER, AudioNmixerout } 1062 }; 1063 1064 1065 #define SV_DEVICES_PER_PORT 2 1066 #define SV_FIRST_MIXER (SV_LAST_CLASS + 1) 1067 #define SV_LAST_MIXER (SV_DEVICES_PER_PORT * (ARRAY_SIZE(ports)) + SV_LAST_CLASS) 1068 #define SV_RECORD_SOURCE (SV_LAST_MIXER + 1) 1069 #define SV_MIC_BOOST (SV_LAST_MIXER + 2) 1070 #define SV_RECORD_GAIN (SV_LAST_MIXER + 3) 1071 #define SV_SRS_MODE (SV_LAST_MIXER + 4) 1072 1073 int 1074 sv_query_devinfo(addr, dip) 1075 void *addr; 1076 mixer_devinfo_t *dip; 1077 { 1078 int i; 1079 1080 /* It's a class */ 1081 if (dip->index <= SV_LAST_CLASS) { 1082 dip->type = AUDIO_MIXER_CLASS; 1083 dip->mixer_class = dip->index; 1084 dip->next = dip->prev = AUDIO_MIXER_LAST; 1085 strcpy(dip->label.name, 1086 mixer_classes[dip->index]); 1087 return (0); 1088 } 1089 1090 if (dip->index >= SV_FIRST_MIXER && 1091 dip->index <= SV_LAST_MIXER) { 1092 int off = dip->index - SV_FIRST_MIXER; 1093 int mute = (off % SV_DEVICES_PER_PORT); 1094 int idx = off / SV_DEVICES_PER_PORT; 1095 1096 dip->mixer_class = ports[idx].class; 1097 strcpy(dip->label.name, ports[idx].audio); 1098 1099 if (!mute) { 1100 dip->type = AUDIO_MIXER_VALUE; 1101 dip->prev = AUDIO_MIXER_LAST; 1102 dip->next = dip->index + 1; 1103 1104 if (ports[idx].r_port != 0) 1105 dip->un.v.num_channels = 2; 1106 else 1107 dip->un.v.num_channels = 1; 1108 1109 strcpy(dip->un.v.units.name, AudioNvolume); 1110 } else { 1111 dip->type = AUDIO_MIXER_ENUM; 1112 dip->prev = dip->index - 1; 1113 dip->next = AUDIO_MIXER_LAST; 1114 1115 strcpy(dip->label.name, AudioNmute); 1116 dip->un.e.num_mem = 2; 1117 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1118 dip->un.e.member[0].ord = 0; 1119 strcpy(dip->un.e.member[1].label.name, AudioNon); 1120 dip->un.e.member[1].ord = 1; 1121 } 1122 1123 return (0); 1124 } 1125 1126 switch (dip->index) { 1127 case SV_RECORD_SOURCE: 1128 dip->mixer_class = SV_RECORD_CLASS; 1129 dip->prev = AUDIO_MIXER_LAST; 1130 dip->next = SV_RECORD_GAIN; 1131 strcpy(dip->label.name, AudioNsource); 1132 dip->type = AUDIO_MIXER_ENUM; 1133 1134 dip->un.e.num_mem = ARRAY_SIZE(record_sources); 1135 for (i = 0; i < ARRAY_SIZE(record_sources); i++) { 1136 strcpy(dip->un.e.member[i].label.name, 1137 record_sources[i].name); 1138 dip->un.e.member[i].ord = record_sources[i].idx; 1139 } 1140 return (0); 1141 1142 case SV_RECORD_GAIN: 1143 dip->mixer_class = SV_RECORD_CLASS; 1144 dip->prev = SV_RECORD_SOURCE; 1145 dip->next = AUDIO_MIXER_LAST; 1146 strcpy(dip->label.name, "gain"); 1147 dip->type = AUDIO_MIXER_VALUE; 1148 dip->un.v.num_channels = 1; 1149 strcpy(dip->un.v.units.name, AudioNvolume); 1150 return (0); 1151 1152 case SV_MIC_BOOST: 1153 dip->mixer_class = SV_RECORD_CLASS; 1154 dip->prev = AUDIO_MIXER_LAST; 1155 dip->next = AUDIO_MIXER_LAST; 1156 strcpy(dip->label.name, "micboost"); 1157 goto on_off; 1158 1159 case SV_SRS_MODE: 1160 dip->mixer_class = SV_OUTPUT_CLASS; 1161 dip->prev = dip->next = AUDIO_MIXER_LAST; 1162 strcpy(dip->label.name, AudioNspatial); 1163 1164 on_off: 1165 dip->type = AUDIO_MIXER_ENUM; 1166 dip->un.e.num_mem = 2; 1167 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1168 dip->un.e.member[0].ord = 0; 1169 strcpy(dip->un.e.member[1].label.name, AudioNon); 1170 dip->un.e.member[1].ord = 1; 1171 return (0); 1172 } 1173 1174 return (ENXIO); 1175 } 1176 1177 int 1178 sv_mixer_set_port(addr, cp) 1179 void *addr; 1180 mixer_ctrl_t *cp; 1181 { 1182 struct sv_softc *sc = addr; 1183 u_int8_t reg; 1184 int idx; 1185 1186 if (cp->dev >= SV_FIRST_MIXER && 1187 cp->dev <= SV_LAST_MIXER) { 1188 int off = cp->dev - SV_FIRST_MIXER; 1189 int mute = (off % SV_DEVICES_PER_PORT); 1190 idx = off / SV_DEVICES_PER_PORT; 1191 1192 if (mute) { 1193 if (cp->type != AUDIO_MIXER_ENUM) 1194 return (EINVAL); 1195 1196 reg = sv_read_indirect(sc, ports[idx].l_port); 1197 if (cp->un.ord) 1198 reg |= SV_MUTE_BIT; 1199 else 1200 reg &= ~SV_MUTE_BIT; 1201 sv_write_indirect(sc, ports[idx].l_port, reg); 1202 1203 if (ports[idx].r_port) { 1204 reg = sv_read_indirect(sc, ports[idx].r_port); 1205 if (cp->un.ord) 1206 reg |= SV_MUTE_BIT; 1207 else 1208 reg &= ~SV_MUTE_BIT; 1209 sv_write_indirect(sc, ports[idx].r_port, reg); 1210 } 1211 } else { 1212 int lval, rval; 1213 1214 if (cp->type != AUDIO_MIXER_VALUE) 1215 return (EINVAL); 1216 1217 if (cp->un.value.num_channels != 1 && 1218 cp->un.value.num_channels != 2) 1219 return (EINVAL); 1220 1221 if (ports[idx].r_port == 0) { 1222 if (cp->un.value.num_channels != 1) 1223 return (EINVAL); 1224 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1225 rval = 0; /* shut up GCC */ 1226 } else { 1227 if (cp->un.value.num_channels != 2) 1228 return (EINVAL); 1229 1230 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1231 rval = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1232 } 1233 1234 1235 reg = sv_read_indirect(sc, ports[idx].l_port); 1236 reg &= ~(ports[idx].mask); 1237 lval = (AUDIO_MAX_GAIN - lval) * ports[idx].mask / 1238 AUDIO_MAX_GAIN; 1239 reg |= lval; 1240 sv_write_indirect(sc, ports[idx].l_port, reg); 1241 1242 if (ports[idx].r_port != 0) { 1243 reg = sv_read_indirect(sc, ports[idx].r_port); 1244 reg &= ~(ports[idx].mask); 1245 1246 rval = (AUDIO_MAX_GAIN - rval) * ports[idx].mask / 1247 AUDIO_MAX_GAIN; 1248 reg |= rval; 1249 1250 sv_write_indirect(sc, ports[idx].r_port, reg); 1251 } 1252 1253 sv_read_indirect(sc, ports[idx].l_port); 1254 } 1255 1256 return (0); 1257 } 1258 1259 1260 switch (cp->dev) { 1261 case SV_RECORD_SOURCE: 1262 if (cp->type != AUDIO_MIXER_ENUM) 1263 return (EINVAL); 1264 1265 for (idx = 0; idx < ARRAY_SIZE(record_sources); idx++) { 1266 if (record_sources[idx].idx == cp->un.ord) 1267 goto found; 1268 } 1269 1270 return (EINVAL); 1271 1272 found: 1273 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL); 1274 reg &= ~SV_REC_SOURCE_MASK; 1275 reg |= (((cp->un.ord) << SV_REC_SOURCE_SHIFT) & SV_REC_SOURCE_MASK); 1276 sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg); 1277 1278 reg = sv_read_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL); 1279 reg &= ~SV_REC_SOURCE_MASK; 1280 reg |= (((cp->un.ord) << SV_REC_SOURCE_SHIFT) & SV_REC_SOURCE_MASK); 1281 sv_write_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL, reg); 1282 return (0); 1283 1284 case SV_RECORD_GAIN: 1285 { 1286 int val; 1287 1288 if (cp->type != AUDIO_MIXER_VALUE) 1289 return (EINVAL); 1290 1291 if (cp->un.value.num_channels != 1) 1292 return (EINVAL); 1293 1294 val = (cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] * SV_REC_GAIN_MASK) 1295 / AUDIO_MAX_GAIN; 1296 1297 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL); 1298 reg &= ~SV_REC_GAIN_MASK; 1299 reg |= val; 1300 sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg); 1301 1302 reg = sv_read_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL); 1303 reg &= ~SV_REC_GAIN_MASK; 1304 reg |= val; 1305 sv_write_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL, reg); 1306 } 1307 return (0); 1308 1309 case SV_MIC_BOOST: 1310 if (cp->type != AUDIO_MIXER_ENUM) 1311 return (EINVAL); 1312 1313 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL); 1314 if (cp->un.ord) { 1315 reg |= SV_MIC_BOOST_BIT; 1316 } else { 1317 reg &= ~SV_MIC_BOOST_BIT; 1318 } 1319 1320 sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg); 1321 return (0); 1322 1323 case SV_SRS_MODE: 1324 if (cp->type != AUDIO_MIXER_ENUM) 1325 return (EINVAL); 1326 1327 reg = sv_read_indirect(sc, SV_SRS_SPACE_CONTROL); 1328 if (cp->un.ord) { 1329 reg &= ~SV_SRS_SPACE_ONOFF; 1330 } else { 1331 reg |= SV_SRS_SPACE_ONOFF; 1332 } 1333 1334 sv_write_indirect(sc, SV_SRS_SPACE_CONTROL, reg); 1335 return (0); 1336 } 1337 1338 return (EINVAL); 1339 } 1340 1341 int 1342 sv_mixer_get_port(addr, cp) 1343 void *addr; 1344 mixer_ctrl_t *cp; 1345 { 1346 struct sv_softc *sc = addr; 1347 int val; 1348 u_int8_t reg; 1349 1350 if (cp->dev >= SV_FIRST_MIXER && 1351 cp->dev <= SV_LAST_MIXER) { 1352 int off = cp->dev - SV_FIRST_MIXER; 1353 int mute = (off % 2); 1354 int idx = off / 2; 1355 1356 if (mute) { 1357 if (cp->type != AUDIO_MIXER_ENUM) 1358 return (EINVAL); 1359 1360 reg = sv_read_indirect(sc, ports[idx].l_port); 1361 cp->un.ord = ((reg & SV_MUTE_BIT) ? 1 : 0); 1362 } else { 1363 if (cp->type != AUDIO_MIXER_VALUE) 1364 return (EINVAL); 1365 1366 if (cp->un.value.num_channels != 1 && 1367 cp->un.value.num_channels != 2) 1368 return (EINVAL); 1369 1370 if ((ports[idx].r_port == 0 && 1371 cp->un.value.num_channels != 1) || 1372 (ports[idx].r_port != 0 && 1373 cp->un.value.num_channels != 2)) 1374 return (EINVAL); 1375 1376 reg = sv_read_indirect(sc, ports[idx].l_port); 1377 reg &= ports[idx].mask; 1378 1379 val = AUDIO_MAX_GAIN - ((reg * AUDIO_MAX_GAIN) / ports[idx].mask); 1380 1381 if (ports[idx].r_port != 0) { 1382 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = val; 1383 1384 reg = sv_read_indirect(sc, ports[idx].r_port); 1385 reg &= ports[idx].mask; 1386 1387 val = AUDIO_MAX_GAIN - ((reg * AUDIO_MAX_GAIN) / ports[idx].mask); 1388 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = val; 1389 } else 1390 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = val; 1391 } 1392 1393 return (0); 1394 } 1395 1396 switch (cp->dev) { 1397 case SV_RECORD_SOURCE: 1398 if (cp->type != AUDIO_MIXER_ENUM) 1399 return (EINVAL); 1400 1401 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL); 1402 cp->un.ord = ((reg & SV_REC_SOURCE_MASK) >> SV_REC_SOURCE_SHIFT); 1403 1404 return (0); 1405 1406 case SV_RECORD_GAIN: 1407 if (cp->type != AUDIO_MIXER_VALUE) 1408 return (EINVAL); 1409 if (cp->un.value.num_channels != 1) 1410 return (EINVAL); 1411 1412 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL) & SV_REC_GAIN_MASK; 1413 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = 1414 (((unsigned int)reg) * AUDIO_MAX_GAIN) / SV_REC_GAIN_MASK; 1415 1416 return (0); 1417 1418 case SV_MIC_BOOST: 1419 if (cp->type != AUDIO_MIXER_ENUM) 1420 return (EINVAL); 1421 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL); 1422 cp->un.ord = ((reg & SV_MIC_BOOST_BIT) ? 1 : 0); 1423 return (0); 1424 1425 1426 case SV_SRS_MODE: 1427 if (cp->type != AUDIO_MIXER_ENUM) 1428 return (EINVAL); 1429 reg = sv_read_indirect(sc, SV_SRS_SPACE_CONTROL); 1430 cp->un.ord = ((reg & SV_SRS_SPACE_ONOFF) ? 0 : 1); 1431 return (0); 1432 } 1433 1434 return (EINVAL); 1435 } 1436 1437 1438 static void 1439 sv_init_mixer(sc) 1440 struct sv_softc *sc; 1441 { 1442 mixer_ctrl_t cp; 1443 int i; 1444 1445 cp.type = AUDIO_MIXER_ENUM; 1446 cp.dev = SV_SRS_MODE; 1447 cp.un.ord = 0; 1448 1449 sv_mixer_set_port(sc, &cp); 1450 1451 for (i = 0; i < ARRAY_SIZE(ports); i++) { 1452 if (ports[i].audio == AudioNdac) { 1453 cp.type = AUDIO_MIXER_ENUM; 1454 cp.dev = SV_FIRST_MIXER + i * SV_DEVICES_PER_PORT + 1; 1455 cp.un.ord = 0; 1456 sv_mixer_set_port(sc, &cp); 1457 break; 1458 } 1459 } 1460 } 1461 1462 void * 1463 sv_malloc(addr, direction, size, pool, flags) 1464 void *addr; 1465 int direction; 1466 size_t size; 1467 struct malloc_type *pool; 1468 int flags; 1469 { 1470 struct sv_softc *sc = addr; 1471 struct sv_dma *p; 1472 int error; 1473 1474 p = malloc(sizeof(*p), pool, flags); 1475 if (!p) 1476 return (0); 1477 error = sv_allocmem(sc, size, 16, direction, p); 1478 if (error) { 1479 free(p, pool); 1480 return (0); 1481 } 1482 p->next = sc->sc_dmas; 1483 sc->sc_dmas = p; 1484 return (KERNADDR(p)); 1485 } 1486 1487 void 1488 sv_free(addr, ptr, pool) 1489 void *addr; 1490 void *ptr; 1491 struct malloc_type *pool; 1492 { 1493 struct sv_softc *sc = addr; 1494 struct sv_dma **pp, *p; 1495 1496 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1497 if (KERNADDR(p) == ptr) { 1498 sv_freemem(sc, p); 1499 *pp = p->next; 1500 free(p, pool); 1501 return; 1502 } 1503 } 1504 } 1505 1506 size_t 1507 sv_round_buffersize(addr, direction, size) 1508 void *addr; 1509 int direction; 1510 size_t size; 1511 { 1512 return (size); 1513 } 1514 1515 paddr_t 1516 sv_mappage(addr, mem, off, prot) 1517 void *addr; 1518 void *mem; 1519 off_t off; 1520 int prot; 1521 { 1522 struct sv_softc *sc = addr; 1523 struct sv_dma *p; 1524 1525 if (off < 0) 1526 return (-1); 1527 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1528 ; 1529 if (!p) 1530 return (-1); 1531 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1532 off, prot, BUS_DMA_WAITOK)); 1533 } 1534 1535 int 1536 sv_get_props(addr) 1537 void *addr; 1538 { 1539 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX); 1540 } 1541
Indexes created Wed Oct 01 19:09:53 GMT 2025