sv.c revision 1.24 1 /* $NetBSD: sv.c,v 1.24 2004/07/09 02:42:45 mycroft Exp $ */
2 /* $OpenBSD: sv.c,v 1.2 1998/07/13 01:50:15 csapuntz Exp $ */
3
4 /*
5 * Copyright (c) 1999 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1998 Constantine Paul Sapuntzakis
42 * All rights reserved
43 *
44 * Author: Constantine Paul Sapuntzakis (csapuntz (at) cvs.openbsd.org)
45 *
46 * Redistribution and use in source and binary forms, with or without
47 * modification, are permitted provided that the following conditions
48 * are met:
49 * 1. Redistributions of source code must retain the above copyright
50 * notice, this list of conditions and the following disclaimer.
51 * 2. Redistributions in binary form must reproduce the above copyright
52 * notice, this list of conditions and the following disclaimer in the
53 * documentation and/or other materials provided with the distribution.
54 * 3. The author's name or those of the contributors may be used to
55 * endorse or promote products derived from this software without
56 * specific prior written permission.
57 *
58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR(S) AND CONTRIBUTORS
59 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68 * POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 /*
72 * S3 SonicVibes driver
73 * Heavily based on the eap driver by Lennart Augustsson
74 */
75
76 #include <sys/cdefs.h>
77 __KERNEL_RCSID(0, "$NetBSD: sv.c,v 1.24 2004/07/09 02:42:45 mycroft Exp $");
78
79 #include <sys/param.h>
80 #include <sys/systm.h>
81 #include <sys/kernel.h>
82 #include <sys/malloc.h>
83 #include <sys/device.h>
84
85 #include <dev/pci/pcireg.h>
86 #include <dev/pci/pcivar.h>
87 #include <dev/pci/pcidevs.h>
88
89 #include <sys/audioio.h>
90 #include <dev/audio_if.h>
91 #include <dev/mulaw.h>
92 #include <dev/auconv.h>
93
94 #include <dev/ic/i8237reg.h>
95 #include <dev/pci/svreg.h>
96 #include <dev/pci/svvar.h>
97
98 #include <machine/bus.h>
99
100 /* XXX
101 * The SonicVibes DMA is broken and only works on 24-bit addresses.
102 * As long as bus_dmamem_alloc_range() is missing we use the ISA
103 * DMA tag on i386.
104 */
105 #if defined(i386)
106 #include "isa.h"
107 #if NISA > 0
108 #include <dev/isa/isavar.h>
109 #endif
110 #endif
111
112 #ifdef AUDIO_DEBUG
113 #define DPRINTF(x) if (svdebug) printf x
114 #define DPRINTFN(n,x) if (svdebug>(n)) printf x
115 int svdebug = 0;
116 #else
117 #define DPRINTF(x)
118 #define DPRINTFN(n,x)
119 #endif
120
121 int sv_match __P((struct device *, struct cfdata *, void *));
122 void sv_attach __P((struct device *, struct device *, void *));
123 int sv_intr __P((void *));
124
125 struct sv_dma {
126 bus_dmamap_t map;
127 caddr_t addr;
128 bus_dma_segment_t segs[1];
129 int nsegs;
130 size_t size;
131 struct sv_dma *next;
132 };
133 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
134 #define KERNADDR(p) ((void *)((p)->addr))
135
136 CFATTACH_DECL(sv, sizeof(struct sv_softc),
137 sv_match, sv_attach, NULL, NULL);
138
139 struct audio_device sv_device = {
140 "S3 SonicVibes",
141 "",
142 "sv"
143 };
144
145 #define ARRAY_SIZE(foo) ((sizeof(foo)) / sizeof(foo[0]))
146
147 int sv_allocmem __P((struct sv_softc *, size_t, size_t, int, struct sv_dma *));
148 int sv_freemem __P((struct sv_softc *, struct sv_dma *));
149
150 int sv_open __P((void *, int));
151 void sv_close __P((void *));
152 int sv_query_encoding __P((void *, struct audio_encoding *));
153 int sv_set_params __P((void *, int, int, struct audio_params *, struct audio_params *));
154 int sv_round_blocksize __P((void *, int));
155 int sv_trigger_output __P((void *, void *, void *, int, void (*)(void *),
156 void *, struct audio_params *));
157 int sv_trigger_input __P((void *, void *, void *, int, void (*)(void *),
158 void *, struct audio_params *));
159 int sv_halt_output __P((void *));
160 int sv_halt_input __P((void *));
161 int sv_getdev __P((void *, struct audio_device *));
162 int sv_mixer_set_port __P((void *, mixer_ctrl_t *));
163 int sv_mixer_get_port __P((void *, mixer_ctrl_t *));
164 int sv_query_devinfo __P((void *, mixer_devinfo_t *));
165 void *sv_malloc __P((void *, int, size_t, struct malloc_type *, int));
166 void sv_free __P((void *, void *, struct malloc_type *));
167 size_t sv_round_buffersize __P((void *, int, size_t));
168 paddr_t sv_mappage __P((void *, void *, off_t, int));
169 int sv_get_props __P((void *));
170
171 #ifdef AUDIO_DEBUG
172 void sv_dumpregs __P((struct sv_softc *sc));
173 #endif
174
175 struct audio_hw_if sv_hw_if = {
176 sv_open,
177 sv_close,
178 NULL,
179 sv_query_encoding,
180 sv_set_params,
181 sv_round_blocksize,
182 NULL,
183 NULL,
184 NULL,
185 NULL,
186 NULL,
187 sv_halt_output,
188 sv_halt_input,
189 NULL,
190 sv_getdev,
191 NULL,
192 sv_mixer_set_port,
193 sv_mixer_get_port,
194 sv_query_devinfo,
195 sv_malloc,
196 sv_free,
197 sv_round_buffersize,
198 sv_mappage,
199 sv_get_props,
200 sv_trigger_output,
201 sv_trigger_input,
202 NULL,
203 };
204
205
206 static u_int8_t sv_read __P((struct sv_softc *, u_int8_t));
207 static u_int8_t sv_read_indirect __P((struct sv_softc *, u_int8_t));
208 static void sv_write __P((struct sv_softc *, u_int8_t, u_int8_t ));
209 static void sv_write_indirect __P((struct sv_softc *, u_int8_t, u_int8_t ));
210 static void sv_init_mixer __P((struct sv_softc *));
211
212 static void sv_defer __P((struct device *self));
213
214 static void
215 sv_write (sc, reg, val)
216 struct sv_softc *sc;
217 u_int8_t reg, val;
218
219 {
220 DPRINTFN(8,("sv_write(0x%x, 0x%x)\n", reg, val));
221 bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val);
222 }
223
224 static u_int8_t
225 sv_read(sc, reg)
226 struct sv_softc *sc;
227 u_int8_t reg;
228
229 {
230 u_int8_t val;
231
232 val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg);
233 DPRINTFN(8,("sv_read(0x%x) = 0x%x\n", reg, val));
234 return val;
235 }
236
237 static u_int8_t
238 sv_read_indirect(sc, reg)
239 struct sv_softc *sc;
240 u_int8_t reg;
241 {
242 u_int8_t val;
243 int s = splaudio();
244
245 sv_write(sc, SV_CODEC_IADDR, reg & SV_IADDR_MASK);
246 val = sv_read(sc, SV_CODEC_IDATA);
247 splx(s);
248 return (val);
249 }
250
251 static void
252 sv_write_indirect(sc, reg, val)
253 struct sv_softc *sc;
254 u_int8_t reg, val;
255 {
256 u_int8_t iaddr = reg & SV_IADDR_MASK;
257 int s = splaudio();
258
259 if (reg == SV_DMA_DATA_FORMAT)
260 iaddr |= SV_IADDR_MCE;
261
262 sv_write(sc, SV_CODEC_IADDR, iaddr);
263 sv_write(sc, SV_CODEC_IDATA, val);
264 splx(s);
265 }
266
267 int
268 sv_match(parent, match, aux)
269 struct device *parent;
270 struct cfdata *match;
271 void *aux;
272 {
273 struct pci_attach_args *pa = aux;
274
275 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_S3 &&
276 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_S3_SONICVIBES)
277 return (1);
278
279 return (0);
280 }
281
282 int pci_alloc_io __P((pci_chipset_tag_t pc, pcitag_t pt,
283 int pcioffs,
284 bus_space_tag_t iot, bus_size_t size,
285 bus_size_t align, bus_size_t bound, int flags,
286 bus_space_handle_t *ioh));
287
288 static pcireg_t pci_io_alloc_low, pci_io_alloc_high;
289
290 int
291 pci_alloc_io(pc, pt, pcioffs, iot, size, align, bound, flags, ioh)
292 pci_chipset_tag_t pc;
293 pcitag_t pt;
294 int pcioffs;
295 bus_space_tag_t iot;
296 bus_size_t size;
297 bus_size_t align;
298 bus_size_t bound;
299 int flags;
300 bus_space_handle_t *ioh;
301 {
302 bus_addr_t addr;
303 int error;
304
305 error = bus_space_alloc(iot, pci_io_alloc_low, pci_io_alloc_high,
306 size, align, bound, flags, &addr, ioh);
307 if (error)
308 return(error);
309
310 pci_conf_write(pc, pt, pcioffs, addr);
311 return (0);
312 }
313
314 /*
315 * Allocate IO addresses when all other configuration is done.
316 */
317 void
318 sv_defer(self)
319 struct device *self;
320 {
321 struct sv_softc *sc = (struct sv_softc *)self;
322 pci_chipset_tag_t pc = sc->sc_pa.pa_pc;
323 pcitag_t pt = sc->sc_pa.pa_tag;
324 pcireg_t dmaio;
325
326 DPRINTF(("sv_defer: %p\n", sc));
327
328 /* XXX
329 * Get a reasonable default for the I/O range.
330 * Assume the range around SB_PORTBASE is valid on this PCI bus.
331 */
332 pci_io_alloc_low = pci_conf_read(pc, pt, SV_SB_PORTBASE_SLOT);
333 pci_io_alloc_high = pci_io_alloc_low + 0x1000;
334
335 if (pci_alloc_io(pc, pt, SV_DMAA_CONFIG_OFF,
336 sc->sc_iot, SV_DMAA_SIZE, SV_DMAA_ALIGN, 0,
337 0, &sc->sc_dmaa_ioh)) {
338 printf("sv_attach: cannot allocate DMA A range\n");
339 return;
340 }
341 dmaio = pci_conf_read(pc, pt, SV_DMAA_CONFIG_OFF);
342 DPRINTF(("sv_attach: addr a dmaio=0x%lx\n", (u_long)dmaio));
343 pci_conf_write(pc, pt, SV_DMAA_CONFIG_OFF,
344 dmaio | SV_DMA_CHANNEL_ENABLE | SV_DMAA_EXTENDED_ADDR);
345
346 if (pci_alloc_io(pc, pt, SV_DMAC_CONFIG_OFF,
347 sc->sc_iot, SV_DMAC_SIZE, SV_DMAC_ALIGN, 0,
348 0, &sc->sc_dmac_ioh)) {
349 printf("sv_attach: cannot allocate DMA C range\n");
350 return;
351 }
352 dmaio = pci_conf_read(pc, pt, SV_DMAC_CONFIG_OFF);
353 DPRINTF(("sv_attach: addr c dmaio=0x%lx\n", (u_long)dmaio));
354 pci_conf_write(pc, pt, SV_DMAC_CONFIG_OFF,
355 dmaio | SV_DMA_CHANNEL_ENABLE);
356
357 sc->sc_dmaset = 1;
358 }
359
360 void
361 sv_attach(parent, self, aux)
362 struct device *parent, *self;
363 void *aux;
364 {
365 struct sv_softc *sc = (struct sv_softc *)self;
366 struct pci_attach_args *pa = aux;
367 pci_chipset_tag_t pc = pa->pa_pc;
368 pcitag_t pt = pa->pa_tag;
369 pci_intr_handle_t ih;
370 pcireg_t csr;
371 char const *intrstr;
372 u_int8_t reg;
373 struct audio_attach_args arg;
374
375 printf ("\n");
376
377 /* Map I/O registers */
378 if (pci_mapreg_map(pa, SV_ENHANCED_PORTBASE_SLOT,
379 PCI_MAPREG_TYPE_IO, 0,
380 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) {
381 printf("%s: can't map enhanced i/o space\n",
382 sc->sc_dev.dv_xname);
383 return;
384 }
385 if (pci_mapreg_map(pa, SV_FM_PORTBASE_SLOT,
386 PCI_MAPREG_TYPE_IO, 0,
387 &sc->sc_opliot, &sc->sc_oplioh, NULL, NULL)) {
388 printf("%s: can't map FM i/o space\n", sc->sc_dev.dv_xname);
389 return;
390 }
391 if (pci_mapreg_map(pa, SV_MIDI_PORTBASE_SLOT,
392 PCI_MAPREG_TYPE_IO, 0,
393 &sc->sc_midiiot, &sc->sc_midiioh, NULL, NULL)) {
394 printf("%s: can't map MIDI i/o space\n", sc->sc_dev.dv_xname);
395 return;
396 }
397 DPRINTF(("sv: IO ports: enhanced=0x%x, OPL=0x%x, MIDI=0x%x\n",
398 (int)sc->sc_ioh, (int)sc->sc_oplioh, (int)sc->sc_midiioh));
399
400 #if defined(alpha)
401 /* XXX Force allocation through the SGMAP. */
402 sc->sc_dmatag = alphabus_dma_get_tag(pa->pa_dmat, ALPHA_BUS_ISA);
403 #elif defined(i386) && NISA > 0
404 /* XXX
405 * The SonicVibes DMA is broken and only works on 24-bit addresses.
406 * As long as bus_dmamem_alloc_range() is missing we use the ISA
407 * DMA tag on i386.
408 */
409 sc->sc_dmatag = &isa_bus_dma_tag;
410 #else
411 sc->sc_dmatag = pa->pa_dmat;
412 #endif
413
414 pci_conf_write(pc, pt, SV_DMAA_CONFIG_OFF, SV_DMAA_EXTENDED_ADDR);
415 pci_conf_write(pc, pt, SV_DMAC_CONFIG_OFF, 0);
416
417 /* Enable the device. */
418 csr = pci_conf_read(pc, pt, PCI_COMMAND_STATUS_REG);
419 pci_conf_write(pc, pt, PCI_COMMAND_STATUS_REG,
420 csr | PCI_COMMAND_MASTER_ENABLE);
421
422 sv_write_indirect(sc, SV_ANALOG_POWER_DOWN_CONTROL, 0);
423 sv_write_indirect(sc, SV_DIGITAL_POWER_DOWN_CONTROL, 0);
424
425 /* initialize codec registers */
426 reg = sv_read(sc, SV_CODEC_CONTROL);
427 reg |= SV_CTL_RESET;
428 sv_write(sc, SV_CODEC_CONTROL, reg);
429 delay(50);
430
431 reg = sv_read(sc, SV_CODEC_CONTROL);
432 reg &= ~SV_CTL_RESET;
433 reg |= SV_CTL_INTA | SV_CTL_ENHANCED;
434
435 /* This write clears the reset */
436 sv_write(sc, SV_CODEC_CONTROL, reg);
437 delay(50);
438
439 /* This write actually shoves the new values in */
440 sv_write(sc, SV_CODEC_CONTROL, reg);
441
442 DPRINTF(("sv_attach: control=0x%x\n", sv_read(sc, SV_CODEC_CONTROL)));
443
444 /* Enable DMA interrupts */
445 reg = sv_read(sc, SV_CODEC_INTMASK);
446 reg &= ~(SV_INTMASK_DMAA | SV_INTMASK_DMAC);
447 reg |= SV_INTMASK_UD | SV_INTMASK_SINT | SV_INTMASK_MIDI;
448 sv_write(sc, SV_CODEC_INTMASK, reg);
449
450 sv_read(sc, SV_CODEC_STATUS);
451
452 /* Map and establish the interrupt. */
453 if (pci_intr_map(pa, &ih)) {
454 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
455 return;
456 }
457 intrstr = pci_intr_string(pc, ih);
458 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, sv_intr, sc);
459 if (sc->sc_ih == NULL) {
460 printf("%s: couldn't establish interrupt",
461 sc->sc_dev.dv_xname);
462 if (intrstr != NULL)
463 printf(" at %s", intrstr);
464 printf("\n");
465 return;
466 }
467 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
468 printf("%s: rev %d", sc->sc_dev.dv_xname,
469 sv_read_indirect(sc, SV_REVISION_LEVEL));
470 if (sv_read(sc, SV_CODEC_CONTROL) & SV_CTL_MD1)
471 printf(", reverb SRAM present");
472 if (!(sv_read_indirect(sc, SV_WAVETABLE_SOURCE_SELECT) & SV_WSS_WT0))
473 printf(", wavetable ROM present");
474 printf("\n");
475
476 sv_init_mixer(sc);
477
478 audio_attach_mi(&sv_hw_if, sc, &sc->sc_dev);
479
480 arg.type = AUDIODEV_TYPE_OPL;
481 arg.hwif = 0;
482 arg.hdl = 0;
483 (void)config_found(&sc->sc_dev, &arg, audioprint);
484
485 sc->sc_pa = *pa; /* for deferred setup */
486 config_defer(self, sv_defer);
487 }
488
489 #ifdef AUDIO_DEBUG
490 void
491 sv_dumpregs(sc)
492 struct sv_softc *sc;
493 {
494 int idx;
495
496 #if 0
497 for (idx = 0; idx < 0x50; idx += 4)
498 printf ("%02x = %x\n", idx,
499 pci_conf_read(pa->pa_pc, pa->pa_tag, idx));
500 #endif
501
502 for (idx = 0; idx < 6; idx++)
503 printf ("REG %02x = %02x\n", idx, sv_read(sc, idx));
504
505 for (idx = 0; idx < 0x32; idx++)
506 printf ("IREG %02x = %02x\n", idx, sv_read_indirect(sc, idx));
507
508 for (idx = 0; idx < 0x10; idx++)
509 printf ("DMA %02x = %02x\n", idx,
510 bus_space_read_1(sc->sc_iot, sc->sc_dmaa_ioh, idx));
511 }
512 #endif
513
514 int
515 sv_intr(p)
516 void *p;
517 {
518 struct sv_softc *sc = p;
519 u_int8_t intr;
520
521 intr = sv_read(sc, SV_CODEC_STATUS);
522 DPRINTFN(5,("sv_intr: intr=0x%x\n", intr));
523
524 if (!(intr & (SV_INTSTATUS_DMAA | SV_INTSTATUS_DMAC)))
525 return (0);
526
527 if (intr & SV_INTSTATUS_DMAA) {
528 if (sc->sc_pintr)
529 sc->sc_pintr(sc->sc_parg);
530 }
531
532 if (intr & SV_INTSTATUS_DMAC) {
533 if (sc->sc_rintr)
534 sc->sc_rintr(sc->sc_rarg);
535 }
536
537 return (1);
538 }
539
540 int
541 sv_allocmem(sc, size, align, direction, p)
542 struct sv_softc *sc;
543 size_t size;
544 size_t align;
545 int direction;
546 struct sv_dma *p;
547 {
548 int error;
549
550 p->size = size;
551 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
552 p->segs, ARRAY_SIZE(p->segs),
553 &p->nsegs, BUS_DMA_NOWAIT);
554 if (error)
555 return (error);
556
557 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
558 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
559 if (error)
560 goto free;
561
562 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
563 0, BUS_DMA_NOWAIT, &p->map);
564 if (error)
565 goto unmap;
566
567 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
568 BUS_DMA_NOWAIT |
569 (direction == AUMODE_RECORD) ? BUS_DMA_READ : BUS_DMA_WRITE);
570 if (error)
571 goto destroy;
572 DPRINTF(("sv_allocmem: pa=%lx va=%lx pba=%lx\n",
573 (long)p->segs[0].ds_addr, (long)KERNADDR(p), (long)DMAADDR(p)));
574 return (0);
575
576 destroy:
577 bus_dmamap_destroy(sc->sc_dmatag, p->map);
578 unmap:
579 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
580 free:
581 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
582 return (error);
583 }
584
585 int
586 sv_freemem(sc, p)
587 struct sv_softc *sc;
588 struct sv_dma *p;
589 {
590 bus_dmamap_unload(sc->sc_dmatag, p->map);
591 bus_dmamap_destroy(sc->sc_dmatag, p->map);
592 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
593 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
594 return (0);
595 }
596
597 int
598 sv_open(addr, flags)
599 void *addr;
600 int flags;
601 {
602 struct sv_softc *sc = addr;
603
604 DPRINTF(("sv_open\n"));
605 if (!sc->sc_dmaset)
606 return (ENXIO);
607
608 return (0);
609 }
610
611 /*
612 * Close function is called at splaudio().
613 */
614 void
615 sv_close(addr)
616 void *addr;
617 {
618 }
619
620 int
621 sv_query_encoding(addr, fp)
622 void *addr;
623 struct audio_encoding *fp;
624 {
625 switch (fp->index) {
626 case 0:
627 strcpy(fp->name, AudioEulinear);
628 fp->encoding = AUDIO_ENCODING_ULINEAR;
629 fp->precision = 8;
630 fp->flags = 0;
631 return (0);
632 case 1:
633 strcpy(fp->name, AudioEmulaw);
634 fp->encoding = AUDIO_ENCODING_ULAW;
635 fp->precision = 8;
636 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
637 return (0);
638 case 2:
639 strcpy(fp->name, AudioEalaw);
640 fp->encoding = AUDIO_ENCODING_ALAW;
641 fp->precision = 8;
642 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
643 return (0);
644 case 3:
645 strcpy(fp->name, AudioEslinear);
646 fp->encoding = AUDIO_ENCODING_SLINEAR;
647 fp->precision = 8;
648 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
649 return (0);
650 case 4:
651 strcpy(fp->name, AudioEslinear_le);
652 fp->encoding = AUDIO_ENCODING_SLINEAR_LE;
653 fp->precision = 16;
654 fp->flags = 0;
655 return (0);
656 case 5:
657 strcpy(fp->name, AudioEulinear_le);
658 fp->encoding = AUDIO_ENCODING_ULINEAR_LE;
659 fp->precision = 16;
660 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
661 return (0);
662 case 6:
663 strcpy(fp->name, AudioEslinear_be);
664 fp->encoding = AUDIO_ENCODING_SLINEAR_BE;
665 fp->precision = 16;
666 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
667 return (0);
668 case 7:
669 strcpy(fp->name, AudioEulinear_be);
670 fp->encoding = AUDIO_ENCODING_ULINEAR_BE;
671 fp->precision = 16;
672 fp->flags = AUDIO_ENCODINGFLAG_EMULATED;
673 return (0);
674 default:
675 return (EINVAL);
676 }
677 }
678
679 int
680 sv_set_params(addr, setmode, usemode, play, rec)
681 void *addr;
682 int setmode, usemode;
683 struct audio_params *play, *rec;
684 {
685 struct sv_softc *sc = addr;
686 struct audio_params *p = NULL;
687 int mode;
688 u_int32_t val;
689
690 /*
691 * This device only has one clock, so make the sample rates match.
692 */
693 if (play->sample_rate != rec->sample_rate &&
694 usemode == (AUMODE_PLAY | AUMODE_RECORD)) {
695 if (setmode == AUMODE_PLAY) {
696 rec->sample_rate = play->sample_rate;
697 setmode |= AUMODE_RECORD;
698 } else if (setmode == AUMODE_RECORD) {
699 play->sample_rate = rec->sample_rate;
700 setmode |= AUMODE_PLAY;
701 } else
702 return (EINVAL);
703 }
704
705 for (mode = AUMODE_RECORD; mode != -1;
706 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
707 if ((setmode & mode) == 0)
708 continue;
709
710 p = mode == AUMODE_PLAY ? play : rec;
711
712 if (p->sample_rate < 2000 || p->sample_rate > 48000 ||
713 (p->precision != 8 && p->precision != 16) ||
714 (p->channels != 1 && p->channels != 2))
715 return (EINVAL);
716
717 p->factor = 1;
718 p->sw_code = 0;
719 switch (p->encoding) {
720 case AUDIO_ENCODING_SLINEAR_BE:
721 if (p->precision == 16)
722 p->sw_code = swap_bytes;
723 else
724 p->sw_code = change_sign8;
725 break;
726 case AUDIO_ENCODING_SLINEAR_LE:
727 if (p->precision != 16)
728 p->sw_code = change_sign8;
729 break;
730 case AUDIO_ENCODING_ULINEAR_BE:
731 if (p->precision == 16) {
732 if (mode == AUMODE_PLAY)
733 p->sw_code = swap_bytes_change_sign16_le;
734 else
735 p->sw_code = change_sign16_swap_bytes_le;
736 }
737 break;
738 case AUDIO_ENCODING_ULINEAR_LE:
739 if (p->precision == 16)
740 p->sw_code = change_sign16_le;
741 break;
742 case AUDIO_ENCODING_ULAW:
743 if (mode == AUMODE_PLAY) {
744 p->factor = 2;
745 p->sw_code = mulaw_to_slinear16_le;
746 } else
747 p->sw_code = ulinear8_to_mulaw;
748 break;
749 case AUDIO_ENCODING_ALAW:
750 if (mode == AUMODE_PLAY) {
751 p->factor = 2;
752 p->sw_code = alaw_to_slinear16_le;
753 } else
754 p->sw_code = ulinear8_to_alaw;
755 break;
756 default:
757 return (EINVAL);
758 }
759 }
760
761 val = p->sample_rate * 65536 / 48000;
762 /*
763 * If the sample rate is exactly 48KHz, the fraction would overflow the
764 * register, so we have to bias it. This causes a little clock drift.
765 * The drift is below normal crystal tolerance (.0001%), so although
766 * this seems a little silly, we can pretty much ignore it.
767 * (I tested the output speed with values of 1-20, just to be sure this
768 * register isn't *supposed* to have a bias. It isn't.)
769 * - mycroft
770 */
771 if (val > 65535)
772 val = 65535;
773
774 sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_0, val & 0xff);
775 sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_1, val >> 8);
776
777 #define F_REF 24576000
778
779 #define ABS(x) (((x) < 0) ? (-x) : (x))
780
781 if (setmode & AUMODE_RECORD) {
782 /* The ADC reference frequency (f_out) is 512 * sample rate */
783
784 /* f_out is dervied from the 24.576MHz crystal by three values:
785 M & N & R. The equation is as follows:
786
787 f_out = (m + 2) * f_ref / ((n + 2) * (2 ^ a))
788
789 with the constraint that:
790
791 80 MHz < (m + 2) / (n + 2) * f_ref <= 150MHz
792 and n, m >= 1
793 */
794
795 int goal_f_out = 512 * rec->sample_rate;
796 int a, n, m, best_n = 0, best_m = 0, best_error = 10000000;
797 int pll_sample;
798 int error;
799
800 for (a = 0; a < 8; a++) {
801 if ((goal_f_out * (1 << a)) >= 80000000)
802 break;
803 }
804
805 /* a != 8 because sample_rate >= 2000 */
806
807 for (n = 33; n > 2; n--) {
808 m = (goal_f_out * n * (1 << a)) / F_REF;
809 if ((m > 257) || (m < 3))
810 continue;
811
812 pll_sample = (m * F_REF) / (n * (1 << a));
813 pll_sample /= 512;
814
815 /* Threshold might be good here */
816 error = pll_sample - rec->sample_rate;
817 error = ABS(error);
818
819 if (error < best_error) {
820 best_error = error;
821 best_n = n;
822 best_m = m;
823 if (error == 0) break;
824 }
825 }
826
827 best_n -= 2;
828 best_m -= 2;
829
830 sv_write_indirect(sc, SV_ADC_PLL_M, best_m);
831 sv_write_indirect(sc, SV_ADC_PLL_N,
832 best_n | (a << SV_PLL_R_SHIFT));
833 }
834
835 return (0);
836 }
837
838 int
839 sv_round_blocksize(addr, blk)
840 void *addr;
841 int blk;
842 {
843 return (blk & -32); /* keep good alignment */
844 }
845
846 int
847 sv_trigger_output(addr, start, end, blksize, intr, arg, param)
848 void *addr;
849 void *start, *end;
850 int blksize;
851 void (*intr) __P((void *));
852 void *arg;
853 struct audio_params *param;
854 {
855 struct sv_softc *sc = addr;
856 struct sv_dma *p;
857 u_int8_t mode;
858 int dma_count;
859
860 DPRINTFN(1, ("sv_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
861 addr, start, end, blksize, intr, arg));
862 sc->sc_pintr = intr;
863 sc->sc_parg = arg;
864
865 mode = sv_read_indirect(sc, SV_DMA_DATA_FORMAT);
866 mode &= ~(SV_DMAA_FORMAT16 | SV_DMAA_STEREO);
867 if (param->precision * param->factor == 16)
868 mode |= SV_DMAA_FORMAT16;
869 if (param->channels == 2)
870 mode |= SV_DMAA_STEREO;
871 sv_write_indirect(sc, SV_DMA_DATA_FORMAT, mode);
872
873 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
874 ;
875 if (!p) {
876 printf("sv_trigger_output: bad addr %p\n", start);
877 return (EINVAL);
878 }
879
880 dma_count = ((char *)end - (char *)start) - 1;
881 DPRINTF(("sv_trigger_output: DMA start loop input addr=%x cc=%d\n",
882 (int)DMAADDR(p), dma_count));
883
884 bus_space_write_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_ADDR0,
885 DMAADDR(p));
886 bus_space_write_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_COUNT0,
887 dma_count);
888 bus_space_write_1(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_MODE,
889 DMA37MD_READ | DMA37MD_LOOP);
890
891 DPRINTF(("sv_trigger_output: current addr=%x\n",
892 bus_space_read_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_ADDR0)));
893
894 dma_count = blksize - 1;
895
896 sv_write_indirect(sc, SV_DMAA_COUNT1, dma_count >> 8);
897 sv_write_indirect(sc, SV_DMAA_COUNT0, dma_count & 0xFF);
898
899 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
900 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode | SV_PLAY_ENABLE);
901
902 return (0);
903 }
904
905 int
906 sv_trigger_input(addr, start, end, blksize, intr, arg, param)
907 void *addr;
908 void *start, *end;
909 int blksize;
910 void (*intr) __P((void *));
911 void *arg;
912 struct audio_params *param;
913 {
914 struct sv_softc *sc = addr;
915 struct sv_dma *p;
916 u_int8_t mode;
917 int dma_count;
918
919 DPRINTFN(1, ("sv_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
920 addr, start, end, blksize, intr, arg));
921 sc->sc_rintr = intr;
922 sc->sc_rarg = arg;
923
924 mode = sv_read_indirect(sc, SV_DMA_DATA_FORMAT);
925 mode &= ~(SV_DMAC_FORMAT16 | SV_DMAC_STEREO);
926 if (param->precision * param->factor == 16)
927 mode |= SV_DMAC_FORMAT16;
928 if (param->channels == 2)
929 mode |= SV_DMAC_STEREO;
930 sv_write_indirect(sc, SV_DMA_DATA_FORMAT, mode);
931
932 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
933 ;
934 if (!p) {
935 printf("sv_trigger_input: bad addr %p\n", start);
936 return (EINVAL);
937 }
938
939 dma_count = (((char *)end - (char *)start) >> 1) - 1;
940 DPRINTF(("sv_trigger_input: DMA start loop input addr=%x cc=%d\n",
941 (int)DMAADDR(p), dma_count));
942
943 bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_ADDR0,
944 DMAADDR(p));
945 bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_COUNT0,
946 dma_count);
947 bus_space_write_1(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_MODE,
948 DMA37MD_WRITE | DMA37MD_LOOP);
949
950 DPRINTF(("sv_trigger_input: current addr=%x\n",
951 bus_space_read_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_ADDR0)));
952
953 dma_count = (blksize >> 1) - 1;
954
955 sv_write_indirect(sc, SV_DMAC_COUNT1, dma_count >> 8);
956 sv_write_indirect(sc, SV_DMAC_COUNT0, dma_count & 0xFF);
957
958 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
959 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode | SV_RECORD_ENABLE);
960
961 return (0);
962 }
963
964 int
965 sv_halt_output(addr)
966 void *addr;
967 {
968 struct sv_softc *sc = addr;
969 u_int8_t mode;
970
971 DPRINTF(("sv: sv_halt_output\n"));
972 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
973 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode & ~SV_PLAY_ENABLE);
974 sc->sc_pintr = 0;
975
976 return (0);
977 }
978
979 int
980 sv_halt_input(addr)
981 void *addr;
982 {
983 struct sv_softc *sc = addr;
984 u_int8_t mode;
985
986 DPRINTF(("sv: sv_halt_input\n"));
987 mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
988 sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode & ~SV_RECORD_ENABLE);
989 sc->sc_rintr = 0;
990
991 return (0);
992 }
993
994 int
995 sv_getdev(addr, retp)
996 void *addr;
997 struct audio_device *retp;
998 {
999 *retp = sv_device;
1000 return (0);
1001 }
1002
1003
1004 /*
1005 * Mixer related code is here
1006 *
1007 */
1008
1009 #define SV_INPUT_CLASS 0
1010 #define SV_OUTPUT_CLASS 1
1011 #define SV_RECORD_CLASS 2
1012
1013 #define SV_LAST_CLASS 2
1014
1015 static const char *mixer_classes[] =
1016 { AudioCinputs, AudioCoutputs, AudioCrecord };
1017
1018 static const struct {
1019 u_int8_t l_port;
1020 u_int8_t r_port;
1021 u_int8_t mask;
1022 u_int8_t class;
1023 const char *audio;
1024 } ports[] = {
1025 { SV_LEFT_AUX1_INPUT_CONTROL, SV_RIGHT_AUX1_INPUT_CONTROL, SV_AUX1_MASK,
1026 SV_INPUT_CLASS, "aux1" },
1027 { SV_LEFT_CD_INPUT_CONTROL, SV_RIGHT_CD_INPUT_CONTROL, SV_CD_MASK,
1028 SV_INPUT_CLASS, AudioNcd },
1029 { SV_LEFT_LINE_IN_INPUT_CONTROL, SV_RIGHT_LINE_IN_INPUT_CONTROL, SV_LINE_IN_MASK,
1030 SV_INPUT_CLASS, AudioNline },
1031 { SV_MIC_INPUT_CONTROL, 0, SV_MIC_MASK, SV_INPUT_CLASS, AudioNmicrophone },
1032 { SV_LEFT_SYNTH_INPUT_CONTROL, SV_RIGHT_SYNTH_INPUT_CONTROL,
1033 SV_SYNTH_MASK, SV_INPUT_CLASS, AudioNfmsynth },
1034 { SV_LEFT_AUX2_INPUT_CONTROL, SV_RIGHT_AUX2_INPUT_CONTROL, SV_AUX2_MASK,
1035 SV_INPUT_CLASS, "aux2" },
1036 { SV_LEFT_PCM_INPUT_CONTROL, SV_RIGHT_PCM_INPUT_CONTROL, SV_PCM_MASK,
1037 SV_INPUT_CLASS, AudioNdac },
1038 { SV_LEFT_MIXER_OUTPUT_CONTROL, SV_RIGHT_MIXER_OUTPUT_CONTROL,
1039 SV_MIXER_OUT_MASK, SV_OUTPUT_CLASS, AudioNmaster }
1040 };
1041
1042
1043 static const struct {
1044 int idx;
1045 const char *name;
1046 } record_sources[] = {
1047 { SV_REC_CD, AudioNcd },
1048 { SV_REC_DAC, AudioNdac },
1049 { SV_REC_AUX2, "aux2" },
1050 { SV_REC_LINE, AudioNline },
1051 { SV_REC_AUX1, "aux1" },
1052 { SV_REC_MIC, AudioNmicrophone },
1053 { SV_REC_MIXER, AudioNmixerout }
1054 };
1055
1056
1057 #define SV_DEVICES_PER_PORT 2
1058 #define SV_FIRST_MIXER (SV_LAST_CLASS + 1)
1059 #define SV_LAST_MIXER (SV_DEVICES_PER_PORT * (ARRAY_SIZE(ports)) + SV_LAST_CLASS)
1060 #define SV_RECORD_SOURCE (SV_LAST_MIXER + 1)
1061 #define SV_MIC_BOOST (SV_LAST_MIXER + 2)
1062 #define SV_RECORD_GAIN (SV_LAST_MIXER + 3)
1063 #define SV_SRS_MODE (SV_LAST_MIXER + 4)
1064
1065 int
1066 sv_query_devinfo(addr, dip)
1067 void *addr;
1068 mixer_devinfo_t *dip;
1069 {
1070 int i;
1071
1072 /* It's a class */
1073 if (dip->index <= SV_LAST_CLASS) {
1074 dip->type = AUDIO_MIXER_CLASS;
1075 dip->mixer_class = dip->index;
1076 dip->next = dip->prev = AUDIO_MIXER_LAST;
1077 strcpy(dip->label.name,
1078 mixer_classes[dip->index]);
1079 return (0);
1080 }
1081
1082 if (dip->index >= SV_FIRST_MIXER &&
1083 dip->index <= SV_LAST_MIXER) {
1084 int off = dip->index - SV_FIRST_MIXER;
1085 int mute = (off % SV_DEVICES_PER_PORT);
1086 int idx = off / SV_DEVICES_PER_PORT;
1087
1088 dip->mixer_class = ports[idx].class;
1089 strcpy(dip->label.name, ports[idx].audio);
1090
1091 if (!mute) {
1092 dip->type = AUDIO_MIXER_VALUE;
1093 dip->prev = AUDIO_MIXER_LAST;
1094 dip->next = dip->index + 1;
1095
1096 if (ports[idx].r_port != 0)
1097 dip->un.v.num_channels = 2;
1098 else
1099 dip->un.v.num_channels = 1;
1100
1101 strcpy(dip->un.v.units.name, AudioNvolume);
1102 } else {
1103 dip->type = AUDIO_MIXER_ENUM;
1104 dip->prev = dip->index - 1;
1105 dip->next = AUDIO_MIXER_LAST;
1106
1107 strcpy(dip->label.name, AudioNmute);
1108 dip->un.e.num_mem = 2;
1109 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1110 dip->un.e.member[0].ord = 0;
1111 strcpy(dip->un.e.member[1].label.name, AudioNon);
1112 dip->un.e.member[1].ord = 1;
1113 }
1114
1115 return (0);
1116 }
1117
1118 switch (dip->index) {
1119 case SV_RECORD_SOURCE:
1120 dip->mixer_class = SV_RECORD_CLASS;
1121 dip->prev = AUDIO_MIXER_LAST;
1122 dip->next = SV_RECORD_GAIN;
1123 strcpy(dip->label.name, AudioNsource);
1124 dip->type = AUDIO_MIXER_ENUM;
1125
1126 dip->un.e.num_mem = ARRAY_SIZE(record_sources);
1127 for (i = 0; i < ARRAY_SIZE(record_sources); i++) {
1128 strcpy(dip->un.e.member[i].label.name,
1129 record_sources[i].name);
1130 dip->un.e.member[i].ord = record_sources[i].idx;
1131 }
1132 return (0);
1133
1134 case SV_RECORD_GAIN:
1135 dip->mixer_class = SV_RECORD_CLASS;
1136 dip->prev = SV_RECORD_SOURCE;
1137 dip->next = AUDIO_MIXER_LAST;
1138 strcpy(dip->label.name, "gain");
1139 dip->type = AUDIO_MIXER_VALUE;
1140 dip->un.v.num_channels = 1;
1141 strcpy(dip->un.v.units.name, AudioNvolume);
1142 return (0);
1143
1144 case SV_MIC_BOOST:
1145 dip->mixer_class = SV_RECORD_CLASS;
1146 dip->prev = AUDIO_MIXER_LAST;
1147 dip->next = AUDIO_MIXER_LAST;
1148 strcpy(dip->label.name, "micboost");
1149 goto on_off;
1150
1151 case SV_SRS_MODE:
1152 dip->mixer_class = SV_OUTPUT_CLASS;
1153 dip->prev = dip->next = AUDIO_MIXER_LAST;
1154 strcpy(dip->label.name, AudioNspatial);
1155
1156 on_off:
1157 dip->type = AUDIO_MIXER_ENUM;
1158 dip->un.e.num_mem = 2;
1159 strcpy(dip->un.e.member[0].label.name, AudioNoff);
1160 dip->un.e.member[0].ord = 0;
1161 strcpy(dip->un.e.member[1].label.name, AudioNon);
1162 dip->un.e.member[1].ord = 1;
1163 return (0);
1164 }
1165
1166 return (ENXIO);
1167 }
1168
1169 int
1170 sv_mixer_set_port(addr, cp)
1171 void *addr;
1172 mixer_ctrl_t *cp;
1173 {
1174 struct sv_softc *sc = addr;
1175 u_int8_t reg;
1176 int idx;
1177
1178 if (cp->dev >= SV_FIRST_MIXER &&
1179 cp->dev <= SV_LAST_MIXER) {
1180 int off = cp->dev - SV_FIRST_MIXER;
1181 int mute = (off % SV_DEVICES_PER_PORT);
1182 idx = off / SV_DEVICES_PER_PORT;
1183
1184 if (mute) {
1185 if (cp->type != AUDIO_MIXER_ENUM)
1186 return (EINVAL);
1187
1188 reg = sv_read_indirect(sc, ports[idx].l_port);
1189 if (cp->un.ord)
1190 reg |= SV_MUTE_BIT;
1191 else
1192 reg &= ~SV_MUTE_BIT;
1193 sv_write_indirect(sc, ports[idx].l_port, reg);
1194
1195 if (ports[idx].r_port) {
1196 reg = sv_read_indirect(sc, ports[idx].r_port);
1197 if (cp->un.ord)
1198 reg |= SV_MUTE_BIT;
1199 else
1200 reg &= ~SV_MUTE_BIT;
1201 sv_write_indirect(sc, ports[idx].r_port, reg);
1202 }
1203 } else {
1204 int lval, rval;
1205
1206 if (cp->type != AUDIO_MIXER_VALUE)
1207 return (EINVAL);
1208
1209 if (cp->un.value.num_channels != 1 &&
1210 cp->un.value.num_channels != 2)
1211 return (EINVAL);
1212
1213 if (ports[idx].r_port == 0) {
1214 if (cp->un.value.num_channels != 1)
1215 return (EINVAL);
1216 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO];
1217 rval = 0; /* shut up GCC */
1218 } else {
1219 if (cp->un.value.num_channels != 2)
1220 return (EINVAL);
1221
1222 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
1223 rval = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
1224 }
1225
1226
1227 reg = sv_read_indirect(sc, ports[idx].l_port);
1228 reg &= ~(ports[idx].mask);
1229 lval = (AUDIO_MAX_GAIN - lval) * ports[idx].mask /
1230 AUDIO_MAX_GAIN;
1231 reg |= lval;
1232 sv_write_indirect(sc, ports[idx].l_port, reg);
1233
1234 if (ports[idx].r_port != 0) {
1235 reg = sv_read_indirect(sc, ports[idx].r_port);
1236 reg &= ~(ports[idx].mask);
1237
1238 rval = (AUDIO_MAX_GAIN - rval) * ports[idx].mask /
1239 AUDIO_MAX_GAIN;
1240 reg |= rval;
1241
1242 sv_write_indirect(sc, ports[idx].r_port, reg);
1243 }
1244
1245 sv_read_indirect(sc, ports[idx].l_port);
1246 }
1247
1248 return (0);
1249 }
1250
1251
1252 switch (cp->dev) {
1253 case SV_RECORD_SOURCE:
1254 if (cp->type != AUDIO_MIXER_ENUM)
1255 return (EINVAL);
1256
1257 for (idx = 0; idx < ARRAY_SIZE(record_sources); idx++) {
1258 if (record_sources[idx].idx == cp->un.ord)
1259 goto found;
1260 }
1261
1262 return (EINVAL);
1263
1264 found:
1265 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
1266 reg &= ~SV_REC_SOURCE_MASK;
1267 reg |= (((cp->un.ord) << SV_REC_SOURCE_SHIFT) & SV_REC_SOURCE_MASK);
1268 sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg);
1269
1270 reg = sv_read_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL);
1271 reg &= ~SV_REC_SOURCE_MASK;
1272 reg |= (((cp->un.ord) << SV_REC_SOURCE_SHIFT) & SV_REC_SOURCE_MASK);
1273 sv_write_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL, reg);
1274 return (0);
1275
1276 case SV_RECORD_GAIN:
1277 {
1278 int val;
1279
1280 if (cp->type != AUDIO_MIXER_VALUE)
1281 return (EINVAL);
1282
1283 if (cp->un.value.num_channels != 1)
1284 return (EINVAL);
1285
1286 val = (cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] * SV_REC_GAIN_MASK)
1287 / AUDIO_MAX_GAIN;
1288
1289 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
1290 reg &= ~SV_REC_GAIN_MASK;
1291 reg |= val;
1292 sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg);
1293
1294 reg = sv_read_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL);
1295 reg &= ~SV_REC_GAIN_MASK;
1296 reg |= val;
1297 sv_write_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL, reg);
1298 }
1299 return (0);
1300
1301 case SV_MIC_BOOST:
1302 if (cp->type != AUDIO_MIXER_ENUM)
1303 return (EINVAL);
1304
1305 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
1306 if (cp->un.ord) {
1307 reg |= SV_MIC_BOOST_BIT;
1308 } else {
1309 reg &= ~SV_MIC_BOOST_BIT;
1310 }
1311
1312 sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg);
1313 return (0);
1314
1315 case SV_SRS_MODE:
1316 if (cp->type != AUDIO_MIXER_ENUM)
1317 return (EINVAL);
1318
1319 reg = sv_read_indirect(sc, SV_SRS_SPACE_CONTROL);
1320 if (cp->un.ord) {
1321 reg &= ~SV_SRS_SPACE_ONOFF;
1322 } else {
1323 reg |= SV_SRS_SPACE_ONOFF;
1324 }
1325
1326 sv_write_indirect(sc, SV_SRS_SPACE_CONTROL, reg);
1327 return (0);
1328 }
1329
1330 return (EINVAL);
1331 }
1332
1333 int
1334 sv_mixer_get_port(addr, cp)
1335 void *addr;
1336 mixer_ctrl_t *cp;
1337 {
1338 struct sv_softc *sc = addr;
1339 int val;
1340 u_int8_t reg;
1341
1342 if (cp->dev >= SV_FIRST_MIXER &&
1343 cp->dev <= SV_LAST_MIXER) {
1344 int off = cp->dev - SV_FIRST_MIXER;
1345 int mute = (off % 2);
1346 int idx = off / 2;
1347
1348 if (mute) {
1349 if (cp->type != AUDIO_MIXER_ENUM)
1350 return (EINVAL);
1351
1352 reg = sv_read_indirect(sc, ports[idx].l_port);
1353 cp->un.ord = ((reg & SV_MUTE_BIT) ? 1 : 0);
1354 } else {
1355 if (cp->type != AUDIO_MIXER_VALUE)
1356 return (EINVAL);
1357
1358 if (cp->un.value.num_channels != 1 &&
1359 cp->un.value.num_channels != 2)
1360 return (EINVAL);
1361
1362 if ((ports[idx].r_port == 0 &&
1363 cp->un.value.num_channels != 1) ||
1364 (ports[idx].r_port != 0 &&
1365 cp->un.value.num_channels != 2))
1366 return (EINVAL);
1367
1368 reg = sv_read_indirect(sc, ports[idx].l_port);
1369 reg &= ports[idx].mask;
1370
1371 val = AUDIO_MAX_GAIN - ((reg * AUDIO_MAX_GAIN) / ports[idx].mask);
1372
1373 if (ports[idx].r_port != 0) {
1374 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = val;
1375
1376 reg = sv_read_indirect(sc, ports[idx].r_port);
1377 reg &= ports[idx].mask;
1378
1379 val = AUDIO_MAX_GAIN - ((reg * AUDIO_MAX_GAIN) / ports[idx].mask);
1380 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = val;
1381 } else
1382 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = val;
1383 }
1384
1385 return (0);
1386 }
1387
1388 switch (cp->dev) {
1389 case SV_RECORD_SOURCE:
1390 if (cp->type != AUDIO_MIXER_ENUM)
1391 return (EINVAL);
1392
1393 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
1394 cp->un.ord = ((reg & SV_REC_SOURCE_MASK) >> SV_REC_SOURCE_SHIFT);
1395
1396 return (0);
1397
1398 case SV_RECORD_GAIN:
1399 if (cp->type != AUDIO_MIXER_VALUE)
1400 return (EINVAL);
1401 if (cp->un.value.num_channels != 1)
1402 return (EINVAL);
1403
1404 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL) & SV_REC_GAIN_MASK;
1405 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] =
1406 (((unsigned int)reg) * AUDIO_MAX_GAIN) / SV_REC_GAIN_MASK;
1407
1408 return (0);
1409
1410 case SV_MIC_BOOST:
1411 if (cp->type != AUDIO_MIXER_ENUM)
1412 return (EINVAL);
1413 reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
1414 cp->un.ord = ((reg & SV_MIC_BOOST_BIT) ? 1 : 0);
1415 return (0);
1416
1417
1418 case SV_SRS_MODE:
1419 if (cp->type != AUDIO_MIXER_ENUM)
1420 return (EINVAL);
1421 reg = sv_read_indirect(sc, SV_SRS_SPACE_CONTROL);
1422 cp->un.ord = ((reg & SV_SRS_SPACE_ONOFF) ? 0 : 1);
1423 return (0);
1424 }
1425
1426 return (EINVAL);
1427 }
1428
1429
1430 static void
1431 sv_init_mixer(sc)
1432 struct sv_softc *sc;
1433 {
1434 mixer_ctrl_t cp;
1435 int i;
1436
1437 cp.type = AUDIO_MIXER_ENUM;
1438 cp.dev = SV_SRS_MODE;
1439 cp.un.ord = 0;
1440
1441 sv_mixer_set_port(sc, &cp);
1442
1443 for (i = 0; i < ARRAY_SIZE(ports); i++) {
1444 if (ports[i].audio == AudioNdac) {
1445 cp.type = AUDIO_MIXER_ENUM;
1446 cp.dev = SV_FIRST_MIXER + i * SV_DEVICES_PER_PORT + 1;
1447 cp.un.ord = 0;
1448 sv_mixer_set_port(sc, &cp);
1449 break;
1450 }
1451 }
1452 }
1453
1454 void *
1455 sv_malloc(addr, direction, size, pool, flags)
1456 void *addr;
1457 int direction;
1458 size_t size;
1459 struct malloc_type *pool;
1460 int flags;
1461 {
1462 struct sv_softc *sc = addr;
1463 struct sv_dma *p;
1464 int error;
1465
1466 p = malloc(sizeof(*p), pool, flags);
1467 if (!p)
1468 return (0);
1469 error = sv_allocmem(sc, size, 16, direction, p);
1470 if (error) {
1471 free(p, pool);
1472 return (0);
1473 }
1474 p->next = sc->sc_dmas;
1475 sc->sc_dmas = p;
1476 return (KERNADDR(p));
1477 }
1478
1479 void
1480 sv_free(addr, ptr, pool)
1481 void *addr;
1482 void *ptr;
1483 struct malloc_type *pool;
1484 {
1485 struct sv_softc *sc = addr;
1486 struct sv_dma **pp, *p;
1487
1488 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1489 if (KERNADDR(p) == ptr) {
1490 sv_freemem(sc, p);
1491 *pp = p->next;
1492 free(p, pool);
1493 return;
1494 }
1495 }
1496 }
1497
1498 size_t
1499 sv_round_buffersize(addr, direction, size)
1500 void *addr;
1501 int direction;
1502 size_t size;
1503 {
1504 return (size);
1505 }
1506
1507 paddr_t
1508 sv_mappage(addr, mem, off, prot)
1509 void *addr;
1510 void *mem;
1511 off_t off;
1512 int prot;
1513 {
1514 struct sv_softc *sc = addr;
1515 struct sv_dma *p;
1516
1517 if (off < 0)
1518 return (-1);
1519 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
1520 ;
1521 if (!p)
1522 return (-1);
1523 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
1524 off, prot, BUS_DMA_WAITOK));
1525 }
1526
1527 int
1528 sv_get_props(addr)
1529 void *addr;
1530 {
1531 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX);
1532 }
1533