svwsata.c revision 1.2.2.3
1 1.2.2.3 yamt /* $NetBSD: svwsata.c,v 1.2.2.3 2006/04/01 12:07:18 yamt Exp $ */ 2 1.2.2.2 yamt 3 1.2.2.2 yamt /* 4 1.2.2.2 yamt * Copyright (c) 2005 Mark Kettenis 5 1.2.2.2 yamt * 6 1.2.2.2 yamt * Permission to use, copy, modify, and distribute this software for any 7 1.2.2.2 yamt * purpose with or without fee is hereby granted, provided that the above 8 1.2.2.2 yamt * copyright notice and this permission notice appear in all copies. 9 1.2.2.2 yamt * 10 1.2.2.2 yamt * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 1.2.2.2 yamt * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 1.2.2.2 yamt * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 1.2.2.2 yamt * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 1.2.2.2 yamt * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 1.2.2.2 yamt * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 1.2.2.2 yamt * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 1.2.2.2 yamt */ 18 1.2.2.2 yamt 19 1.2.2.2 yamt #include <sys/cdefs.h> 20 1.2.2.3 yamt __KERNEL_RCSID(0, "$NetBSD: svwsata.c,v 1.2.2.3 2006/04/01 12:07:18 yamt Exp $"); 21 1.2.2.2 yamt 22 1.2.2.2 yamt #include <sys/param.h> 23 1.2.2.2 yamt #include <sys/systm.h> 24 1.2.2.2 yamt 25 1.2.2.2 yamt #include <dev/ata/atareg.h> 26 1.2.2.2 yamt #include <dev/ata/satareg.h> 27 1.2.2.2 yamt #include <dev/ata/satavar.h> 28 1.2.2.2 yamt #include <dev/pci/pcivar.h> 29 1.2.2.2 yamt #include <dev/pci/pcidevs.h> 30 1.2.2.2 yamt #include <dev/pci/pciidereg.h> 31 1.2.2.2 yamt #include <dev/pci/pciidevar.h> 32 1.2.2.2 yamt #include <dev/pci/pciide_svwsata_reg.h> 33 1.2.2.2 yamt 34 1.2.2.2 yamt static int svwsata_match(struct device *, struct cfdata *, void *); 35 1.2.2.2 yamt static void svwsata_attach(struct device *, struct device *, void *); 36 1.2.2.2 yamt 37 1.2.2.2 yamt static void svwsata_chip_map(struct pciide_softc *, struct pci_attach_args *) __unused; 38 1.2.2.2 yamt static void svwsata_mapreg_dma(struct pciide_softc *, struct pci_attach_args *); 39 1.2.2.2 yamt static void svwsata_mapchan(struct pciide_channel *); 40 1.2.2.2 yamt static void svwsata_drv_probe(struct ata_channel *chp); 41 1.2.2.2 yamt 42 1.2.2.2 yamt CFATTACH_DECL(svwsata, sizeof(struct pciide_softc), 43 1.2.2.2 yamt svwsata_match, svwsata_attach, NULL, NULL); 44 1.2.2.2 yamt 45 1.2.2.2 yamt static const struct pciide_product_desc pciide_svwsata_products[] = { 46 1.2.2.2 yamt { PCI_PRODUCT_SERVERWORKS_K2_SATA, 47 1.2.2.2 yamt 0, 48 1.2.2.2 yamt "ServerWorks K2 SATA Controller", 49 1.2.2.2 yamt svwsata_chip_map 50 1.2.2.2 yamt }, 51 1.2.2.2 yamt { PCI_PRODUCT_SERVERWORKS_FRODO4_SATA, 52 1.2.2.2 yamt 0, 53 1.2.2.2 yamt "ServerWorks Frodo4 SATA Controller", 54 1.2.2.2 yamt svwsata_chip_map 55 1.2.2.2 yamt }, 56 1.2.2.2 yamt { PCI_PRODUCT_SERVERWORKS_FRODO8_SATA, 57 1.2.2.2 yamt 0, 58 1.2.2.2 yamt "ServerWorks Frodo8 SATA Controller", 59 1.2.2.2 yamt svwsata_chip_map 60 1.2.2.2 yamt }, 61 1.2.2.2 yamt { PCI_PRODUCT_SERVERWORKS_HT1000_SATA, 62 1.2.2.2 yamt 0, 63 1.2.2.2 yamt "ServerWorks HT-1000 SATA Controller", 64 1.2.2.2 yamt svwsata_chip_map 65 1.2.2.2 yamt }, 66 1.2.2.2 yamt { 0, 67 1.2.2.2 yamt 0, 68 1.2.2.2 yamt NULL, 69 1.2.2.2 yamt NULL, 70 1.2.2.2 yamt } 71 1.2.2.2 yamt }; 72 1.2.2.2 yamt 73 1.2.2.2 yamt static int 74 1.2.2.2 yamt svwsata_match(struct device *parent, struct cfdata *match, void *aux) 75 1.2.2.2 yamt { 76 1.2.2.2 yamt struct pci_attach_args *pa = aux; 77 1.2.2.2 yamt 78 1.2.2.2 yamt if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SERVERWORKS) { 79 1.2.2.2 yamt if (pciide_lookup_product(pa->pa_id, 80 1.2.2.2 yamt pciide_svwsata_products)) 81 1.2.2.2 yamt return (2); 82 1.2.2.2 yamt } 83 1.2.2.2 yamt return (0); 84 1.2.2.2 yamt } 85 1.2.2.2 yamt 86 1.2.2.2 yamt static void 87 1.2.2.2 yamt svwsata_attach(struct device *parent, struct device *self, void *aux) 88 1.2.2.2 yamt { 89 1.2.2.2 yamt struct pci_attach_args *pa = aux; 90 1.2.2.2 yamt struct pciide_softc *sc = (void *)self; 91 1.2.2.2 yamt 92 1.2.2.2 yamt pciide_common_attach(sc, pa, 93 1.2.2.2 yamt pciide_lookup_product(pa->pa_id, pciide_svwsata_products)); 94 1.2.2.2 yamt } 95 1.2.2.2 yamt 96 1.2.2.2 yamt static void 97 1.2.2.2 yamt svwsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 98 1.2.2.2 yamt { 99 1.2.2.2 yamt struct pciide_channel *cp; 100 1.2.2.2 yamt pci_intr_handle_t intrhandle; 101 1.2.2.2 yamt pcireg_t interface; 102 1.2.2.2 yamt const char *intrstr; 103 1.2.2.2 yamt int channel; 104 1.2.2.2 yamt 105 1.2.2.2 yamt if (pciide_chipen(sc, pa) == 0) 106 1.2.2.2 yamt return; 107 1.2.2.2 yamt 108 1.2.2.2 yamt /* The 4-port version has a dummy second function. */ 109 1.2.2.2 yamt if (pci_conf_read(sc->sc_pc, sc->sc_tag, 110 1.2.2.2 yamt PCI_MAPREG_START + 0x14) == 0) { 111 1.2.2.2 yamt aprint_normal("\n"); 112 1.2.2.2 yamt return; 113 1.2.2.2 yamt } 114 1.2.2.2 yamt 115 1.2.2.2 yamt if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14, 116 1.2.2.2 yamt PCI_MAPREG_TYPE_MEM | 117 1.2.2.2 yamt PCI_MAPREG_MEM_TYPE_32BIT, 0, 118 1.2.2.2 yamt &sc->sc_ba5_st, &sc->sc_ba5_sh, 119 1.2.2.2 yamt NULL, NULL) != 0) { 120 1.2.2.2 yamt aprint_error(": unable to map BA5 register space\n"); 121 1.2.2.2 yamt return; 122 1.2.2.2 yamt } 123 1.2.2.2 yamt 124 1.2.2.2 yamt aprint_normal(": DMA"); 125 1.2.2.2 yamt svwsata_mapreg_dma(sc, pa); 126 1.2.2.2 yamt aprint_normal("\n"); 127 1.2.2.2 yamt 128 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 129 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 130 1.2.2.2 yamt if (sc->sc_dma_ok) { 131 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 132 1.2.2.2 yamt sc->sc_wdcdev.irqack = pciide_irqack; 133 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 134 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 135 1.2.2.2 yamt } 136 1.2.2.2 yamt 137 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 138 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_nchannels = 4; 139 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; 140 1.2.2.2 yamt 141 1.2.2.2 yamt /* We can use SControl and SStatus to probe for drives. */ 142 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_probe = svwsata_drv_probe; 143 1.2.2.2 yamt 144 1.2.2.2 yamt wdc_allocate_regs(&sc->sc_wdcdev); 145 1.2.2.2 yamt 146 1.2.2.2 yamt /* Map and establish the interrupt handler. */ 147 1.2.2.2 yamt if(pci_intr_map(pa, &intrhandle) != 0) { 148 1.2.2.2 yamt aprint_error("%s: couldn't map native-PCI interrupt\n", 149 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 150 1.2.2.2 yamt return; 151 1.2.2.2 yamt } 152 1.2.2.2 yamt intrstr = pci_intr_string(pa->pa_pc, intrhandle); 153 1.2.2.2 yamt sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, 154 1.2.2.2 yamt pciide_pci_intr, sc); 155 1.2.2.2 yamt if (sc->sc_pci_ih != NULL) { 156 1.2.2.2 yamt aprint_normal("%s: using %s for native-PCI interrupt\n", 157 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, 158 1.2.2.2 yamt intrstr ? intrstr : "unknown interrupt"); 159 1.2.2.2 yamt } else { 160 1.2.2.2 yamt aprint_error("%s: couldn't establish native-PCI interrupt", 161 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 162 1.2.2.2 yamt if (intrstr != NULL) 163 1.2.2.2 yamt aprint_normal(" at %s", intrstr); 164 1.2.2.2 yamt aprint_normal("\n"); 165 1.2.2.2 yamt return; 166 1.2.2.2 yamt } 167 1.2.2.2 yamt 168 1.2.2.2 yamt interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | 169 1.2.2.2 yamt PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); 170 1.2.2.2 yamt 171 1.2.2.2 yamt 172 1.2.2.2 yamt for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 173 1.2.2.2 yamt channel++) { 174 1.2.2.2 yamt cp = &sc->pciide_channels[channel]; 175 1.2.2.2 yamt 176 1.2.2.2 yamt if (pciide_chansetup(sc, channel, interface) == 0) 177 1.2.2.2 yamt continue; 178 1.2.2.2 yamt svwsata_mapchan(cp); 179 1.2.2.2 yamt } 180 1.2.2.2 yamt } 181 1.2.2.2 yamt 182 1.2.2.2 yamt static void 183 1.2.2.2 yamt svwsata_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa) 184 1.2.2.2 yamt { 185 1.2.2.2 yamt struct pciide_channel *pc; 186 1.2.2.2 yamt int chan, reg; 187 1.2.2.2 yamt bus_size_t size; 188 1.2.2.2 yamt 189 1.2.2.2 yamt sc->sc_wdcdev.dma_arg = sc; 190 1.2.2.2 yamt sc->sc_wdcdev.dma_init = pciide_dma_init; 191 1.2.2.2 yamt sc->sc_wdcdev.dma_start = pciide_dma_start; 192 1.2.2.2 yamt sc->sc_wdcdev.dma_finish = pciide_dma_finish; 193 1.2.2.2 yamt 194 1.2.2.3 yamt if (device_cfdata(&sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags & 195 1.2.2.2 yamt PCIIDE_OPTIONS_NODMA) { 196 1.2.2.2 yamt aprint_normal( 197 1.2.2.2 yamt ", but unused (forced off by config file)"); 198 1.2.2.2 yamt sc->sc_dma_ok = 0; 199 1.2.2.2 yamt return; 200 1.2.2.2 yamt } 201 1.2.2.2 yamt 202 1.2.2.2 yamt /* 203 1.2.2.2 yamt * Slice off a subregion of BA5 for each of the channel's DMA 204 1.2.2.2 yamt * registers. 205 1.2.2.2 yamt */ 206 1.2.2.2 yamt 207 1.2.2.2 yamt sc->sc_dma_iot = sc->sc_ba5_st; 208 1.2.2.2 yamt for (chan = 0; chan < 4; chan++) { 209 1.2.2.2 yamt pc = &sc->pciide_channels[chan]; 210 1.2.2.2 yamt for (reg = 0; reg < IDEDMA_NREGS; reg++) { 211 1.2.2.2 yamt size = 4; 212 1.2.2.2 yamt if (size > (IDEDMA_SCH_OFFSET - reg)) 213 1.2.2.2 yamt size = IDEDMA_SCH_OFFSET - reg; 214 1.2.2.2 yamt if (bus_space_subregion(sc->sc_ba5_st, 215 1.2.2.2 yamt sc->sc_ba5_sh, 216 1.2.2.2 yamt (chan << 8) + SVWSATA_DMA + reg, 217 1.2.2.2 yamt size, &pc->dma_iohs[reg]) != 0) { 218 1.2.2.2 yamt sc->sc_dma_ok = 0; 219 1.2.2.2 yamt aprint_normal(", but can't subregion offset " 220 1.2.2.2 yamt "%lu size %lu", 221 1.2.2.2 yamt (u_long) (chan << 8) + SVWSATA_DMA + reg, 222 1.2.2.2 yamt (u_long) size); 223 1.2.2.2 yamt return; 224 1.2.2.2 yamt } 225 1.2.2.2 yamt } 226 1.2.2.2 yamt } 227 1.2.2.2 yamt 228 1.2.2.2 yamt /* DMA registers all set up! */ 229 1.2.2.2 yamt sc->sc_dmat = pa->pa_dmat; 230 1.2.2.2 yamt sc->sc_dma_ok = 1; 231 1.2.2.2 yamt } 232 1.2.2.2 yamt 233 1.2.2.2 yamt static void 234 1.2.2.2 yamt svwsata_mapchan(struct pciide_channel *cp) 235 1.2.2.2 yamt { 236 1.2.2.2 yamt struct ata_channel *wdc_cp = &cp->ata_channel; 237 1.2.2.2 yamt struct pciide_softc *sc = CHAN_TO_PCIIDE(wdc_cp); 238 1.2.2.2 yamt struct wdc_regs *wdr = CHAN_TO_WDC_REGS(wdc_cp); 239 1.2.2.2 yamt int i; 240 1.2.2.2 yamt 241 1.2.2.2 yamt cp->compat = 0; 242 1.2.2.2 yamt cp->ih = sc->sc_pci_ih; 243 1.2.2.2 yamt 244 1.2.2.2 yamt wdr->cmd_iot = sc->sc_ba5_st; 245 1.2.2.2 yamt if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh, 246 1.2.2.2 yamt (wdc_cp->ch_channel << 8) + SVWSATA_TF0, 247 1.2.2.2 yamt SVWSATA_TF8 - SVWSATA_TF0, &wdr->cmd_baseioh) != 0) { 248 1.2.2.2 yamt aprint_error("%s: couldn't map %s cmd regs\n", 249 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name); 250 1.2.2.2 yamt goto bad; 251 1.2.2.2 yamt } 252 1.2.2.2 yamt 253 1.2.2.2 yamt wdr->ctl_iot = sc->sc_ba5_st; 254 1.2.2.2 yamt if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh, 255 1.2.2.2 yamt (wdc_cp->ch_channel << 8) + SVWSATA_TF8, 4, 256 1.2.2.2 yamt &cp->ctl_baseioh) != 0) { 257 1.2.2.2 yamt aprint_error("%s: couldn't map %s ctl regs\n", 258 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name); 259 1.2.2.2 yamt goto bad; 260 1.2.2.2 yamt } 261 1.2.2.2 yamt wdr->ctl_ioh = cp->ctl_baseioh; 262 1.2.2.2 yamt 263 1.2.2.2 yamt for (i = 0; i < WDC_NREG; i++) { 264 1.2.2.2 yamt if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 265 1.2.2.2 yamt i << 2, i == 0 ? 4 : 1, 266 1.2.2.2 yamt &wdr->cmd_iohs[i]) != 0) { 267 1.2.2.2 yamt aprint_error("%s: couldn't subregion %s channel " 268 1.2.2.2 yamt "cmd regs\n", 269 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name); 270 1.2.2.2 yamt goto bad; 271 1.2.2.2 yamt } 272 1.2.2.2 yamt } 273 1.2.2.2 yamt wdc_init_shadow_regs(wdc_cp); 274 1.2.2.2 yamt wdr->data32iot = wdr->cmd_iot; 275 1.2.2.2 yamt wdr->data32ioh = wdr->cmd_iohs[0]; 276 1.2.2.2 yamt 277 1.2.2.2 yamt wdcattach(wdc_cp); 278 1.2.2.2 yamt return; 279 1.2.2.2 yamt 280 1.2.2.2 yamt bad: 281 1.2.2.2 yamt cp->ata_channel.ch_flags |= ATACH_DISABLED; 282 1.2.2.2 yamt } 283 1.2.2.2 yamt 284 1.2.2.2 yamt static void 285 1.2.2.2 yamt svwsata_drv_probe(struct ata_channel *chp) 286 1.2.2.2 yamt { 287 1.2.2.2 yamt struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 288 1.2.2.2 yamt struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 289 1.2.2.2 yamt int channel = chp->ch_channel; 290 1.2.2.2 yamt uint32_t scontrol, sstatus; 291 1.2.2.2 yamt uint8_t scnt, sn, cl, ch; 292 1.2.2.2 yamt int i, s; 293 1.2.2.2 yamt 294 1.2.2.2 yamt /* XXX This should be done by other code. */ 295 1.2.2.2 yamt for (i = 0; i < 2; i++) { 296 1.2.2.2 yamt chp->ch_drive[i].chnl_softc = chp; 297 1.2.2.2 yamt chp->ch_drive[i].drive = i; 298 1.2.2.2 yamt } 299 1.2.2.2 yamt 300 1.2.2.2 yamt /* 301 1.2.2.2 yamt * Request communication initialization sequence, any speed. 302 1.2.2.2 yamt * Performing this is the equivalent of an ATA Reset. 303 1.2.2.2 yamt */ 304 1.2.2.2 yamt scontrol = SControl_DET_INIT | SControl_SPD_ANY; 305 1.2.2.2 yamt 306 1.2.2.2 yamt /* 307 1.2.2.2 yamt * XXX We don't yet support SATA power management; disable all 308 1.2.2.2 yamt * power management state transitions. 309 1.2.2.2 yamt */ 310 1.2.2.2 yamt scontrol |= SControl_IPM_NONE; 311 1.2.2.2 yamt 312 1.2.2.2 yamt bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 313 1.2.2.2 yamt (channel << 8) + SVWSATA_SCONTROL, scontrol); 314 1.2.2.2 yamt delay(50 * 1000); 315 1.2.2.2 yamt scontrol &= ~SControl_DET_INIT; 316 1.2.2.2 yamt bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 317 1.2.2.2 yamt (channel << 8) + SVWSATA_SCONTROL, scontrol); 318 1.2.2.2 yamt delay(50 * 1000); 319 1.2.2.2 yamt 320 1.2.2.2 yamt sstatus = bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 321 1.2.2.2 yamt (channel << 8) + SVWSATA_SSTATUS); 322 1.2.2.2 yamt #if 0 323 1.2.2.2 yamt printf("%s: port %d: SStatus=0x%08x, SControl=0x%08x\n", 324 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, sstatus, 325 1.2.2.2 yamt bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 326 1.2.2.2 yamt (channel << 8) + SVWSATA_SSTATUS)); 327 1.2.2.2 yamt #endif 328 1.2.2.2 yamt switch (sstatus & SStatus_DET_mask) { 329 1.2.2.2 yamt case SStatus_DET_NODEV: 330 1.2.2.2 yamt /* No device; be silent. */ 331 1.2.2.2 yamt break; 332 1.2.2.2 yamt 333 1.2.2.2 yamt case SStatus_DET_DEV_NE: 334 1.2.2.2 yamt aprint_error("%s: port %d: device connected, but " 335 1.2.2.2 yamt "communication not established\n", 336 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel); 337 1.2.2.2 yamt break; 338 1.2.2.2 yamt 339 1.2.2.2 yamt case SStatus_DET_OFFLINE: 340 1.2.2.2 yamt aprint_error("%s: port %d: PHY offline\n", 341 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel); 342 1.2.2.2 yamt break; 343 1.2.2.2 yamt 344 1.2.2.2 yamt case SStatus_DET_DEV: 345 1.2.2.2 yamt /* 346 1.2.2.2 yamt * XXX ATAPI detection doesn't currently work. Don't 347 1.2.2.2 yamt * XXX know why. But, it's not like the standard method 348 1.2.2.2 yamt * XXX can detect an ATAPI device connected via a SATA/PATA 349 1.2.2.2 yamt * XXX bridge, so at least this is no worse. --thorpej 350 1.2.2.2 yamt */ 351 1.2.2.2 yamt bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 352 1.2.2.2 yamt WDSD_IBM | (0 << 4)); 353 1.2.2.2 yamt delay(10); /* 400ns delay */ 354 1.2.2.2 yamt /* Save register contents. */ 355 1.2.2.2 yamt scnt = bus_space_read_1(wdr->cmd_iot, 356 1.2.2.2 yamt wdr->cmd_iohs[wd_seccnt], 0); 357 1.2.2.2 yamt sn = bus_space_read_1(wdr->cmd_iot, 358 1.2.2.2 yamt wdr->cmd_iohs[wd_sector], 0); 359 1.2.2.2 yamt cl = bus_space_read_1(wdr->cmd_iot, 360 1.2.2.2 yamt wdr->cmd_iohs[wd_cyl_lo], 0); 361 1.2.2.2 yamt ch = bus_space_read_1(wdr->cmd_iot, 362 1.2.2.2 yamt wdr->cmd_iohs[wd_cyl_hi], 0); 363 1.2.2.2 yamt #if 0 364 1.2.2.2 yamt printf("%s: port %d: scnt=0x%x sn=0x%x cl=0x%x ch=0x%x\n", 365 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, 366 1.2.2.2 yamt scnt, sn, cl, ch); 367 1.2.2.2 yamt #endif 368 1.2.2.2 yamt /* 369 1.2.2.2 yamt * scnt and sn are supposed to be 0x1 for ATAPI, but in some 370 1.2.2.2 yamt * cases we get wrong values here, so ignore it. 371 1.2.2.2 yamt */ 372 1.2.2.2 yamt s = splbio(); 373 1.2.2.2 yamt if (cl == 0x14 && ch == 0xeb) 374 1.2.2.2 yamt chp->ch_drive[0].drive_flags |= DRIVE_ATAPI; 375 1.2.2.2 yamt else 376 1.2.2.2 yamt chp->ch_drive[0].drive_flags |= DRIVE_ATA; 377 1.2.2.2 yamt splx(s); 378 1.2.2.2 yamt 379 1.2.2.2 yamt aprint_normal("%s: port %d: device present, speed: %s\n", 380 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, 381 1.2.2.2 yamt sata_speed(sstatus)); 382 1.2.2.2 yamt break; 383 1.2.2.2 yamt 384 1.2.2.2 yamt default: 385 1.2.2.2 yamt aprint_error("%s: port %d: unknown SStatus: 0x%08x\n", 386 1.2.2.2 yamt sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, sstatus); 387 1.2.2.2 yamt } 388 1.2.2.2 yamt } 389
Indexes created Sun Oct 12 09:09:55 GMT 2025