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svwsata.c revision 1.3.14.2
      1  1.3.14.2       ad /*	$NetBSD: svwsata.c,v 1.3.14.2 2007/01/12 00:57:43 ad Exp $	*/
      2       1.1   bouyer 
      3       1.1   bouyer /*
      4       1.1   bouyer  * Copyright (c) 2005 Mark Kettenis
      5       1.1   bouyer  *
      6       1.1   bouyer  * Permission to use, copy, modify, and distribute this software for any
      7       1.1   bouyer  * purpose with or without fee is hereby granted, provided that the above
      8       1.1   bouyer  * copyright notice and this permission notice appear in all copies.
      9       1.1   bouyer  *
     10       1.1   bouyer  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     11       1.1   bouyer  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     12       1.1   bouyer  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     13       1.1   bouyer  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     14       1.1   bouyer  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     15       1.1   bouyer  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     16       1.1   bouyer  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     17       1.1   bouyer  */
     18       1.1   bouyer 
     19       1.1   bouyer #include <sys/cdefs.h>
     20  1.3.14.2       ad __KERNEL_RCSID(0, "$NetBSD: svwsata.c,v 1.3.14.2 2007/01/12 00:57:43 ad Exp $");
     21       1.1   bouyer 
     22       1.1   bouyer #include <sys/param.h>
     23       1.1   bouyer #include <sys/systm.h>
     24       1.1   bouyer 
     25       1.1   bouyer #include <dev/ata/atareg.h>
     26       1.1   bouyer #include <dev/ata/satareg.h>
     27       1.1   bouyer #include <dev/ata/satavar.h>
     28       1.1   bouyer #include <dev/pci/pcivar.h>
     29       1.1   bouyer #include <dev/pci/pcidevs.h>
     30       1.1   bouyer #include <dev/pci/pciidereg.h>
     31       1.1   bouyer #include <dev/pci/pciidevar.h>
     32       1.1   bouyer #include <dev/pci/pciide_svwsata_reg.h>
     33       1.1   bouyer 
     34       1.1   bouyer static int  svwsata_match(struct device *, struct cfdata *, void *);
     35       1.1   bouyer static void svwsata_attach(struct device *, struct device *, void *);
     36       1.1   bouyer 
     37  1.3.14.1       ad static void svwsata_chip_map(struct pciide_softc *, struct pci_attach_args *);
     38       1.1   bouyer static void svwsata_mapreg_dma(struct pciide_softc *, struct pci_attach_args *);
     39       1.1   bouyer static void svwsata_mapchan(struct pciide_channel *);
     40       1.1   bouyer 
     41       1.1   bouyer CFATTACH_DECL(svwsata, sizeof(struct pciide_softc),
     42       1.1   bouyer     svwsata_match, svwsata_attach, NULL, NULL);
     43       1.1   bouyer 
     44       1.1   bouyer static const struct pciide_product_desc pciide_svwsata_products[] =  {
     45       1.1   bouyer 	{ PCI_PRODUCT_SERVERWORKS_K2_SATA,
     46       1.1   bouyer 	  0,
     47       1.1   bouyer 	  "ServerWorks K2 SATA Controller",
     48       1.1   bouyer 	  svwsata_chip_map
     49       1.1   bouyer 	},
     50       1.2   bouyer 	{ PCI_PRODUCT_SERVERWORKS_FRODO4_SATA,
     51       1.2   bouyer 	  0,
     52       1.2   bouyer 	  "ServerWorks Frodo4 SATA Controller",
     53       1.2   bouyer 	  svwsata_chip_map
     54       1.2   bouyer 	},
     55       1.2   bouyer 	{ PCI_PRODUCT_SERVERWORKS_FRODO8_SATA,
     56       1.2   bouyer 	  0,
     57       1.2   bouyer 	  "ServerWorks Frodo8 SATA Controller",
     58       1.2   bouyer 	  svwsata_chip_map
     59       1.2   bouyer 	},
     60       1.2   bouyer 	{ PCI_PRODUCT_SERVERWORKS_HT1000_SATA,
     61       1.2   bouyer 	  0,
     62       1.2   bouyer 	  "ServerWorks HT-1000 SATA Controller",
     63       1.2   bouyer 	  svwsata_chip_map
     64       1.2   bouyer 	},
     65       1.1   bouyer 	{ 0,
     66       1.1   bouyer 	  0,
     67       1.1   bouyer 	  NULL,
     68       1.1   bouyer 	  NULL,
     69       1.1   bouyer 	}
     70       1.1   bouyer };
     71       1.1   bouyer 
     72       1.1   bouyer static int
     73  1.3.14.1       ad svwsata_match(struct device *parent, struct cfdata *match,
     74  1.3.14.1       ad     void *aux)
     75       1.1   bouyer {
     76       1.1   bouyer 	struct pci_attach_args *pa = aux;
     77       1.1   bouyer 
     78       1.1   bouyer 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SERVERWORKS) {
     79       1.1   bouyer 		if (pciide_lookup_product(pa->pa_id,
     80       1.1   bouyer 		    pciide_svwsata_products))
     81       1.1   bouyer 			return (2);
     82       1.1   bouyer 	}
     83       1.1   bouyer 	return (0);
     84       1.1   bouyer }
     85       1.1   bouyer 
     86       1.1   bouyer static void
     87       1.1   bouyer svwsata_attach(struct device *parent, struct device *self, void *aux)
     88       1.1   bouyer {
     89       1.1   bouyer 	struct pci_attach_args *pa = aux;
     90       1.1   bouyer 	struct pciide_softc *sc = (void *)self;
     91       1.1   bouyer 
     92       1.1   bouyer 	pciide_common_attach(sc, pa,
     93       1.1   bouyer 	    pciide_lookup_product(pa->pa_id, pciide_svwsata_products));
     94       1.1   bouyer }
     95       1.1   bouyer 
     96       1.1   bouyer static void
     97       1.1   bouyer svwsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
     98       1.1   bouyer {
     99       1.1   bouyer 	struct pciide_channel *cp;
    100       1.1   bouyer 	pci_intr_handle_t intrhandle;
    101       1.1   bouyer 	pcireg_t interface;
    102       1.1   bouyer 	const char *intrstr;
    103       1.1   bouyer 	int channel;
    104       1.1   bouyer 
    105       1.1   bouyer 	if (pciide_chipen(sc, pa) == 0)
    106       1.1   bouyer 		return;
    107       1.1   bouyer 
    108       1.2   bouyer 	/* The 4-port version has a dummy second function. */
    109       1.2   bouyer 	if (pci_conf_read(sc->sc_pc, sc->sc_tag,
    110       1.2   bouyer 	    PCI_MAPREG_START + 0x14) == 0) {
    111       1.2   bouyer 		aprint_normal("\n");
    112       1.2   bouyer 		return;
    113       1.2   bouyer 	}
    114       1.2   bouyer 
    115       1.1   bouyer 	if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
    116       1.1   bouyer 			   PCI_MAPREG_TYPE_MEM |
    117       1.1   bouyer 			   PCI_MAPREG_MEM_TYPE_32BIT, 0,
    118       1.1   bouyer 			   &sc->sc_ba5_st, &sc->sc_ba5_sh,
    119       1.1   bouyer 			   NULL, NULL) != 0) {
    120       1.1   bouyer 		aprint_error(": unable to map BA5 register space\n");
    121       1.1   bouyer 		return;
    122       1.1   bouyer 	}
    123       1.1   bouyer 
    124       1.1   bouyer 	aprint_normal(": DMA");
    125       1.1   bouyer 	svwsata_mapreg_dma(sc, pa);
    126       1.1   bouyer 	aprint_normal("\n");
    127       1.1   bouyer 
    128  1.3.14.2       ad 	sc->sc_wdcdev.cap = WDC_CAPABILITY_WIDEREGS;
    129  1.3.14.2       ad 
    130       1.1   bouyer 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
    131       1.1   bouyer 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
    132       1.1   bouyer 	if (sc->sc_dma_ok) {
    133       1.1   bouyer 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
    134       1.1   bouyer 		sc->sc_wdcdev.irqack = pciide_irqack;
    135       1.1   bouyer 		sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
    136       1.1   bouyer 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
    137       1.1   bouyer 	}
    138       1.1   bouyer 
    139       1.1   bouyer 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
    140       1.1   bouyer 	sc->sc_wdcdev.sc_atac.atac_nchannels = 4;
    141       1.1   bouyer 	sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel;
    142       1.1   bouyer 
    143       1.1   bouyer 	/* We can use SControl and SStatus to probe for drives. */
    144  1.3.14.1       ad 	sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe;
    145       1.1   bouyer 
    146       1.1   bouyer 	wdc_allocate_regs(&sc->sc_wdcdev);
    147       1.1   bouyer 
    148       1.1   bouyer 	/* Map and establish the interrupt handler. */
    149       1.1   bouyer 	if(pci_intr_map(pa, &intrhandle) != 0) {
    150       1.1   bouyer 		aprint_error("%s: couldn't map native-PCI interrupt\n",
    151       1.1   bouyer 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
    152       1.1   bouyer 		return;
    153       1.1   bouyer 	}
    154       1.1   bouyer 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    155       1.1   bouyer 	sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
    156       1.1   bouyer 	    pciide_pci_intr, sc);
    157       1.1   bouyer 	if (sc->sc_pci_ih != NULL) {
    158       1.1   bouyer 		aprint_normal("%s: using %s for native-PCI interrupt\n",
    159       1.1   bouyer 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    160       1.1   bouyer 		    intrstr ? intrstr : "unknown interrupt");
    161       1.1   bouyer 	} else {
    162       1.1   bouyer 		aprint_error("%s: couldn't establish native-PCI interrupt",
    163       1.1   bouyer 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
    164       1.1   bouyer 		if (intrstr != NULL)
    165       1.1   bouyer 			aprint_normal(" at %s", intrstr);
    166       1.1   bouyer 		aprint_normal("\n");
    167       1.1   bouyer 		return;
    168       1.1   bouyer 	}
    169       1.1   bouyer 
    170       1.1   bouyer 	interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
    171       1.1   bouyer 	    PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
    172       1.1   bouyer 
    173       1.1   bouyer 
    174       1.1   bouyer 	for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
    175       1.1   bouyer 	     channel++) {
    176       1.1   bouyer 		cp = &sc->pciide_channels[channel];
    177       1.1   bouyer 
    178       1.1   bouyer 		if (pciide_chansetup(sc, channel, interface) == 0)
    179       1.1   bouyer 			continue;
    180       1.1   bouyer 		svwsata_mapchan(cp);
    181       1.1   bouyer 	}
    182       1.1   bouyer }
    183       1.1   bouyer 
    184       1.1   bouyer static void
    185       1.1   bouyer svwsata_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa)
    186       1.1   bouyer {
    187       1.1   bouyer 	struct pciide_channel *pc;
    188       1.1   bouyer 	int chan, reg;
    189       1.1   bouyer 	bus_size_t size;
    190       1.1   bouyer 
    191       1.1   bouyer 	sc->sc_wdcdev.dma_arg = sc;
    192       1.1   bouyer 	sc->sc_wdcdev.dma_init = pciide_dma_init;
    193       1.1   bouyer 	sc->sc_wdcdev.dma_start = pciide_dma_start;
    194       1.1   bouyer 	sc->sc_wdcdev.dma_finish = pciide_dma_finish;
    195       1.1   bouyer 
    196       1.3  thorpej 	if (device_cfdata(&sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
    197       1.1   bouyer 	    PCIIDE_OPTIONS_NODMA) {
    198       1.1   bouyer 		aprint_normal(
    199       1.1   bouyer 		    ", but unused (forced off by config file)");
    200       1.1   bouyer 		sc->sc_dma_ok = 0;
    201       1.1   bouyer 		return;
    202       1.1   bouyer 	}
    203       1.1   bouyer 
    204       1.1   bouyer 	/*
    205       1.1   bouyer 	 * Slice off a subregion of BA5 for each of the channel's DMA
    206       1.1   bouyer 	 * registers.
    207       1.1   bouyer 	 */
    208       1.1   bouyer 
    209       1.1   bouyer 	sc->sc_dma_iot = sc->sc_ba5_st;
    210       1.1   bouyer 	for (chan = 0; chan < 4; chan++) {
    211       1.1   bouyer 		pc = &sc->pciide_channels[chan];
    212       1.1   bouyer 		for (reg = 0; reg < IDEDMA_NREGS; reg++) {
    213       1.1   bouyer 			size = 4;
    214       1.1   bouyer 			if (size > (IDEDMA_SCH_OFFSET - reg))
    215       1.1   bouyer 				size = IDEDMA_SCH_OFFSET - reg;
    216       1.1   bouyer 			if (bus_space_subregion(sc->sc_ba5_st,
    217       1.1   bouyer 			    sc->sc_ba5_sh,
    218       1.1   bouyer 			    (chan << 8) + SVWSATA_DMA + reg,
    219       1.1   bouyer 			    size, &pc->dma_iohs[reg]) != 0) {
    220       1.1   bouyer 				sc->sc_dma_ok = 0;
    221       1.1   bouyer 				aprint_normal(", but can't subregion offset "
    222       1.1   bouyer 				    "%lu size %lu",
    223       1.1   bouyer 				    (u_long) (chan << 8) + SVWSATA_DMA + reg,
    224       1.1   bouyer 				    (u_long) size);
    225       1.1   bouyer 				return;
    226       1.1   bouyer 			}
    227       1.1   bouyer 		}
    228       1.1   bouyer 	}
    229       1.1   bouyer 
    230       1.1   bouyer 	/* DMA registers all set up! */
    231       1.1   bouyer 	sc->sc_dmat = pa->pa_dmat;
    232       1.1   bouyer 	sc->sc_dma_ok = 1;
    233       1.1   bouyer }
    234       1.1   bouyer 
    235       1.1   bouyer static void
    236       1.1   bouyer svwsata_mapchan(struct pciide_channel *cp)
    237       1.1   bouyer {
    238       1.1   bouyer 	struct ata_channel *wdc_cp = &cp->ata_channel;
    239       1.1   bouyer 	struct pciide_softc *sc = CHAN_TO_PCIIDE(wdc_cp);
    240       1.1   bouyer 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(wdc_cp);
    241       1.1   bouyer 	int i;
    242       1.1   bouyer 
    243       1.1   bouyer 	cp->compat = 0;
    244       1.1   bouyer 	cp->ih = sc->sc_pci_ih;
    245       1.1   bouyer 
    246       1.1   bouyer 	wdr->cmd_iot = sc->sc_ba5_st;
    247       1.1   bouyer 	if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
    248       1.1   bouyer 		(wdc_cp->ch_channel << 8) + SVWSATA_TF0,
    249       1.1   bouyer 		SVWSATA_TF8 - SVWSATA_TF0, &wdr->cmd_baseioh) != 0) {
    250       1.1   bouyer 		aprint_error("%s: couldn't map %s cmd regs\n",
    251       1.1   bouyer 		       sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
    252       1.1   bouyer 		goto bad;
    253       1.1   bouyer 	}
    254       1.1   bouyer 
    255       1.1   bouyer 	wdr->ctl_iot = sc->sc_ba5_st;
    256       1.1   bouyer 	if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
    257       1.1   bouyer 		(wdc_cp->ch_channel << 8) + SVWSATA_TF8, 4,
    258       1.1   bouyer 		&cp->ctl_baseioh) != 0) {
    259       1.1   bouyer 		aprint_error("%s: couldn't map %s ctl regs\n",
    260       1.1   bouyer 		       sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
    261       1.1   bouyer 		goto bad;
    262       1.1   bouyer 	}
    263       1.1   bouyer 	wdr->ctl_ioh = cp->ctl_baseioh;
    264       1.1   bouyer 
    265       1.1   bouyer 	for (i = 0; i < WDC_NREG; i++) {
    266       1.1   bouyer 		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    267       1.1   bouyer 					i << 2, i == 0 ? 4 : 1,
    268       1.1   bouyer 					&wdr->cmd_iohs[i]) != 0) {
    269       1.1   bouyer 			aprint_error("%s: couldn't subregion %s channel "
    270       1.1   bouyer 				     "cmd regs\n",
    271       1.1   bouyer 			    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
    272       1.1   bouyer 			goto bad;
    273       1.1   bouyer 		}
    274       1.1   bouyer 	}
    275       1.1   bouyer 	wdc_init_shadow_regs(wdc_cp);
    276       1.1   bouyer 	wdr->data32iot = wdr->cmd_iot;
    277       1.1   bouyer 	wdr->data32ioh = wdr->cmd_iohs[0];
    278       1.1   bouyer 
    279  1.3.14.1       ad 
    280  1.3.14.1       ad 	wdr->sata_iot = sc->sc_ba5_st;
    281  1.3.14.1       ad 	wdr->sata_baseioh = sc->sc_ba5_sh;
    282  1.3.14.1       ad 	if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
    283  1.3.14.1       ad 	    (wdc_cp->ch_channel << 8) + SVWSATA_SSTATUS, 1,
    284  1.3.14.1       ad 	    &wdr->sata_status) != 0) {
    285  1.3.14.1       ad 		aprint_error("%s: couldn't map channel %d "
    286  1.3.14.1       ad 		    "sata_status regs\n",
    287  1.3.14.1       ad 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    288  1.3.14.1       ad 		    wdc_cp->ch_channel);
    289  1.3.14.1       ad 		goto bad;
    290  1.3.14.1       ad 	}
    291  1.3.14.1       ad 	if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
    292  1.3.14.1       ad 	    (wdc_cp->ch_channel << 8) + SVWSATA_SERROR, 1,
    293  1.3.14.1       ad 	    &wdr->sata_error) != 0) {
    294  1.3.14.1       ad 		aprint_error("%s: couldn't map channel %d "
    295  1.3.14.1       ad 		    "sata_error regs\n",
    296  1.3.14.1       ad 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    297  1.3.14.1       ad 		    wdc_cp->ch_channel);
    298  1.3.14.1       ad 		goto bad;
    299  1.3.14.1       ad 	}
    300  1.3.14.1       ad 	if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
    301  1.3.14.1       ad 	    (wdc_cp->ch_channel << 8) + SVWSATA_SCONTROL, 1,
    302  1.3.14.1       ad 	    &wdr->sata_control) != 0) {
    303  1.3.14.1       ad 		aprint_error("%s: couldn't map channel %d "
    304  1.3.14.1       ad 		    "sata_control regs\n",
    305  1.3.14.1       ad 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    306  1.3.14.1       ad 		    wdc_cp->ch_channel);
    307  1.3.14.1       ad 		goto bad;
    308  1.3.14.1       ad 	}
    309  1.3.14.1       ad 
    310       1.1   bouyer 	wdcattach(wdc_cp);
    311       1.1   bouyer 	return;
    312       1.1   bouyer 
    313       1.1   bouyer  bad:
    314       1.1   bouyer 	cp->ata_channel.ch_flags |= ATACH_DISABLED;
    315       1.1   bouyer }
    316