svwsata.c revision 1.4
1 /* $NetBSD: svwsata.c,v 1.4 2006/10/12 01:31:33 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Mark Kettenis 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/cdefs.h> 20 __KERNEL_RCSID(0, "$NetBSD: svwsata.c,v 1.4 2006/10/12 01:31:33 christos Exp $"); 21 22 #include <sys/param.h> 23 #include <sys/systm.h> 24 25 #include <dev/ata/atareg.h> 26 #include <dev/ata/satareg.h> 27 #include <dev/ata/satavar.h> 28 #include <dev/pci/pcivar.h> 29 #include <dev/pci/pcidevs.h> 30 #include <dev/pci/pciidereg.h> 31 #include <dev/pci/pciidevar.h> 32 #include <dev/pci/pciide_svwsata_reg.h> 33 34 static int svwsata_match(struct device *, struct cfdata *, void *); 35 static void svwsata_attach(struct device *, struct device *, void *); 36 37 static void svwsata_chip_map(struct pciide_softc *, struct pci_attach_args *) __unused; 38 static void svwsata_mapreg_dma(struct pciide_softc *, struct pci_attach_args *); 39 static void svwsata_mapchan(struct pciide_channel *); 40 static void svwsata_drv_probe(struct ata_channel *chp); 41 42 CFATTACH_DECL(svwsata, sizeof(struct pciide_softc), 43 svwsata_match, svwsata_attach, NULL, NULL); 44 45 static const struct pciide_product_desc pciide_svwsata_products[] = { 46 { PCI_PRODUCT_SERVERWORKS_K2_SATA, 47 0, 48 "ServerWorks K2 SATA Controller", 49 svwsata_chip_map 50 }, 51 { PCI_PRODUCT_SERVERWORKS_FRODO4_SATA, 52 0, 53 "ServerWorks Frodo4 SATA Controller", 54 svwsata_chip_map 55 }, 56 { PCI_PRODUCT_SERVERWORKS_FRODO8_SATA, 57 0, 58 "ServerWorks Frodo8 SATA Controller", 59 svwsata_chip_map 60 }, 61 { PCI_PRODUCT_SERVERWORKS_HT1000_SATA, 62 0, 63 "ServerWorks HT-1000 SATA Controller", 64 svwsata_chip_map 65 }, 66 { 0, 67 0, 68 NULL, 69 NULL, 70 } 71 }; 72 73 static int 74 svwsata_match(struct device *parent __unused, struct cfdata *match __unused, 75 void *aux) 76 { 77 struct pci_attach_args *pa = aux; 78 79 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SERVERWORKS) { 80 if (pciide_lookup_product(pa->pa_id, 81 pciide_svwsata_products)) 82 return (2); 83 } 84 return (0); 85 } 86 87 static void 88 svwsata_attach(struct device *parent __unused, struct device *self, void *aux) 89 { 90 struct pci_attach_args *pa = aux; 91 struct pciide_softc *sc = (void *)self; 92 93 pciide_common_attach(sc, pa, 94 pciide_lookup_product(pa->pa_id, pciide_svwsata_products)); 95 } 96 97 static void 98 svwsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa) 99 { 100 struct pciide_channel *cp; 101 pci_intr_handle_t intrhandle; 102 pcireg_t interface; 103 const char *intrstr; 104 int channel; 105 106 if (pciide_chipen(sc, pa) == 0) 107 return; 108 109 /* The 4-port version has a dummy second function. */ 110 if (pci_conf_read(sc->sc_pc, sc->sc_tag, 111 PCI_MAPREG_START + 0x14) == 0) { 112 aprint_normal("\n"); 113 return; 114 } 115 116 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14, 117 PCI_MAPREG_TYPE_MEM | 118 PCI_MAPREG_MEM_TYPE_32BIT, 0, 119 &sc->sc_ba5_st, &sc->sc_ba5_sh, 120 NULL, NULL) != 0) { 121 aprint_error(": unable to map BA5 register space\n"); 122 return; 123 } 124 125 aprint_normal(": DMA"); 126 svwsata_mapreg_dma(sc, pa); 127 aprint_normal("\n"); 128 129 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32; 130 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 131 if (sc->sc_dma_ok) { 132 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 133 sc->sc_wdcdev.irqack = pciide_irqack; 134 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 135 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6; 136 } 137 138 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray; 139 sc->sc_wdcdev.sc_atac.atac_nchannels = 4; 140 sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel; 141 142 /* We can use SControl and SStatus to probe for drives. */ 143 sc->sc_wdcdev.sc_atac.atac_probe = svwsata_drv_probe; 144 145 wdc_allocate_regs(&sc->sc_wdcdev); 146 147 /* Map and establish the interrupt handler. */ 148 if(pci_intr_map(pa, &intrhandle) != 0) { 149 aprint_error("%s: couldn't map native-PCI interrupt\n", 150 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 151 return; 152 } 153 intrstr = pci_intr_string(pa->pa_pc, intrhandle); 154 sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, 155 pciide_pci_intr, sc); 156 if (sc->sc_pci_ih != NULL) { 157 aprint_normal("%s: using %s for native-PCI interrupt\n", 158 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, 159 intrstr ? intrstr : "unknown interrupt"); 160 } else { 161 aprint_error("%s: couldn't establish native-PCI interrupt", 162 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 163 if (intrstr != NULL) 164 aprint_normal(" at %s", intrstr); 165 aprint_normal("\n"); 166 return; 167 } 168 169 interface = PCIIDE_INTERFACE_BUS_MASTER_DMA | 170 PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1); 171 172 173 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels; 174 channel++) { 175 cp = &sc->pciide_channels[channel]; 176 177 if (pciide_chansetup(sc, channel, interface) == 0) 178 continue; 179 svwsata_mapchan(cp); 180 } 181 } 182 183 static void 184 svwsata_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa) 185 { 186 struct pciide_channel *pc; 187 int chan, reg; 188 bus_size_t size; 189 190 sc->sc_wdcdev.dma_arg = sc; 191 sc->sc_wdcdev.dma_init = pciide_dma_init; 192 sc->sc_wdcdev.dma_start = pciide_dma_start; 193 sc->sc_wdcdev.dma_finish = pciide_dma_finish; 194 195 if (device_cfdata(&sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags & 196 PCIIDE_OPTIONS_NODMA) { 197 aprint_normal( 198 ", but unused (forced off by config file)"); 199 sc->sc_dma_ok = 0; 200 return; 201 } 202 203 /* 204 * Slice off a subregion of BA5 for each of the channel's DMA 205 * registers. 206 */ 207 208 sc->sc_dma_iot = sc->sc_ba5_st; 209 for (chan = 0; chan < 4; chan++) { 210 pc = &sc->pciide_channels[chan]; 211 for (reg = 0; reg < IDEDMA_NREGS; reg++) { 212 size = 4; 213 if (size > (IDEDMA_SCH_OFFSET - reg)) 214 size = IDEDMA_SCH_OFFSET - reg; 215 if (bus_space_subregion(sc->sc_ba5_st, 216 sc->sc_ba5_sh, 217 (chan << 8) + SVWSATA_DMA + reg, 218 size, &pc->dma_iohs[reg]) != 0) { 219 sc->sc_dma_ok = 0; 220 aprint_normal(", but can't subregion offset " 221 "%lu size %lu", 222 (u_long) (chan << 8) + SVWSATA_DMA + reg, 223 (u_long) size); 224 return; 225 } 226 } 227 } 228 229 /* DMA registers all set up! */ 230 sc->sc_dmat = pa->pa_dmat; 231 sc->sc_dma_ok = 1; 232 } 233 234 static void 235 svwsata_mapchan(struct pciide_channel *cp) 236 { 237 struct ata_channel *wdc_cp = &cp->ata_channel; 238 struct pciide_softc *sc = CHAN_TO_PCIIDE(wdc_cp); 239 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(wdc_cp); 240 int i; 241 242 cp->compat = 0; 243 cp->ih = sc->sc_pci_ih; 244 245 wdr->cmd_iot = sc->sc_ba5_st; 246 if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh, 247 (wdc_cp->ch_channel << 8) + SVWSATA_TF0, 248 SVWSATA_TF8 - SVWSATA_TF0, &wdr->cmd_baseioh) != 0) { 249 aprint_error("%s: couldn't map %s cmd regs\n", 250 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name); 251 goto bad; 252 } 253 254 wdr->ctl_iot = sc->sc_ba5_st; 255 if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh, 256 (wdc_cp->ch_channel << 8) + SVWSATA_TF8, 4, 257 &cp->ctl_baseioh) != 0) { 258 aprint_error("%s: couldn't map %s ctl regs\n", 259 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name); 260 goto bad; 261 } 262 wdr->ctl_ioh = cp->ctl_baseioh; 263 264 for (i = 0; i < WDC_NREG; i++) { 265 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 266 i << 2, i == 0 ? 4 : 1, 267 &wdr->cmd_iohs[i]) != 0) { 268 aprint_error("%s: couldn't subregion %s channel " 269 "cmd regs\n", 270 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name); 271 goto bad; 272 } 273 } 274 wdc_init_shadow_regs(wdc_cp); 275 wdr->data32iot = wdr->cmd_iot; 276 wdr->data32ioh = wdr->cmd_iohs[0]; 277 278 wdcattach(wdc_cp); 279 return; 280 281 bad: 282 cp->ata_channel.ch_flags |= ATACH_DISABLED; 283 } 284 285 static void 286 svwsata_drv_probe(struct ata_channel *chp) 287 { 288 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp); 289 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 290 int channel = chp->ch_channel; 291 uint32_t scontrol, sstatus; 292 uint8_t scnt, sn, cl, ch; 293 int i, s; 294 295 /* XXX This should be done by other code. */ 296 for (i = 0; i < 2; i++) { 297 chp->ch_drive[i].chnl_softc = chp; 298 chp->ch_drive[i].drive = i; 299 } 300 301 /* 302 * Request communication initialization sequence, any speed. 303 * Performing this is the equivalent of an ATA Reset. 304 */ 305 scontrol = SControl_DET_INIT | SControl_SPD_ANY; 306 307 /* 308 * XXX We don't yet support SATA power management; disable all 309 * power management state transitions. 310 */ 311 scontrol |= SControl_IPM_NONE; 312 313 bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 314 (channel << 8) + SVWSATA_SCONTROL, scontrol); 315 delay(50 * 1000); 316 scontrol &= ~SControl_DET_INIT; 317 bus_space_write_4(sc->sc_ba5_st, sc->sc_ba5_sh, 318 (channel << 8) + SVWSATA_SCONTROL, scontrol); 319 delay(50 * 1000); 320 321 sstatus = bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 322 (channel << 8) + SVWSATA_SSTATUS); 323 #if 0 324 printf("%s: port %d: SStatus=0x%08x, SControl=0x%08x\n", 325 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, sstatus, 326 bus_space_read_4(sc->sc_ba5_st, sc->sc_ba5_sh, 327 (channel << 8) + SVWSATA_SSTATUS)); 328 #endif 329 switch (sstatus & SStatus_DET_mask) { 330 case SStatus_DET_NODEV: 331 /* No device; be silent. */ 332 break; 333 334 case SStatus_DET_DEV_NE: 335 aprint_error("%s: port %d: device connected, but " 336 "communication not established\n", 337 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel); 338 break; 339 340 case SStatus_DET_OFFLINE: 341 aprint_error("%s: port %d: PHY offline\n", 342 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel); 343 break; 344 345 case SStatus_DET_DEV: 346 /* 347 * XXX ATAPI detection doesn't currently work. Don't 348 * XXX know why. But, it's not like the standard method 349 * XXX can detect an ATAPI device connected via a SATA/PATA 350 * XXX bridge, so at least this is no worse. --thorpej 351 */ 352 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 353 WDSD_IBM | (0 << 4)); 354 delay(10); /* 400ns delay */ 355 /* Save register contents. */ 356 scnt = bus_space_read_1(wdr->cmd_iot, 357 wdr->cmd_iohs[wd_seccnt], 0); 358 sn = bus_space_read_1(wdr->cmd_iot, 359 wdr->cmd_iohs[wd_sector], 0); 360 cl = bus_space_read_1(wdr->cmd_iot, 361 wdr->cmd_iohs[wd_cyl_lo], 0); 362 ch = bus_space_read_1(wdr->cmd_iot, 363 wdr->cmd_iohs[wd_cyl_hi], 0); 364 #if 0 365 printf("%s: port %d: scnt=0x%x sn=0x%x cl=0x%x ch=0x%x\n", 366 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, 367 scnt, sn, cl, ch); 368 #endif 369 /* 370 * scnt and sn are supposed to be 0x1 for ATAPI, but in some 371 * cases we get wrong values here, so ignore it. 372 */ 373 s = splbio(); 374 if (cl == 0x14 && ch == 0xeb) 375 chp->ch_drive[0].drive_flags |= DRIVE_ATAPI; 376 else 377 chp->ch_drive[0].drive_flags |= DRIVE_ATA; 378 splx(s); 379 380 aprint_normal("%s: port %d: device present, speed: %s\n", 381 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, 382 sata_speed(sstatus)); 383 break; 384 385 default: 386 aprint_error("%s: port %d: unknown SStatus: 0x%08x\n", 387 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, chp->ch_channel, sstatus); 388 } 389 } 390
Indexes created Fri Sep 26 20:09:58 GMT 2025