svwsata.c revision 1.8 1 /* $NetBSD: svwsata.c,v 1.8 2007/10/24 23:08:07 xtraeme Exp $ */
2
3 /*
4 * Copyright (c) 2005 Mark Kettenis
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 #include <sys/cdefs.h>
20 __KERNEL_RCSID(0, "$NetBSD: svwsata.c,v 1.8 2007/10/24 23:08:07 xtraeme Exp $");
21
22 #include <sys/param.h>
23 #include <sys/systm.h>
24
25 #include <dev/ata/atareg.h>
26 #include <dev/ata/satareg.h>
27 #include <dev/ata/satavar.h>
28 #include <dev/pci/pcivar.h>
29 #include <dev/pci/pcidevs.h>
30 #include <dev/pci/pciidereg.h>
31 #include <dev/pci/pciidevar.h>
32 #include <dev/pci/pciide_svwsata_reg.h>
33
34 static int svwsata_match(struct device *, struct cfdata *, void *);
35 static void svwsata_attach(struct device *, struct device *, void *);
36
37 static void svwsata_chip_map(struct pciide_softc *, struct pci_attach_args *);
38 static void svwsata_mapreg_dma(struct pciide_softc *, struct pci_attach_args *);
39 static void svwsata_mapchan(struct pciide_channel *);
40
41 CFATTACH_DECL(svwsata, sizeof(struct pciide_softc),
42 svwsata_match, svwsata_attach, NULL, NULL);
43
44 static const struct pciide_product_desc pciide_svwsata_products[] = {
45 { PCI_PRODUCT_SERVERWORKS_K2_SATA,
46 0,
47 "ServerWorks K2 SATA Controller",
48 svwsata_chip_map
49 },
50 { PCI_PRODUCT_SERVERWORKS_FRODO4_SATA,
51 0,
52 "ServerWorks Frodo4 SATA Controller",
53 svwsata_chip_map
54 },
55 { PCI_PRODUCT_SERVERWORKS_FRODO8_SATA,
56 0,
57 "ServerWorks Frodo8 SATA Controller",
58 svwsata_chip_map
59 },
60 { PCI_PRODUCT_SERVERWORKS_HT1000_SATA_1,
61 0,
62 "ServerWorks HT-1000 SATA Controller",
63 svwsata_chip_map
64 },
65 { PCI_PRODUCT_SERVERWORKS_HT1000_SATA_2,
66 0,
67 "ServerWorks HT-1000 SATA Controller",
68 svwsata_chip_map
69 },
70 { 0,
71 0,
72 NULL,
73 NULL,
74 }
75 };
76
77 static int
78 svwsata_match(struct device *parent, struct cfdata *match,
79 void *aux)
80 {
81 struct pci_attach_args *pa = aux;
82
83 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SERVERWORKS) {
84 if (pciide_lookup_product(pa->pa_id,
85 pciide_svwsata_products))
86 return (2);
87 }
88 return (0);
89 }
90
91 static void
92 svwsata_attach(struct device *parent, struct device *self, void *aux)
93 {
94 struct pci_attach_args *pa = aux;
95 struct pciide_softc *sc = (void *)self;
96
97 pciide_common_attach(sc, pa,
98 pciide_lookup_product(pa->pa_id, pciide_svwsata_products));
99 }
100
101 static void
102 svwsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
103 {
104 struct pciide_channel *cp;
105 pci_intr_handle_t intrhandle;
106 pcireg_t interface;
107 const char *intrstr;
108 int channel;
109
110 if (pciide_chipen(sc, pa) == 0)
111 return;
112
113 /* The 4-port version has a dummy second function. */
114 if (pci_conf_read(sc->sc_pc, sc->sc_tag,
115 PCI_MAPREG_START + 0x14) == 0) {
116 aprint_normal("\n");
117 return;
118 }
119
120 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
121 PCI_MAPREG_TYPE_MEM |
122 PCI_MAPREG_MEM_TYPE_32BIT, 0,
123 &sc->sc_ba5_st, &sc->sc_ba5_sh,
124 NULL, NULL) != 0) {
125 aprint_error(": unable to map BA5 register space\n");
126 return;
127 }
128
129 aprint_normal(": DMA");
130 svwsata_mapreg_dma(sc, pa);
131 aprint_normal("\n");
132
133 sc->sc_wdcdev.cap = WDC_CAPABILITY_WIDEREGS;
134
135 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
136 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
137 if (sc->sc_dma_ok) {
138 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
139 sc->sc_wdcdev.irqack = pciide_irqack;
140 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
141 sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
142 }
143
144 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
145 sc->sc_wdcdev.sc_atac.atac_nchannels = 4;
146 sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel;
147
148 /* We can use SControl and SStatus to probe for drives. */
149 sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe;
150
151 wdc_allocate_regs(&sc->sc_wdcdev);
152
153 /* Map and establish the interrupt handler. */
154 if(pci_intr_map(pa, &intrhandle) != 0) {
155 aprint_error("%s: couldn't map native-PCI interrupt\n",
156 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
157 return;
158 }
159 intrstr = pci_intr_string(pa->pa_pc, intrhandle);
160 sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
161 pciide_pci_intr, sc);
162 if (sc->sc_pci_ih != NULL) {
163 aprint_normal("%s: using %s for native-PCI interrupt\n",
164 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
165 intrstr ? intrstr : "unknown interrupt");
166 } else {
167 aprint_error("%s: couldn't establish native-PCI interrupt",
168 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
169 if (intrstr != NULL)
170 aprint_normal(" at %s", intrstr);
171 aprint_normal("\n");
172 return;
173 }
174
175 interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
176 PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
177
178
179 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
180 channel++) {
181 cp = &sc->pciide_channels[channel];
182
183 if (pciide_chansetup(sc, channel, interface) == 0)
184 continue;
185 svwsata_mapchan(cp);
186 }
187 }
188
189 static void
190 svwsata_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa)
191 {
192 struct pciide_channel *pc;
193 int chan, reg;
194 bus_size_t size;
195
196 sc->sc_wdcdev.dma_arg = sc;
197 sc->sc_wdcdev.dma_init = pciide_dma_init;
198 sc->sc_wdcdev.dma_start = pciide_dma_start;
199 sc->sc_wdcdev.dma_finish = pciide_dma_finish;
200
201 if (device_cfdata(&sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
202 PCIIDE_OPTIONS_NODMA) {
203 aprint_normal(
204 ", but unused (forced off by config file)");
205 sc->sc_dma_ok = 0;
206 return;
207 }
208
209 /*
210 * Slice off a subregion of BA5 for each of the channel's DMA
211 * registers.
212 */
213
214 sc->sc_dma_iot = sc->sc_ba5_st;
215 for (chan = 0; chan < 4; chan++) {
216 pc = &sc->pciide_channels[chan];
217 for (reg = 0; reg < IDEDMA_NREGS; reg++) {
218 size = 4;
219 if (size > (IDEDMA_SCH_OFFSET - reg))
220 size = IDEDMA_SCH_OFFSET - reg;
221 if (bus_space_subregion(sc->sc_ba5_st,
222 sc->sc_ba5_sh,
223 (chan << 8) + SVWSATA_DMA + reg,
224 size, &pc->dma_iohs[reg]) != 0) {
225 sc->sc_dma_ok = 0;
226 aprint_normal(", but can't subregion offset "
227 "%lu size %lu",
228 (u_long) (chan << 8) + SVWSATA_DMA + reg,
229 (u_long) size);
230 return;
231 }
232 }
233 }
234
235 /* DMA registers all set up! */
236 sc->sc_dmat = pa->pa_dmat;
237 sc->sc_dma_ok = 1;
238 }
239
240 static void
241 svwsata_mapchan(struct pciide_channel *cp)
242 {
243 struct ata_channel *wdc_cp = &cp->ata_channel;
244 struct pciide_softc *sc = CHAN_TO_PCIIDE(wdc_cp);
245 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(wdc_cp);
246 int i;
247
248 cp->compat = 0;
249 cp->ih = sc->sc_pci_ih;
250
251 wdr->cmd_iot = sc->sc_ba5_st;
252 if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
253 (wdc_cp->ch_channel << 8) + SVWSATA_TF0,
254 SVWSATA_TF8 - SVWSATA_TF0, &wdr->cmd_baseioh) != 0) {
255 aprint_error("%s: couldn't map %s cmd regs\n",
256 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
257 goto bad;
258 }
259
260 wdr->ctl_iot = sc->sc_ba5_st;
261 if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
262 (wdc_cp->ch_channel << 8) + SVWSATA_TF8, 4,
263 &cp->ctl_baseioh) != 0) {
264 aprint_error("%s: couldn't map %s ctl regs\n",
265 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
266 goto bad;
267 }
268 wdr->ctl_ioh = cp->ctl_baseioh;
269
270 for (i = 0; i < WDC_NREG; i++) {
271 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
272 i << 2, i == 0 ? 4 : 1,
273 &wdr->cmd_iohs[i]) != 0) {
274 aprint_error("%s: couldn't subregion %s channel "
275 "cmd regs\n",
276 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
277 goto bad;
278 }
279 }
280 wdc_init_shadow_regs(wdc_cp);
281 wdr->data32iot = wdr->cmd_iot;
282 wdr->data32ioh = wdr->cmd_iohs[0];
283
284
285 wdr->sata_iot = sc->sc_ba5_st;
286 wdr->sata_baseioh = sc->sc_ba5_sh;
287 if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
288 (wdc_cp->ch_channel << 8) + SVWSATA_SSTATUS, 1,
289 &wdr->sata_status) != 0) {
290 aprint_error("%s: couldn't map channel %d "
291 "sata_status regs\n",
292 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
293 wdc_cp->ch_channel);
294 goto bad;
295 }
296 if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
297 (wdc_cp->ch_channel << 8) + SVWSATA_SERROR, 1,
298 &wdr->sata_error) != 0) {
299 aprint_error("%s: couldn't map channel %d "
300 "sata_error regs\n",
301 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
302 wdc_cp->ch_channel);
303 goto bad;
304 }
305 if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
306 (wdc_cp->ch_channel << 8) + SVWSATA_SCONTROL, 1,
307 &wdr->sata_control) != 0) {
308 aprint_error("%s: couldn't map channel %d "
309 "sata_control regs\n",
310 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
311 wdc_cp->ch_channel);
312 goto bad;
313 }
314
315 wdcattach(wdc_cp);
316 return;
317
318 bad:
319 cp->ata_channel.ch_flags |= ATACH_DISABLED;
320 }
321