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svwsata.c revision 1.9 
      1 /*	$NetBSD: svwsata.c,v 1.9 2008/02/05 07:02:00 simonb Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2005 Mark Kettenis
      5  *
      6  * Permission to use, copy, modify, and distribute this software for any
      7  * purpose with or without fee is hereby granted, provided that the above
      8  * copyright notice and this permission notice appear in all copies.
      9  *
     10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     17  */
     18 
     19 #include <sys/cdefs.h>
     20 __KERNEL_RCSID(0, "$NetBSD: svwsata.c,v 1.9 2008/02/05 07:02:00 simonb Exp $");
     21 
     22 #include <sys/param.h>
     23 #include <sys/systm.h>
     24 
     25 #include <dev/ata/atareg.h>
     26 #include <dev/ata/satareg.h>
     27 #include <dev/ata/satavar.h>
     28 #include <dev/pci/pcivar.h>
     29 #include <dev/pci/pcidevs.h>
     30 #include <dev/pci/pciidereg.h>
     31 #include <dev/pci/pciidevar.h>
     32 #include <dev/pci/pciide_svwsata_reg.h>
     33 
     34 static int  svwsata_match(struct device *, struct cfdata *, void *);
     35 static void svwsata_attach(struct device *, struct device *, void *);
     36 
     37 static void svwsata_chip_map(struct pciide_softc *, struct pci_attach_args *);
     38 static void svwsata_mapreg_dma(struct pciide_softc *, struct pci_attach_args *);
     39 static void svwsata_mapchan(struct pciide_channel *);
     40 
     41 CFATTACH_DECL(svwsata, sizeof(struct pciide_softc),
     42     svwsata_match, svwsata_attach, NULL, NULL);
     43 
     44 static const struct pciide_product_desc pciide_svwsata_products[] =  {
     45 	{ PCI_PRODUCT_SERVERWORKS_K2_SATA,
     46 	  0,
     47 	  "ServerWorks K2 SATA Controller",
     48 	  svwsata_chip_map
     49 	},
     50 	{ PCI_PRODUCT_SERVERWORKS_FRODO4_SATA,
     51 	  0,
     52 	  "ServerWorks Frodo4 SATA Controller",
     53 	  svwsata_chip_map
     54 	},
     55 	{ PCI_PRODUCT_SERVERWORKS_FRODO8_SATA,
     56 	  0,
     57 	  "ServerWorks Frodo8 SATA Controller",
     58 	  svwsata_chip_map
     59 	},
     60 	{ PCI_PRODUCT_SERVERWORKS_HT1000_SATA_1,
     61 	  0,
     62 	  "ServerWorks HT-1000 SATA Controller",
     63 	  svwsata_chip_map
     64 	},
     65 	{ PCI_PRODUCT_SERVERWORKS_HT1000_SATA_2,
     66 	  0,
     67 	  "ServerWorks HT-1000 SATA Controller",
     68 	  svwsata_chip_map
     69 	},
     70 	{ 0,
     71 	  0,
     72 	  NULL,
     73 	  NULL,
     74 	}
     75 };
     76 
     77 static int
     78 svwsata_match(struct device *parent, struct cfdata *match,
     79     void *aux)
     80 {
     81 	struct pci_attach_args *pa = aux;
     82 
     83 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SERVERWORKS) {
     84 		if (pciide_lookup_product(pa->pa_id,
     85 		    pciide_svwsata_products))
     86 			return (2);
     87 	}
     88 	return (0);
     89 }
     90 
     91 static void
     92 svwsata_attach(struct device *parent, struct device *self, void *aux)
     93 {
     94 	struct pci_attach_args *pa = aux;
     95 	struct pciide_softc *sc = (void *)self;
     96 
     97 	pciide_common_attach(sc, pa,
     98 	    pciide_lookup_product(pa->pa_id, pciide_svwsata_products));
     99 }
    100 
    101 static void
    102 svwsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
    103 {
    104 	struct pciide_channel *cp;
    105 	pci_intr_handle_t intrhandle;
    106 	pcireg_t interface;
    107 	const char *intrstr;
    108 	int channel;
    109 
    110 	if (pciide_chipen(sc, pa) == 0)
    111 		return;
    112 
    113 	/* The 4-port version has a dummy second function. */
    114 	if (pci_conf_read(sc->sc_pc, sc->sc_tag,
    115 	    PCI_MAPREG_START + 0x14) == 0) {
    116 		aprint_normal("\n");
    117 		return;
    118 	}
    119 
    120 	if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
    121 			   PCI_MAPREG_TYPE_MEM |
    122 			   PCI_MAPREG_MEM_TYPE_32BIT, 0,
    123 			   &sc->sc_ba5_st, &sc->sc_ba5_sh,
    124 			   NULL, NULL) != 0) {
    125 		aprint_error(": unable to map BA5 register space\n");
    126 		return;
    127 	}
    128 
    129 	aprint_verbose("%s: bus-master DMA support present",
    130 	    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
    131 	svwsata_mapreg_dma(sc, pa);
    132 	aprint_verbose("\n");
    133 
    134 	sc->sc_wdcdev.cap = WDC_CAPABILITY_WIDEREGS;
    135 
    136 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
    137 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
    138 	if (sc->sc_dma_ok) {
    139 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
    140 		sc->sc_wdcdev.irqack = pciide_irqack;
    141 		sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
    142 		sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
    143 	}
    144 
    145 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
    146 	sc->sc_wdcdev.sc_atac.atac_nchannels = 4;
    147 	sc->sc_wdcdev.sc_atac.atac_set_modes = sata_setup_channel;
    148 
    149 	/* We can use SControl and SStatus to probe for drives. */
    150 	sc->sc_wdcdev.sc_atac.atac_probe = wdc_sataprobe;
    151 
    152 	wdc_allocate_regs(&sc->sc_wdcdev);
    153 
    154 	/* Map and establish the interrupt handler. */
    155 	if(pci_intr_map(pa, &intrhandle) != 0) {
    156 		aprint_error("%s: couldn't map native-PCI interrupt\n",
    157 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
    158 		return;
    159 	}
    160 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    161 	sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
    162 	    pciide_pci_intr, sc);
    163 	if (sc->sc_pci_ih != NULL) {
    164 		aprint_normal("%s: using %s for native-PCI interrupt\n",
    165 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    166 		    intrstr ? intrstr : "unknown interrupt");
    167 	} else {
    168 		aprint_error("%s: couldn't establish native-PCI interrupt",
    169 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
    170 		if (intrstr != NULL)
    171 			aprint_normal(" at %s", intrstr);
    172 		aprint_normal("\n");
    173 		return;
    174 	}
    175 
    176 	interface = PCIIDE_INTERFACE_BUS_MASTER_DMA |
    177 	    PCIIDE_INTERFACE_PCI(0) | PCIIDE_INTERFACE_PCI(1);
    178 
    179 
    180 	for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
    181 	     channel++) {
    182 		cp = &sc->pciide_channels[channel];
    183 
    184 		if (pciide_chansetup(sc, channel, interface) == 0)
    185 			continue;
    186 		svwsata_mapchan(cp);
    187 	}
    188 }
    189 
    190 static void
    191 svwsata_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa)
    192 {
    193 	struct pciide_channel *pc;
    194 	int chan, reg;
    195 	bus_size_t size;
    196 
    197 	sc->sc_wdcdev.dma_arg = sc;
    198 	sc->sc_wdcdev.dma_init = pciide_dma_init;
    199 	sc->sc_wdcdev.dma_start = pciide_dma_start;
    200 	sc->sc_wdcdev.dma_finish = pciide_dma_finish;
    201 
    202 	if (device_cfdata(&sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
    203 	    PCIIDE_OPTIONS_NODMA) {
    204 		aprint_normal(
    205 		    ", but unused (forced off by config file)");
    206 		sc->sc_dma_ok = 0;
    207 		return;
    208 	}
    209 
    210 	/*
    211 	 * Slice off a subregion of BA5 for each of the channel's DMA
    212 	 * registers.
    213 	 */
    214 
    215 	sc->sc_dma_iot = sc->sc_ba5_st;
    216 	for (chan = 0; chan < 4; chan++) {
    217 		pc = &sc->pciide_channels[chan];
    218 		for (reg = 0; reg < IDEDMA_NREGS; reg++) {
    219 			size = 4;
    220 			if (size > (IDEDMA_SCH_OFFSET - reg))
    221 				size = IDEDMA_SCH_OFFSET - reg;
    222 			if (bus_space_subregion(sc->sc_ba5_st,
    223 			    sc->sc_ba5_sh,
    224 			    (chan << 8) + SVWSATA_DMA + reg,
    225 			    size, &pc->dma_iohs[reg]) != 0) {
    226 				sc->sc_dma_ok = 0;
    227 				aprint_normal(", but can't subregion offset "
    228 				    "%lu size %lu",
    229 				    (u_long) (chan << 8) + SVWSATA_DMA + reg,
    230 				    (u_long) size);
    231 				return;
    232 			}
    233 		}
    234 	}
    235 
    236 	/* DMA registers all set up! */
    237 	sc->sc_dmat = pa->pa_dmat;
    238 	sc->sc_dma_ok = 1;
    239 }
    240 
    241 static void
    242 svwsata_mapchan(struct pciide_channel *cp)
    243 {
    244 	struct ata_channel *wdc_cp = &cp->ata_channel;
    245 	struct pciide_softc *sc = CHAN_TO_PCIIDE(wdc_cp);
    246 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(wdc_cp);
    247 	int i;
    248 
    249 	cp->compat = 0;
    250 	cp->ih = sc->sc_pci_ih;
    251 
    252 	wdr->cmd_iot = sc->sc_ba5_st;
    253 	if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
    254 		(wdc_cp->ch_channel << 8) + SVWSATA_TF0,
    255 		SVWSATA_TF8 - SVWSATA_TF0, &wdr->cmd_baseioh) != 0) {
    256 		aprint_error("%s: couldn't map %s cmd regs\n",
    257 		       sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
    258 		goto bad;
    259 	}
    260 
    261 	wdr->ctl_iot = sc->sc_ba5_st;
    262 	if (bus_space_subregion(sc->sc_ba5_st, sc->sc_ba5_sh,
    263 		(wdc_cp->ch_channel << 8) + SVWSATA_TF8, 4,
    264 		&cp->ctl_baseioh) != 0) {
    265 		aprint_error("%s: couldn't map %s ctl regs\n",
    266 		       sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
    267 		goto bad;
    268 	}
    269 	wdr->ctl_ioh = cp->ctl_baseioh;
    270 
    271 	for (i = 0; i < WDC_NREG; i++) {
    272 		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    273 					i << 2, i == 0 ? 4 : 1,
    274 					&wdr->cmd_iohs[i]) != 0) {
    275 			aprint_error("%s: couldn't subregion %s channel "
    276 				     "cmd regs\n",
    277 			    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname, cp->name);
    278 			goto bad;
    279 		}
    280 	}
    281 	wdc_init_shadow_regs(wdc_cp);
    282 	wdr->data32iot = wdr->cmd_iot;
    283 	wdr->data32ioh = wdr->cmd_iohs[0];
    284 
    285 
    286 	wdr->sata_iot = sc->sc_ba5_st;
    287 	wdr->sata_baseioh = sc->sc_ba5_sh;
    288 	if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
    289 	    (wdc_cp->ch_channel << 8) + SVWSATA_SSTATUS, 1,
    290 	    &wdr->sata_status) != 0) {
    291 		aprint_error("%s: couldn't map channel %d "
    292 		    "sata_status regs\n",
    293 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    294 		    wdc_cp->ch_channel);
    295 		goto bad;
    296 	}
    297 	if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
    298 	    (wdc_cp->ch_channel << 8) + SVWSATA_SERROR, 1,
    299 	    &wdr->sata_error) != 0) {
    300 		aprint_error("%s: couldn't map channel %d "
    301 		    "sata_error regs\n",
    302 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    303 		    wdc_cp->ch_channel);
    304 		goto bad;
    305 	}
    306 	if (bus_space_subregion(wdr->sata_iot, wdr->sata_baseioh,
    307 	    (wdc_cp->ch_channel << 8) + SVWSATA_SCONTROL, 1,
    308 	    &wdr->sata_control) != 0) {
    309 		aprint_error("%s: couldn't map channel %d "
    310 		    "sata_control regs\n",
    311 		    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname,
    312 		    wdc_cp->ch_channel);
    313 		goto bad;
    314 	}
    315 
    316 	wdcattach(wdc_cp);
    317 	return;
    318 
    319  bad:
    320 	cp->ata_channel.ch_flags |= ATACH_DISABLED;
    321 }
    322