tga.c revision 1.19 1 1.19 elric /* $NetBSD: tga.c,v 1.19 2000/03/05 07:57:52 elric Exp $ */
2 1.1 drochner
3 1.1 drochner /*
4 1.1 drochner * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 drochner * All rights reserved.
6 1.1 drochner *
7 1.1 drochner * Author: Chris G. Demetriou
8 1.1 drochner *
9 1.1 drochner * Permission to use, copy, modify and distribute this software and
10 1.1 drochner * its documentation is hereby granted, provided that both the copyright
11 1.1 drochner * notice and this permission notice appear in all copies of the
12 1.1 drochner * software, derivative works or modified versions, and any portions
13 1.1 drochner * thereof, and that both notices appear in supporting documentation.
14 1.1 drochner *
15 1.1 drochner * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 drochner * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 drochner * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 drochner *
19 1.1 drochner * Carnegie Mellon requests users of this software to return to
20 1.1 drochner *
21 1.1 drochner * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 drochner * School of Computer Science
23 1.1 drochner * Carnegie Mellon University
24 1.1 drochner * Pittsburgh PA 15213-3890
25 1.1 drochner *
26 1.1 drochner * any improvements or extensions that they make and grant Carnegie the
27 1.1 drochner * rights to redistribute these changes.
28 1.1 drochner */
29 1.1 drochner
30 1.1 drochner #include <sys/param.h>
31 1.1 drochner #include <sys/systm.h>
32 1.1 drochner #include <sys/kernel.h>
33 1.1 drochner #include <sys/device.h>
34 1.1 drochner #include <sys/conf.h>
35 1.1 drochner #include <sys/malloc.h>
36 1.1 drochner #include <sys/buf.h>
37 1.1 drochner #include <sys/ioctl.h>
38 1.1 drochner
39 1.8 thorpej #include <vm/vm.h>
40 1.8 thorpej
41 1.1 drochner #include <machine/bus.h>
42 1.1 drochner #include <machine/intr.h>
43 1.1 drochner
44 1.1 drochner #include <dev/pci/pcireg.h>
45 1.1 drochner #include <dev/pci/pcivar.h>
46 1.1 drochner #include <dev/pci/pcidevs.h>
47 1.1 drochner #include <dev/pci/tgareg.h>
48 1.1 drochner #include <dev/pci/tgavar.h>
49 1.1 drochner #include <dev/ic/bt485reg.h>
50 1.17 elric #include <dev/ic/bt485var.h>
51 1.1 drochner
52 1.1 drochner #include <dev/rcons/raster.h>
53 1.1 drochner #include <dev/wscons/wsconsio.h>
54 1.1 drochner #include <dev/wscons/wscons_raster.h>
55 1.1 drochner #include <dev/wscons/wsdisplayvar.h>
56 1.1 drochner
57 1.1 drochner #ifdef __alpha__
58 1.1 drochner #include <machine/pte.h>
59 1.1 drochner #endif
60 1.1 drochner
61 1.1 drochner int tgamatch __P((struct device *, struct cfdata *, void *));
62 1.1 drochner void tgaattach __P((struct device *, struct device *, void *));
63 1.1 drochner int tgaprint __P((void *, const char *));
64 1.1 drochner
65 1.1 drochner struct cfattach tga_ca = {
66 1.1 drochner sizeof(struct tga_softc), tgamatch, tgaattach,
67 1.1 drochner };
68 1.1 drochner
69 1.1 drochner int tga_identify __P((tga_reg_t *));
70 1.1 drochner const struct tga_conf *tga_getconf __P((int));
71 1.1 drochner void tga_getdevconfig __P((bus_space_tag_t memt, pci_chipset_tag_t pc,
72 1.19 elric pcitag_t tag, struct tga_devconfig *dc));
73 1.1 drochner
74 1.1 drochner struct tga_devconfig tga_console_dc;
75 1.1 drochner
76 1.14 ross int tga_ioctl __P((void *, u_long, caddr_t, int, struct proc *));
77 1.14 ross int tga_mmap __P((void *, off_t, int));
78 1.14 ross static void tga_copyrows __P((void *, int, int, int));
79 1.14 ross static void tga_copycols __P((void *, int, int, int, int));
80 1.14 ross static int tga_alloc_screen __P((void *, const struct wsscreen_descr *,
81 1.14 ross void **, int *, int *, long *));
82 1.14 ross static void tga_free_screen __P((void *, void *));
83 1.15 drochner static int tga_show_screen __P((void *, void *, int,
84 1.15 drochner void (*) (void *, int, int), void *));
85 1.14 ross static int tga_rop __P((struct raster *, int, int, int, int, int,
86 1.14 ross struct raster *, int, int));
87 1.14 ross static int tga_rop_nosrc __P((struct raster *, int, int, int, int, int));
88 1.14 ross static int tga_rop_htov __P((struct raster *, int, int, int, int,
89 1.14 ross int, struct raster *, int, int ));
90 1.14 ross static int tga_rop_vtov __P((struct raster *, int, int, int, int,
91 1.14 ross int, struct raster *, int, int ));
92 1.17 elric void tga2_init __P((struct tga_devconfig *, int));
93 1.17 elric
94 1.17 elric /* RAMDAC interface functions */
95 1.17 elric int tga_sched_update __P((void *, void (*)(void *)));
96 1.17 elric void tga_ramdac_wr __P((void *, u_int, u_int8_t));
97 1.17 elric u_int8_t tga_ramdac_rd __P((void *, u_int));
98 1.17 elric void tga2_ramdac_wr __P((void *, u_int, u_int8_t));
99 1.17 elric u_int8_t tga2_ramdac_rd __P((void *, u_int));
100 1.17 elric
101 1.17 elric /* Interrupt handler */
102 1.17 elric int tga_intr __P((void *));
103 1.14 ross
104 1.1 drochner struct wsdisplay_emulops tga_emulops = {
105 1.1 drochner rcons_cursor, /* could use hardware cursor; punt */
106 1.6 drochner rcons_mapchar,
107 1.5 drochner rcons_putchar,
108 1.14 ross tga_copycols,
109 1.1 drochner rcons_erasecols,
110 1.14 ross tga_copyrows,
111 1.1 drochner rcons_eraserows,
112 1.4 drochner rcons_alloc_attr
113 1.1 drochner };
114 1.1 drochner
115 1.1 drochner struct wsscreen_descr tga_stdscreen = {
116 1.1 drochner "std",
117 1.4 drochner 0, 0, /* will be filled in -- XXX shouldn't, it's global */
118 1.1 drochner &tga_emulops,
119 1.4 drochner 0, 0,
120 1.4 drochner WSSCREEN_REVERSE
121 1.1 drochner };
122 1.1 drochner
123 1.1 drochner const struct wsscreen_descr *_tga_scrlist[] = {
124 1.1 drochner &tga_stdscreen,
125 1.1 drochner /* XXX other formats, graphics screen? */
126 1.1 drochner };
127 1.1 drochner
128 1.1 drochner struct wsscreen_list tga_screenlist = {
129 1.1 drochner sizeof(_tga_scrlist) / sizeof(struct wsscreen_descr *), _tga_scrlist
130 1.1 drochner };
131 1.1 drochner
132 1.1 drochner struct wsdisplay_accessops tga_accessops = {
133 1.1 drochner tga_ioctl,
134 1.1 drochner tga_mmap,
135 1.1 drochner tga_alloc_screen,
136 1.1 drochner tga_free_screen,
137 1.1 drochner tga_show_screen,
138 1.11 drochner 0 /* load_font */
139 1.1 drochner };
140 1.1 drochner
141 1.1 drochner void tga_blank __P((struct tga_devconfig *));
142 1.1 drochner void tga_unblank __P((struct tga_devconfig *));
143 1.1 drochner
144 1.1 drochner int
145 1.1 drochner tgamatch(parent, match, aux)
146 1.1 drochner struct device *parent;
147 1.1 drochner struct cfdata *match;
148 1.1 drochner void *aux;
149 1.1 drochner {
150 1.1 drochner struct pci_attach_args *pa = aux;
151 1.1 drochner
152 1.17 elric if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC)
153 1.1 drochner return (0);
154 1.1 drochner
155 1.17 elric switch (PCI_PRODUCT(pa->pa_id)) {
156 1.17 elric case PCI_PRODUCT_DEC_21030:
157 1.17 elric case PCI_PRODUCT_DEC_PBXGB:
158 1.17 elric return 10;
159 1.17 elric default:
160 1.17 elric return 0;
161 1.17 elric }
162 1.17 elric return (0);
163 1.1 drochner }
164 1.1 drochner
165 1.1 drochner void
166 1.19 elric tga_getdevconfig(memt, pc, tag, dc)
167 1.1 drochner bus_space_tag_t memt;
168 1.1 drochner pci_chipset_tag_t pc;
169 1.1 drochner pcitag_t tag;
170 1.1 drochner struct tga_devconfig *dc;
171 1.1 drochner {
172 1.1 drochner const struct tga_conf *tgac;
173 1.1 drochner struct raster *rap;
174 1.1 drochner struct rcons *rcp;
175 1.1 drochner bus_size_t pcisize;
176 1.1 drochner int i, flags;
177 1.1 drochner
178 1.1 drochner dc->dc_memt = memt;
179 1.1 drochner dc->dc_pc = pc;
180 1.1 drochner
181 1.1 drochner dc->dc_pcitag = tag;
182 1.1 drochner
183 1.1 drochner /* XXX magic number */
184 1.1 drochner if (pci_mapreg_info(pc, tag, 0x10,
185 1.1 drochner PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
186 1.1 drochner &dc->dc_pcipaddr, &pcisize, &flags))
187 1.1 drochner return;
188 1.16 drochner if ((flags & BUS_SPACE_MAP_PREFETCHABLE) == 0) /* XXX */
189 1.16 drochner panic("tga memory not prefetchable");
190 1.1 drochner
191 1.1 drochner if (bus_space_map(memt, dc->dc_pcipaddr, pcisize,
192 1.16 drochner BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, &dc->dc_vaddr))
193 1.1 drochner return;
194 1.1 drochner #ifdef __alpha__
195 1.1 drochner dc->dc_paddr = ALPHA_K0SEG_TO_PHYS(dc->dc_vaddr); /* XXX */
196 1.1 drochner #endif
197 1.1 drochner
198 1.1 drochner dc->dc_regs = (tga_reg_t *)(dc->dc_vaddr + TGA_MEM_CREGS);
199 1.1 drochner dc->dc_tga_type = tga_identify(dc->dc_regs);
200 1.17 elric
201 1.1 drochner tgac = dc->dc_tgaconf = tga_getconf(dc->dc_tga_type);
202 1.1 drochner if (tgac == NULL)
203 1.1 drochner return;
204 1.1 drochner
205 1.1 drochner #if 0
206 1.1 drochner /* XXX on the Alpha, pcisize = 4 * cspace_size. */
207 1.1 drochner if (tgac->tgac_cspace_size != pcisize) /* sanity */
208 1.1 drochner panic("tga_getdevconfig: memory size mismatch?");
209 1.1 drochner #endif
210 1.1 drochner
211 1.19 elric switch (dc->dc_regs[TGA_REG_GREV] & 0xff) {
212 1.19 elric case 0x01:
213 1.19 elric case 0x02:
214 1.19 elric case 0x03:
215 1.19 elric case 0x04:
216 1.19 elric dc->dc_tga2 = 0;
217 1.19 elric break;
218 1.19 elric case 0x20:
219 1.19 elric case 0x21:
220 1.19 elric case 0x22:
221 1.19 elric dc->dc_tga2 = 1;
222 1.19 elric break;
223 1.19 elric default:
224 1.19 elric panic("tga_getdevconfig: TGA Revision not recognized");
225 1.19 elric }
226 1.19 elric
227 1.19 elric if (dc->dc_tga2) {
228 1.17 elric int monitor;
229 1.17 elric
230 1.18 elric monitor = (~dc->dc_regs[TGA_REG_GREV] >> 16) & 0x0f;
231 1.17 elric tga2_init(dc, monitor);
232 1.17 elric }
233 1.1 drochner
234 1.1 drochner switch (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) { /* XXX */
235 1.1 drochner case 0:
236 1.1 drochner dc->dc_wid = 8192;
237 1.1 drochner break;
238 1.1 drochner
239 1.1 drochner case 1:
240 1.1 drochner dc->dc_wid = 8196;
241 1.1 drochner break;
242 1.1 drochner
243 1.1 drochner default:
244 1.1 drochner dc->dc_wid = (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) * 4; /* XXX */
245 1.1 drochner break;
246 1.1 drochner }
247 1.1 drochner
248 1.1 drochner dc->dc_rowbytes = dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
249 1.1 drochner
250 1.1 drochner if ((dc->dc_regs[TGA_REG_VHCR] & 0x00000001) != 0 && /* XXX */
251 1.1 drochner (dc->dc_regs[TGA_REG_VHCR] & 0x80000000) != 0) { /* XXX */
252 1.1 drochner dc->dc_wid -= 4;
253 1.1 drochner /*
254 1.1 drochner * XXX XXX turning off 'odd' shouldn't be necesssary,
255 1.1 drochner * XXX XXX but i can't make X work with the weird size.
256 1.1 drochner */
257 1.1 drochner dc->dc_regs[TGA_REG_VHCR] &= ~0x80000001;
258 1.1 drochner dc->dc_rowbytes =
259 1.1 drochner dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
260 1.1 drochner }
261 1.1 drochner
262 1.1 drochner dc->dc_ht = (dc->dc_regs[TGA_REG_VVCR] & 0x7ff); /* XXX */
263 1.1 drochner
264 1.1 drochner /* XXX this seems to be what DEC does */
265 1.1 drochner dc->dc_regs[TGA_REG_CCBR] = 0;
266 1.1 drochner dc->dc_regs[TGA_REG_VVBR] = 1;
267 1.1 drochner dc->dc_videobase = dc->dc_vaddr + tgac->tgac_dbuf[0] +
268 1.1 drochner 1 * tgac->tgac_vvbr_units;
269 1.1 drochner dc->dc_blanked = 1;
270 1.1 drochner tga_unblank(dc);
271 1.1 drochner
272 1.1 drochner /*
273 1.1 drochner * Set all bits in the pixel mask, to enable writes to all pixels.
274 1.1 drochner * It seems that the console firmware clears some of them
275 1.1 drochner * under some circumstances, which causes cute vertical stripes.
276 1.1 drochner */
277 1.1 drochner dc->dc_regs[TGA_REG_GPXR_P] = 0xffffffff;
278 1.1 drochner
279 1.1 drochner /* clear the screen */
280 1.1 drochner for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
281 1.1 drochner *(u_int32_t *)(dc->dc_videobase + i) = 0;
282 1.1 drochner
283 1.1 drochner /* initialize the raster */
284 1.1 drochner rap = &dc->dc_raster;
285 1.1 drochner rap->width = dc->dc_wid;
286 1.1 drochner rap->height = dc->dc_ht;
287 1.1 drochner rap->depth = tgac->tgac_phys_depth;
288 1.1 drochner rap->linelongs = dc->dc_rowbytes / sizeof(u_int32_t);
289 1.1 drochner rap->pixels = (u_int32_t *)dc->dc_videobase;
290 1.14 ross rap->data = (caddr_t)dc;
291 1.1 drochner
292 1.1 drochner /* initialize the raster console blitter */
293 1.1 drochner rcp = &dc->dc_rcons;
294 1.1 drochner rcp->rc_sp = rap;
295 1.1 drochner rcp->rc_crow = rcp->rc_ccol = -1;
296 1.1 drochner rcp->rc_crowp = &rcp->rc_crow;
297 1.1 drochner rcp->rc_ccolp = &rcp->rc_ccol;
298 1.1 drochner rcons_init(rcp, 34, 80);
299 1.1 drochner
300 1.1 drochner tga_stdscreen.nrows = dc->dc_rcons.rc_maxrow;
301 1.1 drochner tga_stdscreen.ncols = dc->dc_rcons.rc_maxcol;
302 1.1 drochner }
303 1.1 drochner
304 1.1 drochner void
305 1.1 drochner tgaattach(parent, self, aux)
306 1.1 drochner struct device *parent, *self;
307 1.1 drochner void *aux;
308 1.1 drochner {
309 1.1 drochner struct pci_attach_args *pa = aux;
310 1.1 drochner struct tga_softc *sc = (struct tga_softc *)self;
311 1.1 drochner struct wsemuldisplaydev_attach_args aa;
312 1.1 drochner pci_intr_handle_t intrh;
313 1.1 drochner const char *intrstr;
314 1.1 drochner u_int8_t rev;
315 1.1 drochner int console;
316 1.1 drochner
317 1.1 drochner #ifdef __alpha__
318 1.1 drochner console = (pa->pa_tag == tga_console_dc.dc_pcitag);
319 1.1 drochner #else
320 1.1 drochner console = 0;
321 1.1 drochner #endif
322 1.1 drochner if (console) {
323 1.1 drochner sc->sc_dc = &tga_console_dc;
324 1.1 drochner sc->nscreens = 1;
325 1.1 drochner } else {
326 1.1 drochner sc->sc_dc = (struct tga_devconfig *)
327 1.1 drochner malloc(sizeof(struct tga_devconfig), M_DEVBUF, M_WAITOK);
328 1.9 drochner bzero(sc->sc_dc, sizeof(struct tga_devconfig));
329 1.17 elric tga_getdevconfig(pa->pa_memt, pa->pa_pc, pa->pa_tag,
330 1.19 elric sc->sc_dc);
331 1.1 drochner }
332 1.1 drochner if (sc->sc_dc->dc_vaddr == NULL) {
333 1.1 drochner printf(": couldn't map memory space; punt!\n");
334 1.1 drochner return;
335 1.1 drochner }
336 1.1 drochner
337 1.1 drochner /* XXX say what's going on. */
338 1.1 drochner intrstr = NULL;
339 1.17 elric if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
340 1.17 elric pa->pa_intrline, &intrh)) {
341 1.17 elric printf(": couldn't map interrupt");
342 1.17 elric return;
343 1.17 elric }
344 1.17 elric intrstr = pci_intr_string(pa->pa_pc, intrh);
345 1.17 elric sc->sc_intr = pci_intr_establish(pa->pa_pc, intrh, IPL_TTY, tga_intr,
346 1.17 elric sc->sc_dc);
347 1.17 elric if (sc->sc_intr == NULL) {
348 1.17 elric printf(": couldn't establish interrupt");
349 1.17 elric if (intrstr != NULL)
350 1.17 elric printf("at %s", intrstr);
351 1.17 elric printf("\n");
352 1.17 elric return;
353 1.1 drochner }
354 1.1 drochner
355 1.1 drochner rev = PCI_REVISION(pa->pa_class);
356 1.1 drochner switch (rev) {
357 1.17 elric case 0x1:
358 1.17 elric case 0x2:
359 1.17 elric case 0x3:
360 1.17 elric printf(": DC21030 step %c", 'A' + rev - 1);
361 1.17 elric break;
362 1.17 elric case 0x20:
363 1.17 elric printf(": TGA2 abstract software model");
364 1.17 elric break;
365 1.19 elric case 0x21:
366 1.19 elric case 0x22:
367 1.17 elric printf(": TGA2 pass %d", rev - 0x20);
368 1.1 drochner break;
369 1.1 drochner
370 1.1 drochner default:
371 1.1 drochner printf("unknown stepping (0x%x)", rev);
372 1.1 drochner break;
373 1.1 drochner }
374 1.1 drochner printf(", ");
375 1.1 drochner
376 1.17 elric /*
377 1.17 elric * Get RAMDAC function vectors and call the RAMDAC functions
378 1.17 elric * to allocate its private storage and pass that back to us.
379 1.17 elric */
380 1.17 elric sc->sc_dc->dc_ramdac_funcs = bt485_funcs();
381 1.19 elric if (!sc->sc_dc->dc_tga2) {
382 1.17 elric sc->sc_dc->dc_ramdac_cookie = bt485_register(
383 1.17 elric sc->sc_dc, tga_sched_update, tga_ramdac_wr,
384 1.17 elric tga_ramdac_rd);
385 1.17 elric } else {
386 1.17 elric sc->sc_dc->dc_ramdac_cookie = bt485_register(
387 1.17 elric sc->sc_dc, tga_sched_update, tga2_ramdac_wr,
388 1.17 elric tga2_ramdac_rd);
389 1.17 elric }
390 1.17 elric
391 1.17 elric /*
392 1.17 elric * Initialize the RAMDAC. Initialization includes disabling
393 1.17 elric * cursor, setting a sane colormap, etc.
394 1.17 elric */
395 1.17 elric (*sc->sc_dc->dc_ramdac_funcs->ramdac_init)(sc->sc_dc->dc_ramdac_cookie);
396 1.17 elric sc->sc_dc->dc_regs[TGA_REG_SISR] = 0x00000001; /* XXX */
397 1.17 elric
398 1.1 drochner if (sc->sc_dc->dc_tgaconf == NULL) {
399 1.1 drochner printf("unknown board configuration\n");
400 1.1 drochner return;
401 1.1 drochner }
402 1.1 drochner printf("board type %s\n", sc->sc_dc->dc_tgaconf->tgac_name);
403 1.1 drochner printf("%s: %d x %d, %dbpp, %s RAMDAC\n", sc->sc_dev.dv_xname,
404 1.1 drochner sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
405 1.1 drochner sc->sc_dc->dc_tgaconf->tgac_phys_depth,
406 1.17 elric sc->sc_dc->dc_ramdac_funcs->ramdac_name);
407 1.1 drochner
408 1.1 drochner if (intrstr != NULL)
409 1.1 drochner printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
410 1.1 drochner intrstr);
411 1.1 drochner
412 1.1 drochner aa.console = console;
413 1.1 drochner aa.scrdata = &tga_screenlist;
414 1.1 drochner aa.accessops = &tga_accessops;
415 1.1 drochner aa.accesscookie = sc;
416 1.1 drochner
417 1.1 drochner config_found(self, &aa, wsemuldisplaydevprint);
418 1.1 drochner }
419 1.1 drochner
420 1.1 drochner int
421 1.1 drochner tga_ioctl(v, cmd, data, flag, p)
422 1.1 drochner void *v;
423 1.1 drochner u_long cmd;
424 1.1 drochner caddr_t data;
425 1.1 drochner int flag;
426 1.1 drochner struct proc *p;
427 1.1 drochner {
428 1.1 drochner struct tga_softc *sc = v;
429 1.1 drochner struct tga_devconfig *dc = sc->sc_dc;
430 1.17 elric struct ramdac_funcs *dcrf = dc->dc_ramdac_funcs;
431 1.17 elric struct ramdac_cookie *dcrc = dc->dc_ramdac_cookie;
432 1.1 drochner
433 1.1 drochner switch (cmd) {
434 1.1 drochner case WSDISPLAYIO_GTYPE:
435 1.1 drochner *(u_int *)data = WSDISPLAY_TYPE_TGA;
436 1.1 drochner return (0);
437 1.1 drochner
438 1.1 drochner case WSDISPLAYIO_GINFO:
439 1.1 drochner #define wsd_fbip ((struct wsdisplay_fbinfo *)data)
440 1.1 drochner wsd_fbip->height = sc->sc_dc->dc_ht;
441 1.1 drochner wsd_fbip->width = sc->sc_dc->dc_wid;
442 1.1 drochner wsd_fbip->depth = sc->sc_dc->dc_tgaconf->tgac_phys_depth;
443 1.1 drochner wsd_fbip->cmsize = 256; /* XXX ??? */
444 1.12 thorpej #undef wsd_fbip
445 1.1 drochner return (0);
446 1.1 drochner
447 1.1 drochner case WSDISPLAYIO_GETCMAP:
448 1.17 elric return (*dcrf->ramdac_get_cmap)(dcrc,
449 1.1 drochner (struct wsdisplay_cmap *)data);
450 1.1 drochner
451 1.1 drochner case WSDISPLAYIO_PUTCMAP:
452 1.17 elric return (*dcrf->ramdac_set_cmap)(dcrc,
453 1.1 drochner (struct wsdisplay_cmap *)data);
454 1.1 drochner
455 1.12 thorpej case WSDISPLAYIO_SVIDEO:
456 1.1 drochner if (*(u_int *)data == WSDISPLAYIO_VIDEO_OFF)
457 1.1 drochner tga_blank(sc->sc_dc);
458 1.1 drochner else
459 1.1 drochner tga_unblank(sc->sc_dc);
460 1.1 drochner return (0);
461 1.1 drochner
462 1.12 thorpej case WSDISPLAYIO_GVIDEO:
463 1.1 drochner *(u_int *)data = dc->dc_blanked ?
464 1.1 drochner WSDISPLAYIO_VIDEO_OFF : WSDISPLAYIO_VIDEO_ON;
465 1.1 drochner return (0);
466 1.1 drochner
467 1.1 drochner case WSDISPLAYIO_GCURPOS:
468 1.17 elric return (*dcrf->ramdac_get_curpos)(dcrc,
469 1.1 drochner (struct wsdisplay_curpos *)data);
470 1.1 drochner
471 1.1 drochner case WSDISPLAYIO_SCURPOS:
472 1.17 elric return (*dcrf->ramdac_set_curpos)(dcrc,
473 1.1 drochner (struct wsdisplay_curpos *)data);
474 1.1 drochner
475 1.1 drochner case WSDISPLAYIO_GCURMAX:
476 1.17 elric return (*dcrf->ramdac_get_curmax)(dcrc,
477 1.1 drochner (struct wsdisplay_curpos *)data);
478 1.1 drochner
479 1.1 drochner case WSDISPLAYIO_GCURSOR:
480 1.17 elric return (*dcrf->ramdac_get_cursor)(dcrc,
481 1.1 drochner (struct wsdisplay_cursor *)data);
482 1.1 drochner
483 1.1 drochner case WSDISPLAYIO_SCURSOR:
484 1.17 elric return (*dcrf->ramdac_set_cursor)(dcrc,
485 1.1 drochner (struct wsdisplay_cursor *)data);
486 1.1 drochner }
487 1.1 drochner return (-1);
488 1.1 drochner }
489 1.1 drochner
490 1.1 drochner int
491 1.17 elric tga_sched_update(v, f)
492 1.17 elric void *v;
493 1.17 elric void (*f) __P((void *));
494 1.17 elric {
495 1.17 elric struct tga_devconfig *dc = v;
496 1.17 elric
497 1.17 elric dc->dc_regs[TGA_REG_SISR] = 0x00010000;
498 1.17 elric dc->dc_ramdac_intr = f;
499 1.17 elric return 0;
500 1.17 elric }
501 1.17 elric
502 1.17 elric int
503 1.17 elric tga_intr(v)
504 1.17 elric void *v;
505 1.17 elric {
506 1.17 elric struct tga_devconfig *dc = v;
507 1.17 elric struct ramdac_cookie *dcrc= dc->dc_ramdac_cookie;
508 1.17 elric
509 1.17 elric if ((dc->dc_regs[TGA_REG_SISR] & 0x00010001) != 0x00010001)
510 1.17 elric return 0;
511 1.17 elric dc->dc_ramdac_intr(dcrc);
512 1.17 elric dc->dc_ramdac_intr = NULL;
513 1.17 elric dc->dc_regs[TGA_REG_SISR] = 0x00000001;
514 1.17 elric return (1);
515 1.17 elric }
516 1.17 elric
517 1.17 elric int
518 1.1 drochner tga_mmap(v, offset, prot)
519 1.1 drochner void *v;
520 1.1 drochner off_t offset;
521 1.1 drochner int prot;
522 1.1 drochner {
523 1.1 drochner
524 1.1 drochner /* XXX NEW MAPPING CODE... */
525 1.1 drochner
526 1.1 drochner #ifdef __alpha__
527 1.1 drochner struct tga_softc *sc = v;
528 1.1 drochner
529 1.10 mrg if (offset >= sc->sc_dc->dc_tgaconf->tgac_cspace_size || offset < 0)
530 1.1 drochner return -1;
531 1.1 drochner return alpha_btop(sc->sc_dc->dc_paddr + offset);
532 1.1 drochner #else
533 1.1 drochner return (-1);
534 1.1 drochner #endif
535 1.1 drochner }
536 1.1 drochner
537 1.1 drochner int
538 1.4 drochner tga_alloc_screen(v, type, cookiep, curxp, curyp, attrp)
539 1.1 drochner void *v;
540 1.1 drochner const struct wsscreen_descr *type;
541 1.1 drochner void **cookiep;
542 1.1 drochner int *curxp, *curyp;
543 1.4 drochner long *attrp;
544 1.1 drochner {
545 1.1 drochner struct tga_softc *sc = v;
546 1.4 drochner long defattr;
547 1.1 drochner
548 1.1 drochner if (sc->nscreens > 0)
549 1.1 drochner return (ENOMEM);
550 1.1 drochner
551 1.1 drochner *cookiep = &sc->sc_dc->dc_rcons; /* one and only for now */
552 1.1 drochner *curxp = 0;
553 1.1 drochner *curyp = 0;
554 1.4 drochner rcons_alloc_attr(&sc->sc_dc->dc_rcons, 0, 0, 0, &defattr);
555 1.4 drochner *attrp = defattr;
556 1.2 drochner sc->nscreens++;
557 1.1 drochner return (0);
558 1.1 drochner }
559 1.1 drochner
560 1.1 drochner void
561 1.1 drochner tga_free_screen(v, cookie)
562 1.1 drochner void *v;
563 1.1 drochner void *cookie;
564 1.1 drochner {
565 1.1 drochner struct tga_softc *sc = v;
566 1.1 drochner
567 1.1 drochner if (sc->sc_dc == &tga_console_dc)
568 1.1 drochner panic("tga_free_screen: console");
569 1.1 drochner
570 1.1 drochner sc->nscreens--;
571 1.1 drochner }
572 1.1 drochner
573 1.15 drochner int
574 1.15 drochner tga_show_screen(v, cookie, waitok, cb, cbarg)
575 1.1 drochner void *v;
576 1.1 drochner void *cookie;
577 1.15 drochner int waitok;
578 1.15 drochner void (*cb) __P((void *, int, int));
579 1.15 drochner void *cbarg;
580 1.1 drochner {
581 1.15 drochner
582 1.15 drochner return (0);
583 1.1 drochner }
584 1.1 drochner
585 1.1 drochner int
586 1.1 drochner tga_cnattach(iot, memt, pc, bus, device, function)
587 1.1 drochner bus_space_tag_t iot, memt;
588 1.1 drochner pci_chipset_tag_t pc;
589 1.1 drochner int bus, device, function;
590 1.1 drochner {
591 1.1 drochner struct tga_devconfig *dcp = &tga_console_dc;
592 1.4 drochner long defattr;
593 1.1 drochner
594 1.1 drochner tga_getdevconfig(memt, pc,
595 1.19 elric pci_make_tag(pc, bus, device, function), dcp);
596 1.1 drochner
597 1.1 drochner /* sanity checks */
598 1.1 drochner if (dcp->dc_vaddr == NULL)
599 1.1 drochner panic("tga_console(%d, %d): couldn't map memory space",
600 1.1 drochner device, function);
601 1.1 drochner if (dcp->dc_tgaconf == NULL)
602 1.1 drochner panic("tga_console(%d, %d): unknown board configuration",
603 1.1 drochner device, function);
604 1.1 drochner
605 1.1 drochner /*
606 1.1 drochner * Initialize the RAMDAC but DO NOT allocate any private storage.
607 1.1 drochner * Initialization includes disabling cursor, setting a sane
608 1.1 drochner * colormap, etc. It will be reinitialized in tgaattach().
609 1.1 drochner */
610 1.17 elric
611 1.17 elric /* XXX -- this only works for bt485, but then we only support that,
612 1.19 elric * currently.
613 1.17 elric */
614 1.19 elric if (dcp->dc_tga2)
615 1.19 elric bt485_cninit(dcp, tga_sched_update, tga2_ramdac_wr,
616 1.19 elric tga2_ramdac_rd);
617 1.19 elric else
618 1.19 elric bt485_cninit(dcp, tga_sched_update, tga_ramdac_wr,
619 1.19 elric tga_ramdac_rd);
620 1.1 drochner
621 1.4 drochner rcons_alloc_attr(&dcp->dc_rcons, 0, 0, 0, &defattr);
622 1.4 drochner
623 1.1 drochner wsdisplay_cnattach(&tga_stdscreen, &dcp->dc_rcons,
624 1.4 drochner 0, 0, defattr);
625 1.1 drochner
626 1.1 drochner return(0);
627 1.1 drochner }
628 1.1 drochner
629 1.1 drochner /*
630 1.1 drochner * Functions to blank and unblank the display.
631 1.1 drochner */
632 1.1 drochner void
633 1.1 drochner tga_blank(dc)
634 1.1 drochner struct tga_devconfig *dc;
635 1.1 drochner {
636 1.1 drochner
637 1.1 drochner if (!dc->dc_blanked) {
638 1.1 drochner dc->dc_blanked = 1;
639 1.3 thorpej dc->dc_regs[TGA_REG_VVVR] |= VVR_BLANK; /* XXX */
640 1.1 drochner }
641 1.1 drochner }
642 1.1 drochner
643 1.1 drochner void
644 1.1 drochner tga_unblank(dc)
645 1.1 drochner struct tga_devconfig *dc;
646 1.1 drochner {
647 1.1 drochner
648 1.1 drochner if (dc->dc_blanked) {
649 1.1 drochner dc->dc_blanked = 0;
650 1.3 thorpej dc->dc_regs[TGA_REG_VVVR] &= ~VVR_BLANK; /* XXX */
651 1.1 drochner }
652 1.1 drochner }
653 1.1 drochner
654 1.1 drochner /*
655 1.1 drochner * Functions to manipulate the built-in cursor handing hardware.
656 1.1 drochner */
657 1.1 drochner int
658 1.1 drochner tga_builtin_set_cursor(dc, cursorp)
659 1.1 drochner struct tga_devconfig *dc;
660 1.1 drochner struct wsdisplay_cursor *cursorp;
661 1.1 drochner {
662 1.17 elric struct ramdac_funcs *dcrf = dc->dc_ramdac_funcs;
663 1.17 elric struct ramdac_cookie *dcrc = dc->dc_ramdac_cookie;
664 1.8 thorpej int count, error, v;
665 1.1 drochner
666 1.1 drochner v = cursorp->which;
667 1.8 thorpej if (v & WSDISPLAY_CURSOR_DOCMAP) {
668 1.17 elric error = dcrf->ramdac_check_curcmap(dcrc, cursorp);
669 1.8 thorpej if (error)
670 1.8 thorpej return (error);
671 1.8 thorpej }
672 1.1 drochner if (v & WSDISPLAY_CURSOR_DOSHAPE) {
673 1.1 drochner if ((u_int)cursorp->size.x != 64 ||
674 1.1 drochner (u_int)cursorp->size.y > 64)
675 1.1 drochner return (EINVAL);
676 1.1 drochner /* The cursor is 2 bits deep, and there is no mask */
677 1.1 drochner count = (cursorp->size.y * 64 * 2) / NBBY;
678 1.8 thorpej if (!uvm_useracc(cursorp->image, count, B_READ))
679 1.8 thorpej return (EFAULT);
680 1.1 drochner }
681 1.1 drochner if (v & WSDISPLAY_CURSOR_DOHOT) /* not supported */
682 1.1 drochner return EINVAL;
683 1.1 drochner
684 1.1 drochner /* parameters are OK; do it */
685 1.1 drochner if (v & WSDISPLAY_CURSOR_DOCUR) {
686 1.1 drochner if (cursorp->enable)
687 1.1 drochner dc->dc_regs[TGA_REG_VVVR] |= 0x04; /* XXX */
688 1.1 drochner else
689 1.1 drochner dc->dc_regs[TGA_REG_VVVR] &= ~0x04; /* XXX */
690 1.1 drochner }
691 1.1 drochner if (v & WSDISPLAY_CURSOR_DOPOS) {
692 1.1 drochner dc->dc_regs[TGA_REG_CXYR] = ((cursorp->pos.y & 0xfff) << 12) |
693 1.1 drochner (cursorp->pos.x & 0xfff);
694 1.1 drochner }
695 1.1 drochner if (v & WSDISPLAY_CURSOR_DOCMAP) {
696 1.8 thorpej /* can't fail. */
697 1.17 elric dcrf->ramdac_set_curcmap(dcrc, cursorp);
698 1.1 drochner }
699 1.1 drochner if (v & WSDISPLAY_CURSOR_DOSHAPE) {
700 1.8 thorpej count = ((64 * 2) / NBBY) * cursorp->size.y;
701 1.1 drochner dc->dc_regs[TGA_REG_CCBR] =
702 1.1 drochner (dc->dc_regs[TGA_REG_CCBR] & ~0xfc00) |
703 1.1 drochner (cursorp->size.y << 10);
704 1.1 drochner copyin(cursorp->image, (char *)(dc->dc_vaddr +
705 1.1 drochner (dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
706 1.1 drochner count); /* can't fail. */
707 1.1 drochner }
708 1.1 drochner return (0);
709 1.1 drochner }
710 1.1 drochner
711 1.1 drochner int
712 1.1 drochner tga_builtin_get_cursor(dc, cursorp)
713 1.1 drochner struct tga_devconfig *dc;
714 1.1 drochner struct wsdisplay_cursor *cursorp;
715 1.1 drochner {
716 1.17 elric struct ramdac_funcs *dcrf = dc->dc_ramdac_funcs;
717 1.17 elric struct ramdac_cookie *dcrc = dc->dc_ramdac_cookie;
718 1.1 drochner int count, error;
719 1.1 drochner
720 1.1 drochner cursorp->which = WSDISPLAY_CURSOR_DOALL &
721 1.1 drochner ~(WSDISPLAY_CURSOR_DOHOT | WSDISPLAY_CURSOR_DOCMAP);
722 1.1 drochner cursorp->enable = (dc->dc_regs[TGA_REG_VVVR] & 0x04) != 0;
723 1.1 drochner cursorp->pos.x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
724 1.1 drochner cursorp->pos.y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
725 1.1 drochner cursorp->size.x = 64;
726 1.1 drochner cursorp->size.y = (dc->dc_regs[TGA_REG_CCBR] >> 10) & 0x3f;
727 1.1 drochner
728 1.1 drochner if (cursorp->image != NULL) {
729 1.1 drochner count = (cursorp->size.y * 64 * 2) / NBBY;
730 1.1 drochner error = copyout((char *)(dc->dc_vaddr +
731 1.1 drochner (dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
732 1.1 drochner cursorp->image, count);
733 1.1 drochner if (error)
734 1.1 drochner return (error);
735 1.1 drochner /* No mask */
736 1.1 drochner }
737 1.17 elric error = dcrf->ramdac_get_curcmap(dcrc, cursorp);
738 1.8 thorpej return (error);
739 1.1 drochner }
740 1.1 drochner
741 1.1 drochner int
742 1.1 drochner tga_builtin_set_curpos(dc, curposp)
743 1.1 drochner struct tga_devconfig *dc;
744 1.1 drochner struct wsdisplay_curpos *curposp;
745 1.1 drochner {
746 1.1 drochner
747 1.1 drochner dc->dc_regs[TGA_REG_CXYR] =
748 1.1 drochner ((curposp->y & 0xfff) << 12) | (curposp->x & 0xfff);
749 1.1 drochner return (0);
750 1.1 drochner }
751 1.1 drochner
752 1.1 drochner int
753 1.1 drochner tga_builtin_get_curpos(dc, curposp)
754 1.1 drochner struct tga_devconfig *dc;
755 1.1 drochner struct wsdisplay_curpos *curposp;
756 1.1 drochner {
757 1.1 drochner
758 1.1 drochner curposp->x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
759 1.1 drochner curposp->y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
760 1.1 drochner return (0);
761 1.1 drochner }
762 1.1 drochner
763 1.1 drochner int
764 1.1 drochner tga_builtin_get_curmax(dc, curposp)
765 1.1 drochner struct tga_devconfig *dc;
766 1.1 drochner struct wsdisplay_curpos *curposp;
767 1.1 drochner {
768 1.1 drochner
769 1.1 drochner curposp->x = curposp->y = 64;
770 1.1 drochner return (0);
771 1.14 ross }
772 1.14 ross
773 1.14 ross /*
774 1.14 ross * Copy columns (characters) in a row (line).
775 1.14 ross */
776 1.14 ross void
777 1.14 ross tga_copycols(id, row, srccol, dstcol, ncols)
778 1.14 ross void *id;
779 1.14 ross int row, srccol, dstcol, ncols;
780 1.14 ross {
781 1.14 ross struct rcons *rc = id;
782 1.14 ross int y, srcx, dstx, nx;
783 1.14 ross
784 1.14 ross y = rc->rc_yorigin + rc->rc_font->height * row;
785 1.14 ross srcx = rc->rc_xorigin + rc->rc_font->width * srccol;
786 1.14 ross dstx = rc->rc_xorigin + rc->rc_font->width * dstcol;
787 1.14 ross nx = rc->rc_font->width * ncols;
788 1.14 ross
789 1.14 ross tga_rop(rc->rc_sp, dstx, y,
790 1.14 ross nx, rc->rc_font->height, RAS_SRC,
791 1.14 ross rc->rc_sp, srcx, y);
792 1.14 ross }
793 1.14 ross
794 1.14 ross /*
795 1.14 ross * Copy rows (lines).
796 1.14 ross */
797 1.14 ross void
798 1.14 ross tga_copyrows(id, srcrow, dstrow, nrows)
799 1.14 ross void *id;
800 1.14 ross int srcrow, dstrow, nrows;
801 1.14 ross {
802 1.14 ross struct rcons *rc = id;
803 1.14 ross int srcy, dsty, ny;
804 1.14 ross
805 1.14 ross srcy = rc->rc_yorigin + rc->rc_font->height * srcrow;
806 1.14 ross dsty = rc->rc_yorigin + rc->rc_font->height * dstrow;
807 1.14 ross ny = rc->rc_font->height * nrows;
808 1.14 ross
809 1.14 ross tga_rop(rc->rc_sp, rc->rc_xorigin, dsty,
810 1.14 ross rc->rc_raswidth, ny, RAS_SRC,
811 1.14 ross rc->rc_sp, rc->rc_xorigin, srcy);
812 1.14 ross }
813 1.14 ross
814 1.14 ross /* Do we need the src? */
815 1.14 ross static int needsrc[16] = { 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0 };
816 1.14 ross
817 1.14 ross /* A mapping between our API and the TGA card */
818 1.14 ross static int map_rop[16] = { 0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6,
819 1.14 ross 0xe, 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf
820 1.14 ross };
821 1.14 ross
822 1.14 ross /*
823 1.14 ross * Generic TGA raster op.
824 1.14 ross * This covers all possible raster ops, and
825 1.14 ross * clips the sizes and all of that.
826 1.14 ross */
827 1.14 ross static int
828 1.14 ross tga_rop(dst, dx, dy, w, h, rop, src, sx, sy)
829 1.14 ross struct raster *dst;
830 1.14 ross int dx, dy, w, h, rop;
831 1.14 ross struct raster *src;
832 1.14 ross int sx, sy;
833 1.14 ross {
834 1.14 ross if (!dst)
835 1.14 ross return -1;
836 1.14 ross if (dst->data == NULL)
837 1.14 ross return -1; /* we should be writing to a screen */
838 1.14 ross if (needsrc[RAS_GETOP(rop)]) {
839 1.14 ross if (src == (struct raster *) 0)
840 1.14 ross return -1; /* We want a src */
841 1.14 ross /* Clip against src */
842 1.14 ross if (sx < 0) {
843 1.14 ross w += sx;
844 1.14 ross sx = 0;
845 1.14 ross }
846 1.14 ross if (sy < 0) {
847 1.14 ross h += sy;
848 1.14 ross sy = 0;
849 1.14 ross }
850 1.14 ross if (sx + w > src->width)
851 1.14 ross w = src->width - sx;
852 1.14 ross if (sy + h > src->height)
853 1.14 ross h = src->height - sy;
854 1.14 ross } else {
855 1.14 ross if (src != (struct raster *) 0)
856 1.14 ross return -1; /* We need no src */
857 1.14 ross }
858 1.14 ross /* Clip against dst. We modify src regardless of using it,
859 1.14 ross * since it really doesn't matter.
860 1.14 ross */
861 1.14 ross if (dx < 0) {
862 1.14 ross w += dx;
863 1.14 ross sx -= dx;
864 1.14 ross dx = 0;
865 1.14 ross }
866 1.14 ross if (dy < 0) {
867 1.14 ross h += dy;
868 1.14 ross sy -= dy;
869 1.14 ross dy = 0;
870 1.14 ross }
871 1.14 ross if (dx + w > dst->width)
872 1.14 ross w = dst->width - dx;
873 1.14 ross if (dy + h > dst->height)
874 1.14 ross h = dst->height - dy;
875 1.14 ross if (w <= 0 || h <= 0)
876 1.14 ross return 0; /* Vacuously true; */
877 1.14 ross if (!src)
878 1.14 ross return tga_rop_nosrc(dst, dx, dy, w, h, rop);
879 1.14 ross if (src->data == NULL)
880 1.14 ross return tga_rop_htov(dst, dx, dy, w, h, rop, src, sx, sy);
881 1.14 ross else
882 1.14 ross return tga_rop_vtov(dst, dx, dy, w, h, rop, src, sx, sy);
883 1.14 ross }
884 1.14 ross
885 1.14 ross /*
886 1.14 ross * No source raster ops.
887 1.14 ross * This function deals with all raster ops that don't require a src.
888 1.14 ross */
889 1.14 ross static int
890 1.14 ross tga_rop_nosrc(dst, dx, dy, w, h, rop)
891 1.14 ross struct raster *dst;
892 1.14 ross int dx, dy, w, h, rop;
893 1.14 ross {
894 1.14 ross return raster_op(dst, dx, dy, w, h, rop, NULL, 0, 0);
895 1.14 ross }
896 1.14 ross
897 1.14 ross /*
898 1.14 ross * Host to Video raster ops.
899 1.14 ross * This function deals with all raster ops that have a src that is host memory.
900 1.14 ross */
901 1.14 ross static int
902 1.14 ross tga_rop_htov(dst, dx, dy, w, h, rop, src, sx, sy)
903 1.14 ross struct raster *dst;
904 1.14 ross int dx, dy, w, h, rop;
905 1.14 ross struct raster *src;
906 1.14 ross int sx, sy;
907 1.14 ross {
908 1.14 ross return raster_op(dst, dx, dy, w, h, rop, src, sx, sy);
909 1.14 ross }
910 1.14 ross
911 1.14 ross /*
912 1.14 ross * Video to Video raster ops.
913 1.14 ross * This function deals with all raster ops that have a src and dst
914 1.14 ross * that are on the card.
915 1.14 ross */
916 1.14 ross static int
917 1.14 ross tga_rop_vtov(dst, dx, dy, w, h, rop, src, sx, sy)
918 1.14 ross struct raster *dst;
919 1.14 ross int dx, dy, w, h, rop;
920 1.14 ross struct raster *src;
921 1.14 ross int sx, sy;
922 1.14 ross {
923 1.14 ross struct tga_devconfig *dc = (struct tga_devconfig *)dst->data;
924 1.14 ross tga_reg_t *regs0 = dc->dc_regs;
925 1.14 ross tga_reg_t *regs1 = regs0 + 16 * 1024; /* register alias 1 */
926 1.14 ross tga_reg_t *regs2 = regs1 + 16 * 1024; /* register alias 2 */
927 1.14 ross tga_reg_t *regs3 = regs2 + 16 * 1024; /* register alias 3 */
928 1.14 ross int srcb, dstb;
929 1.14 ross int x, y;
930 1.14 ross int xstart, xend, xdir, xinc;
931 1.14 ross int ystart, yend, ydir, yinc;
932 1.14 ross int offset = 1 * dc->dc_tgaconf->tgac_vvbr_units;
933 1.14 ross
934 1.14 ross /*
935 1.14 ross * I don't yet want to deal with unaligned guys, really. And we don't
936 1.14 ross * deal with copies from one card to another.
937 1.14 ross */
938 1.14 ross if (dx % 8 != 0 || sx % 8 != 0 || src != dst)
939 1.14 ross return raster_op(dst, dx, dy, w, h, rop, src, sx, sy);
940 1.14 ross
941 1.14 ross if (sy >= dy) {
942 1.14 ross ystart = 0;
943 1.14 ross yend = h;
944 1.14 ross ydir = 1;
945 1.14 ross } else {
946 1.14 ross ystart = h;
947 1.14 ross yend = 0;
948 1.14 ross ydir = -1;
949 1.14 ross }
950 1.14 ross if (sx >= dx) {
951 1.14 ross xstart = 0;
952 1.14 ross xend = w * (dst->depth / 8);
953 1.14 ross xdir = 1;
954 1.14 ross } else {
955 1.14 ross xstart = w * (dst->depth / 8);
956 1.14 ross xend = 0;
957 1.14 ross xdir = -1;
958 1.14 ross }
959 1.14 ross xinc = xdir * 4 * 64;
960 1.14 ross yinc = ydir * dst->linelongs * 4;
961 1.14 ross ystart *= dst->linelongs * 4;
962 1.14 ross yend *= dst->linelongs * 4;
963 1.14 ross srcb = offset + sy * src->linelongs * 4 + sx;
964 1.14 ross dstb = offset + dy * dst->linelongs * 4 + dx;
965 1.14 ross regs3[TGA_REG_GMOR] = 0x0007; /* Copy mode */
966 1.14 ross regs3[TGA_REG_GOPR] = map_rop[rop]; /* Set up the op */
967 1.14 ross for (y = ystart; (ydir * y) < (ydir * yend); y += yinc) {
968 1.14 ross for (x = xstart; (xdir * x) < (xdir * xend); x += xinc) {
969 1.14 ross regs0[TGA_REG_GCSR] = srcb + y + x + 3 * 64;
970 1.14 ross regs0[TGA_REG_GCDR] = dstb + y + x + 3 * 64;
971 1.14 ross regs1[TGA_REG_GCSR] = srcb + y + x + 2 * 64;
972 1.14 ross regs1[TGA_REG_GCDR] = dstb + y + x + 2 * 64;
973 1.14 ross regs2[TGA_REG_GCSR] = srcb + y + x + 1 * 64;
974 1.14 ross regs2[TGA_REG_GCDR] = dstb + y + x + 1 * 64;
975 1.14 ross regs3[TGA_REG_GCSR] = srcb + y + x + 0 * 64;
976 1.14 ross regs3[TGA_REG_GCDR] = dstb + y + x + 0 * 64;
977 1.14 ross }
978 1.14 ross }
979 1.14 ross regs0[TGA_REG_GOPR] = 0x0003; /* op -> dst = src */
980 1.14 ross regs0[TGA_REG_GMOR] = 0x0000; /* Simple mode */
981 1.14 ross return 0;
982 1.17 elric }
983 1.17 elric
984 1.17 elric void
985 1.17 elric tga_ramdac_wr(v, btreg, val)
986 1.17 elric void *v;
987 1.17 elric u_int btreg;
988 1.17 elric u_int8_t val;
989 1.17 elric {
990 1.17 elric struct tga_devconfig *dc = v;
991 1.17 elric volatile tga_reg_t *tgaregs = dc->dc_regs;
992 1.17 elric
993 1.17 elric if (btreg > BT485_REG_MAX)
994 1.17 elric panic("tga_ramdac_wr: reg %d out of range\n", btreg);
995 1.17 elric
996 1.17 elric tgaregs[TGA_REG_EPDR] = (btreg << 9) | (0 << 8 ) | val; /* XXX */
997 1.17 elric #ifdef __alpha__
998 1.17 elric alpha_mb();
999 1.17 elric #endif
1000 1.17 elric }
1001 1.17 elric
1002 1.17 elric void
1003 1.17 elric tga2_ramdac_wr(v, btreg, val)
1004 1.17 elric void *v;
1005 1.17 elric u_int btreg;
1006 1.17 elric u_int8_t val;
1007 1.17 elric {
1008 1.17 elric struct tga_devconfig *dc = v;
1009 1.17 elric volatile tga_reg_t *ramdac;
1010 1.17 elric
1011 1.17 elric if (btreg > BT485_REG_MAX)
1012 1.17 elric panic("tga_ramdac_wr: reg %d out of range\n", btreg);
1013 1.17 elric
1014 1.17 elric ramdac = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_RAMDAC +
1015 1.17 elric (0xe << 12) + (btreg << 8));
1016 1.17 elric *ramdac = val & 0xff;
1017 1.17 elric #ifdef __alpha__
1018 1.17 elric alpha_mb();
1019 1.17 elric #endif
1020 1.17 elric }
1021 1.17 elric
1022 1.17 elric u_int8_t
1023 1.17 elric tga_ramdac_rd(v, btreg)
1024 1.17 elric void *v;
1025 1.17 elric u_int btreg;
1026 1.17 elric {
1027 1.17 elric struct tga_devconfig *dc = v;
1028 1.17 elric volatile tga_reg_t *tgaregs = dc->dc_regs;
1029 1.17 elric tga_reg_t rdval;
1030 1.17 elric
1031 1.17 elric if (btreg > BT485_REG_MAX)
1032 1.17 elric panic("tga_ramdac_rd: reg %d out of range\n", btreg);
1033 1.17 elric
1034 1.17 elric tgaregs[TGA_REG_EPSR] = (btreg << 1) | 0x1; /* XXX */
1035 1.17 elric #ifdef __alpha__
1036 1.17 elric alpha_mb();
1037 1.17 elric #endif
1038 1.17 elric
1039 1.17 elric rdval = tgaregs[TGA_REG_EPDR];
1040 1.17 elric return (rdval >> 16) & 0xff; /* XXX */
1041 1.17 elric }
1042 1.17 elric
1043 1.17 elric u_int8_t
1044 1.17 elric tga2_ramdac_rd(v, btreg)
1045 1.17 elric void *v;
1046 1.17 elric u_int btreg;
1047 1.17 elric {
1048 1.17 elric struct tga_devconfig *dc = v;
1049 1.17 elric volatile tga_reg_t *ramdac;
1050 1.17 elric u_int8_t retval;
1051 1.17 elric
1052 1.17 elric if (btreg > BT485_REG_MAX)
1053 1.17 elric panic("tga_ramdac_rd: reg %d out of range\n", btreg);
1054 1.17 elric
1055 1.17 elric ramdac = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_RAMDAC +
1056 1.17 elric (0xe << 12) + (btreg << 8));
1057 1.17 elric retval = (u_int8_t)(*ramdac & 0xff);
1058 1.17 elric #ifdef __alpha__
1059 1.17 elric alpha_mb();
1060 1.17 elric #endif
1061 1.17 elric return retval;
1062 1.17 elric }
1063 1.17 elric
1064 1.17 elric #include <dev/ic/decmonitors.c>
1065 1.17 elric void tga2_ics9110_wr __P((
1066 1.17 elric struct tga_devconfig *dc,
1067 1.17 elric int dotclock
1068 1.17 elric ));
1069 1.17 elric
1070 1.17 elric void
1071 1.17 elric tga2_init(dc, m)
1072 1.17 elric struct tga_devconfig *dc;
1073 1.17 elric int m;
1074 1.17 elric {
1075 1.17 elric
1076 1.17 elric tga2_ics9110_wr(dc, decmonitors[m].dotclock);
1077 1.17 elric dc->dc_regs[TGA_REG_VHCR] =
1078 1.17 elric ((decmonitors[m].hbp / 4) << 21) |
1079 1.17 elric ((decmonitors[m].hsync / 4) << 14) |
1080 1.17 elric #if 0
1081 1.17 elric (((decmonitors[m].hfp - 4) / 4) << 9) |
1082 1.17 elric ((decmonitors[m].cols + 4) / 4);
1083 1.17 elric #else
1084 1.17 elric (((decmonitors[m].hfp) / 4) << 9) |
1085 1.17 elric ((decmonitors[m].cols) / 4);
1086 1.17 elric #endif
1087 1.17 elric dc->dc_regs[TGA_REG_VVCR] =
1088 1.17 elric (decmonitors[m].vbp << 22) |
1089 1.17 elric (decmonitors[m].vsync << 16) |
1090 1.17 elric (decmonitors[m].vfp << 11) |
1091 1.17 elric (decmonitors[m].rows);
1092 1.17 elric dc->dc_regs[TGA_REG_VVBR] = 1; alpha_mb();
1093 1.17 elric dc->dc_regs[TGA_REG_VVVR] |= 1; alpha_mb();
1094 1.17 elric dc->dc_regs[TGA_REG_GPMR] = 0xffffffff; alpha_mb();
1095 1.17 elric }
1096 1.17 elric
1097 1.17 elric void
1098 1.17 elric tga2_ics9110_wr(dc, dotclock)
1099 1.17 elric struct tga_devconfig *dc;
1100 1.17 elric int dotclock;
1101 1.17 elric {
1102 1.17 elric volatile tga_reg_t *clock;
1103 1.17 elric u_int32_t valU;
1104 1.17 elric int N, M, R, V, X;
1105 1.17 elric int i;
1106 1.17 elric
1107 1.17 elric switch (dotclock) {
1108 1.17 elric case 130808000:
1109 1.17 elric N = 0x40; M = 0x7; V = 0x0; X = 0x1; R = 0x1; break;
1110 1.17 elric case 119840000:
1111 1.17 elric N = 0x2d; M = 0x2b; V = 0x1; X = 0x1; R = 0x1; break;
1112 1.17 elric case 108180000:
1113 1.17 elric N = 0x11; M = 0x9; V = 0x1; X = 0x1; R = 0x2; break;
1114 1.17 elric case 103994000:
1115 1.17 elric N = 0x6d; M = 0xf; V = 0x0; X = 0x1; R = 0x1; break;
1116 1.17 elric case 175000000:
1117 1.17 elric N = 0x5F; M = 0x3E; V = 0x1; X = 0x1; R = 0x1; break;
1118 1.17 elric case 75000000:
1119 1.17 elric N = 0x6e; M = 0x15; V = 0x0; X = 0x1; R = 0x1; break;
1120 1.17 elric case 74000000:
1121 1.17 elric N = 0x2a; M = 0x41; V = 0x1; X = 0x1; R = 0x1; break;
1122 1.17 elric case 69000000:
1123 1.17 elric N = 0x35; M = 0xb; V = 0x0; X = 0x1; R = 0x1; break;
1124 1.17 elric case 65000000:
1125 1.17 elric N = 0x6d; M = 0x0c; V = 0x0; X = 0x1; R = 0x2; break;
1126 1.17 elric case 50000000:
1127 1.17 elric N = 0x37; M = 0x3f; V = 0x1; X = 0x1; R = 0x2; break;
1128 1.17 elric case 40000000:
1129 1.17 elric N = 0x5f; M = 0x11; V = 0x0; X = 0x1; R = 0x2; break;
1130 1.17 elric case 31500000:
1131 1.17 elric N = 0x16; M = 0x05; V = 0x0; X = 0x1; R = 0x2; break;
1132 1.17 elric case 25175000:
1133 1.17 elric N = 0x66; M = 0x1d; V = 0x0; X = 0x1; R = 0x2; break;
1134 1.17 elric case 135000000:
1135 1.17 elric N = 0x42; M = 0x07; V = 0x0; X = 0x1; R = 0x1; break;
1136 1.17 elric case 110000000:
1137 1.17 elric N = 0x60; M = 0x32; V = 0x1; X = 0x1; R = 0x2; break;
1138 1.17 elric case 202500000:
1139 1.17 elric N = 0x60; M = 0x32; V = 0x1; X = 0x1; R = 0x2; break;
1140 1.17 elric default:
1141 1.17 elric panic("unrecognized clock rate %d\n", dotclock);
1142 1.17 elric }
1143 1.17 elric
1144 1.17 elric /* XXX -- hard coded, bad */
1145 1.17 elric valU = N | ( M << 7 ) | (V << 14);
1146 1.17 elric valU |= (X << 15) | (R << 17);
1147 1.17 elric valU |= 0x17 << 19;
1148 1.17 elric
1149 1.17 elric
1150 1.17 elric clock = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_EXTDEV +
1151 1.17 elric TGA2_MEM_CLOCK + (0xe << 12)); /* XXX */
1152 1.17 elric
1153 1.17 elric for (i=24; i>0; i--) {
1154 1.17 elric u_int32_t writeval;
1155 1.17 elric
1156 1.17 elric writeval = valU & 0x1;
1157 1.17 elric if (i == 1)
1158 1.17 elric writeval |= 0x2;
1159 1.17 elric valU >>= 1;
1160 1.17 elric *clock = writeval;
1161 1.17 elric #ifdef __alpha__
1162 1.17 elric alpha_mb();
1163 1.17 elric #endif
1164 1.17 elric }
1165 1.17 elric clock = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_EXTDEV +
1166 1.17 elric TGA2_MEM_CLOCK + (0xe << 12) + (0x1 << 11)); /* XXX */
1167 1.17 elric clock += 0x1 << 9;
1168 1.17 elric *clock = 0x0;
1169 1.17 elric #ifdef __alpha__
1170 1.17 elric alpha_mb();
1171 1.17 elric #endif
1172 1.1 drochner }
1173