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tga.c revision 1.17
      1 /* $NetBSD: tga.c,v 1.17 2000/03/04 10:27:59 elric Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Chris G. Demetriou
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/param.h>
     31 #include <sys/systm.h>
     32 #include <sys/kernel.h>
     33 #include <sys/device.h>
     34 #include <sys/conf.h>
     35 #include <sys/malloc.h>
     36 #include <sys/buf.h>
     37 #include <sys/ioctl.h>
     38 
     39 #include <vm/vm.h>
     40 
     41 #include <machine/bus.h>
     42 #include <machine/intr.h>
     43 
     44 #include <dev/pci/pcireg.h>
     45 #include <dev/pci/pcivar.h>
     46 #include <dev/pci/pcidevs.h>
     47 #include <dev/pci/tgareg.h>
     48 #include <dev/pci/tgavar.h>
     49 #include <dev/ic/bt485reg.h>
     50 #include <dev/ic/bt485var.h>
     51 
     52 #include <dev/rcons/raster.h>
     53 #include <dev/wscons/wsconsio.h>
     54 #include <dev/wscons/wscons_raster.h>
     55 #include <dev/wscons/wsdisplayvar.h>
     56 
     57 #ifdef __alpha__
     58 #include <machine/pte.h>
     59 #endif
     60 
     61 int	tgamatch __P((struct device *, struct cfdata *, void *));
     62 void	tgaattach __P((struct device *, struct device *, void *));
     63 int	tgaprint __P((void *, const char *));
     64 
     65 struct cfattach tga_ca = {
     66 	sizeof(struct tga_softc), tgamatch, tgaattach,
     67 };
     68 
     69 int	tga_identify __P((tga_reg_t *));
     70 const struct tga_conf *tga_getconf __P((int));
     71 void	tga_getdevconfig __P((bus_space_tag_t memt, pci_chipset_tag_t pc,
     72 	    pcitag_t tag, struct tga_devconfig *dc, int tga2));
     73 
     74 struct tga_devconfig tga_console_dc;
     75 
     76 int tga_ioctl __P((void *, u_long, caddr_t, int, struct proc *));
     77 int tga_mmap __P((void *, off_t, int));
     78 static void tga_copyrows __P((void *, int, int, int));
     79 static void tga_copycols __P((void *, int, int, int, int));
     80 static int tga_alloc_screen __P((void *, const struct wsscreen_descr *,
     81 				      void **, int *, int *, long *));
     82 static void tga_free_screen __P((void *, void *));
     83 static int tga_show_screen __P((void *, void *, int,
     84 				void (*) (void *, int, int), void *));
     85 static int tga_rop __P((struct raster *, int, int, int, int, int,
     86 	struct raster *, int, int));
     87 static int tga_rop_nosrc __P((struct raster *, int, int, int, int, int));
     88 static int tga_rop_htov __P((struct raster *, int, int, int, int,
     89 	int, struct raster *, int, int ));
     90 static int tga_rop_vtov __P((struct raster *, int, int, int, int,
     91 	int, struct raster *, int, int ));
     92 void tga2_init __P((struct tga_devconfig *, int));
     93 
     94 /* RAMDAC interface functions */
     95 int		tga_sched_update __P((void *, void (*)(void *)));
     96 void		tga_ramdac_wr __P((void *, u_int, u_int8_t));
     97 u_int8_t 	tga_ramdac_rd __P((void *, u_int));
     98 void		tga2_ramdac_wr __P((void *, u_int, u_int8_t));
     99 u_int8_t 	tga2_ramdac_rd __P((void *, u_int));
    100 
    101 /* Interrupt handler */
    102 int	tga_intr __P((void *));
    103 
    104 struct wsdisplay_emulops tga_emulops = {
    105 	rcons_cursor,			/* could use hardware cursor; punt */
    106 	rcons_mapchar,
    107 	rcons_putchar,
    108 	tga_copycols,
    109 	rcons_erasecols,
    110 	tga_copyrows,
    111 	rcons_eraserows,
    112 	rcons_alloc_attr
    113 };
    114 
    115 struct wsscreen_descr tga_stdscreen = {
    116 	"std",
    117 	0, 0,	/* will be filled in -- XXX shouldn't, it's global */
    118 	&tga_emulops,
    119 	0, 0,
    120 	WSSCREEN_REVERSE
    121 };
    122 
    123 const struct wsscreen_descr *_tga_scrlist[] = {
    124 	&tga_stdscreen,
    125 	/* XXX other formats, graphics screen? */
    126 };
    127 
    128 struct wsscreen_list tga_screenlist = {
    129 	sizeof(_tga_scrlist) / sizeof(struct wsscreen_descr *), _tga_scrlist
    130 };
    131 
    132 struct wsdisplay_accessops tga_accessops = {
    133 	tga_ioctl,
    134 	tga_mmap,
    135 	tga_alloc_screen,
    136 	tga_free_screen,
    137 	tga_show_screen,
    138 	0 /* load_font */
    139 };
    140 
    141 void	tga_blank __P((struct tga_devconfig *));
    142 void	tga_unblank __P((struct tga_devconfig *));
    143 
    144 int
    145 tgamatch(parent, match, aux)
    146 	struct device *parent;
    147 	struct cfdata *match;
    148 	void *aux;
    149 {
    150 	struct pci_attach_args *pa = aux;
    151 
    152 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC)
    153 		return (0);
    154 
    155 	switch (PCI_PRODUCT(pa->pa_id)) {
    156 	case PCI_PRODUCT_DEC_21030:
    157 	case PCI_PRODUCT_DEC_PBXGB:
    158 		return 10;
    159 	default:
    160 		return 0;
    161 	}
    162 	return (0);
    163 }
    164 
    165 void
    166 tga_getdevconfig(memt, pc, tag, dc, tga2)
    167 	bus_space_tag_t memt;
    168 	pci_chipset_tag_t pc;
    169 	pcitag_t tag;
    170 	struct tga_devconfig *dc;
    171 	int tga2;
    172 {
    173 	const struct tga_conf *tgac;
    174 	struct raster *rap;
    175 	struct rcons *rcp;
    176 	bus_size_t pcisize;
    177 	int i, flags;
    178 
    179 	dc->dc_memt = memt;
    180 	dc->dc_pc = pc;
    181 
    182 	dc->dc_pcitag = tag;
    183 
    184 	/* XXX magic number */
    185 	if (pci_mapreg_info(pc, tag, 0x10,
    186 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT,
    187 	    &dc->dc_pcipaddr, &pcisize, &flags))
    188 		return;
    189 	if ((flags & BUS_SPACE_MAP_PREFETCHABLE) == 0)		/* XXX */
    190 		panic("tga memory not prefetchable");
    191 
    192 	if (bus_space_map(memt, dc->dc_pcipaddr, pcisize,
    193 	    BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, &dc->dc_vaddr))
    194 		return;
    195 #ifdef __alpha__
    196 	dc->dc_paddr = ALPHA_K0SEG_TO_PHYS(dc->dc_vaddr);	/* XXX */
    197 #endif
    198 
    199 	dc->dc_regs = (tga_reg_t *)(dc->dc_vaddr + TGA_MEM_CREGS);
    200 	dc->dc_tga_type = tga_identify(dc->dc_regs);
    201 
    202 	tgac = dc->dc_tgaconf = tga_getconf(dc->dc_tga_type);
    203 	if (tgac == NULL)
    204 		return;
    205 
    206 #if 0
    207 	/* XXX on the Alpha, pcisize = 4 * cspace_size. */
    208 	if (tgac->tgac_cspace_size != pcisize)			/* sanity */
    209 		panic("tga_getdevconfig: memory size mismatch?");
    210 #endif
    211 
    212 	if (tga2) {
    213 		int	monitor;
    214 
    215 		monitor = (dc->dc_regs[TGA_REG_GREV] >> 16) & 0x0f;
    216 		tga2_init(dc, monitor);
    217 	}
    218 
    219 	switch (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) {		/* XXX */
    220 	case 0:
    221 		dc->dc_wid = 8192;
    222 		break;
    223 
    224 	case 1:
    225 		dc->dc_wid = 8196;
    226 		break;
    227 
    228 	default:
    229 		dc->dc_wid = (dc->dc_regs[TGA_REG_VHCR] & 0x1ff) * 4; /* XXX */
    230 		break;
    231 	}
    232 
    233 	dc->dc_rowbytes = dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
    234 
    235 	if ((dc->dc_regs[TGA_REG_VHCR] & 0x00000001) != 0 &&	/* XXX */
    236 	    (dc->dc_regs[TGA_REG_VHCR] & 0x80000000) != 0) {	/* XXX */
    237 		dc->dc_wid -= 4;
    238 		/*
    239 		 * XXX XXX turning off 'odd' shouldn't be necesssary,
    240 		 * XXX XXX but i can't make X work with the weird size.
    241 		 */
    242 		dc->dc_regs[TGA_REG_VHCR] &= ~0x80000001;
    243 		dc->dc_rowbytes =
    244 		    dc->dc_wid * (dc->dc_tgaconf->tgac_phys_depth / 8);
    245 	}
    246 
    247 	dc->dc_ht = (dc->dc_regs[TGA_REG_VVCR] & 0x7ff);	/* XXX */
    248 
    249 	/* XXX this seems to be what DEC does */
    250 	dc->dc_regs[TGA_REG_CCBR] = 0;
    251 	dc->dc_regs[TGA_REG_VVBR] = 1;
    252 	dc->dc_videobase = dc->dc_vaddr + tgac->tgac_dbuf[0] +
    253 	    1 * tgac->tgac_vvbr_units;
    254 	dc->dc_blanked = 1;
    255 	tga_unblank(dc);
    256 
    257 	/*
    258 	 * Set all bits in the pixel mask, to enable writes to all pixels.
    259 	 * It seems that the console firmware clears some of them
    260 	 * under some circumstances, which causes cute vertical stripes.
    261 	 */
    262 	dc->dc_regs[TGA_REG_GPXR_P] = 0xffffffff;
    263 
    264 	/* clear the screen */
    265 	for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(u_int32_t))
    266 		*(u_int32_t *)(dc->dc_videobase + i) = 0;
    267 
    268 	/* initialize the raster */
    269 	rap = &dc->dc_raster;
    270 	rap->width = dc->dc_wid;
    271 	rap->height = dc->dc_ht;
    272 	rap->depth = tgac->tgac_phys_depth;
    273 	rap->linelongs = dc->dc_rowbytes / sizeof(u_int32_t);
    274 	rap->pixels = (u_int32_t *)dc->dc_videobase;
    275 	rap->data = (caddr_t)dc;
    276 
    277 	/* initialize the raster console blitter */
    278 	rcp = &dc->dc_rcons;
    279 	rcp->rc_sp = rap;
    280 	rcp->rc_crow = rcp->rc_ccol = -1;
    281 	rcp->rc_crowp = &rcp->rc_crow;
    282 	rcp->rc_ccolp = &rcp->rc_ccol;
    283 	rcons_init(rcp, 34, 80);
    284 
    285 	tga_stdscreen.nrows = dc->dc_rcons.rc_maxrow;
    286 	tga_stdscreen.ncols = dc->dc_rcons.rc_maxcol;
    287 }
    288 
    289 void
    290 tgaattach(parent, self, aux)
    291 	struct device *parent, *self;
    292 	void *aux;
    293 {
    294 	struct pci_attach_args *pa = aux;
    295 	struct tga_softc *sc = (struct tga_softc *)self;
    296 	struct wsemuldisplaydev_attach_args aa;
    297 	pci_intr_handle_t intrh;
    298 	int tga2 = 0;
    299 	const char *intrstr;
    300 	u_int8_t rev;
    301 	int console;
    302 
    303 #ifdef __alpha__
    304 	console = (pa->pa_tag == tga_console_dc.dc_pcitag);
    305 #else
    306 	console = 0;
    307 #endif
    308 	rev = PCI_REVISION(pa->pa_class);
    309 	if ((rev & 0xf0) == 0x20)
    310 		tga2 = 1;
    311 	if (console) {
    312 		sc->sc_dc = &tga_console_dc;
    313 		sc->nscreens = 1;
    314 	} else {
    315 		sc->sc_dc = (struct tga_devconfig *)
    316 		    malloc(sizeof(struct tga_devconfig), M_DEVBUF, M_WAITOK);
    317 		bzero(sc->sc_dc, sizeof(struct tga_devconfig));
    318 		tga_getdevconfig(pa->pa_memt, pa->pa_pc, pa->pa_tag,
    319 		    sc->sc_dc, tga2);
    320 	}
    321 	if (sc->sc_dc->dc_vaddr == NULL) {
    322 		printf(": couldn't map memory space; punt!\n");
    323 		return;
    324 	}
    325 
    326 	/* XXX say what's going on. */
    327 	intrstr = NULL;
    328 	if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
    329 	    pa->pa_intrline, &intrh)) {
    330 		printf(": couldn't map interrupt");
    331 		return;
    332 	}
    333 	intrstr = pci_intr_string(pa->pa_pc, intrh);
    334 	sc->sc_intr = pci_intr_establish(pa->pa_pc, intrh, IPL_TTY, tga_intr,
    335 	    sc->sc_dc);
    336 	if (sc->sc_intr == NULL) {
    337 		printf(": couldn't establish interrupt");
    338 		if (intrstr != NULL)
    339 			printf("at %s", intrstr);
    340 		printf("\n");
    341 		return;
    342 	}
    343 
    344 	rev = PCI_REVISION(pa->pa_class);
    345 	switch (rev) {
    346 	case 0x1:
    347 	case 0x2:
    348 	case 0x3:
    349 		printf(": DC21030 step %c", 'A' + rev - 1);
    350 		tga2 = 0;
    351 		break;
    352 	case 0x20:
    353 		printf(": TGA2 abstract software model");
    354 		tga2 = 1;
    355 		break;
    356 	case 0x21: case 0x22:
    357 		printf(": TGA2 pass %d", rev - 0x20);
    358 		tga2 = 1;
    359 		break;
    360 
    361 	default:
    362 		printf("unknown stepping (0x%x)", rev);
    363 		tga2 = 0;
    364 		break;
    365 	}
    366 	printf(", ");
    367 
    368 	/*
    369 	 * Get RAMDAC function vectors and call the RAMDAC functions
    370 	 * to allocate its private storage and pass that back to us.
    371 	 */
    372 	sc->sc_dc->dc_ramdac_funcs = bt485_funcs();
    373 	if (!tga2) {
    374 		sc->sc_dc->dc_ramdac_cookie = bt485_register(
    375 		    sc->sc_dc, tga_sched_update, tga_ramdac_wr,
    376 		    tga_ramdac_rd);
    377 	} else {
    378 		sc->sc_dc->dc_ramdac_cookie = bt485_register(
    379 		    sc->sc_dc, tga_sched_update, tga2_ramdac_wr,
    380 		    tga2_ramdac_rd);
    381 	}
    382 
    383 	/*
    384 	 * Initialize the RAMDAC.  Initialization includes disabling
    385 	 * cursor, setting a sane colormap, etc.
    386 	 */
    387 	(*sc->sc_dc->dc_ramdac_funcs->ramdac_init)(sc->sc_dc->dc_ramdac_cookie);
    388 	sc->sc_dc->dc_regs[TGA_REG_SISR] = 0x00000001;                 /* XXX */
    389 
    390 	if (sc->sc_dc->dc_tgaconf == NULL) {
    391 		printf("unknown board configuration\n");
    392 		return;
    393 	}
    394 	printf("board type %s\n", sc->sc_dc->dc_tgaconf->tgac_name);
    395 	printf("%s: %d x %d, %dbpp, %s RAMDAC\n", sc->sc_dev.dv_xname,
    396 	    sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
    397 	    sc->sc_dc->dc_tgaconf->tgac_phys_depth,
    398 	    sc->sc_dc->dc_ramdac_funcs->ramdac_name);
    399 
    400 	if (intrstr != NULL)
    401 		printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
    402 		    intrstr);
    403 
    404 	aa.console = console;
    405 	aa.scrdata = &tga_screenlist;
    406 	aa.accessops = &tga_accessops;
    407 	aa.accesscookie = sc;
    408 
    409 	config_found(self, &aa, wsemuldisplaydevprint);
    410 }
    411 
    412 int
    413 tga_ioctl(v, cmd, data, flag, p)
    414 	void *v;
    415 	u_long cmd;
    416 	caddr_t data;
    417 	int flag;
    418 	struct proc *p;
    419 {
    420 	struct tga_softc *sc = v;
    421 	struct tga_devconfig *dc = sc->sc_dc;
    422 	struct ramdac_funcs *dcrf = dc->dc_ramdac_funcs;
    423 	struct ramdac_cookie *dcrc = dc->dc_ramdac_cookie;
    424 
    425 	switch (cmd) {
    426 	case WSDISPLAYIO_GTYPE:
    427 		*(u_int *)data = WSDISPLAY_TYPE_TGA;
    428 		return (0);
    429 
    430 	case WSDISPLAYIO_GINFO:
    431 #define	wsd_fbip ((struct wsdisplay_fbinfo *)data)
    432 		wsd_fbip->height = sc->sc_dc->dc_ht;
    433 		wsd_fbip->width = sc->sc_dc->dc_wid;
    434 		wsd_fbip->depth = sc->sc_dc->dc_tgaconf->tgac_phys_depth;
    435 		wsd_fbip->cmsize = 256;		/* XXX ??? */
    436 #undef wsd_fbip
    437 		return (0);
    438 
    439 	case WSDISPLAYIO_GETCMAP:
    440 		return (*dcrf->ramdac_get_cmap)(dcrc,
    441 		    (struct wsdisplay_cmap *)data);
    442 
    443 	case WSDISPLAYIO_PUTCMAP:
    444 		return (*dcrf->ramdac_set_cmap)(dcrc,
    445 		    (struct wsdisplay_cmap *)data);
    446 
    447 	case WSDISPLAYIO_SVIDEO:
    448 		if (*(u_int *)data == WSDISPLAYIO_VIDEO_OFF)
    449 			tga_blank(sc->sc_dc);
    450 		else
    451 			tga_unblank(sc->sc_dc);
    452 		return (0);
    453 
    454 	case WSDISPLAYIO_GVIDEO:
    455 		*(u_int *)data = dc->dc_blanked ?
    456 		    WSDISPLAYIO_VIDEO_OFF : WSDISPLAYIO_VIDEO_ON;
    457 		return (0);
    458 
    459 	case WSDISPLAYIO_GCURPOS:
    460 		return (*dcrf->ramdac_get_curpos)(dcrc,
    461 		    (struct wsdisplay_curpos *)data);
    462 
    463 	case WSDISPLAYIO_SCURPOS:
    464 		return (*dcrf->ramdac_set_curpos)(dcrc,
    465 		    (struct wsdisplay_curpos *)data);
    466 
    467 	case WSDISPLAYIO_GCURMAX:
    468 		return (*dcrf->ramdac_get_curmax)(dcrc,
    469 		    (struct wsdisplay_curpos *)data);
    470 
    471 	case WSDISPLAYIO_GCURSOR:
    472 		return (*dcrf->ramdac_get_cursor)(dcrc,
    473 		    (struct wsdisplay_cursor *)data);
    474 
    475 	case WSDISPLAYIO_SCURSOR:
    476 		return (*dcrf->ramdac_set_cursor)(dcrc,
    477 		    (struct wsdisplay_cursor *)data);
    478 	}
    479 	return (-1);
    480 }
    481 
    482 int
    483 tga_sched_update(v, f)
    484 	void	*v;
    485 	void	(*f) __P((void *));
    486 {
    487 	struct tga_devconfig *dc = v;
    488 
    489 	dc->dc_regs[TGA_REG_SISR] = 0x00010000;
    490 	dc->dc_ramdac_intr = f;
    491 	return 0;
    492 }
    493 
    494 int
    495 tga_intr(v)
    496 	void *v;
    497 {
    498 	struct tga_devconfig *dc = v;
    499 	struct ramdac_cookie *dcrc= dc->dc_ramdac_cookie;
    500 
    501 	if ((dc->dc_regs[TGA_REG_SISR] & 0x00010001) != 0x00010001)
    502 		return 0;
    503 	dc->dc_ramdac_intr(dcrc);
    504 	dc->dc_ramdac_intr = NULL;
    505 	dc->dc_regs[TGA_REG_SISR] = 0x00000001;
    506 	return (1);
    507 }
    508 
    509 int
    510 tga_mmap(v, offset, prot)
    511 	void *v;
    512 	off_t offset;
    513 	int prot;
    514 {
    515 
    516 	/* XXX NEW MAPPING CODE... */
    517 
    518 #ifdef __alpha__
    519 	struct tga_softc *sc = v;
    520 
    521 	if (offset >= sc->sc_dc->dc_tgaconf->tgac_cspace_size || offset < 0)
    522 		return -1;
    523 	return alpha_btop(sc->sc_dc->dc_paddr + offset);
    524 #else
    525 	return (-1);
    526 #endif
    527 }
    528 
    529 int
    530 tga_alloc_screen(v, type, cookiep, curxp, curyp, attrp)
    531 	void *v;
    532 	const struct wsscreen_descr *type;
    533 	void **cookiep;
    534 	int *curxp, *curyp;
    535 	long *attrp;
    536 {
    537 	struct tga_softc *sc = v;
    538 	long defattr;
    539 
    540 	if (sc->nscreens > 0)
    541 		return (ENOMEM);
    542 
    543 	*cookiep = &sc->sc_dc->dc_rcons; /* one and only for now */
    544 	*curxp = 0;
    545 	*curyp = 0;
    546 	rcons_alloc_attr(&sc->sc_dc->dc_rcons, 0, 0, 0, &defattr);
    547 	*attrp = defattr;
    548 	sc->nscreens++;
    549 	return (0);
    550 }
    551 
    552 void
    553 tga_free_screen(v, cookie)
    554 	void *v;
    555 	void *cookie;
    556 {
    557 	struct tga_softc *sc = v;
    558 
    559 	if (sc->sc_dc == &tga_console_dc)
    560 		panic("tga_free_screen: console");
    561 
    562 	sc->nscreens--;
    563 }
    564 
    565 int
    566 tga_show_screen(v, cookie, waitok, cb, cbarg)
    567 	void *v;
    568 	void *cookie;
    569 	int waitok;
    570 	void (*cb) __P((void *, int, int));
    571 	void *cbarg;
    572 {
    573 
    574 	return (0);
    575 }
    576 
    577 int
    578 tga_cnattach(iot, memt, pc, bus, device, function)
    579 	bus_space_tag_t iot, memt;
    580 	pci_chipset_tag_t pc;
    581 	int bus, device, function;
    582 {
    583 	struct tga_devconfig *dcp = &tga_console_dc;
    584 	long defattr;
    585 
    586 	/* XXX -- we know this isn't a TGA2 for now.  rcd */
    587 	tga_getdevconfig(memt, pc,
    588 	    pci_make_tag(pc, bus, device, function), dcp, 0);
    589 
    590 	/* sanity checks */
    591 	if (dcp->dc_vaddr == NULL)
    592 		panic("tga_console(%d, %d): couldn't map memory space",
    593 		    device, function);
    594 	if (dcp->dc_tgaconf == NULL)
    595 		panic("tga_console(%d, %d): unknown board configuration",
    596 		    device, function);
    597 
    598 	/*
    599 	 * Initialize the RAMDAC but DO NOT allocate any private storage.
    600 	 * Initialization includes disabling cursor, setting a sane
    601 	 * colormap, etc.  It will be reinitialized in tgaattach().
    602 	 */
    603 
    604 	/* XXX -- this only works for bt485, but then we only support that,
    605 	 *  currently.  It also doesn't work for TGA2, but we don't yet
    606 	 *  support TGA2 as a console.
    607 	 */
    608 	bt485_cninit(dcp, tga_sched_update, tga_ramdac_wr, tga_ramdac_rd);
    609 
    610 	rcons_alloc_attr(&dcp->dc_rcons, 0, 0, 0, &defattr);
    611 
    612 	wsdisplay_cnattach(&tga_stdscreen, &dcp->dc_rcons,
    613 			   0, 0, defattr);
    614 
    615 	return(0);
    616 }
    617 
    618 /*
    619  * Functions to blank and unblank the display.
    620  */
    621 void
    622 tga_blank(dc)
    623 	struct tga_devconfig *dc;
    624 {
    625 
    626 	if (!dc->dc_blanked) {
    627 		dc->dc_blanked = 1;
    628 		dc->dc_regs[TGA_REG_VVVR] |= VVR_BLANK;		/* XXX */
    629 	}
    630 }
    631 
    632 void
    633 tga_unblank(dc)
    634 	struct tga_devconfig *dc;
    635 {
    636 
    637 	if (dc->dc_blanked) {
    638 		dc->dc_blanked = 0;
    639 		dc->dc_regs[TGA_REG_VVVR] &= ~VVR_BLANK;	/* XXX */
    640 	}
    641 }
    642 
    643 /*
    644  * Functions to manipulate the built-in cursor handing hardware.
    645  */
    646 int
    647 tga_builtin_set_cursor(dc, cursorp)
    648 	struct tga_devconfig *dc;
    649 	struct wsdisplay_cursor *cursorp;
    650 {
    651 	struct ramdac_funcs *dcrf = dc->dc_ramdac_funcs;
    652 	struct ramdac_cookie *dcrc = dc->dc_ramdac_cookie;
    653 	int count, error, v;
    654 
    655 	v = cursorp->which;
    656 	if (v & WSDISPLAY_CURSOR_DOCMAP) {
    657 		error = dcrf->ramdac_check_curcmap(dcrc, cursorp);
    658 		if (error)
    659 			return (error);
    660 	}
    661 	if (v & WSDISPLAY_CURSOR_DOSHAPE) {
    662 		if ((u_int)cursorp->size.x != 64 ||
    663 		    (u_int)cursorp->size.y > 64)
    664 			return (EINVAL);
    665 		/* The cursor is 2 bits deep, and there is no mask */
    666 		count = (cursorp->size.y * 64 * 2) / NBBY;
    667 		if (!uvm_useracc(cursorp->image, count, B_READ))
    668 			return (EFAULT);
    669 	}
    670 	if (v & WSDISPLAY_CURSOR_DOHOT)		/* not supported */
    671 		return EINVAL;
    672 
    673 	/* parameters are OK; do it */
    674 	if (v & WSDISPLAY_CURSOR_DOCUR) {
    675 		if (cursorp->enable)
    676 			dc->dc_regs[TGA_REG_VVVR] |= 0x04;	/* XXX */
    677 		else
    678 			dc->dc_regs[TGA_REG_VVVR] &= ~0x04;	/* XXX */
    679 	}
    680 	if (v & WSDISPLAY_CURSOR_DOPOS) {
    681 		dc->dc_regs[TGA_REG_CXYR] = ((cursorp->pos.y & 0xfff) << 12) |
    682 		    (cursorp->pos.x & 0xfff);
    683 	}
    684 	if (v & WSDISPLAY_CURSOR_DOCMAP) {
    685 		/* can't fail. */
    686 		dcrf->ramdac_set_curcmap(dcrc, cursorp);
    687 	}
    688 	if (v & WSDISPLAY_CURSOR_DOSHAPE) {
    689 		count = ((64 * 2) / NBBY) * cursorp->size.y;
    690 		dc->dc_regs[TGA_REG_CCBR] =
    691 		    (dc->dc_regs[TGA_REG_CCBR] & ~0xfc00) |
    692 		    (cursorp->size.y << 10);
    693 		copyin(cursorp->image, (char *)(dc->dc_vaddr +
    694 		    (dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
    695 		    count);				/* can't fail. */
    696 	}
    697 	return (0);
    698 }
    699 
    700 int
    701 tga_builtin_get_cursor(dc, cursorp)
    702 	struct tga_devconfig *dc;
    703 	struct wsdisplay_cursor *cursorp;
    704 {
    705 	struct ramdac_funcs *dcrf = dc->dc_ramdac_funcs;
    706 	struct ramdac_cookie *dcrc = dc->dc_ramdac_cookie;
    707 	int count, error;
    708 
    709 	cursorp->which = WSDISPLAY_CURSOR_DOALL &
    710 	    ~(WSDISPLAY_CURSOR_DOHOT | WSDISPLAY_CURSOR_DOCMAP);
    711 	cursorp->enable = (dc->dc_regs[TGA_REG_VVVR] & 0x04) != 0;
    712 	cursorp->pos.x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
    713 	cursorp->pos.y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
    714 	cursorp->size.x = 64;
    715 	cursorp->size.y = (dc->dc_regs[TGA_REG_CCBR] >> 10) & 0x3f;
    716 
    717 	if (cursorp->image != NULL) {
    718 		count = (cursorp->size.y * 64 * 2) / NBBY;
    719 		error = copyout((char *)(dc->dc_vaddr +
    720 		      (dc->dc_regs[TGA_REG_CCBR] & 0x3ff)),
    721 		    cursorp->image, count);
    722 		if (error)
    723 			return (error);
    724 		/* No mask */
    725 	}
    726 	error = dcrf->ramdac_get_curcmap(dcrc, cursorp);
    727 	return (error);
    728 }
    729 
    730 int
    731 tga_builtin_set_curpos(dc, curposp)
    732 	struct tga_devconfig *dc;
    733 	struct wsdisplay_curpos *curposp;
    734 {
    735 
    736 	dc->dc_regs[TGA_REG_CXYR] =
    737 	    ((curposp->y & 0xfff) << 12) | (curposp->x & 0xfff);
    738 	return (0);
    739 }
    740 
    741 int
    742 tga_builtin_get_curpos(dc, curposp)
    743 	struct tga_devconfig *dc;
    744 	struct wsdisplay_curpos *curposp;
    745 {
    746 
    747 	curposp->x = dc->dc_regs[TGA_REG_CXYR] & 0xfff;
    748 	curposp->y = (dc->dc_regs[TGA_REG_CXYR] >> 12) & 0xfff;
    749 	return (0);
    750 }
    751 
    752 int
    753 tga_builtin_get_curmax(dc, curposp)
    754 	struct tga_devconfig *dc;
    755 	struct wsdisplay_curpos *curposp;
    756 {
    757 
    758 	curposp->x = curposp->y = 64;
    759 	return (0);
    760 }
    761 
    762 /*
    763  * Copy columns (characters) in a row (line).
    764  */
    765 void
    766 tga_copycols(id, row, srccol, dstcol, ncols)
    767 	void *id;
    768 	int row, srccol, dstcol, ncols;
    769 {
    770 	struct rcons *rc = id;
    771 	int y, srcx, dstx, nx;
    772 
    773 	y = rc->rc_yorigin + rc->rc_font->height * row;
    774 	srcx = rc->rc_xorigin + rc->rc_font->width * srccol;
    775 	dstx = rc->rc_xorigin + rc->rc_font->width * dstcol;
    776 	nx = rc->rc_font->width * ncols;
    777 
    778 	tga_rop(rc->rc_sp, dstx, y,
    779 	    nx, rc->rc_font->height, RAS_SRC,
    780 	    rc->rc_sp, srcx, y);
    781 }
    782 
    783 /*
    784  * Copy rows (lines).
    785  */
    786 void
    787 tga_copyrows(id, srcrow, dstrow, nrows)
    788 	void *id;
    789 	int srcrow, dstrow, nrows;
    790 {
    791 	struct rcons *rc = id;
    792 	int srcy, dsty, ny;
    793 
    794 	srcy = rc->rc_yorigin + rc->rc_font->height * srcrow;
    795 	dsty = rc->rc_yorigin + rc->rc_font->height * dstrow;
    796 	ny = rc->rc_font->height * nrows;
    797 
    798 	tga_rop(rc->rc_sp, rc->rc_xorigin, dsty,
    799 	    rc->rc_raswidth, ny, RAS_SRC,
    800 	    rc->rc_sp, rc->rc_xorigin, srcy);
    801 }
    802 
    803 /* Do we need the src? */
    804 static int needsrc[16] = { 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0 };
    805 
    806 /* A mapping between our API and the TGA card */
    807 static int map_rop[16] = { 0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6,
    808 	0xe, 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf
    809 };
    810 
    811 /*
    812  *  Generic TGA raster op.
    813  *   This covers all possible raster ops, and
    814  *   clips the sizes and all of that.
    815  */
    816 static int
    817 tga_rop(dst, dx, dy, w, h, rop, src, sx, sy)
    818 	struct raster *dst;
    819 	int dx, dy, w, h, rop;
    820 	struct raster *src;
    821 	int sx, sy;
    822 {
    823 	if (!dst)
    824 		return -1;
    825 	if (dst->data == NULL)
    826 		return -1;	/* we should be writing to a screen */
    827 	if (needsrc[RAS_GETOP(rop)]) {
    828 		if (src == (struct raster *) 0)
    829 			return -1;	/* We want a src */
    830 		/* Clip against src */
    831 		if (sx < 0) {
    832 			w += sx;
    833 			sx = 0;
    834 		}
    835 		if (sy < 0) {
    836 			h += sy;
    837 			sy = 0;
    838 		}
    839 		if (sx + w > src->width)
    840 			w = src->width - sx;
    841 		if (sy + h > src->height)
    842 			h = src->height - sy;
    843 	} else {
    844 		if (src != (struct raster *) 0)
    845 			return -1;	/* We need no src */
    846 	}
    847 	/* Clip against dst.  We modify src regardless of using it,
    848 	 * since it really doesn't matter.
    849 	 */
    850 	if (dx < 0) {
    851 		w += dx;
    852 		sx -= dx;
    853 		dx = 0;
    854 	}
    855 	if (dy < 0) {
    856 		h += dy;
    857 		sy -= dy;
    858 		dy = 0;
    859 	}
    860 	if (dx + w > dst->width)
    861 		w = dst->width - dx;
    862 	if (dy + h > dst->height)
    863 		h = dst->height - dy;
    864 	if (w <= 0 || h <= 0)
    865 		return 0;	/* Vacuously true; */
    866 	if (!src)
    867 		return tga_rop_nosrc(dst, dx, dy, w, h, rop);
    868 	if (src->data == NULL)
    869 		return tga_rop_htov(dst, dx, dy, w, h, rop, src, sx, sy);
    870 	else
    871 		return tga_rop_vtov(dst, dx, dy, w, h, rop, src, sx, sy);
    872 }
    873 
    874 /*
    875  * No source raster ops.
    876  * This function deals with all raster ops that don't require a src.
    877  */
    878 static int
    879 tga_rop_nosrc(dst, dx, dy, w, h, rop)
    880 	struct raster *dst;
    881 	int dx, dy, w, h, rop;
    882 {
    883 	return raster_op(dst, dx, dy, w, h, rop, NULL, 0, 0);
    884 }
    885 
    886 /*
    887  * Host to Video raster ops.
    888  * This function deals with all raster ops that have a src that is host memory.
    889  */
    890 static int
    891 tga_rop_htov(dst, dx, dy, w, h, rop, src, sx, sy)
    892 	struct raster *dst;
    893 	int dx, dy, w, h, rop;
    894 	struct raster *src;
    895 	int sx, sy;
    896 {
    897 	return raster_op(dst, dx, dy, w, h, rop, src, sx, sy);
    898 }
    899 
    900 /*
    901  * Video to Video raster ops.
    902  * This function deals with all raster ops that have a src and dst
    903  * that are on the card.
    904  */
    905 static int
    906 tga_rop_vtov(dst, dx, dy, w, h, rop, src, sx, sy)
    907 	struct raster *dst;
    908 	int dx, dy, w, h, rop;
    909 	struct raster *src;
    910 	int sx, sy;
    911 {
    912 	struct tga_devconfig *dc = (struct tga_devconfig *)dst->data;
    913 	tga_reg_t *regs0 = dc->dc_regs;
    914 	tga_reg_t *regs1 = regs0 + 16 * 1024;	/* register alias 1 */
    915 	tga_reg_t *regs2 = regs1 + 16 * 1024;	/* register alias 2 */
    916 	tga_reg_t *regs3 = regs2 + 16 * 1024;	/* register alias 3 */
    917 	int srcb, dstb;
    918 	int x, y;
    919 	int xstart, xend, xdir, xinc;
    920 	int ystart, yend, ydir, yinc;
    921 	int offset = 1 * dc->dc_tgaconf->tgac_vvbr_units;
    922 
    923 	/*
    924 	 * I don't yet want to deal with unaligned guys, really.  And we don't
    925 	 * deal with copies from one card to another.
    926 	 */
    927 	if (dx % 8 != 0 || sx % 8 != 0 || src != dst)
    928 		return raster_op(dst, dx, dy, w, h, rop, src, sx, sy);
    929 
    930 	if (sy >= dy) {
    931 		ystart = 0;
    932 		yend = h;
    933 		ydir = 1;
    934 	} else {
    935 		ystart = h;
    936 		yend = 0;
    937 		ydir = -1;
    938 	}
    939 	if (sx >= dx) {
    940 		xstart = 0;
    941 		xend = w * (dst->depth / 8);
    942 		xdir = 1;
    943 	} else {
    944 		xstart = w * (dst->depth / 8);
    945 		xend = 0;
    946 		xdir = -1;
    947 	}
    948 	xinc = xdir * 4 * 64;
    949 	yinc = ydir * dst->linelongs * 4;
    950 	ystart *= dst->linelongs * 4;
    951 	yend *= dst->linelongs * 4;
    952 	srcb = offset + sy  * src->linelongs * 4 + sx;
    953 	dstb = offset + dy  * dst->linelongs * 4 + dx;
    954 	regs3[TGA_REG_GMOR] = 0x0007;		/* Copy mode */
    955 	regs3[TGA_REG_GOPR] = map_rop[rop];	/* Set up the op */
    956 	for (y = ystart; (ydir * y) < (ydir * yend); y += yinc) {
    957 		for (x = xstart; (xdir * x) < (xdir * xend); x += xinc) {
    958 			regs0[TGA_REG_GCSR] = srcb + y + x + 3 * 64;
    959 			regs0[TGA_REG_GCDR] = dstb + y + x + 3 * 64;
    960 			regs1[TGA_REG_GCSR] = srcb + y + x + 2 * 64;
    961 			regs1[TGA_REG_GCDR] = dstb + y + x + 2 * 64;
    962 			regs2[TGA_REG_GCSR] = srcb + y + x + 1 * 64;
    963 			regs2[TGA_REG_GCDR] = dstb + y + x + 1 * 64;
    964 			regs3[TGA_REG_GCSR] = srcb + y + x + 0 * 64;
    965 			regs3[TGA_REG_GCDR] = dstb + y + x + 0 * 64;
    966 		}
    967 	}
    968 	regs0[TGA_REG_GOPR] = 0x0003;		/* op -> dst = src */
    969 	regs0[TGA_REG_GMOR] = 0x0000;		/* Simple mode */
    970 	return 0;
    971 }
    972 
    973 void
    974 tga_ramdac_wr(v, btreg, val)
    975 	void *v;
    976 	u_int btreg;
    977 	u_int8_t val;
    978 {
    979 	struct tga_devconfig *dc = v;
    980 	volatile tga_reg_t *tgaregs = dc->dc_regs;
    981 
    982 	if (btreg > BT485_REG_MAX)
    983 		panic("tga_ramdac_wr: reg %d out of range\n", btreg);
    984 
    985 	tgaregs[TGA_REG_EPDR] = (btreg << 9) | (0 << 8 ) | val; /* XXX */
    986 #ifdef __alpha__
    987 	alpha_mb();
    988 #endif
    989 }
    990 
    991 void
    992 tga2_ramdac_wr(v, btreg, val)
    993 	void *v;
    994 	u_int btreg;
    995 	u_int8_t val;
    996 {
    997 	struct tga_devconfig *dc = v;
    998 	volatile tga_reg_t *ramdac;
    999 
   1000 	if (btreg > BT485_REG_MAX)
   1001 		panic("tga_ramdac_wr: reg %d out of range\n", btreg);
   1002 
   1003 	ramdac = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_RAMDAC +
   1004 	    (0xe << 12) + (btreg << 8));
   1005 	*ramdac = val & 0xff;
   1006 #ifdef __alpha__
   1007 	alpha_mb();
   1008 #endif
   1009 }
   1010 
   1011 u_int8_t
   1012 tga_ramdac_rd(v, btreg)
   1013 	void *v;
   1014 	u_int btreg;
   1015 {
   1016 	struct tga_devconfig *dc = v;
   1017 	volatile tga_reg_t *tgaregs = dc->dc_regs;
   1018 	tga_reg_t rdval;
   1019 
   1020 	if (btreg > BT485_REG_MAX)
   1021 		panic("tga_ramdac_rd: reg %d out of range\n", btreg);
   1022 
   1023 	tgaregs[TGA_REG_EPSR] = (btreg << 1) | 0x1;		/* XXX */
   1024 #ifdef __alpha__
   1025 	alpha_mb();
   1026 #endif
   1027 
   1028 	rdval = tgaregs[TGA_REG_EPDR];
   1029 	return (rdval >> 16) & 0xff;				/* XXX */
   1030 }
   1031 
   1032 u_int8_t
   1033 tga2_ramdac_rd(v, btreg)
   1034 	void *v;
   1035 	u_int btreg;
   1036 {
   1037 	struct tga_devconfig *dc = v;
   1038 	volatile tga_reg_t *ramdac;
   1039 	u_int8_t retval;
   1040 
   1041 	if (btreg > BT485_REG_MAX)
   1042 		panic("tga_ramdac_rd: reg %d out of range\n", btreg);
   1043 
   1044 	ramdac = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_RAMDAC +
   1045 	    (0xe << 12) + (btreg << 8));
   1046 	retval = (u_int8_t)(*ramdac & 0xff);
   1047 #ifdef __alpha__
   1048 	alpha_mb();
   1049 #endif
   1050 	return retval;
   1051 }
   1052 
   1053 #include <dev/ic/decmonitors.c>
   1054 void tga2_ics9110_wr __P((
   1055 	struct tga_devconfig *dc,
   1056 	int dotclock
   1057 ));
   1058 
   1059 void
   1060 tga2_init(dc, m)
   1061 	struct tga_devconfig *dc;
   1062 	int m;
   1063 {
   1064 
   1065 	tga2_ics9110_wr(dc, decmonitors[m].dotclock);
   1066 	dc->dc_regs[TGA_REG_VHCR] =
   1067 	     ((decmonitors[m].hbp / 4) << 21) |
   1068 	     ((decmonitors[m].hsync / 4) << 14) |
   1069 #if 0
   1070 	    (((decmonitors[m].hfp - 4) / 4) << 9) |
   1071 	     ((decmonitors[m].cols + 4) / 4);
   1072 #else
   1073 	    (((decmonitors[m].hfp) / 4) << 9) |
   1074 	     ((decmonitors[m].cols) / 4);
   1075 #endif
   1076 	dc->dc_regs[TGA_REG_VVCR] =
   1077 	    (decmonitors[m].vbp << 22) |
   1078 	    (decmonitors[m].vsync << 16) |
   1079 	    (decmonitors[m].vfp << 11) |
   1080 	    (decmonitors[m].rows);
   1081         dc->dc_regs[TGA_REG_VVBR] = 1;		alpha_mb();
   1082 	dc->dc_regs[TGA_REG_VVVR] |= 1;		alpha_mb();
   1083 	dc->dc_regs[TGA_REG_GPMR] = 0xffffffff;	alpha_mb();
   1084 }
   1085 
   1086 void
   1087 tga2_ics9110_wr(dc, dotclock)
   1088 	struct tga_devconfig *dc;
   1089 	int dotclock;
   1090 {
   1091 	volatile tga_reg_t *clock;
   1092 	u_int32_t valU;
   1093 	int N, M, R, V, X;
   1094 	int i;
   1095 
   1096 	switch (dotclock) {
   1097 	case 130808000:
   1098 		N = 0x40; M = 0x7; V = 0x0; X = 0x1; R = 0x1; break;
   1099 	case 119840000:
   1100 		N = 0x2d; M = 0x2b; V = 0x1; X = 0x1; R = 0x1; break;
   1101 	case 108180000:
   1102 		N = 0x11; M = 0x9; V = 0x1; X = 0x1; R = 0x2; break;
   1103 	case 103994000:
   1104 		N = 0x6d; M = 0xf; V = 0x0; X = 0x1; R = 0x1; break;
   1105 	case 175000000:
   1106 		N = 0x5F; M = 0x3E; V = 0x1; X = 0x1; R = 0x1; break;
   1107 	case  75000000:
   1108 		N = 0x6e; M = 0x15; V = 0x0; X = 0x1; R = 0x1; break;
   1109 	case  74000000:
   1110 		N = 0x2a; M = 0x41; V = 0x1; X = 0x1; R = 0x1; break;
   1111 	case  69000000:
   1112 		N = 0x35; M = 0xb; V = 0x0; X = 0x1; R = 0x1; break;
   1113 	case  65000000:
   1114 		N = 0x6d; M = 0x0c; V = 0x0; X = 0x1; R = 0x2; break;
   1115 	case  50000000:
   1116 		N = 0x37; M = 0x3f; V = 0x1; X = 0x1; R = 0x2; break;
   1117 	case  40000000:
   1118 		N = 0x5f; M = 0x11; V = 0x0; X = 0x1; R = 0x2; break;
   1119 	case  31500000:
   1120 		N = 0x16; M = 0x05; V = 0x0; X = 0x1; R = 0x2; break;
   1121 	case  25175000:
   1122 		N = 0x66; M = 0x1d; V = 0x0; X = 0x1; R = 0x2; break;
   1123 	case 135000000:
   1124 		N = 0x42; M = 0x07; V = 0x0; X = 0x1; R = 0x1; break;
   1125 	case 110000000:
   1126 		N = 0x60; M = 0x32; V = 0x1; X = 0x1; R = 0x2; break;
   1127 	case 202500000:
   1128 		N = 0x60; M = 0x32; V = 0x1; X = 0x1; R = 0x2; break;
   1129 	default:
   1130 		panic("unrecognized clock rate %d\n", dotclock);
   1131 	}
   1132 
   1133 	/* XXX -- hard coded, bad */
   1134 	valU  = N | ( M << 7 ) | (V << 14);
   1135 	valU |= (X << 15) | (R << 17);
   1136 	valU |= 0x17 << 19;
   1137 
   1138 
   1139 	clock = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_EXTDEV +
   1140 	    TGA2_MEM_CLOCK + (0xe << 12)); /* XXX */
   1141 
   1142         for (i=24; i>0; i--) {
   1143                 u_int32_t       writeval;
   1144 
   1145                 writeval = valU & 0x1;
   1146                 if (i == 1)
   1147                         writeval |= 0x2;
   1148                 valU >>= 1;
   1149                 *clock = writeval;
   1150 #ifdef __alpha__
   1151                 alpha_mb();
   1152 #endif
   1153         }
   1154 	clock = (tga_reg_t *)(dc->dc_vaddr + TGA2_MEM_EXTDEV +
   1155 	    TGA2_MEM_CLOCK + (0xe << 12) + (0x1 << 11)); /* XXX */
   1156         clock += 0x1 << 9;
   1157         *clock = 0x0;
   1158 #ifdef __alpha__
   1159                 alpha_mb();
   1160 #endif
   1161 }
   1162