twa.c revision 1.3.2.2
1 1.3.2.2 kardel /* $NetBSD: twa.c,v 1.3.2.2 2006/06/01 22:36:49 kardel Exp $ */ 2 1.3.2.2 kardel /* $wasabi: twa.c,v 1.25 2006/05/01 15:16:59 simonb Exp $ */ 3 1.3.2.2 kardel /* 4 1.3.2.2 kardel * Copyright (c) 2004-2006 Wasabi Systems, Inc. 5 1.3.2.2 kardel * All rights reserved. 6 1.3.2.2 kardel * 7 1.3.2.2 kardel * Your Wasabi Systems License Agreement specifies the terms and 8 1.3.2.2 kardel * conditions for use and redistribution. 9 1.3.2.2 kardel */ 10 1.3.2.2 kardel 11 1.3.2.2 kardel /*- 12 1.3.2.2 kardel * Copyright (c) 2004 The NetBSD Foundation, Inc. 13 1.3.2.2 kardel * All rights reserved. 14 1.3.2.2 kardel * 15 1.3.2.2 kardel * This code is derived from software contributed to The NetBSD Foundation 16 1.3.2.2 kardel * by Jordan Rhody of Wasabi Systems, Inc. 17 1.3.2.2 kardel * 18 1.3.2.2 kardel * Redistribution and use in source and binary forms, with or without 19 1.3.2.2 kardel * modification, are permitted provided that the following conditions 20 1.3.2.2 kardel * are met: 21 1.3.2.2 kardel * 1. Redistributions of source code must retain the above copyright 22 1.3.2.2 kardel * notice, this list of conditions and the following disclaimer. 23 1.3.2.2 kardel * 2. Redistributions in binary form must reproduce the above copyright 24 1.3.2.2 kardel * notice, this list of conditions and the following disclaimer in the 25 1.3.2.2 kardel * documentation and/or other materials provided with the distribution. 26 1.3.2.2 kardel * 3. All advertising materials mentioning features or use of this software 27 1.3.2.2 kardel * must display the following acknowledgement: 28 1.3.2.2 kardel * This product includes software developed by the NetBSD 29 1.3.2.2 kardel * Foundation, Inc. and its contributors. 30 1.3.2.2 kardel * 4. Neither the name of The NetBSD Foundation nor the names of its 31 1.3.2.2 kardel * contributors may be used to endorse or promote products derived 32 1.3.2.2 kardel * from this software without specific prior written permission. 33 1.3.2.2 kardel * 34 1.3.2.2 kardel * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 35 1.3.2.2 kardel * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 36 1.3.2.2 kardel * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 37 1.3.2.2 kardel * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 38 1.3.2.2 kardel * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 39 1.3.2.2 kardel * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 40 1.3.2.2 kardel * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 41 1.3.2.2 kardel * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 42 1.3.2.2 kardel * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 43 1.3.2.2 kardel * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 44 1.3.2.2 kardel * POSSIBILITY OF SUCH DAMAGE. 45 1.3.2.2 kardel */ 46 1.3.2.2 kardel 47 1.3.2.2 kardel /*- 48 1.3.2.2 kardel * Copyright (c) 2003-04 3ware, Inc. 49 1.3.2.2 kardel * Copyright (c) 2000 Michael Smith 50 1.3.2.2 kardel * Copyright (c) 2000 BSDi 51 1.3.2.2 kardel * All rights reserved. 52 1.3.2.2 kardel * 53 1.3.2.2 kardel * Redistribution and use in source and binary forms, with or without 54 1.3.2.2 kardel * modification, are permitted provided that the following conditions 55 1.3.2.2 kardel * are met: 56 1.3.2.2 kardel * 1. Redistributions of source code must retain the above copyright 57 1.3.2.2 kardel * notice, this list of conditions and the following disclaimer. 58 1.3.2.2 kardel * 2. Redistributions in binary form must reproduce the above copyright 59 1.3.2.2 kardel * notice, this list of conditions and the following disclaimer in the 60 1.3.2.2 kardel * documentation and/or other materials provided with the distribution. 61 1.3.2.2 kardel * 62 1.3.2.2 kardel * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 63 1.3.2.2 kardel * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 1.3.2.2 kardel * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 1.3.2.2 kardel * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 66 1.3.2.2 kardel * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 1.3.2.2 kardel * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 1.3.2.2 kardel * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 1.3.2.2 kardel * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 1.3.2.2 kardel * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 1.3.2.2 kardel * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 1.3.2.2 kardel * SUCH DAMAGE. 73 1.3.2.2 kardel * 74 1.3.2.2 kardel * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 75 1.3.2.2 kardel */ 76 1.3.2.2 kardel 77 1.3.2.2 kardel /* 78 1.3.2.2 kardel * 3ware driver for 9000 series storage controllers. 79 1.3.2.2 kardel * 80 1.3.2.2 kardel * Author: Vinod Kashyap 81 1.3.2.2 kardel */ 82 1.3.2.2 kardel 83 1.3.2.2 kardel #include <sys/cdefs.h> 84 1.3.2.2 kardel __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.3.2.2 2006/06/01 22:36:49 kardel Exp $"); 85 1.3.2.2 kardel 86 1.3.2.2 kardel #include <sys/param.h> 87 1.3.2.2 kardel #include <sys/systm.h> 88 1.3.2.2 kardel #include <sys/kernel.h> 89 1.3.2.2 kardel #include <sys/device.h> 90 1.3.2.2 kardel #include <sys/queue.h> 91 1.3.2.2 kardel #include <sys/proc.h> 92 1.3.2.2 kardel #include <sys/bswap.h> 93 1.3.2.2 kardel #include <sys/buf.h> 94 1.3.2.2 kardel #include <sys/bufq.h> 95 1.3.2.2 kardel #include <sys/endian.h> 96 1.3.2.2 kardel #include <sys/malloc.h> 97 1.3.2.2 kardel #include <sys/conf.h> 98 1.3.2.2 kardel #include <sys/disk.h> 99 1.3.2.2 kardel #include <sys/syslog.h> 100 1.3.2.2 kardel 101 1.3.2.2 kardel #include <uvm/uvm_extern.h> 102 1.3.2.2 kardel 103 1.3.2.2 kardel #include <machine/bus.h> 104 1.3.2.2 kardel 105 1.3.2.2 kardel #include <dev/pci/pcireg.h> 106 1.3.2.2 kardel #include <dev/pci/pcivar.h> 107 1.3.2.2 kardel #include <dev/pci/pcidevs.h> 108 1.3.2.2 kardel #include <dev/pci/twareg.h> 109 1.3.2.2 kardel #include <dev/pci/twavar.h> 110 1.3.2.2 kardel #include <dev/pci/twaio.h> 111 1.3.2.2 kardel 112 1.3.2.2 kardel #include <dev/scsipi/scsipi_all.h> 113 1.3.2.2 kardel #include <dev/scsipi/scsipi_disk.h> 114 1.3.2.2 kardel #include <dev/scsipi/scsipiconf.h> 115 1.3.2.2 kardel #include <dev/scsipi/scsi_spc.h> 116 1.3.2.2 kardel 117 1.3.2.2 kardel #include <dev/ldvar.h> 118 1.3.2.2 kardel 119 1.3.2.2 kardel #include "locators.h" 120 1.3.2.2 kardel 121 1.3.2.2 kardel #define PCI_CBIO 0x10 122 1.3.2.2 kardel 123 1.3.2.2 kardel static int twa_fetch_aen(struct twa_softc *); 124 1.3.2.2 kardel static void twa_aen_callback(struct twa_request *); 125 1.3.2.2 kardel static int twa_find_aen(struct twa_softc *sc, u_int16_t); 126 1.3.2.2 kardel static uint16_t twa_enqueue_aen(struct twa_softc *sc, 127 1.3.2.2 kardel struct twa_command_header *); 128 1.3.2.2 kardel 129 1.3.2.2 kardel static void twa_attach(struct device *, struct device *, void *); 130 1.3.2.2 kardel static void twa_shutdown(void *); 131 1.3.2.2 kardel static int twa_init_connection(struct twa_softc *, u_int16_t, u_int32_t, 132 1.3.2.2 kardel u_int16_t, u_int16_t, u_int16_t, u_int16_t, u_int16_t *, 133 1.3.2.2 kardel u_int16_t *, u_int16_t *, u_int16_t *, u_int32_t *); 134 1.3.2.2 kardel static int twa_intr(void *); 135 1.3.2.2 kardel static int twa_match(struct device *, struct cfdata *, void *); 136 1.3.2.2 kardel static int twa_reset(struct twa_softc *); 137 1.3.2.2 kardel 138 1.3.2.2 kardel static int twa_print(void *, const char *); 139 1.3.2.2 kardel static int twa_soft_reset(struct twa_softc *); 140 1.3.2.2 kardel 141 1.3.2.2 kardel static int twa_check_ctlr_state(struct twa_softc *, u_int32_t); 142 1.3.2.2 kardel static int twa_get_param(struct twa_softc *, int, int, size_t, 143 1.3.2.2 kardel void (* callback)(struct twa_request *), 144 1.3.2.2 kardel struct twa_param_9k **); 145 1.3.2.2 kardel static int twa_set_param(struct twa_softc *, int, int, int, void *, 146 1.3.2.2 kardel void (* callback)(struct twa_request *)); 147 1.3.2.2 kardel static void twa_describe_controller(struct twa_softc *); 148 1.3.2.2 kardel static int twa_wait_status(struct twa_softc *, u_int32_t, u_int32_t); 149 1.3.2.2 kardel static int twa_done(struct twa_softc *); 150 1.3.2.2 kardel #if 0 151 1.3.2.2 kardel static int twa_flash_firmware(struct twa_softc *sc); 152 1.3.2.2 kardel static int twa_hard_reset(struct twa_softc *sc); 153 1.3.2.2 kardel #endif 154 1.3.2.2 kardel 155 1.3.2.2 kardel extern struct cfdriver twa_cd; 156 1.3.2.2 kardel extern uint32_t twa_fw_img_size; 157 1.3.2.2 kardel extern uint8_t twa_fw_img[]; 158 1.3.2.2 kardel 159 1.3.2.2 kardel CFATTACH_DECL(twa, sizeof(struct twa_softc), 160 1.3.2.2 kardel twa_match, twa_attach, NULL, NULL); 161 1.3.2.2 kardel 162 1.3.2.2 kardel /* AEN messages. */ 163 1.3.2.2 kardel static const struct twa_message twa_aen_table[] = { 164 1.3.2.2 kardel {0x0000, "AEN queue empty"}, 165 1.3.2.2 kardel {0x0001, "Controller reset occurred"}, 166 1.3.2.2 kardel {0x0002, "Degraded unit detected"}, 167 1.3.2.2 kardel {0x0003, "Controller error occured"}, 168 1.3.2.2 kardel {0x0004, "Background rebuild failed"}, 169 1.3.2.2 kardel {0x0005, "Background rebuild done"}, 170 1.3.2.2 kardel {0x0006, "Incomplete unit detected"}, 171 1.3.2.2 kardel {0x0007, "Background initialize done"}, 172 1.3.2.2 kardel {0x0008, "Unclean shutdown detected"}, 173 1.3.2.2 kardel {0x0009, "Drive timeout detected"}, 174 1.3.2.2 kardel {0x000A, "Drive error detected"}, 175 1.3.2.2 kardel {0x000B, "Rebuild started"}, 176 1.3.2.2 kardel {0x000C, "Background initialize started"}, 177 1.3.2.2 kardel {0x000D, "Entire logical unit was deleted"}, 178 1.3.2.2 kardel {0x000E, "Background initialize failed"}, 179 1.3.2.2 kardel {0x000F, "SMART attribute exceeded threshold"}, 180 1.3.2.2 kardel {0x0010, "Power supply reported AC under range"}, 181 1.3.2.2 kardel {0x0011, "Power supply reported DC out of range"}, 182 1.3.2.2 kardel {0x0012, "Power supply reported a malfunction"}, 183 1.3.2.2 kardel {0x0013, "Power supply predicted malfunction"}, 184 1.3.2.2 kardel {0x0014, "Battery charge is below threshold"}, 185 1.3.2.2 kardel {0x0015, "Fan speed is below threshold"}, 186 1.3.2.2 kardel {0x0016, "Temperature sensor is above threshold"}, 187 1.3.2.2 kardel {0x0017, "Power supply was removed"}, 188 1.3.2.2 kardel {0x0018, "Power supply was inserted"}, 189 1.3.2.2 kardel {0x0019, "Drive was removed from a bay"}, 190 1.3.2.2 kardel {0x001A, "Drive was inserted into a bay"}, 191 1.3.2.2 kardel {0x001B, "Drive bay cover door was opened"}, 192 1.3.2.2 kardel {0x001C, "Drive bay cover door was closed"}, 193 1.3.2.2 kardel {0x001D, "Product case was opened"}, 194 1.3.2.2 kardel {0x0020, "Prepare for shutdown (power-off)"}, 195 1.3.2.2 kardel {0x0021, "Downgrade UDMA mode to lower speed"}, 196 1.3.2.2 kardel {0x0022, "Upgrade UDMA mode to higher speed"}, 197 1.3.2.2 kardel {0x0023, "Sector repair completed"}, 198 1.3.2.2 kardel {0x0024, "Sbuf memory test failed"}, 199 1.3.2.2 kardel {0x0025, "Error flushing cached write data to disk"}, 200 1.3.2.2 kardel {0x0026, "Drive reported data ECC error"}, 201 1.3.2.2 kardel {0x0027, "DCB has checksum error"}, 202 1.3.2.2 kardel {0x0028, "DCB version is unsupported"}, 203 1.3.2.2 kardel {0x0029, "Background verify started"}, 204 1.3.2.2 kardel {0x002A, "Background verify failed"}, 205 1.3.2.2 kardel {0x002B, "Background verify done"}, 206 1.3.2.2 kardel {0x002C, "Bad sector overwritten during rebuild"}, 207 1.3.2.2 kardel {0x002E, "Replace failed because replacement drive too small"}, 208 1.3.2.2 kardel {0x002F, "Verify failed because array was never initialized"}, 209 1.3.2.2 kardel {0x0030, "Unsupported ATA drive"}, 210 1.3.2.2 kardel {0x0031, "Synchronize host/controller time"}, 211 1.3.2.2 kardel {0x0032, "Spare capacity is inadequate for some units"}, 212 1.3.2.2 kardel {0x0033, "Background migration started"}, 213 1.3.2.2 kardel {0x0034, "Background migration failed"}, 214 1.3.2.2 kardel {0x0035, "Background migration done"}, 215 1.3.2.2 kardel {0x0036, "Verify detected and fixed data/parity mismatch"}, 216 1.3.2.2 kardel {0x0037, "SO-DIMM incompatible"}, 217 1.3.2.2 kardel {0x0038, "SO-DIMM not detected"}, 218 1.3.2.2 kardel {0x0039, "Corrected Sbuf ECC error"}, 219 1.3.2.2 kardel {0x003A, "Drive power on reset detected"}, 220 1.3.2.2 kardel {0x003B, "Background rebuild paused"}, 221 1.3.2.2 kardel {0x003C, "Background initialize paused"}, 222 1.3.2.2 kardel {0x003D, "Background verify paused"}, 223 1.3.2.2 kardel {0x003E, "Background migration paused"}, 224 1.3.2.2 kardel {0x003F, "Corrupt flash file system detected"}, 225 1.3.2.2 kardel {0x0040, "Flash file system repaired"}, 226 1.3.2.2 kardel {0x0041, "Unit number assignments were lost"}, 227 1.3.2.2 kardel {0x0042, "Error during read of primary DCB"}, 228 1.3.2.2 kardel {0x0043, "Latent error found in backup DCB"}, 229 1.3.2.2 kardel {0x0044, "Battery voltage is normal"}, 230 1.3.2.2 kardel {0x0045, "Battery voltage is low"}, 231 1.3.2.2 kardel {0x0046, "Battery voltage is high"}, 232 1.3.2.2 kardel {0x0047, "Battery voltage is too low"}, 233 1.3.2.2 kardel {0x0048, "Battery voltage is too high"}, 234 1.3.2.2 kardel {0x0049, "Battery temperature is normal"}, 235 1.3.2.2 kardel {0x004A, "Battery temperature is low"}, 236 1.3.2.2 kardel {0x004B, "Battery temperature is high"}, 237 1.3.2.2 kardel {0x004C, "Battery temperature is too low"}, 238 1.3.2.2 kardel {0x004D, "Battery temperature is too high"}, 239 1.3.2.2 kardel {0x004E, "Battery capacity test started"}, 240 1.3.2.2 kardel {0x004F, "Cache synchronization skipped"}, 241 1.3.2.2 kardel {0x0050, "Battery capacity test completed"}, 242 1.3.2.2 kardel {0x0051, "Battery health check started"}, 243 1.3.2.2 kardel {0x0052, "Battery health check completed"}, 244 1.3.2.2 kardel {0x0053, "Need to do a capacity test"}, 245 1.3.2.2 kardel {0x0054, "Charge termination voltage is at high level"}, 246 1.3.2.2 kardel {0x0055, "Battery charging started"}, 247 1.3.2.2 kardel {0x0056, "Battery charging completed"}, 248 1.3.2.2 kardel {0x0057, "Battery charging fault"}, 249 1.3.2.2 kardel {0x0058, "Battery capacity is below warning level"}, 250 1.3.2.2 kardel {0x0059, "Battery capacity is below error level"}, 251 1.3.2.2 kardel {0x005A, "Battery is present"}, 252 1.3.2.2 kardel {0x005B, "Battery is not present"}, 253 1.3.2.2 kardel {0x005C, "Battery is weak"}, 254 1.3.2.2 kardel {0x005D, "Battery health check failed"}, 255 1.3.2.2 kardel {0x005E, "Cache synchronized after power fail"}, 256 1.3.2.2 kardel {0x005F, "Cache synchronization failed; some data lost"}, 257 1.3.2.2 kardel {0x0060, "Bad cache meta data checksum"}, 258 1.3.2.2 kardel {0x0061, "Bad cache meta data signature"}, 259 1.3.2.2 kardel {0x0062, "Cache meta data restore failed"}, 260 1.3.2.2 kardel {0x0063, "BBU not found after power fail"}, 261 1.3.2.2 kardel {0x00FC, "Recovered/finished array membership update"}, 262 1.3.2.2 kardel {0x00FD, "Handler lockup"}, 263 1.3.2.2 kardel {0x00FE, "Retrying PCI transfer"}, 264 1.3.2.2 kardel {0x00FF, "AEN queue is full"}, 265 1.3.2.2 kardel {0xFFFFFFFF, (char *)NULL} 266 1.3.2.2 kardel }; 267 1.3.2.2 kardel 268 1.3.2.2 kardel /* AEN severity table. */ 269 1.3.2.2 kardel static const char *twa_aen_severity_table[] = { 270 1.3.2.2 kardel "None", 271 1.3.2.2 kardel "ERROR", 272 1.3.2.2 kardel "WARNING", 273 1.3.2.2 kardel "INFO", 274 1.3.2.2 kardel "DEBUG", 275 1.3.2.2 kardel (char *)NULL 276 1.3.2.2 kardel }; 277 1.3.2.2 kardel 278 1.3.2.2 kardel /* Error messages. */ 279 1.3.2.2 kardel static const struct twa_message twa_error_table[] = { 280 1.3.2.2 kardel {0x0100, "SGL entry contains zero data"}, 281 1.3.2.2 kardel {0x0101, "Invalid command opcode"}, 282 1.3.2.2 kardel {0x0102, "SGL entry has unaligned address"}, 283 1.3.2.2 kardel {0x0103, "SGL size does not match command"}, 284 1.3.2.2 kardel {0x0104, "SGL entry has illegal length"}, 285 1.3.2.2 kardel {0x0105, "Command packet is not aligned"}, 286 1.3.2.2 kardel {0x0106, "Invalid request ID"}, 287 1.3.2.2 kardel {0x0107, "Duplicate request ID"}, 288 1.3.2.2 kardel {0x0108, "ID not locked"}, 289 1.3.2.2 kardel {0x0109, "LBA out of range"}, 290 1.3.2.2 kardel {0x010A, "Logical unit not supported"}, 291 1.3.2.2 kardel {0x010B, "Parameter table does not exist"}, 292 1.3.2.2 kardel {0x010C, "Parameter index does not exist"}, 293 1.3.2.2 kardel {0x010D, "Invalid field in CDB"}, 294 1.3.2.2 kardel {0x010E, "Specified port has invalid drive"}, 295 1.3.2.2 kardel {0x010F, "Parameter item size mismatch"}, 296 1.3.2.2 kardel {0x0110, "Failed memory allocation"}, 297 1.3.2.2 kardel {0x0111, "Memory request too large"}, 298 1.3.2.2 kardel {0x0112, "Out of memory segments"}, 299 1.3.2.2 kardel {0x0113, "Invalid address to deallocate"}, 300 1.3.2.2 kardel {0x0114, "Out of memory"}, 301 1.3.2.2 kardel {0x0115, "Out of heap"}, 302 1.3.2.2 kardel {0x0120, "Double degrade"}, 303 1.3.2.2 kardel {0x0121, "Drive not degraded"}, 304 1.3.2.2 kardel {0x0122, "Reconstruct error"}, 305 1.3.2.2 kardel {0x0123, "Replace not accepted"}, 306 1.3.2.2 kardel {0x0124, "Replace drive capacity too small"}, 307 1.3.2.2 kardel {0x0125, "Sector count not allowed"}, 308 1.3.2.2 kardel {0x0126, "No spares left"}, 309 1.3.2.2 kardel {0x0127, "Reconstruct error"}, 310 1.3.2.2 kardel {0x0128, "Unit is offline"}, 311 1.3.2.2 kardel {0x0129, "Cannot update status to DCB"}, 312 1.3.2.2 kardel {0x0130, "Invalid stripe handle"}, 313 1.3.2.2 kardel {0x0131, "Handle that was not locked"}, 314 1.3.2.2 kardel {0x0132, "Handle that was not empy"}, 315 1.3.2.2 kardel {0x0133, "Handle has different owner"}, 316 1.3.2.2 kardel {0x0140, "IPR has parent"}, 317 1.3.2.2 kardel {0x0150, "Illegal Pbuf address alignment"}, 318 1.3.2.2 kardel {0x0151, "Illegal Pbuf transfer length"}, 319 1.3.2.2 kardel {0x0152, "Illegal Sbuf address alignment"}, 320 1.3.2.2 kardel {0x0153, "Illegal Sbuf transfer length"}, 321 1.3.2.2 kardel {0x0160, "Command packet too large"}, 322 1.3.2.2 kardel {0x0161, "SGL exceeds maximum length"}, 323 1.3.2.2 kardel {0x0162, "SGL has too many entries"}, 324 1.3.2.2 kardel {0x0170, "Insufficient resources for rebuilder"}, 325 1.3.2.2 kardel {0x0171, "Verify error (data != parity)"}, 326 1.3.2.2 kardel {0x0180, "Requested segment not in directory of this DCB"}, 327 1.3.2.2 kardel {0x0181, "DCB segment has unsupported version"}, 328 1.3.2.2 kardel {0x0182, "DCB segment has checksum error"}, 329 1.3.2.2 kardel {0x0183, "DCB support (settings) segment invalid"}, 330 1.3.2.2 kardel {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 331 1.3.2.2 kardel {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 332 1.3.2.2 kardel {0x01A0, "Could not clear Sbuf"}, 333 1.3.2.2 kardel {0x01C0, "Flash identify failed"}, 334 1.3.2.2 kardel {0x01C1, "Flash out of bounds"}, 335 1.3.2.2 kardel {0x01C2, "Flash verify error"}, 336 1.3.2.2 kardel {0x01C3, "Flash file object not found"}, 337 1.3.2.2 kardel {0x01C4, "Flash file already present"}, 338 1.3.2.2 kardel {0x01C5, "Flash file system full"}, 339 1.3.2.2 kardel {0x01C6, "Flash file not present"}, 340 1.3.2.2 kardel {0x01C7, "Flash file size error"}, 341 1.3.2.2 kardel {0x01C8, "Bad flash file checksum"}, 342 1.3.2.2 kardel {0x01CA, "Corrupt flash file system detected"}, 343 1.3.2.2 kardel {0x01D0, "Invalid field in parameter list"}, 344 1.3.2.2 kardel {0x01D1, "Parameter list length error"}, 345 1.3.2.2 kardel {0x01D2, "Parameter item is not changeable"}, 346 1.3.2.2 kardel {0x01D3, "Parameter item is not saveable"}, 347 1.3.2.2 kardel {0x0200, "UDMA CRC error"}, 348 1.3.2.2 kardel {0x0201, "Internal CRC error"}, 349 1.3.2.2 kardel {0x0202, "Data ECC error"}, 350 1.3.2.2 kardel {0x0203, "ADP level 1 error"}, 351 1.3.2.2 kardel {0x0204, "Port timeout"}, 352 1.3.2.2 kardel {0x0205, "Drive power on reset"}, 353 1.3.2.2 kardel {0x0206, "ADP level 2 error"}, 354 1.3.2.2 kardel {0x0207, "Soft reset failed"}, 355 1.3.2.2 kardel {0x0208, "Drive not ready"}, 356 1.3.2.2 kardel {0x0209, "Unclassified port error"}, 357 1.3.2.2 kardel {0x020A, "Drive aborted command"}, 358 1.3.2.2 kardel {0x0210, "Internal CRC error"}, 359 1.3.2.2 kardel {0x0211, "Host PCI bus abort"}, 360 1.3.2.2 kardel {0x0212, "Host PCI parity error"}, 361 1.3.2.2 kardel {0x0213, "Port handler error"}, 362 1.3.2.2 kardel {0x0214, "Token interrupt count error"}, 363 1.3.2.2 kardel {0x0215, "Timeout waiting for PCI transfer"}, 364 1.3.2.2 kardel {0x0216, "Corrected buffer ECC"}, 365 1.3.2.2 kardel {0x0217, "Uncorrected buffer ECC"}, 366 1.3.2.2 kardel {0x0230, "Unsupported command during flash recovery"}, 367 1.3.2.2 kardel {0x0231, "Next image buffer expected"}, 368 1.3.2.2 kardel {0x0232, "Binary image architecture incompatible"}, 369 1.3.2.2 kardel {0x0233, "Binary image has no signature"}, 370 1.3.2.2 kardel {0x0234, "Binary image has bad checksum"}, 371 1.3.2.2 kardel {0x0235, "Image downloaded overflowed buffer"}, 372 1.3.2.2 kardel {0x0240, "I2C device not found"}, 373 1.3.2.2 kardel {0x0241, "I2C transaction aborted"}, 374 1.3.2.2 kardel {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 375 1.3.2.2 kardel {0x0243, "SO-DIMM unsupported"}, 376 1.3.2.2 kardel {0x0248, "SPI transfer status error"}, 377 1.3.2.2 kardel {0x0249, "SPI transfer timeout error"}, 378 1.3.2.2 kardel {0x0250, "Invalid unit descriptor size in CreateUnit"}, 379 1.3.2.2 kardel {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 380 1.3.2.2 kardel {0x0252, "Invalid value in CreateUnit descriptor"}, 381 1.3.2.2 kardel {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 382 1.3.2.2 kardel {0x0254, "Unable to create data channel for this unit descriptor"}, 383 1.3.2.2 kardel {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 384 1.3.2.2 kardel {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 385 1.3.2.2 kardel {0x0257, "CreateUnit does not support this descriptor version"}, 386 1.3.2.2 kardel {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 387 1.3.2.2 kardel {0x0259, "Too many descriptors in CreateUnit"}, 388 1.3.2.2 kardel {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 389 1.3.2.2 kardel {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 390 1.3.2.2 kardel {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 391 1.3.2.2 kardel {0x0260, "SMART attribute exceeded threshold"}, 392 1.3.2.2 kardel {0xFFFFFFFF, (char *)NULL} 393 1.3.2.2 kardel }; 394 1.3.2.2 kardel 395 1.3.2.2 kardel struct twa_pci_identity { 396 1.3.2.2 kardel uint32_t vendor_id; 397 1.3.2.2 kardel uint32_t product_id; 398 1.3.2.2 kardel const char *name; 399 1.3.2.2 kardel }; 400 1.3.2.2 kardel 401 1.3.2.2 kardel static const struct twa_pci_identity pci_twa_products[] = { 402 1.3.2.2 kardel { PCI_VENDOR_3WARE, 403 1.3.2.2 kardel PCI_PRODUCT_3WARE_9000, 404 1.3.2.2 kardel "3ware 9000 series", 405 1.3.2.2 kardel }, 406 1.3.2.2 kardel { PCI_VENDOR_3WARE, 407 1.3.2.2 kardel PCI_PRODUCT_3WARE_9550, 408 1.3.2.2 kardel "3ware 9550SX series", 409 1.3.2.2 kardel }, 410 1.3.2.2 kardel { 0, 411 1.3.2.2 kardel 0, 412 1.3.2.2 kardel NULL, 413 1.3.2.2 kardel }, 414 1.3.2.2 kardel }; 415 1.3.2.2 kardel 416 1.3.2.2 kardel 417 1.3.2.2 kardel static inline void 418 1.3.2.2 kardel twa_outl(struct twa_softc *sc, int off, u_int32_t val) 419 1.3.2.2 kardel { 420 1.3.2.2 kardel bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 421 1.3.2.2 kardel bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 422 1.3.2.2 kardel BUS_SPACE_BARRIER_WRITE); 423 1.3.2.2 kardel } 424 1.3.2.2 kardel 425 1.3.2.2 kardel 426 1.3.2.2 kardel static inline u_int32_t twa_inl(struct twa_softc *sc, int off) 427 1.3.2.2 kardel { 428 1.3.2.2 kardel bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 429 1.3.2.2 kardel BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 430 1.3.2.2 kardel return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 431 1.3.2.2 kardel } 432 1.3.2.2 kardel 433 1.3.2.2 kardel void 434 1.3.2.2 kardel twa_request_wait_handler(struct twa_request *tr) 435 1.3.2.2 kardel { 436 1.3.2.2 kardel wakeup(tr); 437 1.3.2.2 kardel } 438 1.3.2.2 kardel 439 1.3.2.2 kardel 440 1.3.2.2 kardel static int 441 1.3.2.2 kardel twa_match(struct device *parent, struct cfdata *cfdata, void *aux) 442 1.3.2.2 kardel { 443 1.3.2.2 kardel int i; 444 1.3.2.2 kardel struct pci_attach_args *pa = aux; 445 1.3.2.2 kardel const struct twa_pci_identity *entry = 0; 446 1.3.2.2 kardel 447 1.3.2.2 kardel if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 448 1.3.2.2 kardel for (i = 0; (pci_twa_products[i].product_id); i++) { 449 1.3.2.2 kardel entry = &pci_twa_products[i]; 450 1.3.2.2 kardel if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 451 1.3.2.2 kardel aprint_normal("%s: (rev. 0x%02x)\n", 452 1.3.2.2 kardel entry->name, PCI_REVISION(pa->pa_class)); 453 1.3.2.2 kardel return (1); 454 1.3.2.2 kardel } 455 1.3.2.2 kardel } 456 1.3.2.2 kardel } 457 1.3.2.2 kardel return (0); 458 1.3.2.2 kardel } 459 1.3.2.2 kardel 460 1.3.2.2 kardel 461 1.3.2.2 kardel static const char * 462 1.3.2.2 kardel twa_find_msg_string(const struct twa_message *table, u_int16_t code) 463 1.3.2.2 kardel { 464 1.3.2.2 kardel int i; 465 1.3.2.2 kardel 466 1.3.2.2 kardel for (i = 0; table[i].message != NULL; i++) 467 1.3.2.2 kardel if (table[i].code == code) 468 1.3.2.2 kardel return(table[i].message); 469 1.3.2.2 kardel 470 1.3.2.2 kardel return(table[i].message); 471 1.3.2.2 kardel } 472 1.3.2.2 kardel 473 1.3.2.2 kardel 474 1.3.2.2 kardel void 475 1.3.2.2 kardel twa_release_request(struct twa_request *tr) 476 1.3.2.2 kardel { 477 1.3.2.2 kardel int s; 478 1.3.2.2 kardel struct twa_softc *sc; 479 1.3.2.2 kardel 480 1.3.2.2 kardel sc = tr->tr_sc; 481 1.3.2.2 kardel 482 1.3.2.2 kardel if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 483 1.3.2.2 kardel s = splbio(); 484 1.3.2.2 kardel TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 485 1.3.2.2 kardel splx(s); 486 1.3.2.2 kardel if (__predict_false((tr->tr_sc->twa_sc_flags & 487 1.3.2.2 kardel TWA_STATE_REQUEST_WAIT) != 0)) { 488 1.3.2.2 kardel tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 489 1.3.2.2 kardel wakeup(&sc->twa_free); 490 1.3.2.2 kardel } 491 1.3.2.2 kardel } else 492 1.3.2.2 kardel tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 493 1.3.2.2 kardel } 494 1.3.2.2 kardel 495 1.3.2.2 kardel 496 1.3.2.2 kardel static void 497 1.3.2.2 kardel twa_unmap_request(struct twa_request *tr) 498 1.3.2.2 kardel { 499 1.3.2.2 kardel struct twa_softc *sc = tr->tr_sc; 500 1.3.2.2 kardel u_int8_t cmd_status; 501 1.3.2.2 kardel 502 1.3.2.2 kardel /* If the command involved data, unmap that too. */ 503 1.3.2.2 kardel if (tr->tr_data != NULL) { 504 1.3.2.2 kardel if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 505 1.3.2.2 kardel cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 506 1.3.2.2 kardel else 507 1.3.2.2 kardel cmd_status = 508 1.3.2.2 kardel tr->tr_command->command.cmd_pkt_7k.generic.status; 509 1.3.2.2 kardel 510 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_OUT) { 511 1.3.2.2 kardel bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 512 1.3.2.2 kardel 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 513 1.3.2.2 kardel /* 514 1.3.2.2 kardel * If we are using a bounce buffer, and we are reading 515 1.3.2.2 kardel * data, copy the real data in. 516 1.3.2.2 kardel */ 517 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 518 1.3.2.2 kardel if (cmd_status == 0) 519 1.3.2.2 kardel memcpy(tr->tr_real_data, tr->tr_data, 520 1.3.2.2 kardel tr->tr_real_length); 521 1.3.2.2 kardel } 522 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_IN) 523 1.3.2.2 kardel bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 524 1.3.2.2 kardel 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 525 1.3.2.2 kardel 526 1.3.2.2 kardel bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 527 1.3.2.2 kardel } 528 1.3.2.2 kardel 529 1.3.2.2 kardel /* Free alignment buffer if it was used. */ 530 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 531 1.3.2.2 kardel uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 532 1.3.2.2 kardel tr->tr_length, UVM_KMF_WIRED); 533 1.3.2.2 kardel tr->tr_data = tr->tr_real_data; 534 1.3.2.2 kardel tr->tr_length = tr->tr_real_length; 535 1.3.2.2 kardel } 536 1.3.2.2 kardel } 537 1.3.2.2 kardel 538 1.3.2.2 kardel 539 1.3.2.2 kardel /* 540 1.3.2.2 kardel * Function name: twa_wait_request 541 1.3.2.2 kardel * Description: Sends down a firmware cmd, and waits for the completion, 542 1.3.2.2 kardel * but NOT in a tight loop. 543 1.3.2.2 kardel * 544 1.3.2.2 kardel * Input: tr -- ptr to request pkt 545 1.3.2.2 kardel * timeout -- max # of seconds to wait before giving up 546 1.3.2.2 kardel * Output: None 547 1.3.2.2 kardel * Return value: 0 -- success 548 1.3.2.2 kardel * non-zero-- failure 549 1.3.2.2 kardel */ 550 1.3.2.2 kardel static int 551 1.3.2.2 kardel twa_wait_request(struct twa_request *tr, u_int32_t timeout) 552 1.3.2.2 kardel { 553 1.3.2.2 kardel time_t end_time; 554 1.3.2.2 kardel struct timeval t1; 555 1.3.2.2 kardel int s, error; 556 1.3.2.2 kardel 557 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 558 1.3.2.2 kardel tr->tr_callback = twa_request_wait_handler; 559 1.3.2.2 kardel tr->tr_status = TWA_CMD_BUSY; 560 1.3.2.2 kardel 561 1.3.2.2 kardel if ((error = twa_map_request(tr))) 562 1.3.2.2 kardel return (error); 563 1.3.2.2 kardel 564 1.3.2.2 kardel microtime(&t1); 565 1.3.2.2 kardel end_time = t1.tv_usec + 566 1.3.2.2 kardel (timeout * 1000 * 100); 567 1.3.2.2 kardel 568 1.3.2.2 kardel while (tr->tr_status != TWA_CMD_COMPLETE) { 569 1.3.2.2 kardel if ((error = tr->tr_error)) 570 1.3.2.2 kardel return(error); 571 1.3.2.2 kardel if ((error = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 572 1.3.2.2 kardel { 573 1.3.2.2 kardel error = (tr->tr_status != TWA_CMD_COMPLETE); 574 1.3.2.2 kardel break; 575 1.3.2.2 kardel } 576 1.3.2.2 kardel if (error == EWOULDBLOCK) { 577 1.3.2.2 kardel /* 578 1.3.2.2 kardel * We will reset the controller only if the request has 579 1.3.2.2 kardel * already been submitted, so as to not lose the 580 1.3.2.2 kardel * request packet. If a busy request timed out, the 581 1.3.2.2 kardel * reset will take care of freeing resources. If a 582 1.3.2.2 kardel * pending request timed out, we will free resources 583 1.3.2.2 kardel * for that request, right here. So, the caller is 584 1.3.2.2 kardel * expected to NOT cleanup when ETIMEDOUT is returned. 585 1.3.2.2 kardel */ 586 1.3.2.2 kardel if (tr->tr_status != TWA_CMD_PENDING && 587 1.3.2.2 kardel tr->tr_status != TWA_CMD_COMPLETE) 588 1.3.2.2 kardel twa_reset(tr->tr_sc); 589 1.3.2.2 kardel else { 590 1.3.2.2 kardel /* Request was never submitted. Clean up. */ 591 1.3.2.2 kardel s = splbio(); 592 1.3.2.2 kardel TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 593 1.3.2.2 kardel splx(s); 594 1.3.2.2 kardel 595 1.3.2.2 kardel twa_unmap_request(tr); 596 1.3.2.2 kardel if (tr->tr_data) 597 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 598 1.3.2.2 kardel 599 1.3.2.2 kardel twa_release_request(tr); 600 1.3.2.2 kardel } 601 1.3.2.2 kardel return(ETIMEDOUT); 602 1.3.2.2 kardel } 603 1.3.2.2 kardel /* 604 1.3.2.2 kardel * Either the request got completed, or we were woken up by a 605 1.3.2.2 kardel * signal. Calculate the new timeout, in case it was the latter. 606 1.3.2.2 kardel */ 607 1.3.2.2 kardel microtime(&t1); 608 1.3.2.2 kardel 609 1.3.2.2 kardel timeout = (end_time - t1.tv_usec) / (1000 * 100); 610 1.3.2.2 kardel } 611 1.3.2.2 kardel twa_unmap_request(tr); 612 1.3.2.2 kardel return(error); 613 1.3.2.2 kardel } 614 1.3.2.2 kardel 615 1.3.2.2 kardel 616 1.3.2.2 kardel /* 617 1.3.2.2 kardel * Function name: twa_immediate_request 618 1.3.2.2 kardel * Description: Sends down a firmware cmd, and waits for the completion 619 1.3.2.2 kardel * in a tight loop. 620 1.3.2.2 kardel * 621 1.3.2.2 kardel * Input: tr -- ptr to request pkt 622 1.3.2.2 kardel * timeout -- max # of seconds to wait before giving up 623 1.3.2.2 kardel * Output: None 624 1.3.2.2 kardel * Return value: 0 -- success 625 1.3.2.2 kardel * non-zero-- failure 626 1.3.2.2 kardel */ 627 1.3.2.2 kardel static int 628 1.3.2.2 kardel twa_immediate_request(struct twa_request *tr, u_int32_t timeout) 629 1.3.2.2 kardel { 630 1.3.2.2 kardel struct timeval t1; 631 1.3.2.2 kardel int s = 0, error = 0; 632 1.3.2.2 kardel 633 1.3.2.2 kardel if ((error = twa_map_request(tr))) { 634 1.3.2.2 kardel return(error); 635 1.3.2.2 kardel } 636 1.3.2.2 kardel 637 1.3.2.2 kardel timeout = (timeout * 10000 * 10); 638 1.3.2.2 kardel 639 1.3.2.2 kardel microtime(&t1); 640 1.3.2.2 kardel 641 1.3.2.2 kardel timeout += t1.tv_usec; 642 1.3.2.2 kardel 643 1.3.2.2 kardel do { 644 1.3.2.2 kardel if ((error = tr->tr_error)) 645 1.3.2.2 kardel return(error); 646 1.3.2.2 kardel twa_done(tr->tr_sc); 647 1.3.2.2 kardel if ((tr->tr_status != TWA_CMD_BUSY) && 648 1.3.2.2 kardel (tr->tr_status != TWA_CMD_PENDING)) { 649 1.3.2.2 kardel twa_unmap_request(tr); 650 1.3.2.2 kardel return(tr->tr_status != TWA_CMD_COMPLETE); 651 1.3.2.2 kardel } 652 1.3.2.2 kardel microtime(&t1); 653 1.3.2.2 kardel } while (t1.tv_usec <= timeout); 654 1.3.2.2 kardel 655 1.3.2.2 kardel /* 656 1.3.2.2 kardel * We will reset the controller only if the request has 657 1.3.2.2 kardel * already been submitted, so as to not lose the 658 1.3.2.2 kardel * request packet. If a busy request timed out, the 659 1.3.2.2 kardel * reset will take care of freeing resources. If a 660 1.3.2.2 kardel * pending request timed out, we will free resources 661 1.3.2.2 kardel * for that request, right here. So, the caller is 662 1.3.2.2 kardel * expected to NOT cleanup when ETIMEDOUT is returned. 663 1.3.2.2 kardel */ 664 1.3.2.2 kardel if (tr->tr_status != TWA_CMD_PENDING) 665 1.3.2.2 kardel twa_reset(tr->tr_sc); 666 1.3.2.2 kardel else { 667 1.3.2.2 kardel /* Request was never submitted. Clean up. */ 668 1.3.2.2 kardel s = splbio(); 669 1.3.2.2 kardel TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 670 1.3.2.2 kardel splx(s); 671 1.3.2.2 kardel twa_unmap_request(tr); 672 1.3.2.2 kardel if (tr->tr_data) 673 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 674 1.3.2.2 kardel 675 1.3.2.2 kardel twa_release_request(tr); 676 1.3.2.2 kardel } 677 1.3.2.2 kardel return(ETIMEDOUT); 678 1.3.2.2 kardel } 679 1.3.2.2 kardel 680 1.3.2.2 kardel 681 1.3.2.2 kardel static int 682 1.3.2.2 kardel twa_inquiry(struct twa_request *tr, int lunid) 683 1.3.2.2 kardel { 684 1.3.2.2 kardel int error; 685 1.3.2.2 kardel struct twa_command_9k *tr_9k_cmd; 686 1.3.2.2 kardel 687 1.3.2.2 kardel if (tr->tr_data == NULL) 688 1.3.2.2 kardel return (ENOMEM); 689 1.3.2.2 kardel 690 1.3.2.2 kardel memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 691 1.3.2.2 kardel 692 1.3.2.2 kardel tr->tr_length = TWA_SECTOR_SIZE; 693 1.3.2.2 kardel tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 694 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_DATA_IN; 695 1.3.2.2 kardel 696 1.3.2.2 kardel tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 697 1.3.2.2 kardel 698 1.3.2.2 kardel tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 699 1.3.2.2 kardel tr_9k_cmd->unit = lunid; 700 1.3.2.2 kardel tr_9k_cmd->request_id = tr->tr_request_id; 701 1.3.2.2 kardel tr_9k_cmd->status = 0; 702 1.3.2.2 kardel tr_9k_cmd->sgl_offset = 16; 703 1.3.2.2 kardel tr_9k_cmd->sgl_entries = 1; 704 1.3.2.2 kardel /* create the CDB here */ 705 1.3.2.2 kardel tr_9k_cmd->cdb[0] = INQUIRY; 706 1.3.2.2 kardel tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 707 1.3.2.2 kardel tr_9k_cmd->cdb[4] = 255; 708 1.3.2.2 kardel 709 1.3.2.2 kardel /* XXXX setup page data no lun device 710 1.3.2.2 kardel * it seems 9000 series does not indicate 711 1.3.2.2 kardel * NOTPRESENT - need more investigation 712 1.3.2.2 kardel */ 713 1.3.2.2 kardel ((struct scsipi_inquiry_data *)tr->tr_data)->device = 714 1.3.2.2 kardel SID_QUAL_LU_NOTPRESENT; 715 1.3.2.2 kardel 716 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 717 1.3.2.2 kardel 718 1.3.2.2 kardel if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 719 1.3.2.2 kardel SID_QUAL_LU_NOTPRESENT) 720 1.3.2.2 kardel error = 1; 721 1.3.2.2 kardel 722 1.3.2.2 kardel return (error); 723 1.3.2.2 kardel } 724 1.3.2.2 kardel 725 1.3.2.2 kardel static int 726 1.3.2.2 kardel twa_print_inquiry_data(struct twa_softc *sc, 727 1.3.2.2 kardel struct scsipi_inquiry_data *scsipi) 728 1.3.2.2 kardel { 729 1.3.2.2 kardel printf("%s: %s\n", sc->twa_dv.dv_xname, scsipi->vendor); 730 1.3.2.2 kardel 731 1.3.2.2 kardel return (1); 732 1.3.2.2 kardel } 733 1.3.2.2 kardel 734 1.3.2.2 kardel 735 1.3.2.2 kardel static uint64_t 736 1.3.2.2 kardel twa_read_capacity(struct twa_request *tr, int lunid) 737 1.3.2.2 kardel { 738 1.3.2.2 kardel int error; 739 1.3.2.2 kardel struct twa_command_9k *tr_9k_cmd; 740 1.3.2.2 kardel uint64_t array_size = 0LL; 741 1.3.2.2 kardel 742 1.3.2.2 kardel if (tr->tr_data == NULL) 743 1.3.2.2 kardel return (ENOMEM); 744 1.3.2.2 kardel 745 1.3.2.2 kardel memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 746 1.3.2.2 kardel 747 1.3.2.2 kardel tr->tr_length = TWA_SECTOR_SIZE; 748 1.3.2.2 kardel tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 749 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_DATA_OUT; 750 1.3.2.2 kardel 751 1.3.2.2 kardel tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 752 1.3.2.2 kardel 753 1.3.2.2 kardel tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 754 1.3.2.2 kardel tr_9k_cmd->unit = lunid; 755 1.3.2.2 kardel tr_9k_cmd->request_id = tr->tr_request_id; 756 1.3.2.2 kardel tr_9k_cmd->status = 0; 757 1.3.2.2 kardel tr_9k_cmd->sgl_offset = 16; 758 1.3.2.2 kardel tr_9k_cmd->sgl_entries = 1; 759 1.3.2.2 kardel /* create the CDB here */ 760 1.3.2.2 kardel tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 761 1.3.2.2 kardel tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 762 1.3.2.2 kardel 763 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 764 1.3.2.2 kardel #if BYTE_ORDER == BIG_ENDIAN 765 1.3.2.2 kardel array_size = bswap64(_8btol(((struct scsipi_read_capacity_16_data *) 766 1.3.2.2 kardel tr->tr_data)->addr) + 1); 767 1.3.2.2 kardel #else 768 1.3.2.2 kardel array_size = _8btol(((struct scsipi_read_capacity_16_data *) 769 1.3.2.2 kardel tr->tr_data)->addr) + 1; 770 1.3.2.2 kardel #endif 771 1.3.2.2 kardel return (array_size); 772 1.3.2.2 kardel } 773 1.3.2.2 kardel 774 1.3.2.2 kardel static int 775 1.3.2.2 kardel twa_request_sense(struct twa_request *tr, int lunid) 776 1.3.2.2 kardel { 777 1.3.2.2 kardel int error = 1; 778 1.3.2.2 kardel struct twa_command_9k *tr_9k_cmd; 779 1.3.2.2 kardel 780 1.3.2.2 kardel if (tr->tr_data == NULL) 781 1.3.2.2 kardel return (error); 782 1.3.2.2 kardel 783 1.3.2.2 kardel memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 784 1.3.2.2 kardel 785 1.3.2.2 kardel tr->tr_length = TWA_SECTOR_SIZE; 786 1.3.2.2 kardel tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 787 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_DATA_OUT; 788 1.3.2.2 kardel 789 1.3.2.2 kardel tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 790 1.3.2.2 kardel 791 1.3.2.2 kardel tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 792 1.3.2.2 kardel tr_9k_cmd->unit = lunid; 793 1.3.2.2 kardel tr_9k_cmd->request_id = tr->tr_request_id; 794 1.3.2.2 kardel tr_9k_cmd->status = 0; 795 1.3.2.2 kardel tr_9k_cmd->sgl_offset = 16; 796 1.3.2.2 kardel tr_9k_cmd->sgl_entries = 1; 797 1.3.2.2 kardel /* create the CDB here */ 798 1.3.2.2 kardel tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 799 1.3.2.2 kardel tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 800 1.3.2.2 kardel tr_9k_cmd->cdb[4] = 255; 801 1.3.2.2 kardel 802 1.3.2.2 kardel /*XXX AEN notification called in interrupt context 803 1.3.2.2 kardel * so just queue the request. Return as quickly 804 1.3.2.2 kardel * as possible from interrupt 805 1.3.2.2 kardel */ 806 1.3.2.2 kardel if ((tr->tr_flags & TWA_CMD_AEN) != 0) 807 1.3.2.2 kardel error = twa_map_request(tr); 808 1.3.2.2 kardel else 809 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 810 1.3.2.2 kardel 811 1.3.2.2 kardel return (error); 812 1.3.2.2 kardel } 813 1.3.2.2 kardel 814 1.3.2.2 kardel 815 1.3.2.2 kardel 816 1.3.2.2 kardel static int 817 1.3.2.2 kardel twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 818 1.3.2.2 kardel { 819 1.3.2.2 kardel struct twa_request *tr; 820 1.3.2.2 kardel struct twa_command_packet *tc; 821 1.3.2.2 kardel bus_dma_segment_t seg; 822 1.3.2.2 kardel size_t max_segs, max_xfer; 823 1.3.2.2 kardel int i, rv, rseg, size; 824 1.3.2.2 kardel 825 1.3.2.2 kardel if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 826 1.3.2.2 kardel M_DEVBUF, M_NOWAIT)) == NULL) 827 1.3.2.2 kardel return(ENOMEM); 828 1.3.2.2 kardel 829 1.3.2.2 kardel size = num_reqs * sizeof(struct twa_command_packet); 830 1.3.2.2 kardel 831 1.3.2.2 kardel /* Allocate memory for cmd pkts. */ 832 1.3.2.2 kardel if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 833 1.3.2.2 kardel size, PAGE_SIZE, 0, &seg, 834 1.3.2.2 kardel 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 835 1.3.2.2 kardel aprint_error("%s: unable to allocate " 836 1.3.2.2 kardel "command packets, rv = %d\n", 837 1.3.2.2 kardel sc->twa_dv.dv_xname, rv); 838 1.3.2.2 kardel return (ENOMEM); 839 1.3.2.2 kardel } 840 1.3.2.2 kardel 841 1.3.2.2 kardel if ((rv = bus_dmamem_map(sc->twa_dma_tag, 842 1.3.2.2 kardel &seg, rseg, size, (caddr_t *)&sc->twa_cmds, 843 1.3.2.2 kardel BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 844 1.3.2.2 kardel aprint_error("%s: unable to map commands, rv = %d\n", 845 1.3.2.2 kardel sc->twa_dv.dv_xname, rv); 846 1.3.2.2 kardel return (1); 847 1.3.2.2 kardel } 848 1.3.2.2 kardel 849 1.3.2.2 kardel if ((rv = bus_dmamap_create(sc->twa_dma_tag, 850 1.3.2.2 kardel size, num_reqs, size, 851 1.3.2.2 kardel 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 852 1.3.2.2 kardel aprint_error("%s: unable to create command DMA map, " 853 1.3.2.2 kardel "rv = %d\n", sc->twa_dv.dv_xname, rv); 854 1.3.2.2 kardel return (ENOMEM); 855 1.3.2.2 kardel } 856 1.3.2.2 kardel 857 1.3.2.2 kardel if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 858 1.3.2.2 kardel sc->twa_cmds, size, NULL, 859 1.3.2.2 kardel BUS_DMA_NOWAIT)) != 0) { 860 1.3.2.2 kardel aprint_error("%s: unable to load command DMA map, " 861 1.3.2.2 kardel "rv = %d\n", sc->twa_dv.dv_xname, rv); 862 1.3.2.2 kardel return (1); 863 1.3.2.2 kardel } 864 1.3.2.2 kardel 865 1.3.2.2 kardel if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 866 1.3.2.2 kardel aprint_error("%s: DMA map memory not aligned on %d boundary\n", 867 1.3.2.2 kardel sc->twa_dv.dv_xname, TWA_ALIGNMENT); 868 1.3.2.2 kardel 869 1.3.2.2 kardel return (1); 870 1.3.2.2 kardel } 871 1.3.2.2 kardel tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 872 1.3.2.2 kardel sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 873 1.3.2.2 kardel 874 1.3.2.2 kardel memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 875 1.3.2.2 kardel memset(sc->twa_cmd_pkt_buf, 0, 876 1.3.2.2 kardel num_reqs * sizeof(struct twa_command_packet)); 877 1.3.2.2 kardel 878 1.3.2.2 kardel sc->sc_twa_request = sc->twa_req_buf; 879 1.3.2.2 kardel max_segs = twa_get_maxsegs(); 880 1.3.2.2 kardel max_xfer = twa_get_maxxfer(max_segs); 881 1.3.2.2 kardel 882 1.3.2.2 kardel for (i = 0; i < num_reqs; i++, tc++) { 883 1.3.2.2 kardel tr = &(sc->twa_req_buf[i]); 884 1.3.2.2 kardel tr->tr_command = tc; 885 1.3.2.2 kardel tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 886 1.3.2.2 kardel (i * sizeof(struct twa_command_packet)); 887 1.3.2.2 kardel tr->tr_request_id = i; 888 1.3.2.2 kardel tr->tr_sc = sc; 889 1.3.2.2 kardel 890 1.3.2.2 kardel /* 891 1.3.2.2 kardel * Create a map for data buffers. maxsize (256 * 1024) used in 892 1.3.2.2 kardel * bus_dma_tag_create above should suffice the bounce page needs 893 1.3.2.2 kardel * for data buffers, since the max I/O size we support is 128KB. 894 1.3.2.2 kardel * If we supported I/O's bigger than 256KB, we would have to 895 1.3.2.2 kardel * create a second dma_tag, with the appropriate maxsize. 896 1.3.2.2 kardel */ 897 1.3.2.2 kardel if ((rv = bus_dmamap_create(sc->twa_dma_tag, 898 1.3.2.2 kardel max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 899 1.3.2.2 kardel &tr->tr_dma_map)) != 0) { 900 1.3.2.2 kardel aprint_error("%s: unable to create command " 901 1.3.2.2 kardel "DMA map, rv = %d\n", 902 1.3.2.2 kardel sc->twa_dv.dv_xname, rv); 903 1.3.2.2 kardel return (ENOMEM); 904 1.3.2.2 kardel } 905 1.3.2.2 kardel /* Insert request into the free queue. */ 906 1.3.2.2 kardel if (i != 0) { 907 1.3.2.2 kardel sc->twa_lookup[i] = tr; 908 1.3.2.2 kardel twa_release_request(tr); 909 1.3.2.2 kardel } else 910 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_AEN; 911 1.3.2.2 kardel } 912 1.3.2.2 kardel return(0); 913 1.3.2.2 kardel } 914 1.3.2.2 kardel 915 1.3.2.2 kardel 916 1.3.2.2 kardel static void 917 1.3.2.2 kardel twa_recompute_openings(struct twa_softc *sc) 918 1.3.2.2 kardel { 919 1.3.2.2 kardel struct twa_drive *td; 920 1.3.2.2 kardel int unit; 921 1.3.2.2 kardel int openings; 922 1.3.2.2 kardel 923 1.3.2.2 kardel if (sc->sc_nunits != 0) 924 1.3.2.2 kardel openings = ((TWA_Q_LENGTH / 2) / sc->sc_nunits); 925 1.3.2.2 kardel else 926 1.3.2.2 kardel openings = 0; 927 1.3.2.2 kardel if (openings == sc->sc_openings) 928 1.3.2.2 kardel return; 929 1.3.2.2 kardel sc->sc_openings = openings; 930 1.3.2.2 kardel 931 1.3.2.2 kardel #ifdef TWA_DEBUG 932 1.3.2.2 kardel printf("%s: %d array%s, %d openings per array\n", 933 1.3.2.2 kardel sc->sc_twa.dv_xname, sc->sc_nunits, 934 1.3.2.2 kardel sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 935 1.3.2.2 kardel #endif 936 1.3.2.2 kardel for (unit = 0; unit < TWA_MAX_UNITS; unit++) { 937 1.3.2.2 kardel td = &sc->sc_units[unit]; 938 1.3.2.2 kardel if (td->td_dev != NULL) 939 1.3.2.2 kardel (*td->td_callbacks->tcb_openings)(td->td_dev, 940 1.3.2.2 kardel sc->sc_openings); 941 1.3.2.2 kardel } 942 1.3.2.2 kardel } 943 1.3.2.2 kardel 944 1.3.2.2 kardel 945 1.3.2.2 kardel static int 946 1.3.2.2 kardel twa_request_bus_scan(struct twa_softc *sc) 947 1.3.2.2 kardel { 948 1.3.2.2 kardel struct twa_drive *td; 949 1.3.2.2 kardel struct twa_request *tr; 950 1.3.2.2 kardel struct twa_attach_args twaa; 951 1.3.2.2 kardel int locs[TWACF_NLOCS]; 952 1.3.2.2 kardel int s, unit; 953 1.3.2.2 kardel 954 1.3.2.2 kardel s = splbio(); 955 1.3.2.2 kardel for (unit = 0; unit < TWA_MAX_UNITS; unit++) { 956 1.3.2.2 kardel 957 1.3.2.2 kardel if ((tr = twa_get_request(sc, 0)) == NULL) { 958 1.3.2.2 kardel splx(s); 959 1.3.2.2 kardel return (EIO); 960 1.3.2.2 kardel } 961 1.3.2.2 kardel 962 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 963 1.3.2.2 kardel 964 1.3.2.2 kardel tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 965 1.3.2.2 kardel 966 1.3.2.2 kardel if (tr->tr_data == NULL) { 967 1.3.2.2 kardel twa_release_request(tr); 968 1.3.2.2 kardel splx(s); 969 1.3.2.2 kardel return (ENOMEM); 970 1.3.2.2 kardel } 971 1.3.2.2 kardel td = &sc->sc_units[unit]; 972 1.3.2.2 kardel 973 1.3.2.2 kardel if (twa_inquiry(tr, unit) == 0) { 974 1.3.2.2 kardel 975 1.3.2.2 kardel if (td->td_dev == NULL) { 976 1.3.2.2 kardel twa_print_inquiry_data(sc, 977 1.3.2.2 kardel ((struct scsipi_inquiry_data *)tr->tr_data)); 978 1.3.2.2 kardel 979 1.3.2.2 kardel sc->sc_nunits++; 980 1.3.2.2 kardel 981 1.3.2.2 kardel sc->sc_units[unit].td_size = 982 1.3.2.2 kardel twa_read_capacity(tr, unit); 983 1.3.2.2 kardel 984 1.3.2.2 kardel twaa.twaa_unit = unit; 985 1.3.2.2 kardel 986 1.3.2.2 kardel twa_recompute_openings(sc); 987 1.3.2.2 kardel 988 1.3.2.2 kardel locs[TWACF_UNIT] = unit; 989 1.3.2.2 kardel 990 1.3.2.2 kardel sc->sc_units[unit].td_dev = 991 1.3.2.2 kardel config_found_sm_loc(&sc->twa_dv, "twa", locs, 992 1.3.2.2 kardel &twaa, twa_print, config_stdsubmatch); 993 1.3.2.2 kardel } 994 1.3.2.2 kardel } else { 995 1.3.2.2 kardel if (td->td_dev != NULL) { 996 1.3.2.2 kardel 997 1.3.2.2 kardel sc->sc_nunits--; 998 1.3.2.2 kardel 999 1.3.2.2 kardel (void) config_detach(td->td_dev, DETACH_FORCE); 1000 1.3.2.2 kardel td->td_dev = NULL; 1001 1.3.2.2 kardel td->td_size = 0; 1002 1.3.2.2 kardel 1003 1.3.2.2 kardel twa_recompute_openings(sc); 1004 1.3.2.2 kardel } 1005 1.3.2.2 kardel } 1006 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 1007 1.3.2.2 kardel 1008 1.3.2.2 kardel twa_release_request(tr); 1009 1.3.2.2 kardel } 1010 1.3.2.2 kardel splx(s); 1011 1.3.2.2 kardel 1012 1.3.2.2 kardel return (0); 1013 1.3.2.2 kardel } 1014 1.3.2.2 kardel 1015 1.3.2.2 kardel 1016 1.3.2.2 kardel static int 1017 1.3.2.2 kardel twa_start(struct twa_request *tr) 1018 1.3.2.2 kardel { 1019 1.3.2.2 kardel struct twa_softc *sc = tr->tr_sc; 1020 1.3.2.2 kardel u_int32_t status_reg; 1021 1.3.2.2 kardel int s; 1022 1.3.2.2 kardel int error; 1023 1.3.2.2 kardel 1024 1.3.2.2 kardel s = splbio(); 1025 1.3.2.2 kardel /* Check to see if we can post a command. */ 1026 1.3.2.2 kardel status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1027 1.3.2.2 kardel if ((error = twa_check_ctlr_state(sc, status_reg))) 1028 1.3.2.2 kardel goto out; 1029 1.3.2.2 kardel 1030 1.3.2.2 kardel if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1031 1.3.2.2 kardel if (tr->tr_status != TWA_CMD_PENDING) { 1032 1.3.2.2 kardel tr->tr_status = TWA_CMD_PENDING; 1033 1.3.2.2 kardel TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1034 1.3.2.2 kardel tr, tr_link); 1035 1.3.2.2 kardel } 1036 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1037 1.3.2.2 kardel TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1038 1.3.2.2 kardel error = EBUSY; 1039 1.3.2.2 kardel } else { 1040 1.3.2.2 kardel bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1041 1.3.2.2 kardel (caddr_t)tr->tr_command - sc->twa_cmds, 1042 1.3.2.2 kardel sizeof(struct twa_command_packet), 1043 1.3.2.2 kardel BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1044 1.3.2.2 kardel 1045 1.3.2.2 kardel /* Cmd queue is not full. Post the command. */ 1046 1.3.2.2 kardel TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1047 1.3.2.2 kardel sizeof(struct twa_command_header)); 1048 1.3.2.2 kardel 1049 1.3.2.2 kardel /* Mark the request as currently being processed. */ 1050 1.3.2.2 kardel tr->tr_status = TWA_CMD_BUSY; 1051 1.3.2.2 kardel /* Move the request into the busy queue. */ 1052 1.3.2.2 kardel TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1053 1.3.2.2 kardel } 1054 1.3.2.2 kardel out: 1055 1.3.2.2 kardel splx(s); 1056 1.3.2.2 kardel return(error); 1057 1.3.2.2 kardel } 1058 1.3.2.2 kardel 1059 1.3.2.2 kardel 1060 1.3.2.2 kardel static int 1061 1.3.2.2 kardel twa_drain_response_queue(struct twa_softc *sc) 1062 1.3.2.2 kardel { 1063 1.3.2.2 kardel union twa_response_queue rq; 1064 1.3.2.2 kardel u_int32_t status_reg; 1065 1.3.2.2 kardel 1066 1.3.2.2 kardel for (;;) { 1067 1.3.2.2 kardel status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1068 1.3.2.2 kardel if (twa_check_ctlr_state(sc, status_reg)) 1069 1.3.2.2 kardel return(1); 1070 1.3.2.2 kardel if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1071 1.3.2.2 kardel return(0); /* no more response queue entries */ 1072 1.3.2.2 kardel rq = (union twa_response_queue)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1073 1.3.2.2 kardel } 1074 1.3.2.2 kardel } 1075 1.3.2.2 kardel 1076 1.3.2.2 kardel 1077 1.3.2.2 kardel static void 1078 1.3.2.2 kardel twa_drain_busy_queue(struct twa_softc *sc) 1079 1.3.2.2 kardel { 1080 1.3.2.2 kardel struct twa_request *tr; 1081 1.3.2.2 kardel 1082 1.3.2.2 kardel /* Walk the busy queue. */ 1083 1.3.2.2 kardel 1084 1.3.2.2 kardel while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1085 1.3.2.2 kardel TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1086 1.3.2.2 kardel 1087 1.3.2.2 kardel twa_unmap_request(tr); 1088 1.3.2.2 kardel if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1089 1.3.2.2 kardel (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1090 1.3.2.2 kardel /* It's an internal/ioctl request. Simply free it. */ 1091 1.3.2.2 kardel if (tr->tr_data) 1092 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 1093 1.3.2.2 kardel twa_release_request(tr); 1094 1.3.2.2 kardel } else { 1095 1.3.2.2 kardel /* It's a SCSI request. Complete it. */ 1096 1.3.2.2 kardel tr->tr_command->command.cmd_pkt_9k.status = EIO; 1097 1.3.2.2 kardel if (tr->tr_callback) 1098 1.3.2.2 kardel tr->tr_callback(tr); 1099 1.3.2.2 kardel } 1100 1.3.2.2 kardel } 1101 1.3.2.2 kardel } 1102 1.3.2.2 kardel 1103 1.3.2.2 kardel 1104 1.3.2.2 kardel static int 1105 1.3.2.2 kardel twa_drain_pending_queue(struct twa_softc *sc) 1106 1.3.2.2 kardel { 1107 1.3.2.2 kardel struct twa_request *tr; 1108 1.3.2.2 kardel int s, error = 0; 1109 1.3.2.2 kardel 1110 1.3.2.2 kardel /* 1111 1.3.2.2 kardel * Pull requests off the pending queue, and submit them. 1112 1.3.2.2 kardel */ 1113 1.3.2.2 kardel s = splbio(); 1114 1.3.2.2 kardel while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1115 1.3.2.2 kardel TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1116 1.3.2.2 kardel 1117 1.3.2.2 kardel if ((error = twa_start(tr))) { 1118 1.3.2.2 kardel if (error == EBUSY) { 1119 1.3.2.2 kardel tr->tr_status = TWA_CMD_PENDING; 1120 1.3.2.2 kardel 1121 1.3.2.2 kardel /* queue at the head */ 1122 1.3.2.2 kardel TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1123 1.3.2.2 kardel tr, tr_link); 1124 1.3.2.2 kardel error = 0; 1125 1.3.2.2 kardel break; 1126 1.3.2.2 kardel } else { 1127 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1128 1.3.2.2 kardel tr->tr_error = error; 1129 1.3.2.2 kardel tr->tr_callback(tr); 1130 1.3.2.2 kardel error = EIO; 1131 1.3.2.2 kardel } 1132 1.3.2.2 kardel } 1133 1.3.2.2 kardel } 1134 1.3.2.2 kardel } 1135 1.3.2.2 kardel splx(s); 1136 1.3.2.2 kardel 1137 1.3.2.2 kardel return(error); 1138 1.3.2.2 kardel } 1139 1.3.2.2 kardel 1140 1.3.2.2 kardel 1141 1.3.2.2 kardel static int 1142 1.3.2.2 kardel twa_drain_aen_queue(struct twa_softc *sc) 1143 1.3.2.2 kardel { 1144 1.3.2.2 kardel int error = 0; 1145 1.3.2.2 kardel struct twa_request *tr; 1146 1.3.2.2 kardel struct twa_command_header *cmd_hdr; 1147 1.3.2.2 kardel struct timeval t1; 1148 1.3.2.2 kardel u_int32_t timeout; 1149 1.3.2.2 kardel 1150 1.3.2.2 kardel for (;;) { 1151 1.3.2.2 kardel if ((tr = twa_get_request(sc, 0)) == NULL) { 1152 1.3.2.2 kardel error = EIO; 1153 1.3.2.2 kardel break; 1154 1.3.2.2 kardel } 1155 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1156 1.3.2.2 kardel tr->tr_callback = NULL; 1157 1.3.2.2 kardel 1158 1.3.2.2 kardel tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1159 1.3.2.2 kardel 1160 1.3.2.2 kardel if (tr->tr_data == NULL) { 1161 1.3.2.2 kardel error = 1; 1162 1.3.2.2 kardel goto out; 1163 1.3.2.2 kardel } 1164 1.3.2.2 kardel 1165 1.3.2.2 kardel if (twa_request_sense(tr, 0) != 0) { 1166 1.3.2.2 kardel error = 1; 1167 1.3.2.2 kardel break; 1168 1.3.2.2 kardel } 1169 1.3.2.2 kardel 1170 1.3.2.2 kardel timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1171 1.3.2.2 kardel 1172 1.3.2.2 kardel microtime(&t1); 1173 1.3.2.2 kardel 1174 1.3.2.2 kardel timeout += t1.tv_usec; 1175 1.3.2.2 kardel 1176 1.3.2.2 kardel do { 1177 1.3.2.2 kardel twa_done(tr->tr_sc); 1178 1.3.2.2 kardel if (tr->tr_status != TWA_CMD_BUSY) 1179 1.3.2.2 kardel break; 1180 1.3.2.2 kardel microtime(&t1); 1181 1.3.2.2 kardel } while (t1.tv_usec <= timeout); 1182 1.3.2.2 kardel 1183 1.3.2.2 kardel if (tr->tr_status != TWA_CMD_COMPLETE) { 1184 1.3.2.2 kardel error = ETIMEDOUT; 1185 1.3.2.2 kardel break; 1186 1.3.2.2 kardel } 1187 1.3.2.2 kardel 1188 1.3.2.2 kardel if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1189 1.3.2.2 kardel break; 1190 1.3.2.2 kardel 1191 1.3.2.2 kardel cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1192 1.3.2.2 kardel if ((cmd_hdr->status_block.error) /* aen_code */ 1193 1.3.2.2 kardel == TWA_AEN_QUEUE_EMPTY) 1194 1.3.2.2 kardel break; 1195 1.3.2.2 kardel (void)twa_enqueue_aen(sc, cmd_hdr); 1196 1.3.2.2 kardel 1197 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 1198 1.3.2.2 kardel twa_release_request(tr); 1199 1.3.2.2 kardel } 1200 1.3.2.2 kardel out: 1201 1.3.2.2 kardel if (tr) { 1202 1.3.2.2 kardel if (tr->tr_data) 1203 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 1204 1.3.2.2 kardel 1205 1.3.2.2 kardel twa_release_request(tr); 1206 1.3.2.2 kardel } 1207 1.3.2.2 kardel return(error); 1208 1.3.2.2 kardel } 1209 1.3.2.2 kardel 1210 1.3.2.2 kardel 1211 1.3.2.2 kardel static int 1212 1.3.2.2 kardel twa_done(struct twa_softc *sc) 1213 1.3.2.2 kardel { 1214 1.3.2.2 kardel union twa_response_queue rq; 1215 1.3.2.2 kardel struct twa_request *tr; 1216 1.3.2.2 kardel int s, error = 0; 1217 1.3.2.2 kardel u_int32_t status_reg; 1218 1.3.2.2 kardel 1219 1.3.2.2 kardel for (;;) { 1220 1.3.2.2 kardel status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1221 1.3.2.2 kardel if ((error = twa_check_ctlr_state(sc, status_reg))) 1222 1.3.2.2 kardel break; 1223 1.3.2.2 kardel if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1224 1.3.2.2 kardel break; 1225 1.3.2.2 kardel /* Response queue is not empty. */ 1226 1.3.2.2 kardel rq = (union twa_response_queue)twa_inl(sc, 1227 1.3.2.2 kardel TWA_RESPONSE_QUEUE_OFFSET); 1228 1.3.2.2 kardel tr = sc->sc_twa_request + rq.u.response_id; 1229 1.3.2.2 kardel 1230 1.3.2.2 kardel /* Unmap the command packet, and any associated data buffer. */ 1231 1.3.2.2 kardel twa_unmap_request(tr); 1232 1.3.2.2 kardel 1233 1.3.2.2 kardel s = splbio(); 1234 1.3.2.2 kardel tr->tr_status = TWA_CMD_COMPLETE; 1235 1.3.2.2 kardel TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1236 1.3.2.2 kardel splx(s); 1237 1.3.2.2 kardel 1238 1.3.2.2 kardel if (tr->tr_callback) 1239 1.3.2.2 kardel tr->tr_callback(tr); 1240 1.3.2.2 kardel } 1241 1.3.2.2 kardel (void)twa_drain_pending_queue(sc); 1242 1.3.2.2 kardel 1243 1.3.2.2 kardel return(error); 1244 1.3.2.2 kardel } 1245 1.3.2.2 kardel 1246 1.3.2.2 kardel /* 1247 1.3.2.2 kardel * Function name: twa_init_ctlr 1248 1.3.2.2 kardel * Description: Establishes a logical connection with the controller. 1249 1.3.2.2 kardel * If bundled with firmware, determines whether or not 1250 1.3.2.2 kardel * to flash firmware, based on arch_id, fw SRL (Spec. 1251 1.3.2.2 kardel * Revision Level), branch & build #'s. Also determines 1252 1.3.2.2 kardel * whether or not the driver is compatible with the 1253 1.3.2.2 kardel * firmware on the controller, before proceeding to work 1254 1.3.2.2 kardel * with it. 1255 1.3.2.2 kardel * 1256 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 1257 1.3.2.2 kardel * Output: None 1258 1.3.2.2 kardel * Return value: 0 -- success 1259 1.3.2.2 kardel * non-zero-- failure 1260 1.3.2.2 kardel */ 1261 1.3.2.2 kardel static int 1262 1.3.2.2 kardel twa_init_ctlr(struct twa_softc *sc) 1263 1.3.2.2 kardel { 1264 1.3.2.2 kardel u_int16_t fw_on_ctlr_srl = 0; 1265 1.3.2.2 kardel u_int16_t fw_on_ctlr_arch_id = 0; 1266 1.3.2.2 kardel u_int16_t fw_on_ctlr_branch = 0; 1267 1.3.2.2 kardel u_int16_t fw_on_ctlr_build = 0; 1268 1.3.2.2 kardel u_int32_t init_connect_result = 0; 1269 1.3.2.2 kardel int error = 0; 1270 1.3.2.2 kardel #if 0 1271 1.3.2.2 kardel int8_t fw_flashed = FALSE; 1272 1.3.2.2 kardel int8_t fw_flash_failed = FALSE; 1273 1.3.2.2 kardel #endif 1274 1.3.2.2 kardel 1275 1.3.2.2 kardel /* Wait for the controller to become ready. */ 1276 1.3.2.2 kardel if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1277 1.3.2.2 kardel TWA_REQUEST_TIMEOUT_PERIOD)) { 1278 1.3.2.2 kardel return(ENXIO); 1279 1.3.2.2 kardel } 1280 1.3.2.2 kardel /* Drain the response queue. */ 1281 1.3.2.2 kardel if (twa_drain_response_queue(sc)) 1282 1.3.2.2 kardel return(1); 1283 1.3.2.2 kardel 1284 1.3.2.2 kardel /* Establish a logical connection with the controller. */ 1285 1.3.2.2 kardel if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1286 1.3.2.2 kardel TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1287 1.3.2.2 kardel TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1288 1.3.2.2 kardel TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1289 1.3.2.2 kardel &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1290 1.3.2.2 kardel &fw_on_ctlr_build, &init_connect_result))) { 1291 1.3.2.2 kardel return(error); 1292 1.3.2.2 kardel } 1293 1.3.2.2 kardel #if 0 1294 1.3.2.2 kardel if ((init_connect_result & TWA_BUNDLED_FW_SAFE_TO_FLASH) && 1295 1.3.2.2 kardel (init_connect_result & TWA_CTLR_FW_RECOMMENDS_FLASH)) { 1296 1.3.2.2 kardel /* 1297 1.3.2.2 kardel * The bundled firmware is safe to flash, and the firmware 1298 1.3.2.2 kardel * on the controller recommends a flash. So, flash! 1299 1.3.2.2 kardel */ 1300 1.3.2.2 kardel printf("%s: flashing bundled firmware...\n", sc->twa_dv.dv_xname); 1301 1.3.2.2 kardel 1302 1.3.2.2 kardel if ((error = twa_flash_firmware(sc))) { 1303 1.3.2.2 kardel fw_flash_failed = TRUE; 1304 1.3.2.2 kardel 1305 1.3.2.2 kardel printf("%s: unable to flash bundled firmware.\n", sc->twa_dv.dv_xname); 1306 1.3.2.2 kardel } else { 1307 1.3.2.2 kardel printf("%s: successfully flashed bundled firmware.\n", 1308 1.3.2.2 kardel sc->twa_dv.dv_xname); 1309 1.3.2.2 kardel fw_flashed = TRUE; 1310 1.3.2.2 kardel } 1311 1.3.2.2 kardel } 1312 1.3.2.2 kardel if (fw_flashed) { 1313 1.3.2.2 kardel /* The firmware was flashed. Have the new image loaded */ 1314 1.3.2.2 kardel error = twa_hard_reset(sc); 1315 1.3.2.2 kardel if (error == 0) 1316 1.3.2.2 kardel error = twa_init_ctlr(sc); 1317 1.3.2.2 kardel /* 1318 1.3.2.2 kardel * If hard reset of controller failed, we need to return. 1319 1.3.2.2 kardel * Otherwise, the above recursive call to twa_init_ctlr will 1320 1.3.2.2 kardel * have completed the rest of the initialization (starting 1321 1.3.2.2 kardel * from twa_drain_aen_queue below). Don't do it again. 1322 1.3.2.2 kardel * Just return. 1323 1.3.2.2 kardel */ 1324 1.3.2.2 kardel return(error); 1325 1.3.2.2 kardel } else { 1326 1.3.2.2 kardel /* 1327 1.3.2.2 kardel * Either we are not bundled with a firmware image, or 1328 1.3.2.2 kardel * the bundled firmware is not safe to flash, 1329 1.3.2.2 kardel * or flash failed for some reason. See if we can at 1330 1.3.2.2 kardel * least work with the firmware on the controller in the 1331 1.3.2.2 kardel * current mode. 1332 1.3.2.2 kardel */ 1333 1.3.2.2 kardel if (init_connect_result & TWA_CTLR_FW_COMPATIBLE) { 1334 1.3.2.2 kardel /* Yes, we can. Make note of the operating mode. */ 1335 1.3.2.2 kardel sc->working_srl = TWA_CURRENT_FW_SRL; 1336 1.3.2.2 kardel sc->working_branch = TWA_CURRENT_FW_BRANCH; 1337 1.3.2.2 kardel sc->working_build = TWA_CURRENT_FW_BUILD; 1338 1.3.2.2 kardel } else { 1339 1.3.2.2 kardel /* 1340 1.3.2.2 kardel * No, we can't. See if we can at least work with 1341 1.3.2.2 kardel * it in the base mode. We should never come here 1342 1.3.2.2 kardel * if firmware has just been flashed. 1343 1.3.2.2 kardel */ 1344 1.3.2.2 kardel printf("%s: Driver/Firmware mismatch. Negotiating for base level.\n", 1345 1.3.2.2 kardel sc->twa_dv.dv_xname); 1346 1.3.2.2 kardel if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1347 1.3.2.2 kardel TWA_EXTENDED_INIT_CONNECT, TWA_BASE_FW_SRL, 1348 1.3.2.2 kardel TWA_9000_ARCH_ID, TWA_BASE_FW_BRANCH, 1349 1.3.2.2 kardel TWA_BASE_FW_BUILD, &fw_on_ctlr_srl, 1350 1.3.2.2 kardel &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1351 1.3.2.2 kardel &fw_on_ctlr_build, &init_connect_result))) { 1352 1.3.2.2 kardel printf("%s: can't initialize connection in base mode.\n", 1353 1.3.2.2 kardel sc->twa_dv.dv_xname); 1354 1.3.2.2 kardel return(error); 1355 1.3.2.2 kardel } 1356 1.3.2.2 kardel if (!(init_connect_result & TWA_CTLR_FW_COMPATIBLE)) { 1357 1.3.2.2 kardel /* 1358 1.3.2.2 kardel * The firmware on the controller is not even 1359 1.3.2.2 kardel * compatible with our base mode. We cannot 1360 1.3.2.2 kardel * work with it. Bail... 1361 1.3.2.2 kardel */ 1362 1.3.2.2 kardel printf("Incompatible firmware on controller\n"); 1363 1.3.2.2 kardel #ifdef TWA_FLASH_FIRMWARE 1364 1.3.2.2 kardel if (fw_flash_failed) 1365 1.3.2.2 kardel printf("...and could not flash bundled firmware.\n"); 1366 1.3.2.2 kardel else 1367 1.3.2.2 kardel printf("...and bundled firmware not safe to flash.\n"); 1368 1.3.2.2 kardel #endif /* TWA_FLASH_FIRMWARE */ 1369 1.3.2.2 kardel return(1); 1370 1.3.2.2 kardel } 1371 1.3.2.2 kardel /* We can work with this firmware, but only in base mode. */ 1372 1.3.2.2 kardel sc->working_srl = TWA_BASE_FW_SRL; 1373 1.3.2.2 kardel sc->working_branch = TWA_BASE_FW_BRANCH; 1374 1.3.2.2 kardel sc->working_build = TWA_BASE_FW_BUILD; 1375 1.3.2.2 kardel sc->twa_operating_mode = TWA_BASE_MODE; 1376 1.3.2.2 kardel } 1377 1.3.2.2 kardel } 1378 1.3.2.2 kardel #endif 1379 1.3.2.2 kardel twa_drain_aen_queue(sc); 1380 1.3.2.2 kardel 1381 1.3.2.2 kardel /* Set controller state to initialized. */ 1382 1.3.2.2 kardel sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1383 1.3.2.2 kardel return(0); 1384 1.3.2.2 kardel } 1385 1.3.2.2 kardel 1386 1.3.2.2 kardel 1387 1.3.2.2 kardel static int 1388 1.3.2.2 kardel twa_setup(struct twa_softc *sc) 1389 1.3.2.2 kardel { 1390 1.3.2.2 kardel struct tw_cl_event_packet *aen_queue; 1391 1.3.2.2 kardel uint32_t i = 0; 1392 1.3.2.2 kardel int error = 0; 1393 1.3.2.2 kardel 1394 1.3.2.2 kardel /* Initialize request queues. */ 1395 1.3.2.2 kardel TAILQ_INIT(&sc->twa_free); 1396 1.3.2.2 kardel TAILQ_INIT(&sc->twa_busy); 1397 1.3.2.2 kardel TAILQ_INIT(&sc->twa_pending); 1398 1.3.2.2 kardel 1399 1.3.2.2 kardel sc->sc_nunits = 0; 1400 1.3.2.2 kardel sc->twa_sc_flags = 0; 1401 1.3.2.2 kardel 1402 1.3.2.2 kardel if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1403 1.3.2.2 kardel 1404 1.3.2.2 kardel return(ENOMEM); 1405 1.3.2.2 kardel } 1406 1.3.2.2 kardel 1407 1.3.2.2 kardel /* Allocate memory for the AEN queue. */ 1408 1.3.2.2 kardel if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH, 1409 1.3.2.2 kardel M_DEVBUF, M_WAITOK)) == NULL) { 1410 1.3.2.2 kardel /* 1411 1.3.2.2 kardel * This should not cause us to return error. We will only be 1412 1.3.2.2 kardel * unable to support AEN's. But then, we will have to check 1413 1.3.2.2 kardel * time and again to see if we can support AEN's, if we 1414 1.3.2.2 kardel * continue. So, we will just return error. 1415 1.3.2.2 kardel */ 1416 1.3.2.2 kardel return (ENOMEM); 1417 1.3.2.2 kardel } 1418 1.3.2.2 kardel /* Initialize the aen queue. */ 1419 1.3.2.2 kardel memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1420 1.3.2.2 kardel 1421 1.3.2.2 kardel for (i = 0; i < TWA_Q_LENGTH; i++) 1422 1.3.2.2 kardel sc->twa_aen_queue[i] = &(aen_queue[i]); 1423 1.3.2.2 kardel 1424 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1425 1.3.2.2 kardel TWA_CONTROL_DISABLE_INTERRUPTS); 1426 1.3.2.2 kardel 1427 1.3.2.2 kardel /* Initialize the controller. */ 1428 1.3.2.2 kardel if ((error = twa_init_ctlr(sc))) { 1429 1.3.2.2 kardel /* Soft reset the controller, and try one more time. */ 1430 1.3.2.2 kardel 1431 1.3.2.2 kardel printf("%s: controller initialization failed. Retrying initialization\n", 1432 1.3.2.2 kardel sc->twa_dv.dv_xname); 1433 1.3.2.2 kardel 1434 1.3.2.2 kardel if ((error = twa_soft_reset(sc)) == 0) 1435 1.3.2.2 kardel error = twa_init_ctlr(sc); 1436 1.3.2.2 kardel } 1437 1.3.2.2 kardel 1438 1.3.2.2 kardel twa_describe_controller(sc); 1439 1.3.2.2 kardel 1440 1.3.2.2 kardel error = twa_request_bus_scan(sc); 1441 1.3.2.2 kardel 1442 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1443 1.3.2.2 kardel TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1444 1.3.2.2 kardel TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1445 1.3.2.2 kardel TWA_CONTROL_ENABLE_INTERRUPTS); 1446 1.3.2.2 kardel 1447 1.3.2.2 kardel return (error); 1448 1.3.2.2 kardel } 1449 1.3.2.2 kardel 1450 1.3.2.2 kardel void *twa_sdh; 1451 1.3.2.2 kardel 1452 1.3.2.2 kardel static void 1453 1.3.2.2 kardel twa_attach(struct device *parent, struct device *self, void *aux) 1454 1.3.2.2 kardel { 1455 1.3.2.2 kardel struct pci_attach_args *pa; 1456 1.3.2.2 kardel struct twa_softc *sc; 1457 1.3.2.2 kardel pci_chipset_tag_t pc; 1458 1.3.2.2 kardel pcireg_t csr; 1459 1.3.2.2 kardel pci_intr_handle_t ih; 1460 1.3.2.2 kardel const char *intrstr; 1461 1.3.2.2 kardel 1462 1.3.2.2 kardel sc = (struct twa_softc *)self; 1463 1.3.2.2 kardel 1464 1.3.2.2 kardel pa = aux; 1465 1.3.2.2 kardel pc = pa->pa_pc; 1466 1.3.2.2 kardel sc->pc = pa->pa_pc; 1467 1.3.2.2 kardel sc->tag = pa->pa_tag; 1468 1.3.2.2 kardel sc->twa_dma_tag = pa->pa_dmat; 1469 1.3.2.2 kardel 1470 1.3.2.2 kardel aprint_naive(": RAID controller\n"); 1471 1.3.2.2 kardel aprint_normal(": 3ware Apache\n"); 1472 1.3.2.2 kardel 1473 1.3.2.2 kardel if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1474 1.3.2.2 kardel if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1475 1.3.2.2 kardel &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1476 1.3.2.2 kardel aprint_error("%s: can't map i/o space\n", 1477 1.3.2.2 kardel sc->twa_dv.dv_xname); 1478 1.3.2.2 kardel return; 1479 1.3.2.2 kardel } 1480 1.3.2.2 kardel } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1481 1.3.2.2 kardel if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1482 1.3.2.2 kardel PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1483 1.3.2.2 kardel &sc->twa_bus_ioh, NULL, NULL)) { 1484 1.3.2.2 kardel aprint_error("%s: can't map mem space\n", 1485 1.3.2.2 kardel sc->twa_dv.dv_xname); 1486 1.3.2.2 kardel return; 1487 1.3.2.2 kardel } 1488 1.3.2.2 kardel } else { 1489 1.3.2.2 kardel aprint_error("%s: product id 0x%02x not recognized\n", 1490 1.3.2.2 kardel sc->twa_dv.dv_xname, PCI_PRODUCT(pa->pa_id)); 1491 1.3.2.2 kardel return; 1492 1.3.2.2 kardel } 1493 1.3.2.2 kardel /* Enable the device. */ 1494 1.3.2.2 kardel csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1495 1.3.2.2 kardel 1496 1.3.2.2 kardel pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1497 1.3.2.2 kardel csr | PCI_COMMAND_MASTER_ENABLE); 1498 1.3.2.2 kardel 1499 1.3.2.2 kardel /* Map and establish the interrupt. */ 1500 1.3.2.2 kardel if (pci_intr_map(pa, &ih)) { 1501 1.3.2.2 kardel aprint_error("%s: can't map interrupt\n", sc->twa_dv.dv_xname); 1502 1.3.2.2 kardel return; 1503 1.3.2.2 kardel } 1504 1.3.2.2 kardel intrstr = pci_intr_string(pc, ih); 1505 1.3.2.2 kardel 1506 1.3.2.2 kardel sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1507 1.3.2.2 kardel if (sc->twa_ih == NULL) { 1508 1.3.2.2 kardel aprint_error("%s: can't establish interrupt%s%s\n", 1509 1.3.2.2 kardel sc->twa_dv.dv_xname, 1510 1.3.2.2 kardel (intrstr) ? " at " : "", 1511 1.3.2.2 kardel (intrstr) ? intrstr : ""); 1512 1.3.2.2 kardel return; 1513 1.3.2.2 kardel } 1514 1.3.2.2 kardel 1515 1.3.2.2 kardel if (intrstr != NULL) 1516 1.3.2.2 kardel aprint_normal("%s: interrupting at %s\n", 1517 1.3.2.2 kardel sc->twa_dv.dv_xname, intrstr); 1518 1.3.2.2 kardel 1519 1.3.2.2 kardel twa_setup(sc); 1520 1.3.2.2 kardel 1521 1.3.2.2 kardel if (twa_sdh == NULL) 1522 1.3.2.2 kardel twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1523 1.3.2.2 kardel 1524 1.3.2.2 kardel return; 1525 1.3.2.2 kardel } 1526 1.3.2.2 kardel 1527 1.3.2.2 kardel 1528 1.3.2.2 kardel static void 1529 1.3.2.2 kardel twa_shutdown(void *arg) 1530 1.3.2.2 kardel { 1531 1.3.2.2 kardel extern struct cfdriver twa_cd; 1532 1.3.2.2 kardel struct twa_softc *sc; 1533 1.3.2.2 kardel int i, rv, unit; 1534 1.3.2.2 kardel 1535 1.3.2.2 kardel for (i = 0; i < twa_cd.cd_ndevs; i++) { 1536 1.3.2.2 kardel if ((sc = device_lookup(&twa_cd, i)) == NULL) 1537 1.3.2.2 kardel continue; 1538 1.3.2.2 kardel 1539 1.3.2.2 kardel for (unit = 0; unit < TWA_MAX_UNITS; unit++) 1540 1.3.2.2 kardel if (sc->sc_units[unit].td_dev != NULL) 1541 1.3.2.2 kardel (void) config_detach(sc->sc_units[unit].td_dev, 1542 1.3.2.2 kardel DETACH_FORCE | DETACH_QUIET); 1543 1.3.2.2 kardel 1544 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1545 1.3.2.2 kardel TWA_CONTROL_DISABLE_INTERRUPTS); 1546 1.3.2.2 kardel 1547 1.3.2.2 kardel /* Let the controller know that we are going down. */ 1548 1.3.2.2 kardel rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1549 1.3.2.2 kardel 0, 0, 0, 0, 0, 1550 1.3.2.2 kardel NULL, NULL, NULL, NULL, NULL); 1551 1.3.2.2 kardel } 1552 1.3.2.2 kardel } 1553 1.3.2.2 kardel 1554 1.3.2.2 kardel 1555 1.3.2.2 kardel void 1556 1.3.2.2 kardel twa_register_callbacks(struct twa_softc *sc, int unit, 1557 1.3.2.2 kardel const struct twa_callbacks *tcb) 1558 1.3.2.2 kardel { 1559 1.3.2.2 kardel 1560 1.3.2.2 kardel sc->sc_units[unit].td_callbacks = tcb; 1561 1.3.2.2 kardel } 1562 1.3.2.2 kardel 1563 1.3.2.2 kardel 1564 1.3.2.2 kardel /* 1565 1.3.2.2 kardel * Print autoconfiguration message for a sub-device 1566 1.3.2.2 kardel */ 1567 1.3.2.2 kardel static int 1568 1.3.2.2 kardel twa_print(void *aux, const char *pnp) 1569 1.3.2.2 kardel { 1570 1.3.2.2 kardel struct twa_attach_args *twaa; 1571 1.3.2.2 kardel 1572 1.3.2.2 kardel twaa = aux; 1573 1.3.2.2 kardel 1574 1.3.2.2 kardel if (pnp !=NULL) 1575 1.3.2.2 kardel aprint_normal("block device at %s\n", pnp); 1576 1.3.2.2 kardel aprint_normal(" unit %d\n", twaa->twaa_unit); 1577 1.3.2.2 kardel return (UNCONF); 1578 1.3.2.2 kardel } 1579 1.3.2.2 kardel 1580 1.3.2.2 kardel 1581 1.3.2.2 kardel static void 1582 1.3.2.2 kardel twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1583 1.3.2.2 kardel { 1584 1.3.2.2 kardel int i; 1585 1.3.2.2 kardel for (i = 0; i < nsegments; i++) { 1586 1.3.2.2 kardel sgl[i].address = segs[i].ds_addr; 1587 1.3.2.2 kardel sgl[i].length = (u_int32_t)(segs[i].ds_len); 1588 1.3.2.2 kardel } 1589 1.3.2.2 kardel } 1590 1.3.2.2 kardel 1591 1.3.2.2 kardel 1592 1.3.2.2 kardel static int 1593 1.3.2.2 kardel twa_submit_io(struct twa_request *tr) 1594 1.3.2.2 kardel { 1595 1.3.2.2 kardel int error; 1596 1.3.2.2 kardel 1597 1.3.2.2 kardel if ((error = twa_start(tr))) { 1598 1.3.2.2 kardel if (error == EBUSY) 1599 1.3.2.2 kardel error = 0; /* request is in the pending queue */ 1600 1.3.2.2 kardel else { 1601 1.3.2.2 kardel tr->tr_error = error; 1602 1.3.2.2 kardel } 1603 1.3.2.2 kardel } 1604 1.3.2.2 kardel return(error); 1605 1.3.2.2 kardel } 1606 1.3.2.2 kardel 1607 1.3.2.2 kardel 1608 1.3.2.2 kardel /* 1609 1.3.2.2 kardel * Function name: twa_setup_data_dmamap 1610 1.3.2.2 kardel * Description: Callback of bus_dmamap_load for the buffer associated 1611 1.3.2.2 kardel * with data. Updates the cmd pkt (size/sgl_entries 1612 1.3.2.2 kardel * fields, as applicable) to reflect the number of sg 1613 1.3.2.2 kardel * elements. 1614 1.3.2.2 kardel * 1615 1.3.2.2 kardel * Input: arg -- ptr to request pkt 1616 1.3.2.2 kardel * segs -- ptr to a list of segment descriptors 1617 1.3.2.2 kardel * nsegments--# of segments 1618 1.3.2.2 kardel * error -- 0 if no errors encountered before callback, 1619 1.3.2.2 kardel * non-zero if errors were encountered 1620 1.3.2.2 kardel * Output: None 1621 1.3.2.2 kardel * Return value: None 1622 1.3.2.2 kardel */ 1623 1.3.2.2 kardel static int 1624 1.3.2.2 kardel twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, 1625 1.3.2.2 kardel int nsegments, int error) 1626 1.3.2.2 kardel { 1627 1.3.2.2 kardel struct twa_request *tr = (struct twa_request *)arg; 1628 1.3.2.2 kardel struct twa_command_packet *cmdpkt = tr->tr_command; 1629 1.3.2.2 kardel struct twa_command_9k *cmd9k; 1630 1.3.2.2 kardel union twa_command_7k *cmd7k; 1631 1.3.2.2 kardel u_int8_t sgl_offset; 1632 1.3.2.2 kardel 1633 1.3.2.2 kardel if (error == EFBIG) { 1634 1.3.2.2 kardel tr->tr_error = error; 1635 1.3.2.2 kardel goto out; 1636 1.3.2.2 kardel } 1637 1.3.2.2 kardel 1638 1.3.2.2 kardel if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1639 1.3.2.2 kardel cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1640 1.3.2.2 kardel twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1641 1.3.2.2 kardel cmd9k->sgl_entries += nsegments - 1; 1642 1.3.2.2 kardel } else { 1643 1.3.2.2 kardel /* It's a 7000 command packet. */ 1644 1.3.2.2 kardel cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1645 1.3.2.2 kardel if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1646 1.3.2.2 kardel twa_fillin_sgl((struct twa_sg *) 1647 1.3.2.2 kardel (((u_int32_t *)cmd7k) + sgl_offset), 1648 1.3.2.2 kardel segs, nsegments); 1649 1.3.2.2 kardel /* Modify the size field, based on sg address size. */ 1650 1.3.2.2 kardel cmd7k->generic.size += 1651 1.3.2.2 kardel ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1652 1.3.2.2 kardel } 1653 1.3.2.2 kardel 1654 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_IN) 1655 1.3.2.2 kardel bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1656 1.3.2.2 kardel tr->tr_length, BUS_DMASYNC_PREREAD); 1657 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1658 1.3.2.2 kardel /* 1659 1.3.2.2 kardel * If we're using an alignment buffer, and we're 1660 1.3.2.2 kardel * writing data, copy the real data out. 1661 1.3.2.2 kardel */ 1662 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1663 1.3.2.2 kardel memcpy(tr->tr_data, tr->tr_real_data, 1664 1.3.2.2 kardel tr->tr_real_length); 1665 1.3.2.2 kardel bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1666 1.3.2.2 kardel tr->tr_length, BUS_DMASYNC_PREWRITE); 1667 1.3.2.2 kardel } 1668 1.3.2.2 kardel error = twa_submit_io(tr); 1669 1.3.2.2 kardel 1670 1.3.2.2 kardel out: 1671 1.3.2.2 kardel if (error) { 1672 1.3.2.2 kardel twa_unmap_request(tr); 1673 1.3.2.2 kardel /* 1674 1.3.2.2 kardel * If the caller had been returned EINPROGRESS, and he has 1675 1.3.2.2 kardel * registered a callback for handling completion, the callback 1676 1.3.2.2 kardel * will never get called because we were unable to submit the 1677 1.3.2.2 kardel * request. So, free up the request right here. 1678 1.3.2.2 kardel */ 1679 1.3.2.2 kardel if ((tr->tr_flags & TWA_CMD_IN_PROGRESS) && (tr->tr_callback)) 1680 1.3.2.2 kardel twa_release_request(tr); 1681 1.3.2.2 kardel } 1682 1.3.2.2 kardel return (error); 1683 1.3.2.2 kardel } 1684 1.3.2.2 kardel 1685 1.3.2.2 kardel 1686 1.3.2.2 kardel /* 1687 1.3.2.2 kardel * Function name: twa_map_request 1688 1.3.2.2 kardel * Description: Maps a cmd pkt and data associated with it, into 1689 1.3.2.2 kardel * DMA'able memory. 1690 1.3.2.2 kardel * 1691 1.3.2.2 kardel * Input: tr -- ptr to request pkt 1692 1.3.2.2 kardel * Output: None 1693 1.3.2.2 kardel * Return value: 0 -- success 1694 1.3.2.2 kardel * non-zero-- failure 1695 1.3.2.2 kardel */ 1696 1.3.2.2 kardel int 1697 1.3.2.2 kardel twa_map_request(struct twa_request *tr) 1698 1.3.2.2 kardel { 1699 1.3.2.2 kardel struct twa_softc *sc = tr->tr_sc; 1700 1.3.2.2 kardel int s, rv, error = 0; 1701 1.3.2.2 kardel 1702 1.3.2.2 kardel /* If the command involves data, map that too. */ 1703 1.3.2.2 kardel if (tr->tr_data != NULL) { 1704 1.3.2.2 kardel 1705 1.3.2.2 kardel if (((u_long)tr->tr_data & (511)) != 0) { 1706 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1707 1.3.2.2 kardel tr->tr_real_data = tr->tr_data; 1708 1.3.2.2 kardel tr->tr_real_length = tr->tr_length; 1709 1.3.2.2 kardel s = splvm(); 1710 1.3.2.2 kardel tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1711 1.3.2.2 kardel tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1712 1.3.2.2 kardel splx(s); 1713 1.3.2.2 kardel 1714 1.3.2.2 kardel if (tr->tr_data == NULL) { 1715 1.3.2.2 kardel tr->tr_data = tr->tr_real_data; 1716 1.3.2.2 kardel tr->tr_length = tr->tr_real_length; 1717 1.3.2.2 kardel return(ENOMEM); 1718 1.3.2.2 kardel } 1719 1.3.2.2 kardel if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1720 1.3.2.2 kardel memcpy(tr->tr_data, tr->tr_real_data, 1721 1.3.2.2 kardel tr->tr_length); 1722 1.3.2.2 kardel } 1723 1.3.2.2 kardel 1724 1.3.2.2 kardel /* 1725 1.3.2.2 kardel * Map the data buffer into bus space and build the S/G list. 1726 1.3.2.2 kardel */ 1727 1.3.2.2 kardel rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1728 1.3.2.2 kardel tr->tr_data, tr->tr_length, NULL, BUS_DMA_NOWAIT | 1729 1.3.2.2 kardel BUS_DMA_STREAMING | (tr->tr_flags & TWA_CMD_DATA_OUT) ? 1730 1.3.2.2 kardel BUS_DMA_READ : BUS_DMA_WRITE); 1731 1.3.2.2 kardel 1732 1.3.2.2 kardel if (rv != 0) { 1733 1.3.2.2 kardel if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1734 1.3.2.2 kardel s = splvm(); 1735 1.3.2.2 kardel uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1736 1.3.2.2 kardel tr->tr_length, UVM_KMF_WIRED); 1737 1.3.2.2 kardel splx(s); 1738 1.3.2.2 kardel } 1739 1.3.2.2 kardel return (rv); 1740 1.3.2.2 kardel } 1741 1.3.2.2 kardel 1742 1.3.2.2 kardel if ((rv = twa_setup_data_dmamap(tr, 1743 1.3.2.2 kardel tr->tr_dma_map->dm_segs, 1744 1.3.2.2 kardel tr->tr_dma_map->dm_nsegs, error))) { 1745 1.3.2.2 kardel 1746 1.3.2.2 kardel if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1747 1.3.2.2 kardel uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1748 1.3.2.2 kardel tr->tr_length, UVM_KMF_WIRED); 1749 1.3.2.2 kardel tr->tr_data = tr->tr_real_data; 1750 1.3.2.2 kardel tr->tr_length = tr->tr_real_length; 1751 1.3.2.2 kardel } 1752 1.3.2.2 kardel } else 1753 1.3.2.2 kardel error = tr->tr_error; 1754 1.3.2.2 kardel 1755 1.3.2.2 kardel } else 1756 1.3.2.2 kardel if ((rv = twa_submit_io(tr))) 1757 1.3.2.2 kardel twa_unmap_request(tr); 1758 1.3.2.2 kardel 1759 1.3.2.2 kardel return (rv); 1760 1.3.2.2 kardel } 1761 1.3.2.2 kardel 1762 1.3.2.2 kardel #if 0 1763 1.3.2.2 kardel /* 1764 1.3.2.2 kardel * Function name: twa_flash_firmware 1765 1.3.2.2 kardel * Description: Flashes bundled firmware image onto controller. 1766 1.3.2.2 kardel * 1767 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 1768 1.3.2.2 kardel * Output: None 1769 1.3.2.2 kardel * Return value: 0 -- success 1770 1.3.2.2 kardel * non-zero-- failure 1771 1.3.2.2 kardel */ 1772 1.3.2.2 kardel static int 1773 1.3.2.2 kardel twa_flash_firmware(struct twa_softc *sc) 1774 1.3.2.2 kardel { 1775 1.3.2.2 kardel struct twa_request *tr; 1776 1.3.2.2 kardel struct twa_command_download_firmware *cmd; 1777 1.3.2.2 kardel uint32_t count; 1778 1.3.2.2 kardel uint32_t fw_img_chunk_size; 1779 1.3.2.2 kardel uint32_t this_chunk_size = 0; 1780 1.3.2.2 kardel uint32_t remaining_img_size = 0; 1781 1.3.2.2 kardel int s, error = 0; 1782 1.3.2.2 kardel int i; 1783 1.3.2.2 kardel 1784 1.3.2.2 kardel if ((tr = twa_get_request(sc, 0)) == NULL) { 1785 1.3.2.2 kardel /* No free request packets available. Can't proceed. */ 1786 1.3.2.2 kardel error = EIO; 1787 1.3.2.2 kardel goto out; 1788 1.3.2.2 kardel } 1789 1.3.2.2 kardel 1790 1.3.2.2 kardel count = (twa_fw_img_size / 65536); 1791 1.3.2.2 kardel 1792 1.3.2.2 kardel count += ((twa_fw_img_size % 65536) != 0) ? 1 : 0; 1793 1.3.2.2 kardel 1794 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1795 1.3.2.2 kardel /* Allocate sufficient memory to hold a chunk of the firmware image. */ 1796 1.3.2.2 kardel fw_img_chunk_size = ((twa_fw_img_size / count) + 511) & ~511; 1797 1.3.2.2 kardel 1798 1.3.2.2 kardel s = splvm(); 1799 1.3.2.2 kardel tr->tr_data = (void *)uvm_km_alloc(kmem_map, fw_img_chunk_size, 512, 1800 1.3.2.2 kardel UVM_KMF_WIRED); 1801 1.3.2.2 kardel splx(s); 1802 1.3.2.2 kardel 1803 1.3.2.2 kardel if (tr->tr_data == NULL) { 1804 1.3.2.2 kardel error = ENOMEM; 1805 1.3.2.2 kardel goto out; 1806 1.3.2.2 kardel } 1807 1.3.2.2 kardel 1808 1.3.2.2 kardel remaining_img_size = twa_fw_img_size; 1809 1.3.2.2 kardel cmd = &(tr->tr_command->command.cmd_pkt_7k.download_fw); 1810 1.3.2.2 kardel 1811 1.3.2.2 kardel for (i = 0; i < count; i++) { 1812 1.3.2.2 kardel /* Build a cmd pkt for downloading firmware. */ 1813 1.3.2.2 kardel memset(tr->tr_command, 0, sizeof(struct twa_command_packet)); 1814 1.3.2.2 kardel 1815 1.3.2.2 kardel tr->tr_command->cmd_hdr.header_desc.size_header = 128; 1816 1.3.2.2 kardel 1817 1.3.2.2 kardel cmd->opcode = TWA_OP_DOWNLOAD_FIRMWARE; 1818 1.3.2.2 kardel cmd->sgl_offset = 2;/* offset in dwords, to the beginning of sg list */ 1819 1.3.2.2 kardel cmd->size = 2; /* this field will be updated at data map time */ 1820 1.3.2.2 kardel cmd->request_id = tr->tr_request_id; 1821 1.3.2.2 kardel cmd->unit = 0; 1822 1.3.2.2 kardel cmd->status = 0; 1823 1.3.2.2 kardel cmd->flags = 0; 1824 1.3.2.2 kardel cmd->param = 8; /* prom image */ 1825 1.3.2.2 kardel 1826 1.3.2.2 kardel if (i != (count - 1)) 1827 1.3.2.2 kardel this_chunk_size = fw_img_chunk_size; 1828 1.3.2.2 kardel else /* last chunk */ 1829 1.3.2.2 kardel this_chunk_size = remaining_img_size; 1830 1.3.2.2 kardel 1831 1.3.2.2 kardel remaining_img_size -= this_chunk_size; 1832 1.3.2.2 kardel 1833 1.3.2.2 kardel memset(tr->tr_data, fw_img_chunk_size, 0); 1834 1.3.2.2 kardel 1835 1.3.2.2 kardel memcpy(tr->tr_data, twa_fw_img + (i * fw_img_chunk_size), 1836 1.3.2.2 kardel this_chunk_size); 1837 1.3.2.2 kardel /* 1838 1.3.2.2 kardel * The next line will effect only the last chunk. 1839 1.3.2.2 kardel */ 1840 1.3.2.2 kardel tr->tr_length = (this_chunk_size + 511) & ~511; 1841 1.3.2.2 kardel 1842 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_DATA_OUT; 1843 1.3.2.2 kardel 1844 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 1845 1.3.2.2 kardel 1846 1.3.2.2 kardel if (error) { 1847 1.3.2.2 kardel if (error == ETIMEDOUT) 1848 1.3.2.2 kardel return(error); /* clean-up done by twa_immediate_request */ 1849 1.3.2.2 kardel break; 1850 1.3.2.2 kardel } 1851 1.3.2.2 kardel error = cmd->status; 1852 1.3.2.2 kardel 1853 1.3.2.2 kardel if (i != (count - 1)) { 1854 1.3.2.2 kardel 1855 1.3.2.2 kardel /* XXX FreeBSD code doesn't check for no error condition 1856 1.3.2.2 kardel * but based on observation, error seems to return 0 1857 1.3.2.2 kardel */ 1858 1.3.2.2 kardel if ((error = tr->tr_command->cmd_hdr.status_block.error) == 0) { 1859 1.3.2.2 kardel continue; 1860 1.3.2.2 kardel } else if ((error = tr->tr_command->cmd_hdr.status_block.error) == 1861 1.3.2.2 kardel TWA_ERROR_MORE_DATA) { 1862 1.3.2.2 kardel continue; 1863 1.3.2.2 kardel } else { 1864 1.3.2.2 kardel twa_hard_reset(sc); 1865 1.3.2.2 kardel break; 1866 1.3.2.2 kardel } 1867 1.3.2.2 kardel } else /* last chunk */ 1868 1.3.2.2 kardel if (error) { 1869 1.3.2.2 kardel printf("%s: firmware flash request failed. error = 0x%x\n", 1870 1.3.2.2 kardel sc->twa_dv.dv_xname, error); 1871 1.3.2.2 kardel twa_hard_reset(sc); 1872 1.3.2.2 kardel } 1873 1.3.2.2 kardel } /* for */ 1874 1.3.2.2 kardel 1875 1.3.2.2 kardel if (tr->tr_data) { 1876 1.3.2.2 kardel s = splvm(); 1877 1.3.2.2 kardel uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1878 1.3.2.2 kardel fw_img_chunk_size, UVM_KMF_WIRED); 1879 1.3.2.2 kardel splx(s); 1880 1.3.2.2 kardel } 1881 1.3.2.2 kardel out: 1882 1.3.2.2 kardel if (tr) 1883 1.3.2.2 kardel twa_release_request(tr); 1884 1.3.2.2 kardel return(error); 1885 1.3.2.2 kardel } 1886 1.3.2.2 kardel 1887 1.3.2.2 kardel /* 1888 1.3.2.2 kardel * Function name: twa_hard_reset 1889 1.3.2.2 kardel * Description: Hard reset the controller. 1890 1.3.2.2 kardel * 1891 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 1892 1.3.2.2 kardel * Output: None 1893 1.3.2.2 kardel * Return value: 0 -- success 1894 1.3.2.2 kardel * non-zero-- failure 1895 1.3.2.2 kardel */ 1896 1.3.2.2 kardel static int 1897 1.3.2.2 kardel twa_hard_reset(struct twa_softc *sc) 1898 1.3.2.2 kardel { 1899 1.3.2.2 kardel struct twa_request *tr; 1900 1.3.2.2 kardel struct twa_command_reset_firmware *cmd; 1901 1.3.2.2 kardel int error; 1902 1.3.2.2 kardel 1903 1.3.2.2 kardel if ((tr = twa_get_request(sc, 0)) == NULL) 1904 1.3.2.2 kardel return(EIO); 1905 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1906 1.3.2.2 kardel /* Build a cmd pkt for sending down the hard reset command. */ 1907 1.3.2.2 kardel tr->tr_command->cmd_hdr.header_desc.size_header = 128; 1908 1.3.2.2 kardel 1909 1.3.2.2 kardel cmd = &(tr->tr_command->command.cmd_pkt_7k.reset_fw); 1910 1.3.2.2 kardel cmd->opcode = TWA_OP_RESET_FIRMWARE; 1911 1.3.2.2 kardel cmd->size = 2; /* this field will be updated at data map time */ 1912 1.3.2.2 kardel cmd->request_id = tr->tr_request_id; 1913 1.3.2.2 kardel cmd->unit = 0; 1914 1.3.2.2 kardel cmd->status = 0; 1915 1.3.2.2 kardel cmd->flags = 0; 1916 1.3.2.2 kardel cmd->param = 0; /* don't reload FPGA logic */ 1917 1.3.2.2 kardel 1918 1.3.2.2 kardel tr->tr_data = NULL; 1919 1.3.2.2 kardel tr->tr_length = 0; 1920 1.3.2.2 kardel 1921 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 1922 1.3.2.2 kardel if (error) { 1923 1.3.2.2 kardel printf("%s: hard reset request could not " 1924 1.3.2.2 kardel " be posted. error = 0x%x\n", sc->twa_dv.dv_xname, error); 1925 1.3.2.2 kardel if (error == ETIMEDOUT) 1926 1.3.2.2 kardel return(error); /* clean-up done by twa_immediate_request */ 1927 1.3.2.2 kardel goto out; 1928 1.3.2.2 kardel } 1929 1.3.2.2 kardel if ((error = cmd->status)) { 1930 1.3.2.2 kardel printf("%s: hard reset request failed. error = 0x%x\n", 1931 1.3.2.2 kardel sc->twa_dv.dv_xname, error); 1932 1.3.2.2 kardel } 1933 1.3.2.2 kardel 1934 1.3.2.2 kardel out: 1935 1.3.2.2 kardel if (tr) 1936 1.3.2.2 kardel twa_release_request(tr); 1937 1.3.2.2 kardel return(error); 1938 1.3.2.2 kardel } 1939 1.3.2.2 kardel #endif 1940 1.3.2.2 kardel 1941 1.3.2.2 kardel /* 1942 1.3.2.2 kardel * Function name: twa_intr 1943 1.3.2.2 kardel * Description: Interrupt handler. Determines the kind of interrupt, 1944 1.3.2.2 kardel * and calls the appropriate handler. 1945 1.3.2.2 kardel * 1946 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 1947 1.3.2.2 kardel * Output: None 1948 1.3.2.2 kardel * Return value: None 1949 1.3.2.2 kardel */ 1950 1.3.2.2 kardel 1951 1.3.2.2 kardel static int 1952 1.3.2.2 kardel twa_intr(void *arg) 1953 1.3.2.2 kardel { 1954 1.3.2.2 kardel int caught, rv; 1955 1.3.2.2 kardel struct twa_softc *sc; 1956 1.3.2.2 kardel u_int32_t status_reg; 1957 1.3.2.2 kardel sc = (struct twa_softc *)arg; 1958 1.3.2.2 kardel 1959 1.3.2.2 kardel caught = 0; 1960 1.3.2.2 kardel /* Collect current interrupt status. */ 1961 1.3.2.2 kardel status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1962 1.3.2.2 kardel if (twa_check_ctlr_state(sc, status_reg)) { 1963 1.3.2.2 kardel caught = 1; 1964 1.3.2.2 kardel goto bail; 1965 1.3.2.2 kardel } 1966 1.3.2.2 kardel /* Dispatch based on the kind of interrupt. */ 1967 1.3.2.2 kardel if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1968 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1969 1.3.2.2 kardel TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1970 1.3.2.2 kardel caught = 1; 1971 1.3.2.2 kardel } 1972 1.3.2.2 kardel if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1973 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1974 1.3.2.2 kardel TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1975 1.3.2.2 kardel rv = twa_fetch_aen(sc); 1976 1.3.2.2 kardel #ifdef DIAGNOSTIC 1977 1.3.2.2 kardel if (rv != 0) 1978 1.3.2.2 kardel printf("%s: unable to retrieve AEN (%d)\n", 1979 1.3.2.2 kardel sc->twa_dv.dv_xname, rv); 1980 1.3.2.2 kardel #endif 1981 1.3.2.2 kardel caught = 1; 1982 1.3.2.2 kardel } 1983 1.3.2.2 kardel if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1984 1.3.2.2 kardel /* Start any requests that might be in the pending queue. */ 1985 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1986 1.3.2.2 kardel TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1987 1.3.2.2 kardel (void)twa_drain_pending_queue(sc); 1988 1.3.2.2 kardel caught = 1; 1989 1.3.2.2 kardel } 1990 1.3.2.2 kardel if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1991 1.3.2.2 kardel twa_done(sc); 1992 1.3.2.2 kardel caught = 1; 1993 1.3.2.2 kardel } 1994 1.3.2.2 kardel bail: 1995 1.3.2.2 kardel return (caught); 1996 1.3.2.2 kardel } 1997 1.3.2.2 kardel 1998 1.3.2.2 kardel 1999 1.3.2.2 kardel /* 2000 1.3.2.2 kardel * Accept an open operation on the control device. 2001 1.3.2.2 kardel */ 2002 1.3.2.2 kardel static int 2003 1.3.2.2 kardel twaopen(dev_t dev, int flag, int mode, struct lwp *l) 2004 1.3.2.2 kardel { 2005 1.3.2.2 kardel struct twa_softc *twa; 2006 1.3.2.2 kardel 2007 1.3.2.2 kardel if ((twa = device_lookup(&twa_cd, minor(dev))) == NULL) 2008 1.3.2.2 kardel return (ENXIO); 2009 1.3.2.2 kardel if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 2010 1.3.2.2 kardel return (EBUSY); 2011 1.3.2.2 kardel 2012 1.3.2.2 kardel twa->twa_sc_flags |= TWA_STATE_OPEN; 2013 1.3.2.2 kardel 2014 1.3.2.2 kardel return (0); 2015 1.3.2.2 kardel } 2016 1.3.2.2 kardel 2017 1.3.2.2 kardel 2018 1.3.2.2 kardel /* 2019 1.3.2.2 kardel * Accept the last close on the control device. 2020 1.3.2.2 kardel */ 2021 1.3.2.2 kardel static int 2022 1.3.2.2 kardel twaclose(dev_t dev, int flag, int mode, struct lwp *l) 2023 1.3.2.2 kardel { 2024 1.3.2.2 kardel struct twa_softc *twa; 2025 1.3.2.2 kardel 2026 1.3.2.2 kardel twa = device_lookup(&twa_cd, minor(dev)); 2027 1.3.2.2 kardel twa->twa_sc_flags &= ~TWA_STATE_OPEN; 2028 1.3.2.2 kardel return (0); 2029 1.3.2.2 kardel } 2030 1.3.2.2 kardel 2031 1.3.2.2 kardel 2032 1.3.2.2 kardel /* 2033 1.3.2.2 kardel * Function name: twaioctl 2034 1.3.2.2 kardel * Description: ioctl handler. 2035 1.3.2.2 kardel * 2036 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 2037 1.3.2.2 kardel * cmd -- ioctl cmd 2038 1.3.2.2 kardel * buf -- ptr to buffer in kernel memory, which is 2039 1.3.2.2 kardel * a copy of the input buffer in user-space 2040 1.3.2.2 kardel * Output: buf -- ptr to buffer in kernel memory, which will 2041 1.3.2.2 kardel * be copied of the output buffer in user-space 2042 1.3.2.2 kardel * Return value: 0 -- success 2043 1.3.2.2 kardel * non-zero-- failure 2044 1.3.2.2 kardel */ 2045 1.3.2.2 kardel static int 2046 1.3.2.2 kardel twaioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 2047 1.3.2.2 kardel { 2048 1.3.2.2 kardel struct twa_softc *sc; 2049 1.3.2.2 kardel struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 2050 1.3.2.2 kardel struct tw_cl_event_packet event_buf; 2051 1.3.2.2 kardel struct twa_request *tr = 0; 2052 1.3.2.2 kardel int32_t event_index = 0; 2053 1.3.2.2 kardel int32_t start_index; 2054 1.3.2.2 kardel int s, error = 0; 2055 1.3.2.2 kardel 2056 1.3.2.2 kardel sc = device_lookup(&twa_cd, minor(dev)); 2057 1.3.2.2 kardel 2058 1.3.2.2 kardel switch (cmd) { 2059 1.3.2.2 kardel case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 2060 1.3.2.2 kardel { 2061 1.3.2.2 kardel struct twa_command_packet *cmdpkt; 2062 1.3.2.2 kardel u_int32_t data_buf_size_adjusted; 2063 1.3.2.2 kardel 2064 1.3.2.2 kardel /* Get a request packet */ 2065 1.3.2.2 kardel tr = twa_get_request_wait(sc, 0); 2066 1.3.2.2 kardel KASSERT(tr != NULL); 2067 1.3.2.2 kardel /* 2068 1.3.2.2 kardel * Make sure that the data buffer sent to firmware is a 2069 1.3.2.2 kardel * 512 byte multiple in size. 2070 1.3.2.2 kardel */ 2071 1.3.2.2 kardel data_buf_size_adjusted = 2072 1.3.2.2 kardel (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 2073 1.3.2.2 kardel 2074 1.3.2.2 kardel if ((tr->tr_length = data_buf_size_adjusted)) { 2075 1.3.2.2 kardel if ((tr->tr_data = malloc(data_buf_size_adjusted, 2076 1.3.2.2 kardel M_DEVBUF, M_WAITOK)) == NULL) { 2077 1.3.2.2 kardel error = ENOMEM; 2078 1.3.2.2 kardel goto fw_passthru_done; 2079 1.3.2.2 kardel } 2080 1.3.2.2 kardel /* Copy the payload. */ 2081 1.3.2.2 kardel if ((error = copyin((void *) (user_buf->pdata), 2082 1.3.2.2 kardel (void *) (tr->tr_data), 2083 1.3.2.2 kardel user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2084 1.3.2.2 kardel goto fw_passthru_done; 2085 1.3.2.2 kardel } 2086 1.3.2.2 kardel tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2087 1.3.2.2 kardel } 2088 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2089 1.3.2.2 kardel cmdpkt = tr->tr_command; 2090 1.3.2.2 kardel 2091 1.3.2.2 kardel /* Copy the command packet. */ 2092 1.3.2.2 kardel memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2093 1.3.2.2 kardel sizeof(struct twa_command_packet)); 2094 1.3.2.2 kardel cmdpkt->command.cmd_pkt_7k.generic.request_id = 2095 1.3.2.2 kardel tr->tr_request_id; 2096 1.3.2.2 kardel 2097 1.3.2.2 kardel /* Send down the request, and wait for it to complete. */ 2098 1.3.2.2 kardel if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2099 1.3.2.2 kardel if (error == ETIMEDOUT) 2100 1.3.2.2 kardel break; /* clean-up done by twa_wait_request */ 2101 1.3.2.2 kardel goto fw_passthru_done; 2102 1.3.2.2 kardel } 2103 1.3.2.2 kardel 2104 1.3.2.2 kardel /* Copy the command packet back into user space. */ 2105 1.3.2.2 kardel memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2106 1.3.2.2 kardel sizeof(struct twa_command_packet)); 2107 1.3.2.2 kardel 2108 1.3.2.2 kardel /* If there was a payload, copy it back too. */ 2109 1.3.2.2 kardel if (tr->tr_length) 2110 1.3.2.2 kardel error = copyout(tr->tr_data, user_buf->pdata, 2111 1.3.2.2 kardel user_buf->twa_drvr_pkt.buffer_length); 2112 1.3.2.2 kardel fw_passthru_done: 2113 1.3.2.2 kardel /* Free resources. */ 2114 1.3.2.2 kardel if (tr->tr_data) 2115 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 2116 1.3.2.2 kardel 2117 1.3.2.2 kardel if (tr) 2118 1.3.2.2 kardel twa_release_request(tr); 2119 1.3.2.2 kardel break; 2120 1.3.2.2 kardel } 2121 1.3.2.2 kardel 2122 1.3.2.2 kardel case TW_OSL_IOCTL_SCAN_BUS: 2123 1.3.2.2 kardel twa_request_bus_scan(sc); 2124 1.3.2.2 kardel break; 2125 1.3.2.2 kardel 2126 1.3.2.2 kardel case TW_CL_IOCTL_GET_FIRST_EVENT: 2127 1.3.2.2 kardel if (sc->twa_aen_queue_wrapped) { 2128 1.3.2.2 kardel if (sc->twa_aen_queue_overflow) { 2129 1.3.2.2 kardel /* 2130 1.3.2.2 kardel * The aen queue has wrapped, even before some 2131 1.3.2.2 kardel * events have been retrieved. Let the caller 2132 1.3.2.2 kardel * know that he missed out on some AEN's. 2133 1.3.2.2 kardel */ 2134 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2135 1.3.2.2 kardel TWA_ERROR_AEN_OVERFLOW; 2136 1.3.2.2 kardel sc->twa_aen_queue_overflow = FALSE; 2137 1.3.2.2 kardel } else 2138 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2139 1.3.2.2 kardel event_index = sc->twa_aen_head; 2140 1.3.2.2 kardel } else { 2141 1.3.2.2 kardel if (sc->twa_aen_head == sc->twa_aen_tail) { 2142 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2143 1.3.2.2 kardel TWA_ERROR_AEN_NO_EVENTS; 2144 1.3.2.2 kardel break; 2145 1.3.2.2 kardel } 2146 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2147 1.3.2.2 kardel event_index = sc->twa_aen_tail; /* = 0 */ 2148 1.3.2.2 kardel } 2149 1.3.2.2 kardel if ((error = copyout(sc->twa_aen_queue[event_index], 2150 1.3.2.2 kardel user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2151 1.3.2.2 kardel (sc->twa_aen_queue[event_index])->retrieved = 2152 1.3.2.2 kardel TWA_AEN_RETRIEVED; 2153 1.3.2.2 kardel break; 2154 1.3.2.2 kardel 2155 1.3.2.2 kardel 2156 1.3.2.2 kardel case TW_CL_IOCTL_GET_LAST_EVENT: 2157 1.3.2.2 kardel 2158 1.3.2.2 kardel if (sc->twa_aen_queue_wrapped) { 2159 1.3.2.2 kardel if (sc->twa_aen_queue_overflow) { 2160 1.3.2.2 kardel /* 2161 1.3.2.2 kardel * The aen queue has wrapped, even before some 2162 1.3.2.2 kardel * events have been retrieved. Let the caller 2163 1.3.2.2 kardel * know that he missed out on some AEN's. 2164 1.3.2.2 kardel */ 2165 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2166 1.3.2.2 kardel TWA_ERROR_AEN_OVERFLOW; 2167 1.3.2.2 kardel sc->twa_aen_queue_overflow = FALSE; 2168 1.3.2.2 kardel } else 2169 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2170 1.3.2.2 kardel } else { 2171 1.3.2.2 kardel if (sc->twa_aen_head == sc->twa_aen_tail) { 2172 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2173 1.3.2.2 kardel TWA_ERROR_AEN_NO_EVENTS; 2174 1.3.2.2 kardel break; 2175 1.3.2.2 kardel } 2176 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2177 1.3.2.2 kardel } 2178 1.3.2.2 kardel event_index = (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2179 1.3.2.2 kardel if ((error = copyout(sc->twa_aen_queue[event_index], user_buf->pdata, 2180 1.3.2.2 kardel sizeof(struct tw_cl_event_packet))) != 0) 2181 1.3.2.2 kardel 2182 1.3.2.2 kardel (sc->twa_aen_queue[event_index])->retrieved = 2183 1.3.2.2 kardel TWA_AEN_RETRIEVED; 2184 1.3.2.2 kardel break; 2185 1.3.2.2 kardel 2186 1.3.2.2 kardel 2187 1.3.2.2 kardel case TW_CL_IOCTL_GET_NEXT_EVENT: 2188 1.3.2.2 kardel 2189 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2190 1.3.2.2 kardel if (sc->twa_aen_queue_wrapped) { 2191 1.3.2.2 kardel 2192 1.3.2.2 kardel if (sc->twa_aen_queue_overflow) { 2193 1.3.2.2 kardel /* 2194 1.3.2.2 kardel * The aen queue has wrapped, even before some 2195 1.3.2.2 kardel * events have been retrieved. Let the caller 2196 1.3.2.2 kardel * know that he missed out on some AEN's. 2197 1.3.2.2 kardel */ 2198 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2199 1.3.2.2 kardel TWA_ERROR_AEN_OVERFLOW; 2200 1.3.2.2 kardel sc->twa_aen_queue_overflow = FALSE; 2201 1.3.2.2 kardel } 2202 1.3.2.2 kardel start_index = sc->twa_aen_head; 2203 1.3.2.2 kardel } else { 2204 1.3.2.2 kardel if (sc->twa_aen_head == sc->twa_aen_tail) { 2205 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2206 1.3.2.2 kardel TWA_ERROR_AEN_NO_EVENTS; 2207 1.3.2.2 kardel break; 2208 1.3.2.2 kardel } 2209 1.3.2.2 kardel start_index = sc->twa_aen_tail; /* = 0 */ 2210 1.3.2.2 kardel } 2211 1.3.2.2 kardel error = copyin(user_buf->pdata, &event_buf, 2212 1.3.2.2 kardel sizeof(struct tw_cl_event_packet)); 2213 1.3.2.2 kardel 2214 1.3.2.2 kardel event_index = (start_index + event_buf.sequence_id - 2215 1.3.2.2 kardel (sc->twa_aen_queue[start_index])->sequence_id + 1) 2216 1.3.2.2 kardel % TWA_Q_LENGTH; 2217 1.3.2.2 kardel 2218 1.3.2.2 kardel if (! ((sc->twa_aen_queue[event_index])->sequence_id > 2219 1.3.2.2 kardel event_buf.sequence_id)) { 2220 1.3.2.2 kardel if (user_buf->twa_drvr_pkt.status == TWA_ERROR_AEN_OVERFLOW) 2221 1.3.2.2 kardel sc->twa_aen_queue_overflow = TRUE; /* so we report the overflow next time */ 2222 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2223 1.3.2.2 kardel TWA_ERROR_AEN_NO_EVENTS; 2224 1.3.2.2 kardel break; 2225 1.3.2.2 kardel } 2226 1.3.2.2 kardel if ((error = copyout(sc->twa_aen_queue[event_index], user_buf->pdata, 2227 1.3.2.2 kardel sizeof(struct tw_cl_event_packet))) != 0) 2228 1.3.2.2 kardel 2229 1.3.2.2 kardel (sc->twa_aen_queue[event_index])->retrieved = 2230 1.3.2.2 kardel TWA_AEN_RETRIEVED; 2231 1.3.2.2 kardel break; 2232 1.3.2.2 kardel 2233 1.3.2.2 kardel 2234 1.3.2.2 kardel case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2235 1.3.2.2 kardel 2236 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2237 1.3.2.2 kardel if (sc->twa_aen_queue_wrapped) { 2238 1.3.2.2 kardel if (sc->twa_aen_queue_overflow) { 2239 1.3.2.2 kardel /* 2240 1.3.2.2 kardel * The aen queue has wrapped, even before some 2241 1.3.2.2 kardel * events have been retrieved. Let the caller 2242 1.3.2.2 kardel * know that he missed out on some AEN's. 2243 1.3.2.2 kardel */ 2244 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2245 1.3.2.2 kardel TWA_ERROR_AEN_OVERFLOW; 2246 1.3.2.2 kardel sc->twa_aen_queue_overflow = FALSE; 2247 1.3.2.2 kardel } 2248 1.3.2.2 kardel start_index = sc->twa_aen_head; 2249 1.3.2.2 kardel } else { 2250 1.3.2.2 kardel if (sc->twa_aen_head == sc->twa_aen_tail) { 2251 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2252 1.3.2.2 kardel TWA_ERROR_AEN_NO_EVENTS; 2253 1.3.2.2 kardel break; 2254 1.3.2.2 kardel } 2255 1.3.2.2 kardel start_index = sc->twa_aen_tail; /* = 0 */ 2256 1.3.2.2 kardel } 2257 1.3.2.2 kardel if ((error = copyin(user_buf->pdata, &event_buf, 2258 1.3.2.2 kardel sizeof(struct tw_cl_event_packet))) != 0) 2259 1.3.2.2 kardel 2260 1.3.2.2 kardel event_index = (start_index + event_buf.sequence_id - 2261 1.3.2.2 kardel (sc->twa_aen_queue[start_index])->sequence_id - 1) % TWA_Q_LENGTH; 2262 1.3.2.2 kardel if (! ((sc->twa_aen_queue[event_index])->sequence_id < 2263 1.3.2.2 kardel event_buf.sequence_id)) { 2264 1.3.2.2 kardel if (user_buf->twa_drvr_pkt.status == TWA_ERROR_AEN_OVERFLOW) 2265 1.3.2.2 kardel sc->twa_aen_queue_overflow = TRUE; /* so we report the overflow next time */ 2266 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2267 1.3.2.2 kardel TWA_ERROR_AEN_NO_EVENTS; 2268 1.3.2.2 kardel break; 2269 1.3.2.2 kardel } 2270 1.3.2.2 kardel if ((error = copyout(sc->twa_aen_queue [event_index], user_buf->pdata, 2271 1.3.2.2 kardel sizeof(struct tw_cl_event_packet))) != 0) 2272 1.3.2.2 kardel aprint_error("%s: get_previous: Could not copyout to " 2273 1.3.2.2 kardel "event_buf. error = %x\n", sc->twa_dv.dv_xname, error); 2274 1.3.2.2 kardel (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2275 1.3.2.2 kardel break; 2276 1.3.2.2 kardel 2277 1.3.2.2 kardel case TW_CL_IOCTL_GET_LOCK: 2278 1.3.2.2 kardel { 2279 1.3.2.2 kardel struct tw_cl_lock_packet twa_lock; 2280 1.3.2.2 kardel 2281 1.3.2.2 kardel copyin(user_buf->pdata, &twa_lock, 2282 1.3.2.2 kardel sizeof(struct tw_cl_lock_packet)); 2283 1.3.2.2 kardel s = splbio(); 2284 1.3.2.2 kardel if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2285 1.3.2.2 kardel (twa_lock.force_flag) || 2286 1.3.2.2 kardel (time.tv_sec >= sc->twa_ioctl_lock.timeout)) { 2287 1.3.2.2 kardel 2288 1.3.2.2 kardel sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2289 1.3.2.2 kardel sc->twa_ioctl_lock.timeout = time.tv_sec + 2290 1.3.2.2 kardel (twa_lock.timeout_msec / 1000); 2291 1.3.2.2 kardel twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2292 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2293 1.3.2.2 kardel } else { 2294 1.3.2.2 kardel twa_lock.time_remaining_msec = 2295 1.3.2.2 kardel (sc->twa_ioctl_lock.timeout - time.tv_sec) * 2296 1.3.2.2 kardel 1000; 2297 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2298 1.3.2.2 kardel TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2299 1.3.2.2 kardel } 2300 1.3.2.2 kardel splx(s); 2301 1.3.2.2 kardel copyout(&twa_lock, user_buf->pdata, 2302 1.3.2.2 kardel sizeof(struct tw_cl_lock_packet)); 2303 1.3.2.2 kardel break; 2304 1.3.2.2 kardel } 2305 1.3.2.2 kardel 2306 1.3.2.2 kardel case TW_CL_IOCTL_RELEASE_LOCK: 2307 1.3.2.2 kardel s = splbio(); 2308 1.3.2.2 kardel if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2309 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 2310 1.3.2.2 kardel TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2311 1.3.2.2 kardel } else { 2312 1.3.2.2 kardel sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2313 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2314 1.3.2.2 kardel } 2315 1.3.2.2 kardel splx(s); 2316 1.3.2.2 kardel break; 2317 1.3.2.2 kardel 2318 1.3.2.2 kardel case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2319 1.3.2.2 kardel { 2320 1.3.2.2 kardel struct tw_cl_compatibility_packet comp_pkt; 2321 1.3.2.2 kardel 2322 1.3.2.2 kardel memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2323 1.3.2.2 kardel sizeof(TWA_DRIVER_VERSION_STRING)); 2324 1.3.2.2 kardel comp_pkt.working_srl = sc->working_srl; 2325 1.3.2.2 kardel comp_pkt.working_branch = sc->working_branch; 2326 1.3.2.2 kardel comp_pkt.working_build = sc->working_build; 2327 1.3.2.2 kardel user_buf->twa_drvr_pkt.status = 0; 2328 1.3.2.2 kardel 2329 1.3.2.2 kardel /* Copy compatibility information to user space. */ 2330 1.3.2.2 kardel copyout(&comp_pkt, user_buf->pdata, 2331 1.3.2.2 kardel min(sizeof(struct tw_cl_compatibility_packet), 2332 1.3.2.2 kardel user_buf->twa_drvr_pkt.buffer_length)); 2333 1.3.2.2 kardel break; 2334 1.3.2.2 kardel } 2335 1.3.2.2 kardel 2336 1.3.2.2 kardel case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2337 1.3.2.2 kardel { 2338 1.3.2.2 kardel struct twa_unitname *tn; 2339 1.3.2.2 kardel struct twa_drive *tdr; 2340 1.3.2.2 kardel 2341 1.3.2.2 kardel tn = (struct twa_unitname *)data; 2342 1.3.2.2 kardel /* XXX mutex */ 2343 1.3.2.2 kardel if (tn->tn_unit < 0 || tn->tn_unit >= TWA_MAX_UNITS) 2344 1.3.2.2 kardel return (EINVAL); 2345 1.3.2.2 kardel tdr = &sc->sc_units[tn->tn_unit]; 2346 1.3.2.2 kardel if (tdr->td_dev == NULL) 2347 1.3.2.2 kardel tn->tn_name[0] = '\0'; 2348 1.3.2.2 kardel else 2349 1.3.2.2 kardel strlcpy(tn->tn_name, tdr->td_dev->dv_xname, 2350 1.3.2.2 kardel sizeof(tn->tn_name)); 2351 1.3.2.2 kardel return (0); 2352 1.3.2.2 kardel } 2353 1.3.2.2 kardel 2354 1.3.2.2 kardel default: 2355 1.3.2.2 kardel /* Unknown opcode. */ 2356 1.3.2.2 kardel error = ENOTTY; 2357 1.3.2.2 kardel } 2358 1.3.2.2 kardel 2359 1.3.2.2 kardel return(error); 2360 1.3.2.2 kardel } 2361 1.3.2.2 kardel 2362 1.3.2.2 kardel 2363 1.3.2.2 kardel const struct cdevsw twa_cdevsw = { 2364 1.3.2.2 kardel twaopen, twaclose, noread, nowrite, twaioctl, 2365 1.3.2.2 kardel nostop, notty, nopoll, nommap, 2366 1.3.2.2 kardel }; 2367 1.3.2.2 kardel 2368 1.3.2.2 kardel 2369 1.3.2.2 kardel /* 2370 1.3.2.2 kardel * Function name: twa_get_param 2371 1.3.2.2 kardel * Description: Get a firmware parameter. 2372 1.3.2.2 kardel * 2373 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 2374 1.3.2.2 kardel * table_id -- parameter table # 2375 1.3.2.2 kardel * param_id -- index of the parameter in the table 2376 1.3.2.2 kardel * param_size -- size of the parameter in bytes 2377 1.3.2.2 kardel * callback -- ptr to function, if any, to be called 2378 1.3.2.2 kardel * back on completion; NULL if no callback. 2379 1.3.2.2 kardel * Output: None 2380 1.3.2.2 kardel * Return value: ptr to param structure -- success 2381 1.3.2.2 kardel * NULL -- failure 2382 1.3.2.2 kardel */ 2383 1.3.2.2 kardel static int 2384 1.3.2.2 kardel twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2385 1.3.2.2 kardel size_t param_size, void (* callback)(struct twa_request *tr), 2386 1.3.2.2 kardel struct twa_param_9k **param) 2387 1.3.2.2 kardel { 2388 1.3.2.2 kardel int rv = 0; 2389 1.3.2.2 kardel struct twa_request *tr; 2390 1.3.2.2 kardel union twa_command_7k *cmd; 2391 1.3.2.2 kardel 2392 1.3.2.2 kardel /* Get a request packet. */ 2393 1.3.2.2 kardel if ((tr = twa_get_request(sc, 0)) == NULL) { 2394 1.3.2.2 kardel rv = EAGAIN; 2395 1.3.2.2 kardel goto out; 2396 1.3.2.2 kardel } 2397 1.3.2.2 kardel 2398 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2399 1.3.2.2 kardel 2400 1.3.2.2 kardel /* Allocate memory to read data into. */ 2401 1.3.2.2 kardel if ((*param = (struct twa_param_9k *) 2402 1.3.2.2 kardel malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2403 1.3.2.2 kardel rv = ENOMEM; 2404 1.3.2.2 kardel goto out; 2405 1.3.2.2 kardel } 2406 1.3.2.2 kardel 2407 1.3.2.2 kardel memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2408 1.3.2.2 kardel tr->tr_data = *param; 2409 1.3.2.2 kardel tr->tr_length = TWA_SECTOR_SIZE; 2410 1.3.2.2 kardel tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2411 1.3.2.2 kardel 2412 1.3.2.2 kardel /* Build the cmd pkt. */ 2413 1.3.2.2 kardel cmd = &(tr->tr_command->command.cmd_pkt_7k); 2414 1.3.2.2 kardel 2415 1.3.2.2 kardel tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2416 1.3.2.2 kardel 2417 1.3.2.2 kardel cmd->param.opcode = TWA_OP_GET_PARAM; 2418 1.3.2.2 kardel cmd->param.sgl_offset = 2; 2419 1.3.2.2 kardel cmd->param.size = 2; 2420 1.3.2.2 kardel cmd->param.request_id = tr->tr_request_id; 2421 1.3.2.2 kardel cmd->param.unit = 0; 2422 1.3.2.2 kardel cmd->param.param_count = 1; 2423 1.3.2.2 kardel 2424 1.3.2.2 kardel /* Specify which parameter we need. */ 2425 1.3.2.2 kardel (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2426 1.3.2.2 kardel (*param)->parameter_id = param_id; 2427 1.3.2.2 kardel (*param)->parameter_size_bytes = param_size; 2428 1.3.2.2 kardel 2429 1.3.2.2 kardel /* Submit the command. */ 2430 1.3.2.2 kardel if (callback == NULL) { 2431 1.3.2.2 kardel /* There's no call back; wait till the command completes. */ 2432 1.3.2.2 kardel rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2433 1.3.2.2 kardel 2434 1.3.2.2 kardel if (rv != 0) 2435 1.3.2.2 kardel goto out; 2436 1.3.2.2 kardel 2437 1.3.2.2 kardel if ((rv = cmd->param.status) != 0) { 2438 1.3.2.2 kardel /* twa_drain_complete_queue will have done the unmapping */ 2439 1.3.2.2 kardel goto out; 2440 1.3.2.2 kardel } 2441 1.3.2.2 kardel twa_release_request(tr); 2442 1.3.2.2 kardel return (rv); 2443 1.3.2.2 kardel } else { 2444 1.3.2.2 kardel /* There's a call back. Simply submit the command. */ 2445 1.3.2.2 kardel tr->tr_callback = callback; 2446 1.3.2.2 kardel rv = twa_map_request(tr); 2447 1.3.2.2 kardel return (rv); 2448 1.3.2.2 kardel } 2449 1.3.2.2 kardel out: 2450 1.3.2.2 kardel if (tr) 2451 1.3.2.2 kardel twa_release_request(tr); 2452 1.3.2.2 kardel return(rv); 2453 1.3.2.2 kardel } 2454 1.3.2.2 kardel 2455 1.3.2.2 kardel 2456 1.3.2.2 kardel /* 2457 1.3.2.2 kardel * Function name: twa_set_param 2458 1.3.2.2 kardel * Description: Set a firmware parameter. 2459 1.3.2.2 kardel * 2460 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 2461 1.3.2.2 kardel * table_id -- parameter table # 2462 1.3.2.2 kardel * param_id -- index of the parameter in the table 2463 1.3.2.2 kardel * param_size -- size of the parameter in bytes 2464 1.3.2.2 kardel * callback -- ptr to function, if any, to be called 2465 1.3.2.2 kardel * back on completion; NULL if no callback. 2466 1.3.2.2 kardel * Output: None 2467 1.3.2.2 kardel * Return value: 0 -- success 2468 1.3.2.2 kardel * non-zero-- failure 2469 1.3.2.2 kardel */ 2470 1.3.2.2 kardel static int 2471 1.3.2.2 kardel twa_set_param(struct twa_softc *sc, int table_id, 2472 1.3.2.2 kardel int param_id, int param_size, void *data, 2473 1.3.2.2 kardel void (* callback)(struct twa_request *tr)) 2474 1.3.2.2 kardel { 2475 1.3.2.2 kardel struct twa_request *tr; 2476 1.3.2.2 kardel union twa_command_7k *cmd; 2477 1.3.2.2 kardel struct twa_param_9k *param = NULL; 2478 1.3.2.2 kardel int error = ENOMEM; 2479 1.3.2.2 kardel 2480 1.3.2.2 kardel tr = twa_get_request(sc, 0); 2481 1.3.2.2 kardel if (tr == NULL) 2482 1.3.2.2 kardel return (EAGAIN); 2483 1.3.2.2 kardel 2484 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2485 1.3.2.2 kardel 2486 1.3.2.2 kardel /* Allocate memory to send data using. */ 2487 1.3.2.2 kardel if ((param = (struct twa_param_9k *) 2488 1.3.2.2 kardel malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2489 1.3.2.2 kardel goto out; 2490 1.3.2.2 kardel memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2491 1.3.2.2 kardel tr->tr_data = param; 2492 1.3.2.2 kardel tr->tr_length = TWA_SECTOR_SIZE; 2493 1.3.2.2 kardel tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2494 1.3.2.2 kardel 2495 1.3.2.2 kardel /* Build the cmd pkt. */ 2496 1.3.2.2 kardel cmd = &(tr->tr_command->command.cmd_pkt_7k); 2497 1.3.2.2 kardel 2498 1.3.2.2 kardel tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2499 1.3.2.2 kardel 2500 1.3.2.2 kardel cmd->param.opcode = TWA_OP_SET_PARAM; 2501 1.3.2.2 kardel cmd->param.sgl_offset = 2; 2502 1.3.2.2 kardel cmd->param.size = 2; 2503 1.3.2.2 kardel cmd->param.request_id = tr->tr_request_id; 2504 1.3.2.2 kardel cmd->param.unit = 0; 2505 1.3.2.2 kardel cmd->param.param_count = 1; 2506 1.3.2.2 kardel 2507 1.3.2.2 kardel /* Specify which parameter we want to set. */ 2508 1.3.2.2 kardel param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2509 1.3.2.2 kardel param->parameter_id = param_id; 2510 1.3.2.2 kardel param->parameter_size_bytes = param_size; 2511 1.3.2.2 kardel memcpy(param->data, data, param_size); 2512 1.3.2.2 kardel 2513 1.3.2.2 kardel /* Submit the command. */ 2514 1.3.2.2 kardel if (callback == NULL) { 2515 1.3.2.2 kardel /* There's no call back; wait till the command completes. */ 2516 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2517 1.3.2.2 kardel if (error == ETIMEDOUT) 2518 1.3.2.2 kardel return(error); /* clean-up done by twa_immediate_request */ 2519 1.3.2.2 kardel if (error) 2520 1.3.2.2 kardel goto out; 2521 1.3.2.2 kardel if ((error = cmd->param.status)) { 2522 1.3.2.2 kardel goto out; /* twa_drain_complete_queue will have done the unmapping */ 2523 1.3.2.2 kardel } 2524 1.3.2.2 kardel free(param, M_DEVBUF); 2525 1.3.2.2 kardel twa_release_request(tr); 2526 1.3.2.2 kardel return(error); 2527 1.3.2.2 kardel } else { 2528 1.3.2.2 kardel /* There's a call back. Simply submit the command. */ 2529 1.3.2.2 kardel tr->tr_callback = callback; 2530 1.3.2.2 kardel if ((error = twa_map_request(tr))) 2531 1.3.2.2 kardel goto out; 2532 1.3.2.2 kardel 2533 1.3.2.2 kardel return (0); 2534 1.3.2.2 kardel } 2535 1.3.2.2 kardel out: 2536 1.3.2.2 kardel if (param) 2537 1.3.2.2 kardel free(param, M_DEVBUF); 2538 1.3.2.2 kardel if (tr) 2539 1.3.2.2 kardel twa_release_request(tr); 2540 1.3.2.2 kardel return(error); 2541 1.3.2.2 kardel } 2542 1.3.2.2 kardel 2543 1.3.2.2 kardel 2544 1.3.2.2 kardel /* 2545 1.3.2.2 kardel * Function name: twa_init_connection 2546 1.3.2.2 kardel * Description: Send init_connection cmd to firmware 2547 1.3.2.2 kardel * 2548 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 2549 1.3.2.2 kardel * message_credits -- max # of requests that we might send 2550 1.3.2.2 kardel * down simultaneously. This will be 2551 1.3.2.2 kardel * typically set to 256 at init-time or 2552 1.3.2.2 kardel * after a reset, and to 1 at shutdown-time 2553 1.3.2.2 kardel * set_features -- indicates if we intend to use 64-bit 2554 1.3.2.2 kardel * sg, also indicates if we want to do a 2555 1.3.2.2 kardel * basic or an extended init_connection; 2556 1.3.2.2 kardel * 2557 1.3.2.2 kardel * Note: The following input/output parameters are valid, only in case of an 2558 1.3.2.2 kardel * extended init_connection: 2559 1.3.2.2 kardel * 2560 1.3.2.2 kardel * current_fw_srl -- srl of fw we are bundled 2561 1.3.2.2 kardel * with, if any; 0 otherwise 2562 1.3.2.2 kardel * current_fw_arch_id -- arch_id of fw we are bundled 2563 1.3.2.2 kardel * with, if any; 0 otherwise 2564 1.3.2.2 kardel * current_fw_branch -- branch # of fw we are bundled 2565 1.3.2.2 kardel * with, if any; 0 otherwise 2566 1.3.2.2 kardel * current_fw_build -- build # of fw we are bundled 2567 1.3.2.2 kardel * with, if any; 0 otherwise 2568 1.3.2.2 kardel * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2569 1.3.2.2 kardel * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2570 1.3.2.2 kardel * fw_on_ctlr_branch -- branch # of fw on ctlr 2571 1.3.2.2 kardel * fw_on_ctlr_build -- build # of fw on ctlr 2572 1.3.2.2 kardel * init_connect_result -- result bitmap of fw response 2573 1.3.2.2 kardel * Return value: 0 -- success 2574 1.3.2.2 kardel * non-zero-- failure 2575 1.3.2.2 kardel */ 2576 1.3.2.2 kardel static int 2577 1.3.2.2 kardel twa_init_connection(struct twa_softc *sc, u_int16_t message_credits, 2578 1.3.2.2 kardel u_int32_t set_features, u_int16_t current_fw_srl, 2579 1.3.2.2 kardel u_int16_t current_fw_arch_id, u_int16_t current_fw_branch, 2580 1.3.2.2 kardel u_int16_t current_fw_build, u_int16_t *fw_on_ctlr_srl, 2581 1.3.2.2 kardel u_int16_t *fw_on_ctlr_arch_id, u_int16_t *fw_on_ctlr_branch, 2582 1.3.2.2 kardel u_int16_t *fw_on_ctlr_build, u_int32_t *init_connect_result) 2583 1.3.2.2 kardel { 2584 1.3.2.2 kardel struct twa_request *tr; 2585 1.3.2.2 kardel struct twa_command_init_connect *init_connect; 2586 1.3.2.2 kardel int error = 1; 2587 1.3.2.2 kardel 2588 1.3.2.2 kardel /* Get a request packet. */ 2589 1.3.2.2 kardel if ((tr = twa_get_request(sc, 0)) == NULL) 2590 1.3.2.2 kardel goto out; 2591 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2592 1.3.2.2 kardel /* Build the cmd pkt. */ 2593 1.3.2.2 kardel init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2594 1.3.2.2 kardel 2595 1.3.2.2 kardel tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2596 1.3.2.2 kardel 2597 1.3.2.2 kardel init_connect->opcode = TWA_OP_INIT_CONNECTION; 2598 1.3.2.2 kardel init_connect->request_id = tr->tr_request_id; 2599 1.3.2.2 kardel init_connect->message_credits = message_credits; 2600 1.3.2.2 kardel init_connect->features = set_features; 2601 1.3.2.2 kardel if (TWA_64BIT_ADDRESSES) { 2602 1.3.2.2 kardel printf("64 bit addressing supported for scatter/gather list\n"); 2603 1.3.2.2 kardel init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2604 1.3.2.2 kardel } 2605 1.3.2.2 kardel if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2606 1.3.2.2 kardel /* 2607 1.3.2.2 kardel * Fill in the extra fields needed for 2608 1.3.2.2 kardel * an extended init_connect. 2609 1.3.2.2 kardel */ 2610 1.3.2.2 kardel init_connect->size = 6; 2611 1.3.2.2 kardel init_connect->fw_srl = current_fw_srl; 2612 1.3.2.2 kardel init_connect->fw_arch_id = current_fw_arch_id; 2613 1.3.2.2 kardel init_connect->fw_branch = current_fw_branch; 2614 1.3.2.2 kardel } else 2615 1.3.2.2 kardel init_connect->size = 3; 2616 1.3.2.2 kardel 2617 1.3.2.2 kardel /* Submit the command, and wait for it to complete. */ 2618 1.3.2.2 kardel error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2619 1.3.2.2 kardel if (error == ETIMEDOUT) 2620 1.3.2.2 kardel return(error); /* clean-up done by twa_immediate_request */ 2621 1.3.2.2 kardel if (error) 2622 1.3.2.2 kardel goto out; 2623 1.3.2.2 kardel if ((error = init_connect->status)) { 2624 1.3.2.2 kardel goto out; /* twa_drain_complete_queue will have done the unmapping */ 2625 1.3.2.2 kardel } 2626 1.3.2.2 kardel if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2627 1.3.2.2 kardel *fw_on_ctlr_srl = init_connect->fw_srl; 2628 1.3.2.2 kardel *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2629 1.3.2.2 kardel *fw_on_ctlr_branch = init_connect->fw_branch; 2630 1.3.2.2 kardel *fw_on_ctlr_build = init_connect->fw_build; 2631 1.3.2.2 kardel *init_connect_result = init_connect->result; 2632 1.3.2.2 kardel } 2633 1.3.2.2 kardel twa_release_request(tr); 2634 1.3.2.2 kardel return(error); 2635 1.3.2.2 kardel 2636 1.3.2.2 kardel out: 2637 1.3.2.2 kardel if (tr) 2638 1.3.2.2 kardel twa_release_request(tr); 2639 1.3.2.2 kardel return(error); 2640 1.3.2.2 kardel } 2641 1.3.2.2 kardel 2642 1.3.2.2 kardel 2643 1.3.2.2 kardel static int 2644 1.3.2.2 kardel twa_reset(struct twa_softc *sc) 2645 1.3.2.2 kardel { 2646 1.3.2.2 kardel int s; 2647 1.3.2.2 kardel int error = 0; 2648 1.3.2.2 kardel 2649 1.3.2.2 kardel /* 2650 1.3.2.2 kardel * Disable interrupts from the controller, and mask any 2651 1.3.2.2 kardel * accidental entry into our interrupt handler. 2652 1.3.2.2 kardel */ 2653 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2654 1.3.2.2 kardel TWA_CONTROL_DISABLE_INTERRUPTS); 2655 1.3.2.2 kardel 2656 1.3.2.2 kardel s = splbio(); 2657 1.3.2.2 kardel 2658 1.3.2.2 kardel /* Soft reset the controller. */ 2659 1.3.2.2 kardel if ((error = twa_soft_reset(sc))) 2660 1.3.2.2 kardel goto out; 2661 1.3.2.2 kardel 2662 1.3.2.2 kardel /* Re-establish logical connection with the controller. */ 2663 1.3.2.2 kardel if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2664 1.3.2.2 kardel 0, 0, 0, 0, 0, 2665 1.3.2.2 kardel NULL, NULL, NULL, NULL, NULL))) { 2666 1.3.2.2 kardel goto out; 2667 1.3.2.2 kardel } 2668 1.3.2.2 kardel /* 2669 1.3.2.2 kardel * Complete all requests in the complete queue; error back all requests 2670 1.3.2.2 kardel * in the busy queue. Any internal requests will be simply freed. 2671 1.3.2.2 kardel * Re-submit any requests in the pending queue. 2672 1.3.2.2 kardel */ 2673 1.3.2.2 kardel twa_drain_busy_queue(sc); 2674 1.3.2.2 kardel 2675 1.3.2.2 kardel out: 2676 1.3.2.2 kardel splx(s); 2677 1.3.2.2 kardel /* 2678 1.3.2.2 kardel * Enable interrupts, and also clear attention and response interrupts. 2679 1.3.2.2 kardel */ 2680 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2681 1.3.2.2 kardel TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2682 1.3.2.2 kardel TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2683 1.3.2.2 kardel TWA_CONTROL_ENABLE_INTERRUPTS); 2684 1.3.2.2 kardel return(error); 2685 1.3.2.2 kardel } 2686 1.3.2.2 kardel 2687 1.3.2.2 kardel 2688 1.3.2.2 kardel static int 2689 1.3.2.2 kardel twa_soft_reset(struct twa_softc *sc) 2690 1.3.2.2 kardel { 2691 1.3.2.2 kardel u_int32_t status_reg; 2692 1.3.2.2 kardel 2693 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2694 1.3.2.2 kardel TWA_CONTROL_ISSUE_SOFT_RESET | 2695 1.3.2.2 kardel TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2696 1.3.2.2 kardel TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2697 1.3.2.2 kardel TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2698 1.3.2.2 kardel TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2699 1.3.2.2 kardel TWA_CONTROL_DISABLE_INTERRUPTS); 2700 1.3.2.2 kardel 2701 1.3.2.2 kardel if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2702 1.3.2.2 kardel TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2703 1.3.2.2 kardel aprint_error("%s: no attention interrupt after reset.\n", 2704 1.3.2.2 kardel sc->twa_dv.dv_xname); 2705 1.3.2.2 kardel return(1); 2706 1.3.2.2 kardel } 2707 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2708 1.3.2.2 kardel TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2709 1.3.2.2 kardel 2710 1.3.2.2 kardel if (twa_drain_response_queue(sc)) { 2711 1.3.2.2 kardel aprint_error("%s: cannot drain response queue.\n",sc->twa_dv.dv_xname); 2712 1.3.2.2 kardel return(1); 2713 1.3.2.2 kardel } 2714 1.3.2.2 kardel if (twa_drain_aen_queue(sc)) { 2715 1.3.2.2 kardel aprint_error("%s: cannot drain AEN queue.\n", sc->twa_dv.dv_xname); 2716 1.3.2.2 kardel return(1); 2717 1.3.2.2 kardel } 2718 1.3.2.2 kardel if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2719 1.3.2.2 kardel aprint_error("%s: reset not reported by controller.\n", 2720 1.3.2.2 kardel sc->twa_dv.dv_xname); 2721 1.3.2.2 kardel return(1); 2722 1.3.2.2 kardel } 2723 1.3.2.2 kardel status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2724 1.3.2.2 kardel if (TWA_STATUS_ERRORS(status_reg) || 2725 1.3.2.2 kardel twa_check_ctlr_state(sc, status_reg)) { 2726 1.3.2.2 kardel aprint_error("%s: controller errors detected.\n", sc->twa_dv.dv_xname); 2727 1.3.2.2 kardel return(1); 2728 1.3.2.2 kardel } 2729 1.3.2.2 kardel return(0); 2730 1.3.2.2 kardel } 2731 1.3.2.2 kardel 2732 1.3.2.2 kardel 2733 1.3.2.2 kardel static int 2734 1.3.2.2 kardel twa_wait_status(struct twa_softc *sc, u_int32_t status, u_int32_t timeout) 2735 1.3.2.2 kardel { 2736 1.3.2.2 kardel struct timeval t1; 2737 1.3.2.2 kardel time_t end_time; 2738 1.3.2.2 kardel u_int32_t status_reg; 2739 1.3.2.2 kardel 2740 1.3.2.2 kardel timeout = (timeout * 1000 * 100); 2741 1.3.2.2 kardel 2742 1.3.2.2 kardel microtime(&t1); 2743 1.3.2.2 kardel 2744 1.3.2.2 kardel end_time = t1.tv_usec + timeout; 2745 1.3.2.2 kardel 2746 1.3.2.2 kardel do { 2747 1.3.2.2 kardel status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2748 1.3.2.2 kardel if ((status_reg & status) == status)/* got the required bit(s)? */ 2749 1.3.2.2 kardel return(0); 2750 1.3.2.2 kardel DELAY(100000); 2751 1.3.2.2 kardel microtime(&t1); 2752 1.3.2.2 kardel } while (t1.tv_usec <= end_time); 2753 1.3.2.2 kardel 2754 1.3.2.2 kardel return(1); 2755 1.3.2.2 kardel } 2756 1.3.2.2 kardel 2757 1.3.2.2 kardel 2758 1.3.2.2 kardel static int 2759 1.3.2.2 kardel twa_fetch_aen(struct twa_softc *sc) 2760 1.3.2.2 kardel { 2761 1.3.2.2 kardel struct twa_request *tr; 2762 1.3.2.2 kardel int s, error = 0; 2763 1.3.2.2 kardel 2764 1.3.2.2 kardel s = splbio(); 2765 1.3.2.2 kardel 2766 1.3.2.2 kardel if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) 2767 1.3.2.2 kardel return(EIO); 2768 1.3.2.2 kardel tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2769 1.3.2.2 kardel tr->tr_callback = twa_aen_callback; 2770 1.3.2.2 kardel tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2771 1.3.2.2 kardel if (twa_request_sense(tr, 0) != 0) { 2772 1.3.2.2 kardel if (tr->tr_data) 2773 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 2774 1.3.2.2 kardel twa_release_request(tr); 2775 1.3.2.2 kardel error = 1; 2776 1.3.2.2 kardel } 2777 1.3.2.2 kardel splx(s); 2778 1.3.2.2 kardel 2779 1.3.2.2 kardel return(error); 2780 1.3.2.2 kardel } 2781 1.3.2.2 kardel 2782 1.3.2.2 kardel 2783 1.3.2.2 kardel 2784 1.3.2.2 kardel /* 2785 1.3.2.2 kardel * Function name: twa_aen_callback 2786 1.3.2.2 kardel * Description: Callback for requests to fetch AEN's. 2787 1.3.2.2 kardel * 2788 1.3.2.2 kardel * Input: tr -- ptr to completed request pkt 2789 1.3.2.2 kardel * Output: None 2790 1.3.2.2 kardel * Return value: None 2791 1.3.2.2 kardel */ 2792 1.3.2.2 kardel static void 2793 1.3.2.2 kardel twa_aen_callback(struct twa_request *tr) 2794 1.3.2.2 kardel { 2795 1.3.2.2 kardel int i; 2796 1.3.2.2 kardel int fetch_more_aens = 0; 2797 1.3.2.2 kardel struct twa_softc *sc = tr->tr_sc; 2798 1.3.2.2 kardel struct twa_command_header *cmd_hdr = 2799 1.3.2.2 kardel (struct twa_command_header *)(tr->tr_data); 2800 1.3.2.2 kardel struct twa_command_9k *cmd = 2801 1.3.2.2 kardel &(tr->tr_command->command.cmd_pkt_9k); 2802 1.3.2.2 kardel 2803 1.3.2.2 kardel if (! cmd->status) { 2804 1.3.2.2 kardel if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2805 1.3.2.2 kardel (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2806 1.3.2.2 kardel if (twa_enqueue_aen(sc, cmd_hdr) 2807 1.3.2.2 kardel != TWA_AEN_QUEUE_EMPTY) 2808 1.3.2.2 kardel fetch_more_aens = 1; 2809 1.3.2.2 kardel } else { 2810 1.3.2.2 kardel cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2811 1.3.2.2 kardel for (i = 0; i < 18; i++) 2812 1.3.2.2 kardel printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2813 1.3.2.2 kardel 2814 1.3.2.2 kardel printf(""); /* print new line */ 2815 1.3.2.2 kardel 2816 1.3.2.2 kardel for (i = 0; i < 128; i++) 2817 1.3.2.2 kardel printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2818 1.3.2.2 kardel } 2819 1.3.2.2 kardel if (tr->tr_data) 2820 1.3.2.2 kardel free(tr->tr_data, M_DEVBUF); 2821 1.3.2.2 kardel twa_release_request(tr); 2822 1.3.2.2 kardel 2823 1.3.2.2 kardel if (fetch_more_aens) 2824 1.3.2.2 kardel twa_fetch_aen(sc); 2825 1.3.2.2 kardel } 2826 1.3.2.2 kardel 2827 1.3.2.2 kardel 2828 1.3.2.2 kardel /* 2829 1.3.2.2 kardel * Function name: twa_enqueue_aen 2830 1.3.2.2 kardel * Description: Queues AEN's to be supplied to user-space tools on request. 2831 1.3.2.2 kardel * 2832 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 2833 1.3.2.2 kardel * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2834 1.3.2.2 kardel * details can be retrieved. 2835 1.3.2.2 kardel * Output: None 2836 1.3.2.2 kardel * Return value: None 2837 1.3.2.2 kardel */ 2838 1.3.2.2 kardel static uint16_t 2839 1.3.2.2 kardel twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2840 1.3.2.2 kardel { 2841 1.3.2.2 kardel int rv, s; 2842 1.3.2.2 kardel struct tw_cl_event_packet *event; 2843 1.3.2.2 kardel uint16_t aen_code; 2844 1.3.2.2 kardel unsigned long sync_time; 2845 1.3.2.2 kardel 2846 1.3.2.2 kardel s = splbio(); 2847 1.3.2.2 kardel aen_code = cmd_hdr->status_block.error; 2848 1.3.2.2 kardel 2849 1.3.2.2 kardel switch (aen_code) { 2850 1.3.2.2 kardel case TWA_AEN_SYNC_TIME_WITH_HOST: 2851 1.3.2.2 kardel 2852 1.3.2.2 kardel sync_time = (time.tv_sec - (3 * 86400)) % 604800; 2853 1.3.2.2 kardel rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2854 1.3.2.2 kardel TWA_PARAM_TIME_SchedulerTime, 4, 2855 1.3.2.2 kardel &sync_time, twa_aen_callback); 2856 1.3.2.2 kardel #ifdef DIAGNOSTIC 2857 1.3.2.2 kardel if (rv != 0) 2858 1.3.2.2 kardel printf("%s: unable to sync time with ctlr\n", 2859 1.3.2.2 kardel sc->twa_dv.dv_xname); 2860 1.3.2.2 kardel #endif 2861 1.3.2.2 kardel break; 2862 1.3.2.2 kardel 2863 1.3.2.2 kardel case TWA_AEN_QUEUE_EMPTY: 2864 1.3.2.2 kardel break; 2865 1.3.2.2 kardel 2866 1.3.2.2 kardel default: 2867 1.3.2.2 kardel /* Queue the event. */ 2868 1.3.2.2 kardel event = sc->twa_aen_queue[sc->twa_aen_head]; 2869 1.3.2.2 kardel if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2870 1.3.2.2 kardel sc->twa_aen_queue_overflow = TRUE; 2871 1.3.2.2 kardel event->severity = 2872 1.3.2.2 kardel cmd_hdr->status_block.substatus_block.severity; 2873 1.3.2.2 kardel event->time_stamp_sec = time.tv_sec; 2874 1.3.2.2 kardel event->aen_code = aen_code; 2875 1.3.2.2 kardel event->retrieved = TWA_AEN_NOT_RETRIEVED; 2876 1.3.2.2 kardel event->sequence_id = ++(sc->twa_current_sequence_id); 2877 1.3.2.2 kardel cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2878 1.3.2.2 kardel event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2879 1.3.2.2 kardel memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2880 1.3.2.2 kardel event->parameter_len); 2881 1.3.2.2 kardel 2882 1.3.2.2 kardel if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2883 1.3.2.2 kardel printf("%s: AEN 0x%04X: %s: %s: %s\n", 2884 1.3.2.2 kardel sc->twa_dv.dv_xname, 2885 1.3.2.2 kardel aen_code, 2886 1.3.2.2 kardel twa_aen_severity_table[event->severity], 2887 1.3.2.2 kardel twa_find_msg_string(twa_aen_table, aen_code), 2888 1.3.2.2 kardel event->parameter_data); 2889 1.3.2.2 kardel } 2890 1.3.2.2 kardel 2891 1.3.2.2 kardel if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2892 1.3.2.2 kardel sc->twa_aen_queue_wrapped = TRUE; 2893 1.3.2.2 kardel sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2894 1.3.2.2 kardel break; 2895 1.3.2.2 kardel } /* switch */ 2896 1.3.2.2 kardel splx(s); 2897 1.3.2.2 kardel 2898 1.3.2.2 kardel return (aen_code); 2899 1.3.2.2 kardel } 2900 1.3.2.2 kardel 2901 1.3.2.2 kardel 2902 1.3.2.2 kardel 2903 1.3.2.2 kardel /* 2904 1.3.2.2 kardel * Function name: twa_find_aen 2905 1.3.2.2 kardel * Description: Reports whether a given AEN ever occurred. 2906 1.3.2.2 kardel * 2907 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 2908 1.3.2.2 kardel * aen_code-- AEN to look for 2909 1.3.2.2 kardel * Output: None 2910 1.3.2.2 kardel * Return value: 0 -- success 2911 1.3.2.2 kardel * non-zero-- failure 2912 1.3.2.2 kardel */ 2913 1.3.2.2 kardel static int 2914 1.3.2.2 kardel twa_find_aen(struct twa_softc *sc, u_int16_t aen_code) 2915 1.3.2.2 kardel { 2916 1.3.2.2 kardel u_int32_t last_index; 2917 1.3.2.2 kardel int s; 2918 1.3.2.2 kardel int i; 2919 1.3.2.2 kardel 2920 1.3.2.2 kardel s = splbio(); 2921 1.3.2.2 kardel 2922 1.3.2.2 kardel if (sc->twa_aen_queue_wrapped) 2923 1.3.2.2 kardel last_index = sc->twa_aen_head; 2924 1.3.2.2 kardel else 2925 1.3.2.2 kardel last_index = 0; 2926 1.3.2.2 kardel 2927 1.3.2.2 kardel i = sc->twa_aen_head; 2928 1.3.2.2 kardel do { 2929 1.3.2.2 kardel i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2930 1.3.2.2 kardel if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2931 1.3.2.2 kardel splx(s); 2932 1.3.2.2 kardel return(0); 2933 1.3.2.2 kardel } 2934 1.3.2.2 kardel } while (i != last_index); 2935 1.3.2.2 kardel 2936 1.3.2.2 kardel splx(s); 2937 1.3.2.2 kardel return(1); 2938 1.3.2.2 kardel } 2939 1.3.2.2 kardel 2940 1.3.2.2 kardel static void inline 2941 1.3.2.2 kardel twa_request_init(struct twa_request *tr, int flags) 2942 1.3.2.2 kardel { 2943 1.3.2.2 kardel tr->tr_data = NULL; 2944 1.3.2.2 kardel tr->tr_real_data = NULL; 2945 1.3.2.2 kardel tr->tr_length = 0; 2946 1.3.2.2 kardel tr->tr_real_length = 0; 2947 1.3.2.2 kardel tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2948 1.3.2.2 kardel tr->tr_flags = flags; 2949 1.3.2.2 kardel tr->tr_error = 0; 2950 1.3.2.2 kardel tr->tr_callback = NULL; 2951 1.3.2.2 kardel tr->tr_cmd_pkt_type = 0; 2952 1.3.2.2 kardel 2953 1.3.2.2 kardel /* 2954 1.3.2.2 kardel * Look at the status field in the command packet to see how 2955 1.3.2.2 kardel * it completed the last time it was used, and zero out only 2956 1.3.2.2 kardel * the portions that might have changed. Note that we don't 2957 1.3.2.2 kardel * care to zero out the sglist. 2958 1.3.2.2 kardel */ 2959 1.3.2.2 kardel if (tr->tr_command->command.cmd_pkt_9k.status) 2960 1.3.2.2 kardel memset(tr->tr_command, 0, 2961 1.3.2.2 kardel sizeof(struct twa_command_header) + 28); 2962 1.3.2.2 kardel else 2963 1.3.2.2 kardel memset(&(tr->tr_command->command), 0, 28); 2964 1.3.2.2 kardel } 2965 1.3.2.2 kardel 2966 1.3.2.2 kardel struct twa_request * 2967 1.3.2.2 kardel twa_get_request_wait(struct twa_softc *sc, int flags) 2968 1.3.2.2 kardel { 2969 1.3.2.2 kardel struct twa_request *tr; 2970 1.3.2.2 kardel int s; 2971 1.3.2.2 kardel 2972 1.3.2.2 kardel KASSERT((flags & TWA_CMD_AEN) == 0); 2973 1.3.2.2 kardel 2974 1.3.2.2 kardel s = splbio(); 2975 1.3.2.2 kardel while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2976 1.3.2.2 kardel sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2977 1.3.2.2 kardel (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2978 1.3.2.2 kardel } 2979 1.3.2.2 kardel TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2980 1.3.2.2 kardel 2981 1.3.2.2 kardel splx(s); 2982 1.3.2.2 kardel 2983 1.3.2.2 kardel twa_request_init(tr, flags); 2984 1.3.2.2 kardel 2985 1.3.2.2 kardel return(tr); 2986 1.3.2.2 kardel } 2987 1.3.2.2 kardel 2988 1.3.2.2 kardel 2989 1.3.2.2 kardel struct twa_request * 2990 1.3.2.2 kardel twa_get_request(struct twa_softc *sc, int flags) 2991 1.3.2.2 kardel { 2992 1.3.2.2 kardel int s; 2993 1.3.2.2 kardel struct twa_request *tr; 2994 1.3.2.2 kardel 2995 1.3.2.2 kardel /* Get a free request packet. */ 2996 1.3.2.2 kardel s = splbio(); 2997 1.3.2.2 kardel if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2998 1.3.2.2 kardel 2999 1.3.2.2 kardel if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 3000 1.3.2.2 kardel tr = sc->sc_twa_request; 3001 1.3.2.2 kardel flags |= TWA_CMD_AEN_BUSY; 3002 1.3.2.2 kardel } else { 3003 1.3.2.2 kardel splx(s); 3004 1.3.2.2 kardel return (NULL); 3005 1.3.2.2 kardel } 3006 1.3.2.2 kardel } else { 3007 1.3.2.2 kardel if (__predict_false((tr = 3008 1.3.2.2 kardel TAILQ_FIRST(&sc->twa_free)) == NULL)) { 3009 1.3.2.2 kardel splx(s); 3010 1.3.2.2 kardel return (NULL); 3011 1.3.2.2 kardel } 3012 1.3.2.2 kardel TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 3013 1.3.2.2 kardel } 3014 1.3.2.2 kardel splx(s); 3015 1.3.2.2 kardel 3016 1.3.2.2 kardel twa_request_init(tr, flags); 3017 1.3.2.2 kardel 3018 1.3.2.2 kardel return(tr); 3019 1.3.2.2 kardel } 3020 1.3.2.2 kardel 3021 1.3.2.2 kardel 3022 1.3.2.2 kardel /* 3023 1.3.2.2 kardel * Print some information about the controller 3024 1.3.2.2 kardel */ 3025 1.3.2.2 kardel static void 3026 1.3.2.2 kardel twa_describe_controller(struct twa_softc *sc) 3027 1.3.2.2 kardel { 3028 1.3.2.2 kardel struct twa_param_9k *p[10]; 3029 1.3.2.2 kardel int i, rv = 0; 3030 1.3.2.2 kardel uint32_t dsize; 3031 1.3.2.2 kardel uint8_t ports; 3032 1.3.2.2 kardel 3033 1.3.2.2 kardel memset(p, sizeof(struct twa_param_9k *), 10); 3034 1.3.2.2 kardel 3035 1.3.2.2 kardel /* Get the port count. */ 3036 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 3037 1.3.2.2 kardel TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 3038 1.3.2.2 kardel 3039 1.3.2.2 kardel /* get version strings */ 3040 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 3041 1.3.2.2 kardel 16, NULL, &p[1]); 3042 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 3043 1.3.2.2 kardel 16, NULL, &p[2]); 3044 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 3045 1.3.2.2 kardel 16, NULL, &p[3]); 3046 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 3047 1.3.2.2 kardel 8, NULL, &p[4]); 3048 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 3049 1.3.2.2 kardel 8, NULL, &p[5]); 3050 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 3051 1.3.2.2 kardel 8, NULL, &p[6]); 3052 1.3.2.2 kardel rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 3053 1.3.2.2 kardel 16, NULL, &p[7]); 3054 1.3.2.2 kardel 3055 1.3.2.2 kardel if (rv) { 3056 1.3.2.2 kardel /* some error occurred */ 3057 1.3.2.2 kardel aprint_error("%s: failed to fetch version information\n", 3058 1.3.2.2 kardel sc->twa_dv.dv_xname); 3059 1.3.2.2 kardel goto bail; 3060 1.3.2.2 kardel } 3061 1.3.2.2 kardel 3062 1.3.2.2 kardel ports = *(u_int8_t *)(p[0]->data); 3063 1.3.2.2 kardel 3064 1.3.2.2 kardel aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 3065 1.3.2.2 kardel sc->twa_dv.dv_xname, ports, 3066 1.3.2.2 kardel p[1]->data, p[2]->data); 3067 1.3.2.2 kardel 3068 1.3.2.2 kardel aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 3069 1.3.2.2 kardel sc->twa_dv.dv_xname, 3070 1.3.2.2 kardel p[3]->data, p[4]->data, 3071 1.3.2.2 kardel p[5]->data, p[6]->data); 3072 1.3.2.2 kardel 3073 1.3.2.2 kardel for (i = 0; i < ports; i++) { 3074 1.3.2.2 kardel 3075 1.3.2.2 kardel if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 3076 1.3.2.2 kardel continue; 3077 1.3.2.2 kardel 3078 1.3.2.2 kardel rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE, 3079 1.3.2.2 kardel TWA_PARAM_DRIVEMODELINDEX, 3080 1.3.2.2 kardel TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3081 1.3.2.2 kardel 3082 1.3.2.2 kardel if (rv != 0) { 3083 1.3.2.2 kardel aprint_error("%s: unable to get drive model for port" 3084 1.3.2.2 kardel " %d\n", sc->twa_dv.dv_xname, i); 3085 1.3.2.2 kardel continue; 3086 1.3.2.2 kardel } 3087 1.3.2.2 kardel 3088 1.3.2.2 kardel rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE, 3089 1.3.2.2 kardel TWA_PARAM_DRIVESIZEINDEX, 3090 1.3.2.2 kardel TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3091 1.3.2.2 kardel 3092 1.3.2.2 kardel if (rv != 0) { 3093 1.3.2.2 kardel aprint_error("%s: unable to get drive size" 3094 1.3.2.2 kardel " for port %d\n", sc->twa_dv.dv_xname, 3095 1.3.2.2 kardel i); 3096 1.3.2.2 kardel free(p[8], M_DEVBUF); 3097 1.3.2.2 kardel continue; 3098 1.3.2.2 kardel } 3099 1.3.2.2 kardel 3100 1.3.2.2 kardel dsize = *(uint32_t *)(p[9]->data); 3101 1.3.2.2 kardel 3102 1.3.2.2 kardel aprint_verbose("%s: port %d: %.40s %d MB\n", 3103 1.3.2.2 kardel sc->twa_dv.dv_xname, i, p[8]->data, dsize / 2048); 3104 1.3.2.2 kardel 3105 1.3.2.2 kardel if (p[8]) 3106 1.3.2.2 kardel free(p[8], M_DEVBUF); 3107 1.3.2.2 kardel if (p[9]) 3108 1.3.2.2 kardel free(p[9], M_DEVBUF); 3109 1.3.2.2 kardel } 3110 1.3.2.2 kardel bail: 3111 1.3.2.2 kardel if (p[0]) 3112 1.3.2.2 kardel free(p[0], M_DEVBUF); 3113 1.3.2.2 kardel if (p[1]) 3114 1.3.2.2 kardel free(p[1], M_DEVBUF); 3115 1.3.2.2 kardel if (p[2]) 3116 1.3.2.2 kardel free(p[2], M_DEVBUF); 3117 1.3.2.2 kardel if (p[3]) 3118 1.3.2.2 kardel free(p[3], M_DEVBUF); 3119 1.3.2.2 kardel if (p[4]) 3120 1.3.2.2 kardel free(p[4], M_DEVBUF); 3121 1.3.2.2 kardel if (p[5]) 3122 1.3.2.2 kardel free(p[5], M_DEVBUF); 3123 1.3.2.2 kardel if (p[6]) 3124 1.3.2.2 kardel free(p[6], M_DEVBUF); 3125 1.3.2.2 kardel } 3126 1.3.2.2 kardel 3127 1.3.2.2 kardel 3128 1.3.2.2 kardel 3129 1.3.2.2 kardel /* 3130 1.3.2.2 kardel * Function name: twa_check_ctlr_state 3131 1.3.2.2 kardel * Description: Makes sure that the fw status register reports a 3132 1.3.2.2 kardel * proper status. 3133 1.3.2.2 kardel * 3134 1.3.2.2 kardel * Input: sc -- ptr to per ctlr structure 3135 1.3.2.2 kardel * status_reg -- value in the status register 3136 1.3.2.2 kardel * Output: None 3137 1.3.2.2 kardel * Return value: 0 -- no errors 3138 1.3.2.2 kardel * non-zero-- errors 3139 1.3.2.2 kardel */ 3140 1.3.2.2 kardel static int 3141 1.3.2.2 kardel twa_check_ctlr_state(struct twa_softc *sc, u_int32_t status_reg) 3142 1.3.2.2 kardel { 3143 1.3.2.2 kardel int result = 0; 3144 1.3.2.2 kardel struct timeval t1; 3145 1.3.2.2 kardel static time_t last_warning[2] = {0, 0}; 3146 1.3.2.2 kardel 3147 1.3.2.2 kardel /* Check if the 'micro-controller ready' bit is not set. */ 3148 1.3.2.2 kardel if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3149 1.3.2.2 kardel TWA_STATUS_EXPECTED_BITS) { 3150 1.3.2.2 kardel 3151 1.3.2.2 kardel microtime(&t1); 3152 1.3.2.2 kardel 3153 1.3.2.2 kardel last_warning[0] += (5 * 1000 * 100); 3154 1.3.2.2 kardel 3155 1.3.2.2 kardel if (t1.tv_usec > last_warning[0]) { 3156 1.3.2.2 kardel microtime(&t1); 3157 1.3.2.2 kardel last_warning[0] = t1.tv_usec; 3158 1.3.2.2 kardel } 3159 1.3.2.2 kardel result = 1; 3160 1.3.2.2 kardel } 3161 1.3.2.2 kardel 3162 1.3.2.2 kardel /* Check if any error bits are set. */ 3163 1.3.2.2 kardel if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3164 1.3.2.2 kardel 3165 1.3.2.2 kardel microtime(&t1); 3166 1.3.2.2 kardel last_warning[1] += (5 * 1000 * 100); 3167 1.3.2.2 kardel if (t1.tv_usec > last_warning[1]) { 3168 1.3.2.2 kardel microtime(&t1); 3169 1.3.2.2 kardel last_warning[1] = t1.tv_usec; 3170 1.3.2.2 kardel } 3171 1.3.2.2 kardel if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3172 1.3.2.2 kardel aprint_error("%s: clearing PCI parity error " 3173 1.3.2.2 kardel "re-seat/move/replace card.\n", 3174 1.3.2.2 kardel sc->twa_dv.dv_xname); 3175 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3176 1.3.2.2 kardel TWA_CONTROL_CLEAR_PARITY_ERROR); 3177 1.3.2.2 kardel pci_conf_write(sc->pc, sc->tag, 3178 1.3.2.2 kardel PCI_COMMAND_STATUS_REG, 3179 1.3.2.2 kardel TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3180 1.3.2.2 kardel result = 1; 3181 1.3.2.2 kardel } 3182 1.3.2.2 kardel if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3183 1.3.2.2 kardel aprint_error("%s: clearing PCI abort\n", 3184 1.3.2.2 kardel sc->twa_dv.dv_xname); 3185 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3186 1.3.2.2 kardel TWA_CONTROL_CLEAR_PCI_ABORT); 3187 1.3.2.2 kardel pci_conf_write(sc->pc, sc->tag, 3188 1.3.2.2 kardel PCI_COMMAND_STATUS_REG, 3189 1.3.2.2 kardel TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3190 1.3.2.2 kardel result = 1; 3191 1.3.2.2 kardel } 3192 1.3.2.2 kardel if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3193 1.3.2.2 kardel aprint_error("%s: clearing controller queue error\n", 3194 1.3.2.2 kardel sc->twa_dv.dv_xname); 3195 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3196 1.3.2.2 kardel TWA_CONTROL_CLEAR_PCI_ABORT); 3197 1.3.2.2 kardel result = 1; 3198 1.3.2.2 kardel } 3199 1.3.2.2 kardel if (status_reg & TWA_STATUS_SBUF_WRITE_ERROR) { 3200 1.3.2.2 kardel aprint_error("%s: clearing SBUF write error\n", 3201 1.3.2.2 kardel sc->twa_dv.dv_xname); 3202 1.3.2.2 kardel twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3203 1.3.2.2 kardel TWA_CONTROL_CLEAR_SBUF_WRITE_ERROR); 3204 1.3.2.2 kardel result = 1; 3205 1.3.2.2 kardel } 3206 1.3.2.2 kardel if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3207 1.3.2.2 kardel aprint_error("%s: micro-controller error\n", 3208 1.3.2.2 kardel sc->twa_dv.dv_xname); 3209 1.3.2.2 kardel result = 1; 3210 1.3.2.2 kardel } 3211 1.3.2.2 kardel } 3212 1.3.2.2 kardel return(result); 3213 1.3.2.2 kardel } 3214 1.3.2.2 kardel 3215 1.3.2.2 kardel 3216
Indexes created Sun Oct 19 02:09:48 GMT 2025