twa.c revision 1.18.16.3
1 /* $NetBSD: twa.c,v 1.18.16.3 2008/06/29 09:33:09 mjf Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.18.16.3 2008/06/29 09:33:09 mjf Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/device.h> 76 #include <sys/queue.h> 77 #include <sys/proc.h> 78 #include <sys/bswap.h> 79 #include <sys/buf.h> 80 #include <sys/bufq.h> 81 #include <sys/endian.h> 82 #include <sys/malloc.h> 83 #include <sys/conf.h> 84 #include <sys/disk.h> 85 #include <sys/sysctl.h> 86 #include <sys/syslog.h> 87 #if 1 88 #include <sys/ktrace.h> 89 #endif 90 91 #include <uvm/uvm_extern.h> 92 93 #include <sys/bus.h> 94 95 #include <dev/pci/pcireg.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/pcidevs.h> 98 #include <dev/pci/twareg.h> 99 #include <dev/pci/twavar.h> 100 #include <dev/pci/twaio.h> 101 102 #include <dev/scsipi/scsipi_all.h> 103 #include <dev/scsipi/scsipi_disk.h> 104 #include <dev/scsipi/scsipiconf.h> 105 #include <dev/scsipi/scsi_spc.h> 106 107 #include <dev/ldvar.h> 108 109 #include "locators.h" 110 111 #define PCI_CBIO 0x10 112 113 static int twa_fetch_aen(struct twa_softc *); 114 static void twa_aen_callback(struct twa_request *); 115 static int twa_find_aen(struct twa_softc *sc, uint16_t); 116 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 117 struct twa_command_header *); 118 119 static void twa_attach(struct device *, struct device *, void *); 120 static void twa_shutdown(void *); 121 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 122 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 123 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 124 static int twa_intr(void *); 125 static int twa_match(struct device *, struct cfdata *, void *); 126 static int twa_reset(struct twa_softc *); 127 128 static int twa_print(void *, const char *); 129 static int twa_soft_reset(struct twa_softc *); 130 131 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 132 static int twa_get_param(struct twa_softc *, int, int, size_t, 133 void (* callback)(struct twa_request *), 134 struct twa_param_9k **); 135 static int twa_set_param(struct twa_softc *, int, int, int, void *, 136 void (* callback)(struct twa_request *)); 137 static void twa_describe_controller(struct twa_softc *); 138 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 139 static int twa_done(struct twa_softc *); 140 141 static int twaopen(dev_t, int, int, struct lwp *); 142 static int twaclose(dev_t, int, int, struct lwp *); 143 static int twaioctl(dev_t, u_long, void *, int, struct lwp *); 144 145 extern struct cfdriver twa_cd; 146 extern uint32_t twa_fw_img_size; 147 extern uint8_t twa_fw_img[]; 148 149 CFATTACH_DECL(twa, sizeof(struct twa_softc), 150 twa_match, twa_attach, NULL, NULL); 151 152 const struct cdevsw twa_cdevsw = { 153 twaopen, twaclose, noread, nowrite, twaioctl, 154 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 155 }; 156 157 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 158 const char twaver[] = "1.50.01.002"; 159 160 /* AEN messages. */ 161 static const struct twa_message twa_aen_table[] = { 162 {0x0000, "AEN queue empty"}, 163 {0x0001, "Controller reset occurred"}, 164 {0x0002, "Degraded unit detected"}, 165 {0x0003, "Controller error occured"}, 166 {0x0004, "Background rebuild failed"}, 167 {0x0005, "Background rebuild done"}, 168 {0x0006, "Incomplete unit detected"}, 169 {0x0007, "Background initialize done"}, 170 {0x0008, "Unclean shutdown detected"}, 171 {0x0009, "Drive timeout detected"}, 172 {0x000A, "Drive error detected"}, 173 {0x000B, "Rebuild started"}, 174 {0x000C, "Background initialize started"}, 175 {0x000D, "Entire logical unit was deleted"}, 176 {0x000E, "Background initialize failed"}, 177 {0x000F, "SMART attribute exceeded threshold"}, 178 {0x0010, "Power supply reported AC under range"}, 179 {0x0011, "Power supply reported DC out of range"}, 180 {0x0012, "Power supply reported a malfunction"}, 181 {0x0013, "Power supply predicted malfunction"}, 182 {0x0014, "Battery charge is below threshold"}, 183 {0x0015, "Fan speed is below threshold"}, 184 {0x0016, "Temperature sensor is above threshold"}, 185 {0x0017, "Power supply was removed"}, 186 {0x0018, "Power supply was inserted"}, 187 {0x0019, "Drive was removed from a bay"}, 188 {0x001A, "Drive was inserted into a bay"}, 189 {0x001B, "Drive bay cover door was opened"}, 190 {0x001C, "Drive bay cover door was closed"}, 191 {0x001D, "Product case was opened"}, 192 {0x0020, "Prepare for shutdown (power-off)"}, 193 {0x0021, "Downgrade UDMA mode to lower speed"}, 194 {0x0022, "Upgrade UDMA mode to higher speed"}, 195 {0x0023, "Sector repair completed"}, 196 {0x0024, "Sbuf memory test failed"}, 197 {0x0025, "Error flushing cached write data to disk"}, 198 {0x0026, "Drive reported data ECC error"}, 199 {0x0027, "DCB has checksum error"}, 200 {0x0028, "DCB version is unsupported"}, 201 {0x0029, "Background verify started"}, 202 {0x002A, "Background verify failed"}, 203 {0x002B, "Background verify done"}, 204 {0x002C, "Bad sector overwritten during rebuild"}, 205 {0x002D, "Source drive error occurred"}, 206 {0x002E, "Replace failed because replacement drive too small"}, 207 {0x002F, "Verify failed because array was never initialized"}, 208 {0x0030, "Unsupported ATA drive"}, 209 {0x0031, "Synchronize host/controller time"}, 210 {0x0032, "Spare capacity is inadequate for some units"}, 211 {0x0033, "Background migration started"}, 212 {0x0034, "Background migration failed"}, 213 {0x0035, "Background migration done"}, 214 {0x0036, "Verify detected and fixed data/parity mismatch"}, 215 {0x0037, "SO-DIMM incompatible"}, 216 {0x0038, "SO-DIMM not detected"}, 217 {0x0039, "Corrected Sbuf ECC error"}, 218 {0x003A, "Drive power on reset detected"}, 219 {0x003B, "Background rebuild paused"}, 220 {0x003C, "Background initialize paused"}, 221 {0x003D, "Background verify paused"}, 222 {0x003E, "Background migration paused"}, 223 {0x003F, "Corrupt flash file system detected"}, 224 {0x0040, "Flash file system repaired"}, 225 {0x0041, "Unit number assignments were lost"}, 226 {0x0042, "Error during read of primary DCB"}, 227 {0x0043, "Latent error found in backup DCB"}, 228 {0x0044, "Battery voltage is normal"}, 229 {0x0045, "Battery voltage is low"}, 230 {0x0046, "Battery voltage is high"}, 231 {0x0047, "Battery voltage is too low"}, 232 {0x0048, "Battery voltage is too high"}, 233 {0x0049, "Battery temperature is normal"}, 234 {0x004A, "Battery temperature is low"}, 235 {0x004B, "Battery temperature is high"}, 236 {0x004C, "Battery temperature is too low"}, 237 {0x004D, "Battery temperature is too high"}, 238 {0x004E, "Battery capacity test started"}, 239 {0x004F, "Cache synchronization skipped"}, 240 {0x0050, "Battery capacity test completed"}, 241 {0x0051, "Battery health check started"}, 242 {0x0052, "Battery health check completed"}, 243 {0x0053, "Battery capacity test needed"}, 244 {0x0054, "Battery charge termination voltage is at high level"}, 245 {0x0055, "Battery charging started"}, 246 {0x0056, "Battery charging completed"}, 247 {0x0057, "Battery charging fault"}, 248 {0x0058, "Battery capacity is below warning level"}, 249 {0x0059, "Battery capacity is below error level"}, 250 {0x005A, "Battery is present"}, 251 {0x005B, "Battery is not present"}, 252 {0x005C, "Battery is weak"}, 253 {0x005D, "Battery health check failed"}, 254 {0x005E, "Cache synchronized after power fail"}, 255 {0x005F, "Cache synchronization failed; some data lost"}, 256 {0x0060, "Bad cache meta data checksum"}, 257 {0x0061, "Bad cache meta data signature"}, 258 {0x0062, "Cache meta data restore failed"}, 259 {0x0063, "BBU not found after power fail"}, 260 {0x00FC, "Recovered/finished array membership update"}, 261 {0x00FD, "Handler lockup"}, 262 {0x00FE, "Retrying PCI transfer"}, 263 {0x00FF, "AEN queue is full"}, 264 {0xFFFFFFFF, (char *)NULL} 265 }; 266 267 /* AEN severity table. */ 268 static const char *twa_aen_severity_table[] = { 269 "None", 270 "ERROR", 271 "WARNING", 272 "INFO", 273 "DEBUG", 274 (char *)NULL 275 }; 276 277 /* Error messages. */ 278 static const struct twa_message twa_error_table[] = { 279 {0x0100, "SGL entry contains zero data"}, 280 {0x0101, "Invalid command opcode"}, 281 {0x0102, "SGL entry has unaligned address"}, 282 {0x0103, "SGL size does not match command"}, 283 {0x0104, "SGL entry has illegal length"}, 284 {0x0105, "Command packet is not aligned"}, 285 {0x0106, "Invalid request ID"}, 286 {0x0107, "Duplicate request ID"}, 287 {0x0108, "ID not locked"}, 288 {0x0109, "LBA out of range"}, 289 {0x010A, "Logical unit not supported"}, 290 {0x010B, "Parameter table does not exist"}, 291 {0x010C, "Parameter index does not exist"}, 292 {0x010D, "Invalid field in CDB"}, 293 {0x010E, "Specified port has invalid drive"}, 294 {0x010F, "Parameter item size mismatch"}, 295 {0x0110, "Failed memory allocation"}, 296 {0x0111, "Memory request too large"}, 297 {0x0112, "Out of memory segments"}, 298 {0x0113, "Invalid address to deallocate"}, 299 {0x0114, "Out of memory"}, 300 {0x0115, "Out of heap"}, 301 {0x0120, "Double degrade"}, 302 {0x0121, "Drive not degraded"}, 303 {0x0122, "Reconstruct error"}, 304 {0x0123, "Replace not accepted"}, 305 {0x0124, "Replace drive capacity too small"}, 306 {0x0125, "Sector count not allowed"}, 307 {0x0126, "No spares left"}, 308 {0x0127, "Reconstruct error"}, 309 {0x0128, "Unit is offline"}, 310 {0x0129, "Cannot update status to DCB"}, 311 {0x0130, "Invalid stripe handle"}, 312 {0x0131, "Handle that was not locked"}, 313 {0x0132, "Handle that was not empy"}, 314 {0x0133, "Handle has different owner"}, 315 {0x0140, "IPR has parent"}, 316 {0x0150, "Illegal Pbuf address alignment"}, 317 {0x0151, "Illegal Pbuf transfer length"}, 318 {0x0152, "Illegal Sbuf address alignment"}, 319 {0x0153, "Illegal Sbuf transfer length"}, 320 {0x0160, "Command packet too large"}, 321 {0x0161, "SGL exceeds maximum length"}, 322 {0x0162, "SGL has too many entries"}, 323 {0x0170, "Insufficient resources for rebuilder"}, 324 {0x0171, "Verify error (data != parity)"}, 325 {0x0180, "Requested segment not in directory of this DCB"}, 326 {0x0181, "DCB segment has unsupported version"}, 327 {0x0182, "DCB segment has checksum error"}, 328 {0x0183, "DCB support (settings) segment invalid"}, 329 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 330 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 331 {0x01A0, "Could not clear Sbuf"}, 332 {0x01C0, "Flash identify failed"}, 333 {0x01C1, "Flash out of bounds"}, 334 {0x01C2, "Flash verify error"}, 335 {0x01C3, "Flash file object not found"}, 336 {0x01C4, "Flash file already present"}, 337 {0x01C5, "Flash file system full"}, 338 {0x01C6, "Flash file not present"}, 339 {0x01C7, "Flash file size error"}, 340 {0x01C8, "Bad flash file checksum"}, 341 {0x01CA, "Corrupt flash file system detected"}, 342 {0x01D0, "Invalid field in parameter list"}, 343 {0x01D1, "Parameter list length error"}, 344 {0x01D2, "Parameter item is not changeable"}, 345 {0x01D3, "Parameter item is not saveable"}, 346 {0x0200, "UDMA CRC error"}, 347 {0x0201, "Internal CRC error"}, 348 {0x0202, "Data ECC error"}, 349 {0x0203, "ADP level 1 error"}, 350 {0x0204, "Port timeout"}, 351 {0x0205, "Drive power on reset"}, 352 {0x0206, "ADP level 2 error"}, 353 {0x0207, "Soft reset failed"}, 354 {0x0208, "Drive not ready"}, 355 {0x0209, "Unclassified port error"}, 356 {0x020A, "Drive aborted command"}, 357 {0x0210, "Internal CRC error"}, 358 {0x0211, "Host PCI bus abort"}, 359 {0x0212, "Host PCI parity error"}, 360 {0x0213, "Port handler error"}, 361 {0x0214, "Token interrupt count error"}, 362 {0x0215, "Timeout waiting for PCI transfer"}, 363 {0x0216, "Corrected buffer ECC"}, 364 {0x0217, "Uncorrected buffer ECC"}, 365 {0x0230, "Unsupported command during flash recovery"}, 366 {0x0231, "Next image buffer expected"}, 367 {0x0232, "Binary image architecture incompatible"}, 368 {0x0233, "Binary image has no signature"}, 369 {0x0234, "Binary image has bad checksum"}, 370 {0x0235, "Image downloaded overflowed buffer"}, 371 {0x0240, "I2C device not found"}, 372 {0x0241, "I2C transaction aborted"}, 373 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 374 {0x0243, "SO-DIMM unsupported"}, 375 {0x0248, "SPI transfer status error"}, 376 {0x0249, "SPI transfer timeout error"}, 377 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 378 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 379 {0x0252, "Invalid value in CreateUnit descriptor"}, 380 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 381 {0x0254, "Unable to create data channel for this unit descriptor"}, 382 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 383 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 384 {0x0257, "CreateUnit does not support this descriptor version"}, 385 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 386 {0x0259, "Too many descriptors in CreateUnit"}, 387 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 388 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 389 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 390 {0x0260, "SMART attribute exceeded threshold"}, 391 {0xFFFFFFFF, (char *)NULL} 392 }; 393 394 struct twa_pci_identity { 395 uint32_t vendor_id; 396 uint32_t product_id; 397 const char *name; 398 }; 399 400 static const struct twa_pci_identity pci_twa_products[] = { 401 { PCI_VENDOR_3WARE, 402 PCI_PRODUCT_3WARE_9000, 403 "3ware 9000 series", 404 }, 405 { PCI_VENDOR_3WARE, 406 PCI_PRODUCT_3WARE_9550, 407 "3ware 9550SX series", 408 }, 409 { PCI_VENDOR_3WARE, 410 PCI_PRODUCT_3WARE_9650, 411 "3ware 9650SE series", 412 }, 413 { PCI_VENDOR_3WARE, 414 PCI_PRODUCT_3WARE_9690, 415 "3ware 9690 series", 416 }, 417 { 0, 418 0, 419 NULL, 420 }, 421 }; 422 423 424 static inline void 425 twa_outl(struct twa_softc *sc, int off, uint32_t val) 426 { 427 428 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 429 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 430 BUS_SPACE_BARRIER_WRITE); 431 } 432 433 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 434 { 435 436 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 437 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 438 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 439 } 440 441 void 442 twa_request_wait_handler(struct twa_request *tr) 443 { 444 445 wakeup(tr); 446 } 447 448 static int 449 twa_match(struct device *parent, struct cfdata *cfdata, 450 void *aux) 451 { 452 int i; 453 struct pci_attach_args *pa = aux; 454 const struct twa_pci_identity *entry = 0; 455 456 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 457 for (i = 0; (pci_twa_products[i].product_id); i++) { 458 entry = &pci_twa_products[i]; 459 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 460 aprint_normal("%s: (rev. 0x%02x)\n", 461 entry->name, PCI_REVISION(pa->pa_class)); 462 return (1); 463 } 464 } 465 } 466 return (0); 467 } 468 469 static const char * 470 twa_find_msg_string(const struct twa_message *table, uint16_t code) 471 { 472 int i; 473 474 for (i = 0; table[i].message != NULL; i++) 475 if (table[i].code == code) 476 return(table[i].message); 477 478 return(table[i].message); 479 } 480 481 void 482 twa_release_request(struct twa_request *tr) 483 { 484 int s; 485 struct twa_softc *sc; 486 487 sc = tr->tr_sc; 488 489 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 490 s = splbio(); 491 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 492 splx(s); 493 if (__predict_false((tr->tr_sc->twa_sc_flags & 494 TWA_STATE_REQUEST_WAIT) != 0)) { 495 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 496 wakeup(&sc->twa_free); 497 } 498 } else 499 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 500 } 501 502 static void 503 twa_unmap_request(struct twa_request *tr) 504 { 505 struct twa_softc *sc = tr->tr_sc; 506 uint8_t cmd_status; 507 int s; 508 509 /* If the command involved data, unmap that too. */ 510 if (tr->tr_data != NULL) { 511 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 512 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 513 else 514 cmd_status = 515 tr->tr_command->command.cmd_pkt_7k.generic.status; 516 517 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 518 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 519 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 520 /* 521 * If we are using a bounce buffer, and we are reading 522 * data, copy the real data in. 523 */ 524 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 525 if (cmd_status == 0) 526 memcpy(tr->tr_real_data, tr->tr_data, 527 tr->tr_real_length); 528 } 529 if (tr->tr_flags & TWA_CMD_DATA_IN) 530 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 531 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 532 533 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 534 } 535 536 /* Free alignment buffer if it was used. */ 537 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 538 s = splvm(); 539 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 540 tr->tr_length, UVM_KMF_WIRED); 541 splx(s); 542 tr->tr_data = tr->tr_real_data; 543 tr->tr_length = tr->tr_real_length; 544 } 545 } 546 547 /* 548 * Function name: twa_wait_request 549 * Description: Sends down a firmware cmd, and waits for the completion, 550 * but NOT in a tight loop. 551 * 552 * Input: tr -- ptr to request pkt 553 * timeout -- max # of seconds to wait before giving up 554 * Output: None 555 * Return value: 0 -- success 556 * non-zero-- failure 557 */ 558 static int 559 twa_wait_request(struct twa_request *tr, uint32_t timeout) 560 { 561 time_t end_time; 562 struct timeval t1; 563 int s, rv; 564 565 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 566 tr->tr_callback = twa_request_wait_handler; 567 tr->tr_status = TWA_CMD_BUSY; 568 569 rv = twa_map_request(tr); 570 571 if (rv != 0) 572 return (rv); 573 574 microtime(&t1); 575 end_time = t1.tv_usec + 576 (timeout * 1000 * 100); 577 578 while (tr->tr_status != TWA_CMD_COMPLETE) { 579 rv = tr->tr_error; 580 if (rv != 0) 581 return(rv); 582 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 583 break; 584 585 if (rv == EWOULDBLOCK) { 586 /* 587 * We will reset the controller only if the request has 588 * already been submitted, so as to not lose the 589 * request packet. If a busy request timed out, the 590 * reset will take care of freeing resources. If a 591 * pending request timed out, we will free resources 592 * for that request, right here. So, the caller is 593 * expected to NOT cleanup when ETIMEDOUT is returned. 594 */ 595 if (tr->tr_status == TWA_CMD_BUSY) 596 twa_reset(tr->tr_sc); 597 else { 598 /* Request was never submitted. Clean up. */ 599 s = splbio(); 600 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 601 tr_link); 602 splx(s); 603 604 twa_unmap_request(tr); 605 if (tr->tr_data) 606 free(tr->tr_data, M_DEVBUF); 607 608 twa_release_request(tr); 609 } 610 return(ETIMEDOUT); 611 } 612 /* 613 * Either the request got completed, or we were woken up by a 614 * signal. Calculate the new timeout, in case it was the 615 * latter. 616 */ 617 microtime(&t1); 618 619 timeout = (end_time - t1.tv_usec) / (1000 * 100); 620 } 621 return(rv); 622 } 623 624 /* 625 * Function name: twa_immediate_request 626 * Description: Sends down a firmware cmd, and waits for the completion 627 * in a tight loop. 628 * 629 * Input: tr -- ptr to request pkt 630 * timeout -- max # of seconds to wait before giving up 631 * Output: None 632 * Return value: 0 -- success 633 * non-zero-- failure 634 */ 635 static int 636 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 637 { 638 struct timeval t1; 639 int s = 0, rv = 0; 640 641 rv = twa_map_request(tr); 642 643 if (rv != 0) 644 return(rv); 645 646 timeout = (timeout * 10000 * 10); 647 648 microtime(&t1); 649 650 timeout += t1.tv_usec; 651 652 do { 653 rv = tr->tr_error; 654 if (rv != 0) 655 return(rv); 656 s = splbio(); 657 twa_done(tr->tr_sc); 658 splx(s); 659 if (tr->tr_status == TWA_CMD_COMPLETE) 660 return(rv); 661 microtime(&t1); 662 } while (t1.tv_usec <= timeout); 663 664 /* 665 * We will reset the controller only if the request has 666 * already been submitted, so as to not lose the 667 * request packet. If a busy request timed out, the 668 * reset will take care of freeing resources. If a 669 * pending request timed out, we will free resources 670 * for that request, right here. So, the caller is 671 * expected to NOT cleanup when ETIMEDOUT is returned. 672 */ 673 rv = ETIMEDOUT; 674 675 if (tr->tr_status == TWA_CMD_BUSY) 676 twa_reset(tr->tr_sc); 677 else { 678 /* Request was never submitted. Clean up. */ 679 s = splbio(); 680 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 681 splx(s); 682 twa_unmap_request(tr); 683 if (tr->tr_data) 684 free(tr->tr_data, M_DEVBUF); 685 686 twa_release_request(tr); 687 } 688 return (rv); 689 } 690 691 static int 692 twa_inquiry(struct twa_request *tr, int lunid) 693 { 694 int error; 695 struct twa_command_9k *tr_9k_cmd; 696 697 if (tr->tr_data == NULL) 698 return (ENOMEM); 699 700 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 701 702 tr->tr_length = TWA_SECTOR_SIZE; 703 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 704 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 705 706 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 707 708 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 709 tr_9k_cmd->unit = lunid; 710 tr_9k_cmd->request_id = tr->tr_request_id; 711 tr_9k_cmd->status = 0; 712 tr_9k_cmd->sgl_offset = 16; 713 tr_9k_cmd->sgl_entries = 1; 714 /* create the CDB here */ 715 tr_9k_cmd->cdb[0] = INQUIRY; 716 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 717 tr_9k_cmd->cdb[4] = 255; 718 719 /* XXXX setup page data no lun device 720 * it seems 9000 series does not indicate 721 * NOTPRESENT - need more investigation 722 */ 723 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 724 SID_QUAL_LU_NOTPRESENT; 725 726 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 727 728 if (error != 0) 729 return (error); 730 731 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 732 SID_QUAL_LU_NOTPRESENT) 733 error = 1; 734 735 return (error); 736 } 737 738 static int 739 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 740 { 741 742 printf("%s: %s\n", device_xname(&sc->twa_dv), scsipi->vendor); 743 744 return (1); 745 } 746 747 748 static uint64_t 749 twa_read_capacity(struct twa_request *tr, int lunid) 750 { 751 int error; 752 struct twa_command_9k *tr_9k_cmd; 753 uint64_t array_size = 0LL; 754 755 if (tr->tr_data == NULL) 756 return (ENOMEM); 757 758 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 759 760 tr->tr_length = TWA_SECTOR_SIZE; 761 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 762 tr->tr_flags |= TWA_CMD_DATA_OUT; 763 764 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 765 766 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 767 tr_9k_cmd->unit = lunid; 768 tr_9k_cmd->request_id = tr->tr_request_id; 769 tr_9k_cmd->status = 0; 770 tr_9k_cmd->sgl_offset = 16; 771 tr_9k_cmd->sgl_entries = 1; 772 /* create the CDB here */ 773 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 774 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 775 776 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 777 778 if (error == 0) { 779 #if BYTE_ORDER == BIG_ENDIAN 780 array_size = bswap64(_8btol( 781 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 782 #else 783 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 784 tr->tr_data)->addr) + 1; 785 #endif 786 } 787 return (array_size); 788 } 789 790 static int 791 twa_request_sense(struct twa_request *tr, int lunid) 792 { 793 int error = 1; 794 struct twa_command_9k *tr_9k_cmd; 795 796 if (tr->tr_data == NULL) 797 return (error); 798 799 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 800 801 tr->tr_length = TWA_SECTOR_SIZE; 802 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 803 tr->tr_flags |= TWA_CMD_DATA_OUT; 804 805 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 806 807 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 808 tr_9k_cmd->unit = lunid; 809 tr_9k_cmd->request_id = tr->tr_request_id; 810 tr_9k_cmd->status = 0; 811 tr_9k_cmd->sgl_offset = 16; 812 tr_9k_cmd->sgl_entries = 1; 813 /* create the CDB here */ 814 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 815 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 816 tr_9k_cmd->cdb[4] = 255; 817 818 /*XXX AEN notification called in interrupt context 819 * so just queue the request. Return as quickly 820 * as possible from interrupt 821 */ 822 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 823 error = twa_map_request(tr); 824 else 825 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 826 827 return (error); 828 } 829 830 static int 831 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 832 { 833 struct twa_request *tr; 834 struct twa_command_packet *tc; 835 bus_dma_segment_t seg; 836 size_t max_segs, max_xfer; 837 int i, rv, rseg, size; 838 839 if ((sc->sc_units = malloc(sc->sc_nunits * 840 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 841 return(ENOMEM); 842 843 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 844 M_DEVBUF, M_NOWAIT)) == NULL) 845 return(ENOMEM); 846 847 size = num_reqs * sizeof(struct twa_command_packet); 848 849 /* Allocate memory for cmd pkts. */ 850 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 851 size, PAGE_SIZE, 0, &seg, 852 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 853 aprint_error_dev(&sc->twa_dv, "unable to allocate " 854 "command packets, rv = %d\n", rv); 855 return (ENOMEM); 856 } 857 858 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 859 &seg, rseg, size, (void **)&sc->twa_cmds, 860 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 861 aprint_error_dev(&sc->twa_dv, "unable to map commands, rv = %d\n", rv); 862 return (1); 863 } 864 865 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 866 size, num_reqs, size, 867 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 868 aprint_error_dev(&sc->twa_dv, "unable to create command DMA map, " 869 "rv = %d\n", rv); 870 return (ENOMEM); 871 } 872 873 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 874 sc->twa_cmds, size, NULL, 875 BUS_DMA_NOWAIT)) != 0) { 876 aprint_error_dev(&sc->twa_dv, "unable to load command DMA map, " 877 "rv = %d\n", rv); 878 return (1); 879 } 880 881 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 882 aprint_error_dev(&sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 883 884 return (1); 885 } 886 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 887 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 888 889 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 890 memset(sc->twa_cmd_pkt_buf, 0, 891 num_reqs * sizeof(struct twa_command_packet)); 892 893 sc->sc_twa_request = sc->twa_req_buf; 894 max_segs = twa_get_maxsegs(); 895 max_xfer = twa_get_maxxfer(max_segs); 896 897 for (i = 0; i < num_reqs; i++, tc++) { 898 tr = &(sc->twa_req_buf[i]); 899 tr->tr_command = tc; 900 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 901 (i * sizeof(struct twa_command_packet)); 902 tr->tr_request_id = i; 903 tr->tr_sc = sc; 904 905 /* 906 * Create a map for data buffers. maxsize (256 * 1024) used in 907 * bus_dma_tag_create above should suffice the bounce page needs 908 * for data buffers, since the max I/O size we support is 128KB. 909 * If we supported I/O's bigger than 256KB, we would have to 910 * create a second dma_tag, with the appropriate maxsize. 911 */ 912 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 913 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 914 &tr->tr_dma_map)) != 0) { 915 aprint_error_dev(&sc->twa_dv, "unable to create command " 916 "DMA map, rv = %d\n", rv); 917 return (ENOMEM); 918 } 919 /* Insert request into the free queue. */ 920 if (i != 0) { 921 sc->twa_lookup[i] = tr; 922 twa_release_request(tr); 923 } else 924 tr->tr_flags |= TWA_CMD_AEN; 925 } 926 return(0); 927 } 928 929 static void 930 twa_recompute_openings(struct twa_softc *sc) 931 { 932 struct twa_drive *td; 933 int unit; 934 int openings; 935 uint64_t total_size; 936 937 total_size = 0; 938 for (unit = 0; unit < sc->sc_nunits; unit++) { 939 td = &sc->sc_units[unit]; 940 total_size += td->td_size; 941 } 942 943 for (unit = 0; unit < sc->sc_nunits; unit++) { 944 td = &sc->sc_units[unit]; 945 /* 946 * In theory, TWA_Q_LENGTH - 1 should be usable, but 947 * keep one additional ccb for internal commands. 948 * This makes the controller more reliable under load. 949 */ 950 if (total_size > 0) { 951 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 952 } else 953 openings = 0; 954 955 if (openings == td->td_openings) 956 continue; 957 td->td_openings = openings; 958 959 #ifdef TWA_DEBUG 960 printf("%s: unit %d openings %d\n", 961 device_xname(&sc->twa_dv), unit, openings); 962 #endif 963 if (td->td_dev != NULL) 964 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 965 } 966 } 967 968 static int 969 twa_request_bus_scan(struct twa_softc *sc) 970 { 971 struct twa_drive *td; 972 struct twa_request *tr; 973 struct twa_attach_args twaa; 974 int locs[TWACF_NLOCS]; 975 int s, unit; 976 977 s = splbio(); 978 for (unit = 0; unit < sc->sc_nunits; unit++) { 979 980 if ((tr = twa_get_request(sc, 0)) == NULL) { 981 splx(s); 982 return (EIO); 983 } 984 985 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 986 987 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 988 989 if (tr->tr_data == NULL) { 990 twa_release_request(tr); 991 splx(s); 992 return (ENOMEM); 993 } 994 td = &sc->sc_units[unit]; 995 996 if (twa_inquiry(tr, unit) == 0) { 997 if (td->td_dev == NULL) { 998 twa_print_inquiry_data(sc, 999 ((struct scsipi_inquiry_data *)tr->tr_data)); 1000 1001 sc->sc_units[unit].td_size = 1002 twa_read_capacity(tr, unit); 1003 1004 twaa.twaa_unit = unit; 1005 1006 twa_recompute_openings(sc); 1007 1008 locs[TWACF_UNIT] = unit; 1009 1010 sc->sc_units[unit].td_dev = 1011 config_found_sm_loc(&sc->twa_dv, "twa", 1012 locs, &twaa, twa_print, config_stdsubmatch); 1013 } 1014 } else { 1015 if (td->td_dev != NULL) { 1016 (void) config_detach(td->td_dev, DETACH_FORCE); 1017 td->td_dev = NULL; 1018 td->td_size = 0; 1019 1020 twa_recompute_openings(sc); 1021 } 1022 } 1023 free(tr->tr_data, M_DEVBUF); 1024 1025 twa_release_request(tr); 1026 } 1027 splx(s); 1028 1029 return (0); 1030 } 1031 1032 1033 #ifdef DIAGNOSTIC 1034 static inline void 1035 twa_check_busy_q(struct twa_request *tr) 1036 { 1037 struct twa_request *rq; 1038 struct twa_softc *sc = tr->tr_sc; 1039 1040 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1041 if (tr->tr_request_id == rq->tr_request_id) { 1042 panic("cannot submit same request more than once"); 1043 } else if (tr->bp == rq->bp && tr->bp != 0) { 1044 /* XXX A check for 0 for the buf ptr is needed to 1045 * guard against ioctl requests with a buf ptr of 1046 * 0 and also aen notifications. Looking for 1047 * external cmds only. 1048 */ 1049 panic("cannot submit same buf more than once"); 1050 } else { 1051 /* Empty else statement */ 1052 } 1053 } 1054 } 1055 #endif 1056 1057 static int 1058 twa_start(struct twa_request *tr) 1059 { 1060 struct twa_softc *sc = tr->tr_sc; 1061 uint32_t status_reg; 1062 int s; 1063 int error; 1064 1065 s = splbio(); 1066 1067 /* 1068 * The 9650 has a bug in the detection of the full queue condition. 1069 * If a write operation has filled the queue and is directly followed 1070 * by a status read, it sometimes doesn't return the correct result. 1071 * To work around this, the upper 32bit are written first. 1072 * This effectively serialises the hardware, but does not change 1073 * the state of the queue. 1074 */ 1075 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9650) { 1076 /* Write lower 32 bits of address */ 1077 TWA_WRITE_9650_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1078 sizeof(struct twa_command_header)); 1079 } 1080 1081 /* Check to see if we can post a command. */ 1082 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1083 if ((error = twa_check_ctlr_state(sc, status_reg))) 1084 goto out; 1085 1086 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1087 if (tr->tr_status != TWA_CMD_PENDING) { 1088 tr->tr_status = TWA_CMD_PENDING; 1089 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1090 tr, tr_link); 1091 } 1092 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1093 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1094 error = EBUSY; 1095 } else { 1096 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1097 (char *)tr->tr_command - (char *)sc->twa_cmds, 1098 sizeof(struct twa_command_packet), 1099 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1100 1101 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9650) { 1102 /* 1103 * Cmd queue is not full. Post the command to 9650 1104 * by writing upper 32 bits of address. 1105 */ 1106 TWA_WRITE_9650_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1107 sizeof(struct twa_command_header)); 1108 } else { 1109 /* Cmd queue is not full. Post the command. */ 1110 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1111 sizeof(struct twa_command_header)); 1112 } 1113 1114 /* Mark the request as currently being processed. */ 1115 tr->tr_status = TWA_CMD_BUSY; 1116 1117 #ifdef DIAGNOSTIC 1118 twa_check_busy_q(tr); 1119 #endif 1120 1121 /* Move the request into the busy queue. */ 1122 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1123 } 1124 out: 1125 splx(s); 1126 return(error); 1127 } 1128 1129 static int 1130 twa_drain_response_queue(struct twa_softc *sc) 1131 { 1132 union twa_response_queue rq; 1133 uint32_t status_reg; 1134 1135 for (;;) { 1136 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1137 if (twa_check_ctlr_state(sc, status_reg)) 1138 return(1); 1139 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1140 return(0); /* no more response queue entries */ 1141 rq.u.response_id = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1142 } 1143 } 1144 1145 /* 1146 * twa_drain_response_queue_large: 1147 * 1148 * specific to the 9550 and 9650 controller to remove requests. 1149 * 1150 * Removes all requests from "large" response queue on the 9550 controller. 1151 * This procedure is called as part of the 9550 controller reset sequence. 1152 */ 1153 static int 1154 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1155 { 1156 uint32_t start_time = 0, end_time; 1157 uint32_t response = 0; 1158 1159 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1160 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1161 start_time = 0; 1162 end_time = (timeout * TWA_MICROSECOND); 1163 1164 while ((response & 1165 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1166 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1167 if (start_time >= end_time) 1168 return (1); 1169 DELAY(1); 1170 start_time++; 1171 } 1172 /* P-chip delay */ 1173 DELAY(500000); 1174 } 1175 return (0); 1176 } 1177 1178 static void 1179 twa_drain_busy_queue(struct twa_softc *sc) 1180 { 1181 struct twa_request *tr; 1182 1183 /* Walk the busy queue. */ 1184 1185 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1186 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1187 1188 twa_unmap_request(tr); 1189 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1190 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1191 /* It's an internal/ioctl request. Simply free it. */ 1192 if (tr->tr_data) 1193 free(tr->tr_data, M_DEVBUF); 1194 twa_release_request(tr); 1195 } else { 1196 /* It's a SCSI request. Complete it. */ 1197 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1198 if (tr->tr_callback) 1199 tr->tr_callback(tr); 1200 } 1201 } 1202 } 1203 1204 static int 1205 twa_drain_pending_queue(struct twa_softc *sc) 1206 { 1207 struct twa_request *tr; 1208 int s, error = 0; 1209 1210 /* 1211 * Pull requests off the pending queue, and submit them. 1212 */ 1213 s = splbio(); 1214 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1215 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1216 1217 if ((error = twa_start(tr))) { 1218 if (error == EBUSY) { 1219 tr->tr_status = TWA_CMD_PENDING; 1220 1221 /* queue at the head */ 1222 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1223 tr, tr_link); 1224 error = 0; 1225 break; 1226 } else { 1227 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1228 tr->tr_error = error; 1229 tr->tr_callback(tr); 1230 error = EIO; 1231 } 1232 } 1233 } 1234 } 1235 splx(s); 1236 1237 return(error); 1238 } 1239 1240 static int 1241 twa_drain_aen_queue(struct twa_softc *sc) 1242 { 1243 int s, error = 0; 1244 struct twa_request *tr; 1245 struct twa_command_header *cmd_hdr; 1246 struct timeval t1; 1247 uint32_t timeout; 1248 1249 for (;;) { 1250 if ((tr = twa_get_request(sc, 0)) == NULL) { 1251 error = EIO; 1252 break; 1253 } 1254 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1255 tr->tr_callback = NULL; 1256 1257 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1258 1259 if (tr->tr_data == NULL) { 1260 error = 1; 1261 goto out; 1262 } 1263 1264 if (twa_request_sense(tr, 0) != 0) { 1265 error = 1; 1266 break; 1267 } 1268 1269 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1270 1271 microtime(&t1); 1272 1273 timeout += t1.tv_usec; 1274 1275 do { 1276 s = splbio(); 1277 twa_done(tr->tr_sc); 1278 splx(s); 1279 if (tr->tr_status != TWA_CMD_BUSY) 1280 break; 1281 microtime(&t1); 1282 } while (t1.tv_usec <= timeout); 1283 1284 if (tr->tr_status != TWA_CMD_COMPLETE) { 1285 error = ETIMEDOUT; 1286 break; 1287 } 1288 1289 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1290 break; 1291 1292 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1293 if ((cmd_hdr->status_block.error) /* aen_code */ 1294 == TWA_AEN_QUEUE_EMPTY) 1295 break; 1296 (void)twa_enqueue_aen(sc, cmd_hdr); 1297 1298 free(tr->tr_data, M_DEVBUF); 1299 twa_release_request(tr); 1300 } 1301 out: 1302 if (tr) { 1303 if (tr->tr_data) 1304 free(tr->tr_data, M_DEVBUF); 1305 1306 twa_release_request(tr); 1307 } 1308 return(error); 1309 } 1310 1311 1312 #ifdef DIAGNOSTIC 1313 static void 1314 twa_check_response_q(struct twa_request *tr, int clear) 1315 { 1316 int j; 1317 static int i = 0; 1318 static struct twa_request *req = 0; 1319 static struct buf *hist[255]; 1320 1321 1322 if (clear) { 1323 i = 0; 1324 for (j = 0; j < 255; j++) 1325 hist[j] = 0; 1326 return; 1327 } 1328 1329 if (req == 0) 1330 req = tr; 1331 1332 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1333 if (req->tr_request_id == tr->tr_request_id) 1334 panic("req id: %d on controller queue twice", 1335 tr->tr_request_id); 1336 1337 for (j = 0; j < i; j++) 1338 if (tr->bp == hist[j]) 1339 panic("req id: %d buf found twice", 1340 tr->tr_request_id); 1341 } 1342 req = tr; 1343 1344 hist[i++] = req->bp; 1345 } 1346 #endif 1347 1348 static int 1349 twa_done(struct twa_softc *sc) 1350 { 1351 union twa_response_queue rq; 1352 struct twa_request *tr; 1353 int rv = 0; 1354 uint32_t status_reg; 1355 1356 for (;;) { 1357 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1358 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1359 break; 1360 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1361 break; 1362 /* Response queue is not empty. */ 1363 rq.u.response_id = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1364 tr = sc->sc_twa_request + rq.u.response_id; 1365 #ifdef DIAGNOSTIC 1366 twa_check_response_q(tr, 0); 1367 #endif 1368 /* Unmap the command packet, and any associated data buffer. */ 1369 twa_unmap_request(tr); 1370 1371 tr->tr_status = TWA_CMD_COMPLETE; 1372 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1373 1374 if (tr->tr_callback) 1375 tr->tr_callback(tr); 1376 } 1377 (void)twa_drain_pending_queue(sc); 1378 1379 #ifdef DIAGNOSTIC 1380 twa_check_response_q(NULL, 1); 1381 #endif 1382 return(rv); 1383 } 1384 1385 /* 1386 * Function name: twa_init_ctlr 1387 * Description: Establishes a logical connection with the controller. 1388 * If bundled with firmware, determines whether or not 1389 * the driver is compatible with the firmware on the 1390 * controller, before proceeding to work with it. 1391 * 1392 * Input: sc -- ptr to per ctlr structure 1393 * Output: None 1394 * Return value: 0 -- success 1395 * non-zero-- failure 1396 */ 1397 static int 1398 twa_init_ctlr(struct twa_softc *sc) 1399 { 1400 uint16_t fw_on_ctlr_srl = 0; 1401 uint16_t fw_on_ctlr_arch_id = 0; 1402 uint16_t fw_on_ctlr_branch = 0; 1403 uint16_t fw_on_ctlr_build = 0; 1404 uint32_t init_connect_result = 0; 1405 int error = 0; 1406 1407 /* Wait for the controller to become ready. */ 1408 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1409 TWA_REQUEST_TIMEOUT_PERIOD)) { 1410 return(ENXIO); 1411 } 1412 /* Drain the response queue. */ 1413 if (twa_drain_response_queue(sc)) 1414 return(1); 1415 1416 /* Establish a logical connection with the controller. */ 1417 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1418 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1419 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1420 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1421 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1422 &fw_on_ctlr_build, &init_connect_result))) { 1423 return(error); 1424 } 1425 twa_drain_aen_queue(sc); 1426 1427 /* Set controller state to initialized. */ 1428 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1429 return(0); 1430 } 1431 1432 static int 1433 twa_setup(struct twa_softc *sc) 1434 { 1435 struct tw_cl_event_packet *aen_queue; 1436 uint32_t i = 0; 1437 int error = 0; 1438 1439 /* Initialize request queues. */ 1440 TAILQ_INIT(&sc->twa_free); 1441 TAILQ_INIT(&sc->twa_busy); 1442 TAILQ_INIT(&sc->twa_pending); 1443 1444 sc->twa_sc_flags = 0; 1445 1446 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1447 1448 return(ENOMEM); 1449 } 1450 1451 /* Allocate memory for the AEN queue. */ 1452 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1453 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1454 /* 1455 * This should not cause us to return error. We will only be 1456 * unable to support AEN's. But then, we will have to check 1457 * time and again to see if we can support AEN's, if we 1458 * continue. So, we will just return error. 1459 */ 1460 return (ENOMEM); 1461 } 1462 /* Initialize the aen queue. */ 1463 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1464 1465 for (i = 0; i < TWA_Q_LENGTH; i++) 1466 sc->twa_aen_queue[i] = &(aen_queue[i]); 1467 1468 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1469 TWA_CONTROL_DISABLE_INTERRUPTS); 1470 1471 /* Initialize the controller. */ 1472 if ((error = twa_init_ctlr(sc))) { 1473 /* Soft reset the controller, and try one more time. */ 1474 1475 printf("%s: controller initialization failed. " 1476 "Retrying initialization\n", device_xname(&sc->twa_dv)); 1477 1478 if ((error = twa_soft_reset(sc)) == 0) 1479 error = twa_init_ctlr(sc); 1480 } 1481 1482 twa_describe_controller(sc); 1483 1484 error = twa_request_bus_scan(sc); 1485 1486 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1487 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1488 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1489 TWA_CONTROL_ENABLE_INTERRUPTS); 1490 1491 return (error); 1492 } 1493 1494 void *twa_sdh; 1495 1496 static void 1497 twa_attach(struct device *parent, struct device *self, void *aux) 1498 { 1499 struct pci_attach_args *pa; 1500 struct twa_softc *sc; 1501 pci_chipset_tag_t pc; 1502 pcireg_t csr; 1503 pci_intr_handle_t ih; 1504 const char *intrstr; 1505 struct ctlname ctlnames[] = CTL_NAMES; 1506 const struct sysctlnode *node; 1507 int i, maj; 1508 bool use_64bit; 1509 1510 sc = (struct twa_softc *)self; 1511 1512 pa = aux; 1513 pc = pa->pa_pc; 1514 sc->pc = pa->pa_pc; 1515 sc->tag = pa->pa_tag; 1516 1517 aprint_naive(": RAID controller\n"); 1518 aprint_normal(": 3ware Apache\n"); 1519 1520 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1521 sc->sc_nunits = TWA_MAX_UNITS; 1522 use_64bit = false; 1523 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1524 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1525 aprint_error_dev(&sc->twa_dv, "can't map i/o space\n"); 1526 return; 1527 } 1528 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1529 sc->sc_nunits = TWA_MAX_UNITS; 1530 use_64bit = true; 1531 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1532 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1533 &sc->twa_bus_ioh, NULL, NULL)) { 1534 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1535 return; 1536 } 1537 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1538 sc->sc_nunits = TWA_9650_MAX_UNITS; 1539 use_64bit = true; 1540 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1541 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1542 &sc->twa_bus_ioh, NULL, NULL)) { 1543 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1544 return; 1545 } 1546 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1547 sc->sc_nunits = TWA_9690_MAX_UNITS; 1548 use_64bit = true; 1549 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1550 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1551 &sc->twa_bus_ioh, NULL, NULL)) { 1552 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1553 return; 1554 } 1555 } else { 1556 sc->sc_nunits = 0; 1557 use_64bit = false; 1558 aprint_error_dev(&sc->twa_dv, "product id 0x%02x not recognized\n", 1559 PCI_PRODUCT(pa->pa_id)); 1560 return; 1561 } 1562 1563 if (pci_dma64_available(pa) && use_64bit) { 1564 aprint_verbose_dev(self, "64bit DMA addressing active"); 1565 sc->twa_dma_tag = pa->pa_dmat64; 1566 } else { 1567 sc->twa_dma_tag = pa->pa_dmat; 1568 } 1569 1570 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1571 /* Enable the device. */ 1572 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1573 1574 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1575 csr | PCI_COMMAND_MASTER_ENABLE); 1576 1577 /* Map and establish the interrupt. */ 1578 if (pci_intr_map(pa, &ih)) { 1579 aprint_error_dev(&sc->twa_dv, "can't map interrupt\n"); 1580 return; 1581 } 1582 intrstr = pci_intr_string(pc, ih); 1583 1584 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1585 if (sc->twa_ih == NULL) { 1586 aprint_error_dev(&sc->twa_dv, "can't establish interrupt%s%s\n", 1587 (intrstr) ? " at " : "", 1588 (intrstr) ? intrstr : ""); 1589 return; 1590 } 1591 1592 if (intrstr != NULL) 1593 aprint_normal_dev(&sc->twa_dv, "interrupting at %s\n", 1594 intrstr); 1595 1596 twa_setup(sc); 1597 1598 if (twa_sdh == NULL) 1599 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1600 1601 /* sysctl set-up for 3ware cli */ 1602 if (sysctl_createv(NULL, 0, NULL, NULL, 1603 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1604 NULL, NULL, 0, NULL, 0, 1605 CTL_HW, CTL_EOL) != 0) { 1606 aprint_error_dev(&sc->twa_dv, "could not create %s sysctl node\n", 1607 ctlnames[CTL_HW].ctl_name); 1608 return; 1609 } 1610 if (sysctl_createv(NULL, 0, NULL, &node, 1611 0, CTLTYPE_NODE, device_xname(&sc->twa_dv), 1612 SYSCTL_DESCR("twa driver information"), 1613 NULL, 0, NULL, 0, 1614 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1615 aprint_error_dev(&sc->twa_dv, "could not create %s.%s sysctl node\n", 1616 ctlnames[CTL_HW].ctl_name, 1617 device_xname(&sc->twa_dv)); 1618 return; 1619 } 1620 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1621 0, CTLTYPE_STRING, "driver_version", 1622 SYSCTL_DESCR("twa driver version"), 1623 NULL, 0, &twaver, 0, 1624 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1625 != 0) { 1626 aprint_error_dev(&sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1627 ctlnames[CTL_HW].ctl_name, 1628 device_xname(&sc->twa_dv)); 1629 return; 1630 } 1631 1632 maj = cdevsw_lookup_major(&twa_cdevsw); 1633 device_register_name(makedev(maj, device_unit(self)), self, true, 1634 DEV_OTHER, device_xname(self)); 1635 1636 return; 1637 } 1638 1639 static void 1640 twa_shutdown(void *arg) 1641 { 1642 extern struct cfdriver twa_cd; 1643 struct twa_softc *sc; 1644 int i, rv, unit; 1645 1646 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1647 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1648 continue; 1649 1650 for (unit = 0; unit < sc->sc_nunits; unit++) 1651 if (sc->sc_units[unit].td_dev != NULL) 1652 (void) config_detach(sc->sc_units[unit].td_dev, 1653 DETACH_FORCE | DETACH_QUIET); 1654 1655 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1656 TWA_CONTROL_DISABLE_INTERRUPTS); 1657 1658 /* Let the controller know that we are going down. */ 1659 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1660 0, 0, 0, 0, 0, 1661 NULL, NULL, NULL, NULL, NULL); 1662 } 1663 } 1664 1665 void 1666 twa_register_callbacks(struct twa_softc *sc, int unit, 1667 const struct twa_callbacks *tcb) 1668 { 1669 1670 sc->sc_units[unit].td_callbacks = tcb; 1671 } 1672 1673 /* 1674 * Print autoconfiguration message for a sub-device 1675 */ 1676 static int 1677 twa_print(void *aux, const char *pnp) 1678 { 1679 struct twa_attach_args *twaa; 1680 1681 twaa = aux; 1682 1683 if (pnp !=NULL) 1684 aprint_normal("block device at %s\n", pnp); 1685 aprint_normal(" unit %d\n", twaa->twaa_unit); 1686 return (UNCONF); 1687 } 1688 1689 static void 1690 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1691 { 1692 int i; 1693 for (i = 0; i < nsegments; i++) { 1694 sgl[i].address = segs[i].ds_addr; 1695 sgl[i].length = (uint32_t)(segs[i].ds_len); 1696 } 1697 } 1698 1699 static int 1700 twa_submit_io(struct twa_request *tr) 1701 { 1702 int error; 1703 1704 if ((error = twa_start(tr))) { 1705 if (error == EBUSY) 1706 error = 0; /* request is in the pending queue */ 1707 else { 1708 tr->tr_error = error; 1709 } 1710 } 1711 return(error); 1712 } 1713 1714 /* 1715 * Function name: twa_setup_data_dmamap 1716 * Description: Callback of bus_dmamap_load for the buffer associated 1717 * with data. Updates the cmd pkt (size/sgl_entries 1718 * fields, as applicable) to reflect the number of sg 1719 * elements. 1720 * 1721 * Input: arg -- ptr to request pkt 1722 * segs -- ptr to a list of segment descriptors 1723 * nsegments--# of segments 1724 * error -- 0 if no errors encountered before callback, 1725 * non-zero if errors were encountered 1726 * Output: None 1727 * Return value: None 1728 */ 1729 static int 1730 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1731 { 1732 struct twa_request *tr = (struct twa_request *)arg; 1733 struct twa_command_packet *cmdpkt = tr->tr_command; 1734 struct twa_command_9k *cmd9k; 1735 union twa_command_7k *cmd7k; 1736 uint8_t sgl_offset; 1737 int error; 1738 1739 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1740 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1741 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1742 cmd9k->sgl_entries += nsegments - 1; 1743 } else { 1744 /* It's a 7000 command packet. */ 1745 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1746 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1747 twa_fillin_sgl((struct twa_sg *) 1748 (((uint32_t *)cmd7k) + sgl_offset), 1749 segs, nsegments); 1750 /* Modify the size field, based on sg address size. */ 1751 cmd7k->generic.size += 1752 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1753 } 1754 if (tr->tr_flags & TWA_CMD_DATA_IN) 1755 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1756 tr->tr_length, BUS_DMASYNC_PREWRITE); 1757 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1758 /* 1759 * If we're using an alignment buffer, and we're 1760 * writing data, copy the real data out. 1761 */ 1762 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1763 memcpy(tr->tr_data, tr->tr_real_data, 1764 tr->tr_real_length); 1765 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1766 tr->tr_length, BUS_DMASYNC_PREREAD); 1767 } 1768 error = twa_submit_io(tr); 1769 1770 if (error) { 1771 twa_unmap_request(tr); 1772 /* 1773 * If the caller had been returned EINPROGRESS, and he has 1774 * registered a callback for handling completion, the callback 1775 * will never get called because we were unable to submit the 1776 * request. So, free up the request right here. 1777 */ 1778 if (tr->tr_callback) 1779 twa_release_request(tr); 1780 } 1781 return (error); 1782 } 1783 1784 /* 1785 * Function name: twa_map_request 1786 * Description: Maps a cmd pkt and data associated with it, into 1787 * DMA'able memory. 1788 * 1789 * Input: tr -- ptr to request pkt 1790 * Output: None 1791 * Return value: 0 -- success 1792 * non-zero-- failure 1793 */ 1794 int 1795 twa_map_request(struct twa_request *tr) 1796 { 1797 struct twa_softc *sc = tr->tr_sc; 1798 int s, rv; 1799 1800 /* If the command involves data, map that too. */ 1801 if (tr->tr_data != NULL) { 1802 1803 if (((u_long)tr->tr_data & (511)) != 0) { 1804 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1805 tr->tr_real_data = tr->tr_data; 1806 tr->tr_real_length = tr->tr_length; 1807 s = splvm(); 1808 tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1809 tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1810 splx(s); 1811 1812 if (tr->tr_data == NULL) { 1813 tr->tr_data = tr->tr_real_data; 1814 tr->tr_length = tr->tr_real_length; 1815 return(ENOMEM); 1816 } 1817 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1818 memcpy(tr->tr_data, tr->tr_real_data, 1819 tr->tr_length); 1820 } 1821 1822 /* 1823 * Map the data buffer into bus space and build the S/G list. 1824 */ 1825 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1826 tr->tr_data, tr->tr_length, NULL, 1827 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1828 1829 if (rv != 0) { 1830 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1831 s = splvm(); 1832 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1833 tr->tr_length, UVM_KMF_WIRED); 1834 splx(s); 1835 } 1836 return (rv); 1837 } 1838 1839 if ((rv = twa_setup_data_dmamap(tr, 1840 tr->tr_dma_map->dm_segs, 1841 tr->tr_dma_map->dm_nsegs))) { 1842 1843 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1844 s = splvm(); 1845 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1846 tr->tr_length, UVM_KMF_WIRED); 1847 splx(s); 1848 tr->tr_data = tr->tr_real_data; 1849 tr->tr_length = tr->tr_real_length; 1850 } 1851 } 1852 1853 } else 1854 if ((rv = twa_submit_io(tr))) 1855 twa_unmap_request(tr); 1856 1857 return (rv); 1858 } 1859 1860 /* 1861 * Function name: twa_intr 1862 * Description: Interrupt handler. Determines the kind of interrupt, 1863 * and calls the appropriate handler. 1864 * 1865 * Input: sc -- ptr to per ctlr structure 1866 * Output: None 1867 * Return value: None 1868 */ 1869 1870 static int 1871 twa_intr(void *arg) 1872 { 1873 int caught, s, rv; 1874 struct twa_softc *sc; 1875 uint32_t status_reg; 1876 sc = (struct twa_softc *)arg; 1877 1878 caught = 0; 1879 /* Collect current interrupt status. */ 1880 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1881 if (twa_check_ctlr_state(sc, status_reg)) { 1882 caught = 1; 1883 goto bail; 1884 } 1885 /* Dispatch based on the kind of interrupt. */ 1886 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1887 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1888 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1889 caught = 1; 1890 } 1891 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1892 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1893 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1894 rv = twa_fetch_aen(sc); 1895 #ifdef DIAGNOSTIC 1896 if (rv != 0) 1897 printf("%s: unable to retrieve AEN (%d)\n", 1898 device_xname(&sc->twa_dv), rv); 1899 #endif 1900 caught = 1; 1901 } 1902 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1903 /* Start any requests that might be in the pending queue. */ 1904 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1905 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1906 (void)twa_drain_pending_queue(sc); 1907 caught = 1; 1908 } 1909 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1910 s = splbio(); 1911 twa_done(sc); 1912 splx(s); 1913 caught = 1; 1914 } 1915 bail: 1916 return (caught); 1917 } 1918 1919 /* 1920 * Accept an open operation on the control device. 1921 */ 1922 static int 1923 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1924 { 1925 struct twa_softc *twa; 1926 1927 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1928 return (ENXIO); 1929 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1930 return (EBUSY); 1931 1932 twa->twa_sc_flags |= TWA_STATE_OPEN; 1933 1934 return (0); 1935 } 1936 1937 /* 1938 * Accept the last close on the control device. 1939 */ 1940 static int 1941 twaclose(dev_t dev, int flag, int mode, 1942 struct lwp *l) 1943 { 1944 struct twa_softc *twa; 1945 1946 twa = device_lookup_private(&twa_cd, minor(dev)); 1947 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1948 return (0); 1949 } 1950 1951 /* 1952 * Function name: twaioctl 1953 * Description: ioctl handler. 1954 * 1955 * Input: sc -- ptr to per ctlr structure 1956 * cmd -- ioctl cmd 1957 * buf -- ptr to buffer in kernel memory, which is 1958 * a copy of the input buffer in user-space 1959 * Output: buf -- ptr to buffer in kernel memory, which will 1960 * be copied of the output buffer in user-space 1961 * Return value: 0 -- success 1962 * non-zero-- failure 1963 */ 1964 static int 1965 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1966 struct lwp *l) 1967 { 1968 struct twa_softc *sc; 1969 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1970 struct tw_cl_event_packet event_buf; 1971 struct twa_request *tr = 0; 1972 int32_t event_index = 0; 1973 int32_t start_index; 1974 int s, error = 0; 1975 1976 sc = device_lookup_private(&twa_cd, minor(dev)); 1977 1978 switch (cmd) { 1979 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1980 { 1981 struct twa_command_packet *cmdpkt; 1982 uint32_t data_buf_size_adjusted; 1983 1984 /* Get a request packet */ 1985 tr = twa_get_request_wait(sc, 0); 1986 KASSERT(tr != NULL); 1987 /* 1988 * Make sure that the data buffer sent to firmware is a 1989 * 512 byte multiple in size. 1990 */ 1991 data_buf_size_adjusted = 1992 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1993 1994 if ((tr->tr_length = data_buf_size_adjusted)) { 1995 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1996 M_DEVBUF, M_WAITOK)) == NULL) { 1997 error = ENOMEM; 1998 goto fw_passthru_done; 1999 } 2000 /* Copy the payload. */ 2001 if ((error = copyin((void *) (user_buf->pdata), 2002 (void *) (tr->tr_data), 2003 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2004 goto fw_passthru_done; 2005 } 2006 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2007 } 2008 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2009 cmdpkt = tr->tr_command; 2010 2011 /* Copy the command packet. */ 2012 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2013 sizeof(struct twa_command_packet)); 2014 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2015 tr->tr_request_id; 2016 2017 /* Send down the request, and wait for it to complete. */ 2018 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2019 if (error == ETIMEDOUT) 2020 break; /* clean-up done by twa_wait_request */ 2021 goto fw_passthru_done; 2022 } 2023 2024 /* Copy the command packet back into user space. */ 2025 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2026 sizeof(struct twa_command_packet)); 2027 2028 /* If there was a payload, copy it back too. */ 2029 if (tr->tr_length) 2030 error = copyout(tr->tr_data, user_buf->pdata, 2031 user_buf->twa_drvr_pkt.buffer_length); 2032 fw_passthru_done: 2033 /* Free resources. */ 2034 if (tr->tr_data) 2035 free(tr->tr_data, M_DEVBUF); 2036 2037 if (tr) 2038 twa_release_request(tr); 2039 break; 2040 } 2041 2042 case TW_OSL_IOCTL_SCAN_BUS: 2043 twa_request_bus_scan(sc); 2044 break; 2045 2046 case TW_CL_IOCTL_GET_FIRST_EVENT: 2047 if (sc->twa_aen_queue_wrapped) { 2048 if (sc->twa_aen_queue_overflow) { 2049 /* 2050 * The aen queue has wrapped, even before some 2051 * events have been retrieved. Let the caller 2052 * know that he missed out on some AEN's. 2053 */ 2054 user_buf->twa_drvr_pkt.status = 2055 TWA_ERROR_AEN_OVERFLOW; 2056 sc->twa_aen_queue_overflow = FALSE; 2057 } else 2058 user_buf->twa_drvr_pkt.status = 0; 2059 event_index = sc->twa_aen_head; 2060 } else { 2061 if (sc->twa_aen_head == sc->twa_aen_tail) { 2062 user_buf->twa_drvr_pkt.status = 2063 TWA_ERROR_AEN_NO_EVENTS; 2064 break; 2065 } 2066 user_buf->twa_drvr_pkt.status = 0; 2067 event_index = sc->twa_aen_tail; /* = 0 */ 2068 } 2069 if ((error = copyout(sc->twa_aen_queue[event_index], 2070 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2071 (sc->twa_aen_queue[event_index])->retrieved = 2072 TWA_AEN_RETRIEVED; 2073 break; 2074 2075 case TW_CL_IOCTL_GET_LAST_EVENT: 2076 if (sc->twa_aen_queue_wrapped) { 2077 if (sc->twa_aen_queue_overflow) { 2078 /* 2079 * The aen queue has wrapped, even before some 2080 * events have been retrieved. Let the caller 2081 * know that he missed out on some AEN's. 2082 */ 2083 user_buf->twa_drvr_pkt.status = 2084 TWA_ERROR_AEN_OVERFLOW; 2085 sc->twa_aen_queue_overflow = FALSE; 2086 } else 2087 user_buf->twa_drvr_pkt.status = 0; 2088 } else { 2089 if (sc->twa_aen_head == sc->twa_aen_tail) { 2090 user_buf->twa_drvr_pkt.status = 2091 TWA_ERROR_AEN_NO_EVENTS; 2092 break; 2093 } 2094 user_buf->twa_drvr_pkt.status = 0; 2095 } 2096 event_index = 2097 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2098 if ((error = copyout(sc->twa_aen_queue[event_index], 2099 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2100 (sc->twa_aen_queue[event_index])->retrieved = 2101 TWA_AEN_RETRIEVED; 2102 break; 2103 2104 case TW_CL_IOCTL_GET_NEXT_EVENT: 2105 user_buf->twa_drvr_pkt.status = 0; 2106 if (sc->twa_aen_queue_wrapped) { 2107 2108 if (sc->twa_aen_queue_overflow) { 2109 /* 2110 * The aen queue has wrapped, even before some 2111 * events have been retrieved. Let the caller 2112 * know that he missed out on some AEN's. 2113 */ 2114 user_buf->twa_drvr_pkt.status = 2115 TWA_ERROR_AEN_OVERFLOW; 2116 sc->twa_aen_queue_overflow = FALSE; 2117 } 2118 start_index = sc->twa_aen_head; 2119 } else { 2120 if (sc->twa_aen_head == sc->twa_aen_tail) { 2121 user_buf->twa_drvr_pkt.status = 2122 TWA_ERROR_AEN_NO_EVENTS; 2123 break; 2124 } 2125 start_index = sc->twa_aen_tail; /* = 0 */ 2126 } 2127 error = copyin(user_buf->pdata, &event_buf, 2128 sizeof(struct tw_cl_event_packet)); 2129 2130 event_index = (start_index + event_buf.sequence_id - 2131 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2132 % TWA_Q_LENGTH; 2133 2134 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2135 event_buf.sequence_id)) { 2136 if (user_buf->twa_drvr_pkt.status == 2137 TWA_ERROR_AEN_OVERFLOW) 2138 /* so we report the overflow next time */ 2139 sc->twa_aen_queue_overflow = TRUE; 2140 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2141 break; 2142 } 2143 if ((error = copyout(sc->twa_aen_queue[event_index], 2144 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2145 (sc->twa_aen_queue[event_index])->retrieved = 2146 TWA_AEN_RETRIEVED; 2147 break; 2148 2149 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2150 user_buf->twa_drvr_pkt.status = 0; 2151 if (sc->twa_aen_queue_wrapped) { 2152 if (sc->twa_aen_queue_overflow) { 2153 /* 2154 * The aen queue has wrapped, even before some 2155 * events have been retrieved. Let the caller 2156 * know that he missed out on some AEN's. 2157 */ 2158 user_buf->twa_drvr_pkt.status = 2159 TWA_ERROR_AEN_OVERFLOW; 2160 sc->twa_aen_queue_overflow = FALSE; 2161 } 2162 start_index = sc->twa_aen_head; 2163 } else { 2164 if (sc->twa_aen_head == sc->twa_aen_tail) { 2165 user_buf->twa_drvr_pkt.status = 2166 TWA_ERROR_AEN_NO_EVENTS; 2167 break; 2168 } 2169 start_index = sc->twa_aen_tail; /* = 0 */ 2170 } 2171 if ((error = copyin(user_buf->pdata, &event_buf, 2172 sizeof(struct tw_cl_event_packet))) != 0) 2173 2174 event_index = (start_index + event_buf.sequence_id - 2175 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2176 % TWA_Q_LENGTH; 2177 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2178 event_buf.sequence_id)) { 2179 if (user_buf->twa_drvr_pkt.status == 2180 TWA_ERROR_AEN_OVERFLOW) 2181 /* so we report the overflow next time */ 2182 sc->twa_aen_queue_overflow = TRUE; 2183 user_buf->twa_drvr_pkt.status = 2184 TWA_ERROR_AEN_NO_EVENTS; 2185 break; 2186 } 2187 if ((error = copyout(sc->twa_aen_queue [event_index], 2188 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2189 aprint_error_dev(&sc->twa_dv, "get_previous: Could not copyout to " 2190 "event_buf. error = %x\n", 2191 error); 2192 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2193 break; 2194 2195 case TW_CL_IOCTL_GET_LOCK: 2196 { 2197 struct tw_cl_lock_packet twa_lock; 2198 2199 copyin(user_buf->pdata, &twa_lock, 2200 sizeof(struct tw_cl_lock_packet)); 2201 s = splbio(); 2202 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2203 (twa_lock.force_flag) || 2204 (time_second >= sc->twa_ioctl_lock.timeout)) { 2205 2206 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2207 sc->twa_ioctl_lock.timeout = time_second + 2208 (twa_lock.timeout_msec / 1000); 2209 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2210 user_buf->twa_drvr_pkt.status = 0; 2211 } else { 2212 twa_lock.time_remaining_msec = 2213 (sc->twa_ioctl_lock.timeout - time_second) * 2214 1000; 2215 user_buf->twa_drvr_pkt.status = 2216 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2217 } 2218 splx(s); 2219 copyout(&twa_lock, user_buf->pdata, 2220 sizeof(struct tw_cl_lock_packet)); 2221 break; 2222 } 2223 2224 case TW_CL_IOCTL_RELEASE_LOCK: 2225 s = splbio(); 2226 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2227 user_buf->twa_drvr_pkt.status = 2228 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2229 } else { 2230 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2231 user_buf->twa_drvr_pkt.status = 0; 2232 } 2233 splx(s); 2234 break; 2235 2236 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2237 { 2238 struct tw_cl_compatibility_packet comp_pkt; 2239 2240 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2241 sizeof(TWA_DRIVER_VERSION_STRING)); 2242 comp_pkt.working_srl = sc->working_srl; 2243 comp_pkt.working_branch = sc->working_branch; 2244 comp_pkt.working_build = sc->working_build; 2245 user_buf->twa_drvr_pkt.status = 0; 2246 2247 /* Copy compatibility information to user space. */ 2248 copyout(&comp_pkt, user_buf->pdata, 2249 min(sizeof(struct tw_cl_compatibility_packet), 2250 user_buf->twa_drvr_pkt.buffer_length)); 2251 break; 2252 } 2253 2254 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2255 { 2256 struct twa_unitname *tn; 2257 struct twa_drive *tdr; 2258 2259 tn = (struct twa_unitname *)data; 2260 /* XXX mutex */ 2261 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2262 return (EINVAL); 2263 tdr = &sc->sc_units[tn->tn_unit]; 2264 if (tdr->td_dev == NULL) 2265 tn->tn_name[0] = '\0'; 2266 else 2267 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2268 sizeof(tn->tn_name)); 2269 return (0); 2270 } 2271 2272 default: 2273 /* Unknown opcode. */ 2274 error = ENOTTY; 2275 } 2276 2277 return(error); 2278 } 2279 2280 /* 2281 * Function name: twa_get_param 2282 * Description: Get a firmware parameter. 2283 * 2284 * Input: sc -- ptr to per ctlr structure 2285 * table_id -- parameter table # 2286 * param_id -- index of the parameter in the table 2287 * param_size -- size of the parameter in bytes 2288 * callback -- ptr to function, if any, to be called 2289 * back on completion; NULL if no callback. 2290 * Output: None 2291 * Return value: ptr to param structure -- success 2292 * NULL -- failure 2293 */ 2294 static int 2295 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2296 size_t param_size, void (* callback)(struct twa_request *tr), 2297 struct twa_param_9k **param) 2298 { 2299 int rv = 0; 2300 struct twa_request *tr; 2301 union twa_command_7k *cmd; 2302 2303 /* Get a request packet. */ 2304 if ((tr = twa_get_request(sc, 0)) == NULL) { 2305 rv = EAGAIN; 2306 goto out; 2307 } 2308 2309 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2310 2311 /* Allocate memory to read data into. */ 2312 if ((*param = (struct twa_param_9k *) 2313 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2314 rv = ENOMEM; 2315 goto out; 2316 } 2317 2318 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2319 tr->tr_data = *param; 2320 tr->tr_length = TWA_SECTOR_SIZE; 2321 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2322 2323 /* Build the cmd pkt. */ 2324 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2325 2326 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2327 2328 cmd->param.opcode = TWA_OP_GET_PARAM; 2329 cmd->param.sgl_offset = 2; 2330 cmd->param.size = 2; 2331 cmd->param.request_id = tr->tr_request_id; 2332 cmd->param.unit = 0; 2333 cmd->param.param_count = 1; 2334 2335 /* Specify which parameter we need. */ 2336 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2337 (*param)->parameter_id = param_id; 2338 (*param)->parameter_size_bytes = param_size; 2339 2340 /* Submit the command. */ 2341 if (callback == NULL) { 2342 /* There's no call back; wait till the command completes. */ 2343 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2344 2345 if (rv != 0) 2346 goto out; 2347 2348 if ((rv = cmd->param.status) != 0) { 2349 /* twa_drain_complete_queue will have done the unmapping */ 2350 goto out; 2351 } 2352 twa_release_request(tr); 2353 return (rv); 2354 } else { 2355 /* There's a call back. Simply submit the command. */ 2356 tr->tr_callback = callback; 2357 rv = twa_map_request(tr); 2358 return (rv); 2359 } 2360 out: 2361 if (tr) 2362 twa_release_request(tr); 2363 return(rv); 2364 } 2365 2366 /* 2367 * Function name: twa_set_param 2368 * Description: Set a firmware parameter. 2369 * 2370 * Input: sc -- ptr to per ctlr structure 2371 * table_id -- parameter table # 2372 * param_id -- index of the parameter in the table 2373 * param_size -- size of the parameter in bytes 2374 * callback -- ptr to function, if any, to be called 2375 * back on completion; NULL if no callback. 2376 * Output: None 2377 * Return value: 0 -- success 2378 * non-zero-- failure 2379 */ 2380 static int 2381 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2382 void *data, void (* callback)(struct twa_request *tr)) 2383 { 2384 struct twa_request *tr; 2385 union twa_command_7k *cmd; 2386 struct twa_param_9k *param = NULL; 2387 int error = ENOMEM; 2388 2389 tr = twa_get_request(sc, 0); 2390 if (tr == NULL) 2391 return (EAGAIN); 2392 2393 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2394 2395 /* Allocate memory to send data using. */ 2396 if ((param = (struct twa_param_9k *) 2397 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2398 goto out; 2399 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2400 tr->tr_data = param; 2401 tr->tr_length = TWA_SECTOR_SIZE; 2402 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2403 2404 /* Build the cmd pkt. */ 2405 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2406 2407 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2408 2409 cmd->param.opcode = TWA_OP_SET_PARAM; 2410 cmd->param.sgl_offset = 2; 2411 cmd->param.size = 2; 2412 cmd->param.request_id = tr->tr_request_id; 2413 cmd->param.unit = 0; 2414 cmd->param.param_count = 1; 2415 2416 /* Specify which parameter we want to set. */ 2417 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2418 param->parameter_id = param_id; 2419 param->parameter_size_bytes = param_size; 2420 memcpy(param->data, data, param_size); 2421 2422 /* Submit the command. */ 2423 if (callback == NULL) { 2424 /* There's no call back; wait till the command completes. */ 2425 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2426 if (error == ETIMEDOUT) 2427 /* clean-up done by twa_immediate_request */ 2428 return(error); 2429 if (error) 2430 goto out; 2431 if ((error = cmd->param.status)) { 2432 /* 2433 * twa_drain_complete_queue will have done the 2434 * unmapping. 2435 */ 2436 goto out; 2437 } 2438 free(param, M_DEVBUF); 2439 twa_release_request(tr); 2440 return(error); 2441 } else { 2442 /* There's a call back. Simply submit the command. */ 2443 tr->tr_callback = callback; 2444 if ((error = twa_map_request(tr))) 2445 goto out; 2446 2447 return (0); 2448 } 2449 out: 2450 if (param) 2451 free(param, M_DEVBUF); 2452 if (tr) 2453 twa_release_request(tr); 2454 return(error); 2455 } 2456 2457 /* 2458 * Function name: twa_init_connection 2459 * Description: Send init_connection cmd to firmware 2460 * 2461 * Input: sc -- ptr to per ctlr structure 2462 * message_credits -- max # of requests that we might send 2463 * down simultaneously. This will be 2464 * typically set to 256 at init-time or 2465 * after a reset, and to 1 at shutdown-time 2466 * set_features -- indicates if we intend to use 64-bit 2467 * sg, also indicates if we want to do a 2468 * basic or an extended init_connection; 2469 * 2470 * Note: The following input/output parameters are valid, only in case of an 2471 * extended init_connection: 2472 * 2473 * current_fw_srl -- srl of fw we are bundled 2474 * with, if any; 0 otherwise 2475 * current_fw_arch_id -- arch_id of fw we are bundled 2476 * with, if any; 0 otherwise 2477 * current_fw_branch -- branch # of fw we are bundled 2478 * with, if any; 0 otherwise 2479 * current_fw_build -- build # of fw we are bundled 2480 * with, if any; 0 otherwise 2481 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2482 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2483 * fw_on_ctlr_branch -- branch # of fw on ctlr 2484 * fw_on_ctlr_build -- build # of fw on ctlr 2485 * init_connect_result -- result bitmap of fw response 2486 * Return value: 0 -- success 2487 * non-zero-- failure 2488 */ 2489 static int 2490 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2491 uint32_t set_features, uint16_t current_fw_srl, 2492 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2493 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2494 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2495 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2496 { 2497 struct twa_request *tr; 2498 struct twa_command_init_connect *init_connect; 2499 int error = 1; 2500 2501 /* Get a request packet. */ 2502 if ((tr = twa_get_request(sc, 0)) == NULL) 2503 goto out; 2504 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2505 /* Build the cmd pkt. */ 2506 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2507 2508 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2509 2510 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2511 init_connect->request_id = tr->tr_request_id; 2512 init_connect->message_credits = message_credits; 2513 init_connect->features = set_features; 2514 if (TWA_64BIT_ADDRESSES) 2515 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2516 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2517 /* 2518 * Fill in the extra fields needed for 2519 * an extended init_connect. 2520 */ 2521 init_connect->size = 6; 2522 init_connect->fw_srl = current_fw_srl; 2523 init_connect->fw_arch_id = current_fw_arch_id; 2524 init_connect->fw_branch = current_fw_branch; 2525 } else 2526 init_connect->size = 3; 2527 2528 /* Submit the command, and wait for it to complete. */ 2529 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2530 if (error == ETIMEDOUT) 2531 return(error); /* clean-up done by twa_immediate_request */ 2532 if (error) 2533 goto out; 2534 if ((error = init_connect->status)) { 2535 /* twa_drain_complete_queue will have done the unmapping */ 2536 goto out; 2537 } 2538 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2539 *fw_on_ctlr_srl = init_connect->fw_srl; 2540 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2541 *fw_on_ctlr_branch = init_connect->fw_branch; 2542 *fw_on_ctlr_build = init_connect->fw_build; 2543 *init_connect_result = init_connect->result; 2544 } 2545 twa_release_request(tr); 2546 return(error); 2547 2548 out: 2549 if (tr) 2550 twa_release_request(tr); 2551 return(error); 2552 } 2553 2554 static int 2555 twa_reset(struct twa_softc *sc) 2556 { 2557 int s; 2558 int error = 0; 2559 2560 /* Set the 'in reset' flag. */ 2561 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2562 2563 /* 2564 * Disable interrupts from the controller, and mask any 2565 * accidental entry into our interrupt handler. 2566 */ 2567 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2568 TWA_CONTROL_DISABLE_INTERRUPTS); 2569 2570 s = splbio(); 2571 2572 /* Soft reset the controller. */ 2573 if ((error = twa_soft_reset(sc))) 2574 goto out; 2575 2576 /* Re-establish logical connection with the controller. */ 2577 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2578 0, 0, 0, 0, 0, 2579 NULL, NULL, NULL, NULL, NULL))) { 2580 goto out; 2581 } 2582 /* 2583 * Complete all requests in the complete queue; error back all requests 2584 * in the busy queue. Any internal requests will be simply freed. 2585 * Re-submit any requests in the pending queue. 2586 */ 2587 twa_drain_busy_queue(sc); 2588 2589 out: 2590 splx(s); 2591 /* 2592 * Enable interrupts, and also clear attention and response interrupts. 2593 */ 2594 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2595 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2596 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2597 TWA_CONTROL_ENABLE_INTERRUPTS); 2598 2599 /* Clear the 'in reset' flag. */ 2600 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2601 2602 return(error); 2603 } 2604 2605 static int 2606 twa_soft_reset(struct twa_softc *sc) 2607 { 2608 uint32_t status_reg; 2609 2610 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2611 TWA_CONTROL_ISSUE_SOFT_RESET | 2612 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2613 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2614 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2615 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2616 TWA_CONTROL_DISABLE_INTERRUPTS); 2617 2618 if (twa_drain_response_queue_large(sc, 30) != 0) { 2619 aprint_error_dev(&sc->twa_dv, 2620 "response queue not empty after reset.\n"); 2621 return(1); 2622 } 2623 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2624 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2625 aprint_error_dev(&sc->twa_dv, "no attention interrupt after reset.\n"); 2626 return(1); 2627 } 2628 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2629 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2630 2631 if (twa_drain_response_queue(sc)) { 2632 aprint_error_dev(&sc->twa_dv, "cannot drain response queue.\n"); 2633 return(1); 2634 } 2635 if (twa_drain_aen_queue(sc)) { 2636 aprint_error_dev(&sc->twa_dv, "cannot drain AEN queue.\n"); 2637 return(1); 2638 } 2639 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2640 aprint_error_dev(&sc->twa_dv, "reset not reported by controller.\n"); 2641 return(1); 2642 } 2643 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2644 if (TWA_STATUS_ERRORS(status_reg) || 2645 twa_check_ctlr_state(sc, status_reg)) { 2646 aprint_error_dev(&sc->twa_dv, "controller errors detected.\n"); 2647 return(1); 2648 } 2649 return(0); 2650 } 2651 2652 static int 2653 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2654 { 2655 struct timeval t1; 2656 time_t end_time; 2657 uint32_t status_reg; 2658 2659 timeout = (timeout * 1000 * 100); 2660 2661 microtime(&t1); 2662 2663 end_time = t1.tv_usec + timeout; 2664 2665 do { 2666 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2667 /* got the required bit(s)? */ 2668 if ((status_reg & status) == status) 2669 return(0); 2670 DELAY(100000); 2671 microtime(&t1); 2672 } while (t1.tv_usec <= end_time); 2673 2674 return(1); 2675 } 2676 2677 static int 2678 twa_fetch_aen(struct twa_softc *sc) 2679 { 2680 struct twa_request *tr; 2681 int s, error = 0; 2682 2683 s = splbio(); 2684 2685 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2686 splx(s); 2687 return(EIO); 2688 } 2689 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2690 tr->tr_callback = twa_aen_callback; 2691 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2692 if (twa_request_sense(tr, 0) != 0) { 2693 if (tr->tr_data) 2694 free(tr->tr_data, M_DEVBUF); 2695 twa_release_request(tr); 2696 error = 1; 2697 } 2698 splx(s); 2699 2700 return(error); 2701 } 2702 2703 /* 2704 * Function name: twa_aen_callback 2705 * Description: Callback for requests to fetch AEN's. 2706 * 2707 * Input: tr -- ptr to completed request pkt 2708 * Output: None 2709 * Return value: None 2710 */ 2711 static void 2712 twa_aen_callback(struct twa_request *tr) 2713 { 2714 int i; 2715 int fetch_more_aens = 0; 2716 struct twa_softc *sc = tr->tr_sc; 2717 struct twa_command_header *cmd_hdr = 2718 (struct twa_command_header *)(tr->tr_data); 2719 struct twa_command_9k *cmd = 2720 &(tr->tr_command->command.cmd_pkt_9k); 2721 2722 if (! cmd->status) { 2723 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2724 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2725 if (twa_enqueue_aen(sc, cmd_hdr) 2726 != TWA_AEN_QUEUE_EMPTY) 2727 fetch_more_aens = 1; 2728 } else { 2729 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2730 for (i = 0; i < 18; i++) 2731 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2732 2733 printf(""); /* print new line */ 2734 2735 for (i = 0; i < 128; i++) 2736 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2737 } 2738 if (tr->tr_data) 2739 free(tr->tr_data, M_DEVBUF); 2740 twa_release_request(tr); 2741 2742 if (fetch_more_aens) 2743 twa_fetch_aen(sc); 2744 } 2745 2746 /* 2747 * Function name: twa_enqueue_aen 2748 * Description: Queues AEN's to be supplied to user-space tools on request. 2749 * 2750 * Input: sc -- ptr to per ctlr structure 2751 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2752 * details can be retrieved. 2753 * Output: None 2754 * Return value: None 2755 */ 2756 static uint16_t 2757 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2758 { 2759 int rv, s; 2760 struct tw_cl_event_packet *event; 2761 uint16_t aen_code; 2762 unsigned long sync_time; 2763 2764 s = splbio(); 2765 aen_code = cmd_hdr->status_block.error; 2766 2767 switch (aen_code) { 2768 case TWA_AEN_SYNC_TIME_WITH_HOST: 2769 2770 sync_time = (time_second - (3 * 86400)) % 604800; 2771 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2772 TWA_PARAM_TIME_SchedulerTime, 4, 2773 &sync_time, twa_aen_callback); 2774 #ifdef DIAGNOSTIC 2775 if (rv != 0) 2776 aprint_error_dev(&sc->twa_dv, "unable to sync time with ctlr\n"); 2777 #endif 2778 break; 2779 2780 case TWA_AEN_QUEUE_EMPTY: 2781 break; 2782 2783 default: 2784 /* Queue the event. */ 2785 event = sc->twa_aen_queue[sc->twa_aen_head]; 2786 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2787 sc->twa_aen_queue_overflow = TRUE; 2788 event->severity = 2789 cmd_hdr->status_block.substatus_block.severity; 2790 event->time_stamp_sec = time_second; 2791 event->aen_code = aen_code; 2792 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2793 event->sequence_id = ++(sc->twa_current_sequence_id); 2794 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2795 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2796 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2797 event->parameter_len); 2798 2799 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2800 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2801 device_xname(&sc->twa_dv), 2802 aen_code, 2803 twa_aen_severity_table[event->severity], 2804 twa_find_msg_string(twa_aen_table, aen_code), 2805 event->parameter_data); 2806 } 2807 2808 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2809 sc->twa_aen_queue_wrapped = TRUE; 2810 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2811 break; 2812 } /* switch */ 2813 splx(s); 2814 2815 return (aen_code); 2816 } 2817 2818 /* 2819 * Function name: twa_find_aen 2820 * Description: Reports whether a given AEN ever occurred. 2821 * 2822 * Input: sc -- ptr to per ctlr structure 2823 * aen_code-- AEN to look for 2824 * Output: None 2825 * Return value: 0 -- success 2826 * non-zero-- failure 2827 */ 2828 static int 2829 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2830 { 2831 uint32_t last_index; 2832 int s; 2833 int i; 2834 2835 s = splbio(); 2836 2837 if (sc->twa_aen_queue_wrapped) 2838 last_index = sc->twa_aen_head; 2839 else 2840 last_index = 0; 2841 2842 i = sc->twa_aen_head; 2843 do { 2844 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2845 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2846 splx(s); 2847 return(0); 2848 } 2849 } while (i != last_index); 2850 2851 splx(s); 2852 return(1); 2853 } 2854 2855 static inline void 2856 twa_request_init(struct twa_request *tr, int flags) 2857 { 2858 tr->tr_data = NULL; 2859 tr->tr_real_data = NULL; 2860 tr->tr_length = 0; 2861 tr->tr_real_length = 0; 2862 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2863 tr->tr_flags = flags; 2864 tr->tr_error = 0; 2865 tr->tr_callback = NULL; 2866 tr->tr_cmd_pkt_type = 0; 2867 tr->bp = 0; 2868 2869 /* 2870 * Look at the status field in the command packet to see how 2871 * it completed the last time it was used, and zero out only 2872 * the portions that might have changed. Note that we don't 2873 * care to zero out the sglist. 2874 */ 2875 if (tr->tr_command->command.cmd_pkt_9k.status) 2876 memset(tr->tr_command, 0, 2877 sizeof(struct twa_command_header) + 28); 2878 else 2879 memset(&(tr->tr_command->command), 0, 28); 2880 } 2881 2882 struct twa_request * 2883 twa_get_request_wait(struct twa_softc *sc, int flags) 2884 { 2885 struct twa_request *tr; 2886 int s; 2887 2888 KASSERT((flags & TWA_CMD_AEN) == 0); 2889 2890 s = splbio(); 2891 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2892 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2893 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2894 } 2895 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2896 2897 splx(s); 2898 2899 twa_request_init(tr, flags); 2900 2901 return(tr); 2902 } 2903 2904 struct twa_request * 2905 twa_get_request(struct twa_softc *sc, int flags) 2906 { 2907 int s; 2908 struct twa_request *tr; 2909 2910 /* Get a free request packet. */ 2911 s = splbio(); 2912 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2913 2914 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2915 tr = sc->sc_twa_request; 2916 flags |= TWA_CMD_AEN_BUSY; 2917 } else { 2918 splx(s); 2919 return (NULL); 2920 } 2921 } else { 2922 if (__predict_false((tr = 2923 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2924 splx(s); 2925 return (NULL); 2926 } 2927 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2928 } 2929 splx(s); 2930 2931 twa_request_init(tr, flags); 2932 2933 return(tr); 2934 } 2935 2936 /* 2937 * Print some information about the controller 2938 */ 2939 static void 2940 twa_describe_controller(struct twa_softc *sc) 2941 { 2942 struct twa_param_9k *p[10]; 2943 int i, rv = 0; 2944 uint32_t dsize; 2945 uint8_t ports; 2946 2947 memset(p, sizeof(struct twa_param_9k *), 10); 2948 2949 /* Get the port count. */ 2950 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2951 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2952 2953 /* get version strings */ 2954 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2955 16, NULL, &p[1]); 2956 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2957 16, NULL, &p[2]); 2958 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2959 16, NULL, &p[3]); 2960 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2961 8, NULL, &p[4]); 2962 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2963 8, NULL, &p[5]); 2964 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2965 8, NULL, &p[6]); 2966 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2967 16, NULL, &p[7]); 2968 2969 if (rv) { 2970 /* some error occurred */ 2971 aprint_error_dev(&sc->twa_dv, "failed to fetch version information\n"); 2972 goto bail; 2973 } 2974 2975 ports = *(uint8_t *)(p[0]->data); 2976 2977 aprint_normal_dev(&sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2978 ports, p[1]->data, p[2]->data); 2979 2980 aprint_verbose_dev(&sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2981 p[3]->data, p[4]->data, 2982 p[5]->data, p[6]->data); 2983 2984 for (i = 0; i < ports; i++) { 2985 2986 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2987 continue; 2988 2989 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2990 TWA_PARAM_DRIVEMODELINDEX, 2991 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 2992 2993 if (rv != 0) { 2994 aprint_error_dev(&sc->twa_dv, "unable to get drive model for port" 2995 " %d\n", i); 2996 continue; 2997 } 2998 2999 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3000 TWA_PARAM_DRIVESIZEINDEX, 3001 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3002 3003 if (rv != 0) { 3004 aprint_error_dev(&sc->twa_dv, "unable to get drive size" 3005 " for port %d\n", i); 3006 free(p[8], M_DEVBUF); 3007 continue; 3008 } 3009 3010 dsize = *(uint32_t *)(p[9]->data); 3011 3012 aprint_verbose_dev(&sc->twa_dv, "port %d: %.40s %d MB\n", 3013 i, p[8]->data, dsize / 2048); 3014 3015 if (p[8]) 3016 free(p[8], M_DEVBUF); 3017 if (p[9]) 3018 free(p[9], M_DEVBUF); 3019 } 3020 bail: 3021 if (p[0]) 3022 free(p[0], M_DEVBUF); 3023 if (p[1]) 3024 free(p[1], M_DEVBUF); 3025 if (p[2]) 3026 free(p[2], M_DEVBUF); 3027 if (p[3]) 3028 free(p[3], M_DEVBUF); 3029 if (p[4]) 3030 free(p[4], M_DEVBUF); 3031 if (p[5]) 3032 free(p[5], M_DEVBUF); 3033 if (p[6]) 3034 free(p[6], M_DEVBUF); 3035 } 3036 3037 /* 3038 * Function name: twa_check_ctlr_state 3039 * Description: Makes sure that the fw status register reports a 3040 * proper status. 3041 * 3042 * Input: sc -- ptr to per ctlr structure 3043 * status_reg -- value in the status register 3044 * Output: None 3045 * Return value: 0 -- no errors 3046 * non-zero-- errors 3047 */ 3048 static int 3049 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3050 { 3051 int result = 0; 3052 struct timeval t1; 3053 static time_t last_warning[2] = {0, 0}; 3054 3055 /* Check if the 'micro-controller ready' bit is not set. */ 3056 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3057 TWA_STATUS_EXPECTED_BITS) { 3058 3059 microtime(&t1); 3060 3061 last_warning[0] += (5 * 1000 * 100); 3062 3063 if (t1.tv_usec > last_warning[0]) { 3064 microtime(&t1); 3065 last_warning[0] = t1.tv_usec; 3066 } 3067 result = 1; 3068 } 3069 3070 /* Check if any error bits are set. */ 3071 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3072 3073 microtime(&t1); 3074 last_warning[1] += (5 * 1000 * 100); 3075 if (t1.tv_usec > last_warning[1]) { 3076 microtime(&t1); 3077 last_warning[1] = t1.tv_usec; 3078 } 3079 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3080 aprint_error_dev(&sc->twa_dv, "clearing PCI parity error " 3081 "re-seat/move/replace card.\n"); 3082 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3083 TWA_CONTROL_CLEAR_PARITY_ERROR); 3084 pci_conf_write(sc->pc, sc->tag, 3085 PCI_COMMAND_STATUS_REG, 3086 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3087 } 3088 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3089 aprint_error_dev(&sc->twa_dv, "clearing PCI abort\n"); 3090 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3091 TWA_CONTROL_CLEAR_PCI_ABORT); 3092 pci_conf_write(sc->pc, sc->tag, 3093 PCI_COMMAND_STATUS_REG, 3094 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3095 } 3096 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3097 /* 3098 * As documented by 3ware, the 9650 erroneously 3099 * flags queue errors during resets. 3100 * Just ignore them during the reset instead of 3101 * bothering the console. 3102 */ 3103 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3104 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3105 aprint_error_dev(&sc->twa_dv, 3106 "clearing controller queue error\n"); 3107 } 3108 3109 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3110 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3111 } 3112 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3113 aprint_error_dev(&sc->twa_dv, "micro-controller error\n"); 3114 result = 1; 3115 } 3116 } 3117 return(result); 3118 } 3119
Indexes created Tue Oct 14 15:09:51 GMT 2025