twa.c revision 1.19.4.4
1 /* $NetBSD: twa.c,v 1.19.4.4 2009/08/19 18:47:17 yamt Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.19.4.4 2009/08/19 18:47:17 yamt Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/device.h> 76 #include <sys/queue.h> 77 #include <sys/proc.h> 78 #include <sys/bswap.h> 79 #include <sys/buf.h> 80 #include <sys/bufq.h> 81 #include <sys/endian.h> 82 #include <sys/malloc.h> 83 #include <sys/conf.h> 84 #include <sys/disk.h> 85 #include <sys/sysctl.h> 86 #include <sys/syslog.h> 87 #if 1 88 #include <sys/ktrace.h> 89 #endif 90 91 #include <uvm/uvm_extern.h> 92 93 #include <sys/bus.h> 94 95 #include <dev/pci/pcireg.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/pcidevs.h> 98 #include <dev/pci/twareg.h> 99 #include <dev/pci/twavar.h> 100 #include <dev/pci/twaio.h> 101 102 #include <dev/scsipi/scsipi_all.h> 103 #include <dev/scsipi/scsipi_disk.h> 104 #include <dev/scsipi/scsipiconf.h> 105 #include <dev/scsipi/scsi_spc.h> 106 107 #include <dev/ldvar.h> 108 109 #include "locators.h" 110 111 #define PCI_CBIO 0x10 112 113 static int twa_fetch_aen(struct twa_softc *); 114 static void twa_aen_callback(struct twa_request *); 115 static int twa_find_aen(struct twa_softc *sc, uint16_t); 116 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 117 struct twa_command_header *); 118 119 static void twa_attach(device_t, device_t, void *); 120 static void twa_shutdown(void *); 121 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 122 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 123 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 124 static int twa_intr(void *); 125 static int twa_match(device_t, cfdata_t, void *); 126 static int twa_reset(struct twa_softc *); 127 128 static int twa_print(void *, const char *); 129 static int twa_soft_reset(struct twa_softc *); 130 131 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 132 static int twa_get_param(struct twa_softc *, int, int, size_t, 133 void (* callback)(struct twa_request *), 134 struct twa_param_9k **); 135 static int twa_set_param(struct twa_softc *, int, int, int, void *, 136 void (* callback)(struct twa_request *)); 137 static void twa_describe_controller(struct twa_softc *); 138 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 139 static int twa_done(struct twa_softc *); 140 141 extern struct cfdriver twa_cd; 142 extern uint32_t twa_fw_img_size; 143 extern uint8_t twa_fw_img[]; 144 145 CFATTACH_DECL(twa, sizeof(struct twa_softc), 146 twa_match, twa_attach, NULL, NULL); 147 148 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 149 const char twaver[] = "1.50.01.002"; 150 151 /* AEN messages. */ 152 static const struct twa_message twa_aen_table[] = { 153 {0x0000, "AEN queue empty"}, 154 {0x0001, "Controller reset occurred"}, 155 {0x0002, "Degraded unit detected"}, 156 {0x0003, "Controller error occured"}, 157 {0x0004, "Background rebuild failed"}, 158 {0x0005, "Background rebuild done"}, 159 {0x0006, "Incomplete unit detected"}, 160 {0x0007, "Background initialize done"}, 161 {0x0008, "Unclean shutdown detected"}, 162 {0x0009, "Drive timeout detected"}, 163 {0x000A, "Drive error detected"}, 164 {0x000B, "Rebuild started"}, 165 {0x000C, "Background initialize started"}, 166 {0x000D, "Entire logical unit was deleted"}, 167 {0x000E, "Background initialize failed"}, 168 {0x000F, "SMART attribute exceeded threshold"}, 169 {0x0010, "Power supply reported AC under range"}, 170 {0x0011, "Power supply reported DC out of range"}, 171 {0x0012, "Power supply reported a malfunction"}, 172 {0x0013, "Power supply predicted malfunction"}, 173 {0x0014, "Battery charge is below threshold"}, 174 {0x0015, "Fan speed is below threshold"}, 175 {0x0016, "Temperature sensor is above threshold"}, 176 {0x0017, "Power supply was removed"}, 177 {0x0018, "Power supply was inserted"}, 178 {0x0019, "Drive was removed from a bay"}, 179 {0x001A, "Drive was inserted into a bay"}, 180 {0x001B, "Drive bay cover door was opened"}, 181 {0x001C, "Drive bay cover door was closed"}, 182 {0x001D, "Product case was opened"}, 183 {0x0020, "Prepare for shutdown (power-off)"}, 184 {0x0021, "Downgrade UDMA mode to lower speed"}, 185 {0x0022, "Upgrade UDMA mode to higher speed"}, 186 {0x0023, "Sector repair completed"}, 187 {0x0024, "Sbuf memory test failed"}, 188 {0x0025, "Error flushing cached write data to disk"}, 189 {0x0026, "Drive reported data ECC error"}, 190 {0x0027, "DCB has checksum error"}, 191 {0x0028, "DCB version is unsupported"}, 192 {0x0029, "Background verify started"}, 193 {0x002A, "Background verify failed"}, 194 {0x002B, "Background verify done"}, 195 {0x002C, "Bad sector overwritten during rebuild"}, 196 {0x002D, "Source drive error occurred"}, 197 {0x002E, "Replace failed because replacement drive too small"}, 198 {0x002F, "Verify failed because array was never initialized"}, 199 {0x0030, "Unsupported ATA drive"}, 200 {0x0031, "Synchronize host/controller time"}, 201 {0x0032, "Spare capacity is inadequate for some units"}, 202 {0x0033, "Background migration started"}, 203 {0x0034, "Background migration failed"}, 204 {0x0035, "Background migration done"}, 205 {0x0036, "Verify detected and fixed data/parity mismatch"}, 206 {0x0037, "SO-DIMM incompatible"}, 207 {0x0038, "SO-DIMM not detected"}, 208 {0x0039, "Corrected Sbuf ECC error"}, 209 {0x003A, "Drive power on reset detected"}, 210 {0x003B, "Background rebuild paused"}, 211 {0x003C, "Background initialize paused"}, 212 {0x003D, "Background verify paused"}, 213 {0x003E, "Background migration paused"}, 214 {0x003F, "Corrupt flash file system detected"}, 215 {0x0040, "Flash file system repaired"}, 216 {0x0041, "Unit number assignments were lost"}, 217 {0x0042, "Error during read of primary DCB"}, 218 {0x0043, "Latent error found in backup DCB"}, 219 {0x0044, "Battery voltage is normal"}, 220 {0x0045, "Battery voltage is low"}, 221 {0x0046, "Battery voltage is high"}, 222 {0x0047, "Battery voltage is too low"}, 223 {0x0048, "Battery voltage is too high"}, 224 {0x0049, "Battery temperature is normal"}, 225 {0x004A, "Battery temperature is low"}, 226 {0x004B, "Battery temperature is high"}, 227 {0x004C, "Battery temperature is too low"}, 228 {0x004D, "Battery temperature is too high"}, 229 {0x004E, "Battery capacity test started"}, 230 {0x004F, "Cache synchronization skipped"}, 231 {0x0050, "Battery capacity test completed"}, 232 {0x0051, "Battery health check started"}, 233 {0x0052, "Battery health check completed"}, 234 {0x0053, "Battery capacity test needed"}, 235 {0x0054, "Battery charge termination voltage is at high level"}, 236 {0x0055, "Battery charging started"}, 237 {0x0056, "Battery charging completed"}, 238 {0x0057, "Battery charging fault"}, 239 {0x0058, "Battery capacity is below warning level"}, 240 {0x0059, "Battery capacity is below error level"}, 241 {0x005A, "Battery is present"}, 242 {0x005B, "Battery is not present"}, 243 {0x005C, "Battery is weak"}, 244 {0x005D, "Battery health check failed"}, 245 {0x005E, "Cache synchronized after power fail"}, 246 {0x005F, "Cache synchronization failed; some data lost"}, 247 {0x0060, "Bad cache meta data checksum"}, 248 {0x0061, "Bad cache meta data signature"}, 249 {0x0062, "Cache meta data restore failed"}, 250 {0x0063, "BBU not found after power fail"}, 251 {0x00FC, "Recovered/finished array membership update"}, 252 {0x00FD, "Handler lockup"}, 253 {0x00FE, "Retrying PCI transfer"}, 254 {0x00FF, "AEN queue is full"}, 255 {0xFFFFFFFF, (char *)NULL} 256 }; 257 258 /* AEN severity table. */ 259 static const char *twa_aen_severity_table[] = { 260 "None", 261 "ERROR", 262 "WARNING", 263 "INFO", 264 "DEBUG", 265 (char *)NULL 266 }; 267 268 /* Error messages. */ 269 static const struct twa_message twa_error_table[] = { 270 {0x0100, "SGL entry contains zero data"}, 271 {0x0101, "Invalid command opcode"}, 272 {0x0102, "SGL entry has unaligned address"}, 273 {0x0103, "SGL size does not match command"}, 274 {0x0104, "SGL entry has illegal length"}, 275 {0x0105, "Command packet is not aligned"}, 276 {0x0106, "Invalid request ID"}, 277 {0x0107, "Duplicate request ID"}, 278 {0x0108, "ID not locked"}, 279 {0x0109, "LBA out of range"}, 280 {0x010A, "Logical unit not supported"}, 281 {0x010B, "Parameter table does not exist"}, 282 {0x010C, "Parameter index does not exist"}, 283 {0x010D, "Invalid field in CDB"}, 284 {0x010E, "Specified port has invalid drive"}, 285 {0x010F, "Parameter item size mismatch"}, 286 {0x0110, "Failed memory allocation"}, 287 {0x0111, "Memory request too large"}, 288 {0x0112, "Out of memory segments"}, 289 {0x0113, "Invalid address to deallocate"}, 290 {0x0114, "Out of memory"}, 291 {0x0115, "Out of heap"}, 292 {0x0120, "Double degrade"}, 293 {0x0121, "Drive not degraded"}, 294 {0x0122, "Reconstruct error"}, 295 {0x0123, "Replace not accepted"}, 296 {0x0124, "Replace drive capacity too small"}, 297 {0x0125, "Sector count not allowed"}, 298 {0x0126, "No spares left"}, 299 {0x0127, "Reconstruct error"}, 300 {0x0128, "Unit is offline"}, 301 {0x0129, "Cannot update status to DCB"}, 302 {0x0130, "Invalid stripe handle"}, 303 {0x0131, "Handle that was not locked"}, 304 {0x0132, "Handle that was not empy"}, 305 {0x0133, "Handle has different owner"}, 306 {0x0140, "IPR has parent"}, 307 {0x0150, "Illegal Pbuf address alignment"}, 308 {0x0151, "Illegal Pbuf transfer length"}, 309 {0x0152, "Illegal Sbuf address alignment"}, 310 {0x0153, "Illegal Sbuf transfer length"}, 311 {0x0160, "Command packet too large"}, 312 {0x0161, "SGL exceeds maximum length"}, 313 {0x0162, "SGL has too many entries"}, 314 {0x0170, "Insufficient resources for rebuilder"}, 315 {0x0171, "Verify error (data != parity)"}, 316 {0x0180, "Requested segment not in directory of this DCB"}, 317 {0x0181, "DCB segment has unsupported version"}, 318 {0x0182, "DCB segment has checksum error"}, 319 {0x0183, "DCB support (settings) segment invalid"}, 320 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 321 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 322 {0x01A0, "Could not clear Sbuf"}, 323 {0x01C0, "Flash identify failed"}, 324 {0x01C1, "Flash out of bounds"}, 325 {0x01C2, "Flash verify error"}, 326 {0x01C3, "Flash file object not found"}, 327 {0x01C4, "Flash file already present"}, 328 {0x01C5, "Flash file system full"}, 329 {0x01C6, "Flash file not present"}, 330 {0x01C7, "Flash file size error"}, 331 {0x01C8, "Bad flash file checksum"}, 332 {0x01CA, "Corrupt flash file system detected"}, 333 {0x01D0, "Invalid field in parameter list"}, 334 {0x01D1, "Parameter list length error"}, 335 {0x01D2, "Parameter item is not changeable"}, 336 {0x01D3, "Parameter item is not saveable"}, 337 {0x0200, "UDMA CRC error"}, 338 {0x0201, "Internal CRC error"}, 339 {0x0202, "Data ECC error"}, 340 {0x0203, "ADP level 1 error"}, 341 {0x0204, "Port timeout"}, 342 {0x0205, "Drive power on reset"}, 343 {0x0206, "ADP level 2 error"}, 344 {0x0207, "Soft reset failed"}, 345 {0x0208, "Drive not ready"}, 346 {0x0209, "Unclassified port error"}, 347 {0x020A, "Drive aborted command"}, 348 {0x0210, "Internal CRC error"}, 349 {0x0211, "Host PCI bus abort"}, 350 {0x0212, "Host PCI parity error"}, 351 {0x0213, "Port handler error"}, 352 {0x0214, "Token interrupt count error"}, 353 {0x0215, "Timeout waiting for PCI transfer"}, 354 {0x0216, "Corrected buffer ECC"}, 355 {0x0217, "Uncorrected buffer ECC"}, 356 {0x0230, "Unsupported command during flash recovery"}, 357 {0x0231, "Next image buffer expected"}, 358 {0x0232, "Binary image architecture incompatible"}, 359 {0x0233, "Binary image has no signature"}, 360 {0x0234, "Binary image has bad checksum"}, 361 {0x0235, "Image downloaded overflowed buffer"}, 362 {0x0240, "I2C device not found"}, 363 {0x0241, "I2C transaction aborted"}, 364 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 365 {0x0243, "SO-DIMM unsupported"}, 366 {0x0248, "SPI transfer status error"}, 367 {0x0249, "SPI transfer timeout error"}, 368 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 369 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 370 {0x0252, "Invalid value in CreateUnit descriptor"}, 371 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 372 {0x0254, "Unable to create data channel for this unit descriptor"}, 373 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 374 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 375 {0x0257, "CreateUnit does not support this descriptor version"}, 376 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 377 {0x0259, "Too many descriptors in CreateUnit"}, 378 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 379 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 380 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 381 {0x0260, "SMART attribute exceeded threshold"}, 382 {0xFFFFFFFF, (char *)NULL} 383 }; 384 385 struct twa_pci_identity { 386 uint32_t vendor_id; 387 uint32_t product_id; 388 const char *name; 389 }; 390 391 static const struct twa_pci_identity pci_twa_products[] = { 392 { PCI_VENDOR_3WARE, 393 PCI_PRODUCT_3WARE_9000, 394 "3ware 9000 series", 395 }, 396 { PCI_VENDOR_3WARE, 397 PCI_PRODUCT_3WARE_9550, 398 "3ware 9550SX series", 399 }, 400 { PCI_VENDOR_3WARE, 401 PCI_PRODUCT_3WARE_9650, 402 "3ware 9650SE series", 403 }, 404 { PCI_VENDOR_3WARE, 405 PCI_PRODUCT_3WARE_9690, 406 "3ware 9690 series", 407 }, 408 { 0, 409 0, 410 NULL, 411 }, 412 }; 413 414 415 static inline void 416 twa_outl(struct twa_softc *sc, int off, uint32_t val) 417 { 418 419 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 420 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 421 BUS_SPACE_BARRIER_WRITE); 422 } 423 424 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 425 { 426 427 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 428 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 429 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 430 } 431 432 void 433 twa_request_wait_handler(struct twa_request *tr) 434 { 435 436 wakeup(tr); 437 } 438 439 static int 440 twa_match(device_t parent, cfdata_t cfdata, 441 void *aux) 442 { 443 int i; 444 struct pci_attach_args *pa = aux; 445 const struct twa_pci_identity *entry = 0; 446 447 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 448 for (i = 0; (pci_twa_products[i].product_id); i++) { 449 entry = &pci_twa_products[i]; 450 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 451 aprint_normal("%s: (rev. 0x%02x)\n", 452 entry->name, PCI_REVISION(pa->pa_class)); 453 return (1); 454 } 455 } 456 } 457 return (0); 458 } 459 460 static const char * 461 twa_find_msg_string(const struct twa_message *table, uint16_t code) 462 { 463 int i; 464 465 for (i = 0; table[i].message != NULL; i++) 466 if (table[i].code == code) 467 return(table[i].message); 468 469 return(table[i].message); 470 } 471 472 void 473 twa_release_request(struct twa_request *tr) 474 { 475 int s; 476 struct twa_softc *sc; 477 478 sc = tr->tr_sc; 479 480 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 481 s = splbio(); 482 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 483 splx(s); 484 if (__predict_false((tr->tr_sc->twa_sc_flags & 485 TWA_STATE_REQUEST_WAIT) != 0)) { 486 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 487 wakeup(&sc->twa_free); 488 } 489 } else 490 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 491 } 492 493 static void 494 twa_unmap_request(struct twa_request *tr) 495 { 496 struct twa_softc *sc = tr->tr_sc; 497 uint8_t cmd_status; 498 int s; 499 500 /* If the command involved data, unmap that too. */ 501 if (tr->tr_data != NULL) { 502 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 503 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 504 else 505 cmd_status = 506 tr->tr_command->command.cmd_pkt_7k.generic.status; 507 508 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 509 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 510 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 511 /* 512 * If we are using a bounce buffer, and we are reading 513 * data, copy the real data in. 514 */ 515 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 516 if (cmd_status == 0) 517 memcpy(tr->tr_real_data, tr->tr_data, 518 tr->tr_real_length); 519 } 520 if (tr->tr_flags & TWA_CMD_DATA_IN) 521 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 522 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 523 524 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 525 } 526 527 /* Free alignment buffer if it was used. */ 528 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 529 s = splvm(); 530 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 531 tr->tr_length, UVM_KMF_WIRED); 532 splx(s); 533 tr->tr_data = tr->tr_real_data; 534 tr->tr_length = tr->tr_real_length; 535 } 536 } 537 538 /* 539 * Function name: twa_wait_request 540 * Description: Sends down a firmware cmd, and waits for the completion, 541 * but NOT in a tight loop. 542 * 543 * Input: tr -- ptr to request pkt 544 * timeout -- max # of seconds to wait before giving up 545 * Output: None 546 * Return value: 0 -- success 547 * non-zero-- failure 548 */ 549 static int 550 twa_wait_request(struct twa_request *tr, uint32_t timeout) 551 { 552 time_t end_time; 553 struct timeval t1; 554 int s, rv; 555 556 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 557 tr->tr_callback = twa_request_wait_handler; 558 tr->tr_status = TWA_CMD_BUSY; 559 560 rv = twa_map_request(tr); 561 562 if (rv != 0) 563 return (rv); 564 565 microtime(&t1); 566 end_time = t1.tv_usec + 567 (timeout * 1000 * 100); 568 569 while (tr->tr_status != TWA_CMD_COMPLETE) { 570 rv = tr->tr_error; 571 if (rv != 0) 572 return(rv); 573 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 574 break; 575 576 if (rv == EWOULDBLOCK) { 577 /* 578 * We will reset the controller only if the request has 579 * already been submitted, so as to not lose the 580 * request packet. If a busy request timed out, the 581 * reset will take care of freeing resources. If a 582 * pending request timed out, we will free resources 583 * for that request, right here. So, the caller is 584 * expected to NOT cleanup when ETIMEDOUT is returned. 585 */ 586 if (tr->tr_status == TWA_CMD_BUSY) 587 twa_reset(tr->tr_sc); 588 else { 589 /* Request was never submitted. Clean up. */ 590 s = splbio(); 591 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 592 tr_link); 593 splx(s); 594 595 twa_unmap_request(tr); 596 if (tr->tr_data) 597 free(tr->tr_data, M_DEVBUF); 598 599 twa_release_request(tr); 600 } 601 return(ETIMEDOUT); 602 } 603 /* 604 * Either the request got completed, or we were woken up by a 605 * signal. Calculate the new timeout, in case it was the 606 * latter. 607 */ 608 microtime(&t1); 609 610 timeout = (end_time - t1.tv_usec) / (1000 * 100); 611 } 612 return(rv); 613 } 614 615 /* 616 * Function name: twa_immediate_request 617 * Description: Sends down a firmware cmd, and waits for the completion 618 * in a tight loop. 619 * 620 * Input: tr -- ptr to request pkt 621 * timeout -- max # of seconds to wait before giving up 622 * Output: None 623 * Return value: 0 -- success 624 * non-zero-- failure 625 */ 626 static int 627 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 628 { 629 struct timeval t1; 630 int s = 0, rv = 0; 631 632 rv = twa_map_request(tr); 633 634 if (rv != 0) 635 return(rv); 636 637 timeout = (timeout * 10000 * 10); 638 639 microtime(&t1); 640 641 timeout += t1.tv_usec; 642 643 do { 644 rv = tr->tr_error; 645 if (rv != 0) 646 return(rv); 647 s = splbio(); 648 twa_done(tr->tr_sc); 649 splx(s); 650 if (tr->tr_status == TWA_CMD_COMPLETE) 651 return(rv); 652 microtime(&t1); 653 } while (t1.tv_usec <= timeout); 654 655 /* 656 * We will reset the controller only if the request has 657 * already been submitted, so as to not lose the 658 * request packet. If a busy request timed out, the 659 * reset will take care of freeing resources. If a 660 * pending request timed out, we will free resources 661 * for that request, right here. So, the caller is 662 * expected to NOT cleanup when ETIMEDOUT is returned. 663 */ 664 rv = ETIMEDOUT; 665 666 if (tr->tr_status == TWA_CMD_BUSY) 667 twa_reset(tr->tr_sc); 668 else { 669 /* Request was never submitted. Clean up. */ 670 s = splbio(); 671 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 672 splx(s); 673 twa_unmap_request(tr); 674 if (tr->tr_data) 675 free(tr->tr_data, M_DEVBUF); 676 677 twa_release_request(tr); 678 } 679 return (rv); 680 } 681 682 static int 683 twa_inquiry(struct twa_request *tr, int lunid) 684 { 685 int error; 686 struct twa_command_9k *tr_9k_cmd; 687 688 if (tr->tr_data == NULL) 689 return (ENOMEM); 690 691 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 692 693 tr->tr_length = TWA_SECTOR_SIZE; 694 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 695 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 696 697 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 698 699 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 700 tr_9k_cmd->unit = lunid; 701 tr_9k_cmd->request_id = tr->tr_request_id; 702 tr_9k_cmd->status = 0; 703 tr_9k_cmd->sgl_offset = 16; 704 tr_9k_cmd->sgl_entries = 1; 705 /* create the CDB here */ 706 tr_9k_cmd->cdb[0] = INQUIRY; 707 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 708 tr_9k_cmd->cdb[4] = 255; 709 710 /* XXXX setup page data no lun device 711 * it seems 9000 series does not indicate 712 * NOTPRESENT - need more investigation 713 */ 714 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 715 SID_QUAL_LU_NOTPRESENT; 716 717 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 718 719 if (error != 0) 720 return (error); 721 722 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 723 SID_QUAL_LU_NOTPRESENT) 724 error = 1; 725 726 return (error); 727 } 728 729 static int 730 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 731 { 732 733 printf("%s: %s\n", device_xname(&sc->twa_dv), scsipi->vendor); 734 735 return (1); 736 } 737 738 739 static uint64_t 740 twa_read_capacity(struct twa_request *tr, int lunid) 741 { 742 int error; 743 struct twa_command_9k *tr_9k_cmd; 744 uint64_t array_size = 0LL; 745 746 if (tr->tr_data == NULL) 747 return (ENOMEM); 748 749 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 750 751 tr->tr_length = TWA_SECTOR_SIZE; 752 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 753 tr->tr_flags |= TWA_CMD_DATA_OUT; 754 755 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 756 757 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 758 tr_9k_cmd->unit = lunid; 759 tr_9k_cmd->request_id = tr->tr_request_id; 760 tr_9k_cmd->status = 0; 761 tr_9k_cmd->sgl_offset = 16; 762 tr_9k_cmd->sgl_entries = 1; 763 /* create the CDB here */ 764 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 765 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 766 767 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 768 769 if (error == 0) { 770 #if BYTE_ORDER == BIG_ENDIAN 771 array_size = bswap64(_8btol( 772 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 773 #else 774 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 775 tr->tr_data)->addr) + 1; 776 #endif 777 } 778 return (array_size); 779 } 780 781 static int 782 twa_request_sense(struct twa_request *tr, int lunid) 783 { 784 int error = 1; 785 struct twa_command_9k *tr_9k_cmd; 786 787 if (tr->tr_data == NULL) 788 return (error); 789 790 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 791 792 tr->tr_length = TWA_SECTOR_SIZE; 793 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 794 tr->tr_flags |= TWA_CMD_DATA_OUT; 795 796 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 797 798 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 799 tr_9k_cmd->unit = lunid; 800 tr_9k_cmd->request_id = tr->tr_request_id; 801 tr_9k_cmd->status = 0; 802 tr_9k_cmd->sgl_offset = 16; 803 tr_9k_cmd->sgl_entries = 1; 804 /* create the CDB here */ 805 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 806 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 807 tr_9k_cmd->cdb[4] = 255; 808 809 /*XXX AEN notification called in interrupt context 810 * so just queue the request. Return as quickly 811 * as possible from interrupt 812 */ 813 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 814 error = twa_map_request(tr); 815 else 816 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 817 818 return (error); 819 } 820 821 static int 822 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 823 { 824 struct twa_request *tr; 825 struct twa_command_packet *tc; 826 bus_dma_segment_t seg; 827 size_t max_segs, max_xfer; 828 int i, rv, rseg, size; 829 830 if ((sc->sc_units = malloc(sc->sc_nunits * 831 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 832 return(ENOMEM); 833 834 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 835 M_DEVBUF, M_NOWAIT)) == NULL) 836 return(ENOMEM); 837 838 size = num_reqs * sizeof(struct twa_command_packet); 839 840 /* Allocate memory for cmd pkts. */ 841 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 842 size, PAGE_SIZE, 0, &seg, 843 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 844 aprint_error_dev(&sc->twa_dv, "unable to allocate " 845 "command packets, rv = %d\n", rv); 846 return (ENOMEM); 847 } 848 849 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 850 &seg, rseg, size, (void **)&sc->twa_cmds, 851 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 852 aprint_error_dev(&sc->twa_dv, "unable to map commands, rv = %d\n", rv); 853 return (1); 854 } 855 856 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 857 size, num_reqs, size, 858 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 859 aprint_error_dev(&sc->twa_dv, "unable to create command DMA map, " 860 "rv = %d\n", rv); 861 return (ENOMEM); 862 } 863 864 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 865 sc->twa_cmds, size, NULL, 866 BUS_DMA_NOWAIT)) != 0) { 867 aprint_error_dev(&sc->twa_dv, "unable to load command DMA map, " 868 "rv = %d\n", rv); 869 return (1); 870 } 871 872 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 873 aprint_error_dev(&sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 874 875 return (1); 876 } 877 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 878 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 879 880 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 881 memset(sc->twa_cmd_pkt_buf, 0, 882 num_reqs * sizeof(struct twa_command_packet)); 883 884 sc->sc_twa_request = sc->twa_req_buf; 885 max_segs = twa_get_maxsegs(); 886 max_xfer = twa_get_maxxfer(max_segs); 887 888 for (i = 0; i < num_reqs; i++, tc++) { 889 tr = &(sc->twa_req_buf[i]); 890 tr->tr_command = tc; 891 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 892 (i * sizeof(struct twa_command_packet)); 893 tr->tr_request_id = i; 894 tr->tr_sc = sc; 895 896 /* 897 * Create a map for data buffers. maxsize (256 * 1024) used in 898 * bus_dma_tag_create above should suffice the bounce page needs 899 * for data buffers, since the max I/O size we support is 128KB. 900 * If we supported I/O's bigger than 256KB, we would have to 901 * create a second dma_tag, with the appropriate maxsize. 902 */ 903 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 904 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 905 &tr->tr_dma_map)) != 0) { 906 aprint_error_dev(&sc->twa_dv, "unable to create command " 907 "DMA map, rv = %d\n", rv); 908 return (ENOMEM); 909 } 910 /* Insert request into the free queue. */ 911 if (i != 0) { 912 sc->twa_lookup[i] = tr; 913 twa_release_request(tr); 914 } else 915 tr->tr_flags |= TWA_CMD_AEN; 916 } 917 return(0); 918 } 919 920 static void 921 twa_recompute_openings(struct twa_softc *sc) 922 { 923 struct twa_drive *td; 924 int unit; 925 int openings; 926 uint64_t total_size; 927 928 total_size = 0; 929 for (unit = 0; unit < sc->sc_nunits; unit++) { 930 td = &sc->sc_units[unit]; 931 total_size += td->td_size; 932 } 933 934 for (unit = 0; unit < sc->sc_nunits; unit++) { 935 td = &sc->sc_units[unit]; 936 /* 937 * In theory, TWA_Q_LENGTH - 1 should be usable, but 938 * keep one additional ccb for internal commands. 939 * This makes the controller more reliable under load. 940 */ 941 if (total_size > 0) { 942 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 943 } else 944 openings = 0; 945 946 if (openings == td->td_openings) 947 continue; 948 td->td_openings = openings; 949 950 #ifdef TWA_DEBUG 951 printf("%s: unit %d openings %d\n", 952 device_xname(&sc->twa_dv), unit, openings); 953 #endif 954 if (td->td_dev != NULL) 955 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 956 } 957 } 958 959 static int 960 twa_request_bus_scan(struct twa_softc *sc) 961 { 962 struct twa_drive *td; 963 struct twa_request *tr; 964 struct twa_attach_args twaa; 965 int locs[TWACF_NLOCS]; 966 int s, unit; 967 968 s = splbio(); 969 for (unit = 0; unit < sc->sc_nunits; unit++) { 970 971 if ((tr = twa_get_request(sc, 0)) == NULL) { 972 splx(s); 973 return (EIO); 974 } 975 976 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 977 978 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 979 980 if (tr->tr_data == NULL) { 981 twa_release_request(tr); 982 splx(s); 983 return (ENOMEM); 984 } 985 td = &sc->sc_units[unit]; 986 987 if (twa_inquiry(tr, unit) == 0) { 988 if (td->td_dev == NULL) { 989 twa_print_inquiry_data(sc, 990 ((struct scsipi_inquiry_data *)tr->tr_data)); 991 992 sc->sc_units[unit].td_size = 993 twa_read_capacity(tr, unit); 994 995 twaa.twaa_unit = unit; 996 997 twa_recompute_openings(sc); 998 999 locs[TWACF_UNIT] = unit; 1000 1001 sc->sc_units[unit].td_dev = 1002 config_found_sm_loc(&sc->twa_dv, "twa", 1003 locs, &twaa, twa_print, config_stdsubmatch); 1004 } 1005 } else { 1006 if (td->td_dev != NULL) { 1007 (void) config_detach(td->td_dev, DETACH_FORCE); 1008 td->td_dev = NULL; 1009 td->td_size = 0; 1010 1011 twa_recompute_openings(sc); 1012 } 1013 } 1014 free(tr->tr_data, M_DEVBUF); 1015 1016 twa_release_request(tr); 1017 } 1018 splx(s); 1019 1020 return (0); 1021 } 1022 1023 1024 #ifdef DIAGNOSTIC 1025 static inline void 1026 twa_check_busy_q(struct twa_request *tr) 1027 { 1028 struct twa_request *rq; 1029 struct twa_softc *sc = tr->tr_sc; 1030 1031 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1032 if (tr->tr_request_id == rq->tr_request_id) { 1033 panic("cannot submit same request more than once"); 1034 } else if (tr->bp == rq->bp && tr->bp != 0) { 1035 /* XXX A check for 0 for the buf ptr is needed to 1036 * guard against ioctl requests with a buf ptr of 1037 * 0 and also aen notifications. Looking for 1038 * external cmds only. 1039 */ 1040 panic("cannot submit same buf more than once"); 1041 } else { 1042 /* Empty else statement */ 1043 } 1044 } 1045 } 1046 #endif 1047 1048 static int 1049 twa_start(struct twa_request *tr) 1050 { 1051 struct twa_softc *sc = tr->tr_sc; 1052 uint32_t status_reg; 1053 int s; 1054 int error; 1055 1056 s = splbio(); 1057 1058 /* 1059 * The 9650 has a bug in the detection of the full queue condition. 1060 * If a write operation has filled the queue and is directly followed 1061 * by a status read, it sometimes doesn't return the correct result. 1062 * To work around this, the upper 32bit are written first. 1063 * This effectively serialises the hardware, but does not change 1064 * the state of the queue. 1065 */ 1066 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9650) { 1067 /* Write lower 32 bits of address */ 1068 TWA_WRITE_9650_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1069 sizeof(struct twa_command_header)); 1070 } 1071 1072 /* Check to see if we can post a command. */ 1073 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1074 if ((error = twa_check_ctlr_state(sc, status_reg))) 1075 goto out; 1076 1077 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1078 if (tr->tr_status != TWA_CMD_PENDING) { 1079 tr->tr_status = TWA_CMD_PENDING; 1080 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1081 tr, tr_link); 1082 } 1083 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1084 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1085 error = EBUSY; 1086 } else { 1087 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1088 (char *)tr->tr_command - (char *)sc->twa_cmds, 1089 sizeof(struct twa_command_packet), 1090 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1091 1092 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9650) { 1093 /* 1094 * Cmd queue is not full. Post the command to 9650 1095 * by writing upper 32 bits of address. 1096 */ 1097 TWA_WRITE_9650_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1098 sizeof(struct twa_command_header)); 1099 } else { 1100 /* Cmd queue is not full. Post the command. */ 1101 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1102 sizeof(struct twa_command_header)); 1103 } 1104 1105 /* Mark the request as currently being processed. */ 1106 tr->tr_status = TWA_CMD_BUSY; 1107 1108 #ifdef DIAGNOSTIC 1109 twa_check_busy_q(tr); 1110 #endif 1111 1112 /* Move the request into the busy queue. */ 1113 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1114 } 1115 out: 1116 splx(s); 1117 return(error); 1118 } 1119 1120 static int 1121 twa_drain_response_queue(struct twa_softc *sc) 1122 { 1123 union twa_response_queue rq; 1124 uint32_t status_reg; 1125 1126 for (;;) { 1127 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1128 if (twa_check_ctlr_state(sc, status_reg)) 1129 return(1); 1130 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1131 return(0); /* no more response queue entries */ 1132 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1133 } 1134 } 1135 1136 /* 1137 * twa_drain_response_queue_large: 1138 * 1139 * specific to the 9550 and 9650 controller to remove requests. 1140 * 1141 * Removes all requests from "large" response queue on the 9550 controller. 1142 * This procedure is called as part of the 9550 controller reset sequence. 1143 */ 1144 static int 1145 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1146 { 1147 uint32_t start_time = 0, end_time; 1148 uint32_t response = 0; 1149 1150 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1151 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1152 start_time = 0; 1153 end_time = (timeout * TWA_MICROSECOND); 1154 1155 while ((response & 1156 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1157 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1158 if (start_time >= end_time) 1159 return (1); 1160 DELAY(1); 1161 start_time++; 1162 } 1163 /* P-chip delay */ 1164 DELAY(500000); 1165 } 1166 return (0); 1167 } 1168 1169 static void 1170 twa_drain_busy_queue(struct twa_softc *sc) 1171 { 1172 struct twa_request *tr; 1173 1174 /* Walk the busy queue. */ 1175 1176 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1177 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1178 1179 twa_unmap_request(tr); 1180 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1181 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1182 /* It's an internal/ioctl request. Simply free it. */ 1183 if (tr->tr_data) 1184 free(tr->tr_data, M_DEVBUF); 1185 twa_release_request(tr); 1186 } else { 1187 /* It's a SCSI request. Complete it. */ 1188 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1189 if (tr->tr_callback) 1190 tr->tr_callback(tr); 1191 } 1192 } 1193 } 1194 1195 static int 1196 twa_drain_pending_queue(struct twa_softc *sc) 1197 { 1198 struct twa_request *tr; 1199 int s, error = 0; 1200 1201 /* 1202 * Pull requests off the pending queue, and submit them. 1203 */ 1204 s = splbio(); 1205 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1206 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1207 1208 if ((error = twa_start(tr))) { 1209 if (error == EBUSY) { 1210 tr->tr_status = TWA_CMD_PENDING; 1211 1212 /* queue at the head */ 1213 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1214 tr, tr_link); 1215 error = 0; 1216 break; 1217 } else { 1218 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1219 tr->tr_error = error; 1220 tr->tr_callback(tr); 1221 error = EIO; 1222 } 1223 } 1224 } 1225 } 1226 splx(s); 1227 1228 return(error); 1229 } 1230 1231 static int 1232 twa_drain_aen_queue(struct twa_softc *sc) 1233 { 1234 int s, error = 0; 1235 struct twa_request *tr; 1236 struct twa_command_header *cmd_hdr; 1237 struct timeval t1; 1238 uint32_t timeout; 1239 1240 for (;;) { 1241 if ((tr = twa_get_request(sc, 0)) == NULL) { 1242 error = EIO; 1243 break; 1244 } 1245 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1246 tr->tr_callback = NULL; 1247 1248 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1249 1250 if (tr->tr_data == NULL) { 1251 error = 1; 1252 goto out; 1253 } 1254 1255 if (twa_request_sense(tr, 0) != 0) { 1256 error = 1; 1257 break; 1258 } 1259 1260 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1261 1262 microtime(&t1); 1263 1264 timeout += t1.tv_usec; 1265 1266 do { 1267 s = splbio(); 1268 twa_done(tr->tr_sc); 1269 splx(s); 1270 if (tr->tr_status != TWA_CMD_BUSY) 1271 break; 1272 microtime(&t1); 1273 } while (t1.tv_usec <= timeout); 1274 1275 if (tr->tr_status != TWA_CMD_COMPLETE) { 1276 error = ETIMEDOUT; 1277 break; 1278 } 1279 1280 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1281 break; 1282 1283 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1284 if ((cmd_hdr->status_block.error) /* aen_code */ 1285 == TWA_AEN_QUEUE_EMPTY) 1286 break; 1287 (void)twa_enqueue_aen(sc, cmd_hdr); 1288 1289 free(tr->tr_data, M_DEVBUF); 1290 twa_release_request(tr); 1291 } 1292 out: 1293 if (tr) { 1294 if (tr->tr_data) 1295 free(tr->tr_data, M_DEVBUF); 1296 1297 twa_release_request(tr); 1298 } 1299 return(error); 1300 } 1301 1302 1303 #if 0 1304 static void 1305 twa_check_response_q(struct twa_request *tr, int clear) 1306 { 1307 int j; 1308 static int i = 0; 1309 static struct twa_request *req = 0; 1310 static struct buf *hist[255]; 1311 1312 1313 if (clear) { 1314 i = 0; 1315 for (j = 0; j < 255; j++) 1316 hist[j] = 0; 1317 return; 1318 } 1319 1320 if (req == 0) 1321 req = tr; 1322 1323 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1324 /* XXX this is bogus ! req can't be anything else but tr ! */ 1325 if (req->tr_request_id == tr->tr_request_id) 1326 panic("req id: %d on controller queue twice", 1327 tr->tr_request_id); 1328 1329 for (j = 0; j < i; j++) 1330 if (tr->bp == hist[j]) 1331 panic("req id: %d buf found twice", 1332 tr->tr_request_id); 1333 } 1334 req = tr; 1335 1336 hist[i++] = req->bp; 1337 } 1338 #endif 1339 1340 static int 1341 twa_done(struct twa_softc *sc) 1342 { 1343 union twa_response_queue rq; 1344 struct twa_request *tr; 1345 int rv = 0; 1346 uint32_t status_reg; 1347 1348 for (;;) { 1349 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1350 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1351 break; 1352 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1353 break; 1354 /* Response queue is not empty. */ 1355 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1356 tr = sc->sc_twa_request + rq.u.response_id; 1357 #if 0 1358 twa_check_response_q(tr, 0); 1359 #endif 1360 /* Unmap the command packet, and any associated data buffer. */ 1361 twa_unmap_request(tr); 1362 1363 tr->tr_status = TWA_CMD_COMPLETE; 1364 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1365 1366 if (tr->tr_callback) 1367 tr->tr_callback(tr); 1368 } 1369 (void)twa_drain_pending_queue(sc); 1370 1371 #if 0 1372 twa_check_response_q(NULL, 1); 1373 #endif 1374 return(rv); 1375 } 1376 1377 /* 1378 * Function name: twa_init_ctlr 1379 * Description: Establishes a logical connection with the controller. 1380 * If bundled with firmware, determines whether or not 1381 * the driver is compatible with the firmware on the 1382 * controller, before proceeding to work with it. 1383 * 1384 * Input: sc -- ptr to per ctlr structure 1385 * Output: None 1386 * Return value: 0 -- success 1387 * non-zero-- failure 1388 */ 1389 static int 1390 twa_init_ctlr(struct twa_softc *sc) 1391 { 1392 uint16_t fw_on_ctlr_srl = 0; 1393 uint16_t fw_on_ctlr_arch_id = 0; 1394 uint16_t fw_on_ctlr_branch = 0; 1395 uint16_t fw_on_ctlr_build = 0; 1396 uint32_t init_connect_result = 0; 1397 int error = 0; 1398 1399 /* Wait for the controller to become ready. */ 1400 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1401 TWA_REQUEST_TIMEOUT_PERIOD)) { 1402 return(ENXIO); 1403 } 1404 /* Drain the response queue. */ 1405 if (twa_drain_response_queue(sc)) 1406 return(1); 1407 1408 /* Establish a logical connection with the controller. */ 1409 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1410 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1411 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1412 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1413 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1414 &fw_on_ctlr_build, &init_connect_result))) { 1415 return(error); 1416 } 1417 twa_drain_aen_queue(sc); 1418 1419 /* Set controller state to initialized. */ 1420 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1421 return(0); 1422 } 1423 1424 static int 1425 twa_setup(struct twa_softc *sc) 1426 { 1427 struct tw_cl_event_packet *aen_queue; 1428 uint32_t i = 0; 1429 int error = 0; 1430 1431 /* Initialize request queues. */ 1432 TAILQ_INIT(&sc->twa_free); 1433 TAILQ_INIT(&sc->twa_busy); 1434 TAILQ_INIT(&sc->twa_pending); 1435 1436 sc->twa_sc_flags = 0; 1437 1438 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1439 1440 return(ENOMEM); 1441 } 1442 1443 /* Allocate memory for the AEN queue. */ 1444 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1445 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1446 /* 1447 * This should not cause us to return error. We will only be 1448 * unable to support AEN's. But then, we will have to check 1449 * time and again to see if we can support AEN's, if we 1450 * continue. So, we will just return error. 1451 */ 1452 return (ENOMEM); 1453 } 1454 /* Initialize the aen queue. */ 1455 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1456 1457 for (i = 0; i < TWA_Q_LENGTH; i++) 1458 sc->twa_aen_queue[i] = &(aen_queue[i]); 1459 1460 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1461 TWA_CONTROL_DISABLE_INTERRUPTS); 1462 1463 /* Initialize the controller. */ 1464 if ((error = twa_init_ctlr(sc))) { 1465 /* Soft reset the controller, and try one more time. */ 1466 1467 printf("%s: controller initialization failed. " 1468 "Retrying initialization\n", device_xname(&sc->twa_dv)); 1469 1470 if ((error = twa_soft_reset(sc)) == 0) 1471 error = twa_init_ctlr(sc); 1472 } 1473 1474 twa_describe_controller(sc); 1475 1476 error = twa_request_bus_scan(sc); 1477 1478 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1479 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1480 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1481 TWA_CONTROL_ENABLE_INTERRUPTS); 1482 1483 return (error); 1484 } 1485 1486 void *twa_sdh; 1487 1488 static void 1489 twa_attach(device_t parent, device_t self, void *aux) 1490 { 1491 struct pci_attach_args *pa; 1492 struct twa_softc *sc; 1493 pci_chipset_tag_t pc; 1494 pcireg_t csr; 1495 pci_intr_handle_t ih; 1496 const char *intrstr; 1497 struct ctlname ctlnames[] = CTL_NAMES; 1498 const struct sysctlnode *node; 1499 int i; 1500 bool use_64bit; 1501 1502 sc = device_private(self); 1503 1504 pa = aux; 1505 pc = pa->pa_pc; 1506 sc->pc = pa->pa_pc; 1507 sc->tag = pa->pa_tag; 1508 1509 aprint_naive(": RAID controller\n"); 1510 aprint_normal(": 3ware Apache\n"); 1511 1512 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1513 sc->sc_nunits = TWA_MAX_UNITS; 1514 use_64bit = false; 1515 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1516 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1517 aprint_error_dev(&sc->twa_dv, "can't map i/o space\n"); 1518 return; 1519 } 1520 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1521 sc->sc_nunits = TWA_MAX_UNITS; 1522 use_64bit = true; 1523 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1524 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1525 &sc->twa_bus_ioh, NULL, NULL)) { 1526 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1527 return; 1528 } 1529 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1530 sc->sc_nunits = TWA_9650_MAX_UNITS; 1531 use_64bit = true; 1532 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1533 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1534 &sc->twa_bus_ioh, NULL, NULL)) { 1535 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1536 return; 1537 } 1538 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1539 sc->sc_nunits = TWA_9690_MAX_UNITS; 1540 use_64bit = true; 1541 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1542 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1543 &sc->twa_bus_ioh, NULL, NULL)) { 1544 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1545 return; 1546 } 1547 } else { 1548 sc->sc_nunits = 0; 1549 use_64bit = false; 1550 aprint_error_dev(&sc->twa_dv, "product id 0x%02x not recognized\n", 1551 PCI_PRODUCT(pa->pa_id)); 1552 return; 1553 } 1554 1555 if (pci_dma64_available(pa) && use_64bit) { 1556 aprint_verbose_dev(self, "64bit DMA addressing active"); 1557 sc->twa_dma_tag = pa->pa_dmat64; 1558 } else { 1559 sc->twa_dma_tag = pa->pa_dmat; 1560 } 1561 1562 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1563 /* Enable the device. */ 1564 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1565 1566 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1567 csr | PCI_COMMAND_MASTER_ENABLE); 1568 1569 /* Map and establish the interrupt. */ 1570 if (pci_intr_map(pa, &ih)) { 1571 aprint_error_dev(&sc->twa_dv, "can't map interrupt\n"); 1572 return; 1573 } 1574 intrstr = pci_intr_string(pc, ih); 1575 1576 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1577 if (sc->twa_ih == NULL) { 1578 aprint_error_dev(&sc->twa_dv, "can't establish interrupt%s%s\n", 1579 (intrstr) ? " at " : "", 1580 (intrstr) ? intrstr : ""); 1581 return; 1582 } 1583 1584 if (intrstr != NULL) 1585 aprint_normal_dev(&sc->twa_dv, "interrupting at %s\n", 1586 intrstr); 1587 1588 twa_setup(sc); 1589 1590 if (twa_sdh == NULL) 1591 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1592 1593 /* sysctl set-up for 3ware cli */ 1594 if (sysctl_createv(NULL, 0, NULL, NULL, 1595 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1596 NULL, NULL, 0, NULL, 0, 1597 CTL_HW, CTL_EOL) != 0) { 1598 aprint_error_dev(&sc->twa_dv, "could not create %s sysctl node\n", 1599 ctlnames[CTL_HW].ctl_name); 1600 return; 1601 } 1602 if (sysctl_createv(NULL, 0, NULL, &node, 1603 0, CTLTYPE_NODE, device_xname(&sc->twa_dv), 1604 SYSCTL_DESCR("twa driver information"), 1605 NULL, 0, NULL, 0, 1606 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1607 aprint_error_dev(&sc->twa_dv, "could not create %s.%s sysctl node\n", 1608 ctlnames[CTL_HW].ctl_name, 1609 device_xname(&sc->twa_dv)); 1610 return; 1611 } 1612 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1613 0, CTLTYPE_STRING, "driver_version", 1614 SYSCTL_DESCR("twa driver version"), 1615 NULL, 0, &twaver, 0, 1616 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1617 != 0) { 1618 aprint_error_dev(&sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1619 ctlnames[CTL_HW].ctl_name, 1620 device_xname(&sc->twa_dv)); 1621 return; 1622 } 1623 1624 return; 1625 } 1626 1627 static void 1628 twa_shutdown(void *arg) 1629 { 1630 extern struct cfdriver twa_cd; 1631 struct twa_softc *sc; 1632 int i, rv, unit; 1633 1634 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1635 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1636 continue; 1637 1638 for (unit = 0; unit < sc->sc_nunits; unit++) 1639 if (sc->sc_units[unit].td_dev != NULL) 1640 (void) config_detach(sc->sc_units[unit].td_dev, 1641 DETACH_FORCE | DETACH_QUIET); 1642 1643 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1644 TWA_CONTROL_DISABLE_INTERRUPTS); 1645 1646 /* Let the controller know that we are going down. */ 1647 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1648 0, 0, 0, 0, 0, 1649 NULL, NULL, NULL, NULL, NULL); 1650 } 1651 } 1652 1653 void 1654 twa_register_callbacks(struct twa_softc *sc, int unit, 1655 const struct twa_callbacks *tcb) 1656 { 1657 1658 sc->sc_units[unit].td_callbacks = tcb; 1659 } 1660 1661 /* 1662 * Print autoconfiguration message for a sub-device 1663 */ 1664 static int 1665 twa_print(void *aux, const char *pnp) 1666 { 1667 struct twa_attach_args *twaa; 1668 1669 twaa = aux; 1670 1671 if (pnp !=NULL) 1672 aprint_normal("block device at %s\n", pnp); 1673 aprint_normal(" unit %d\n", twaa->twaa_unit); 1674 return (UNCONF); 1675 } 1676 1677 static void 1678 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1679 { 1680 int i; 1681 for (i = 0; i < nsegments; i++) { 1682 sgl[i].address = segs[i].ds_addr; 1683 sgl[i].length = (uint32_t)(segs[i].ds_len); 1684 } 1685 } 1686 1687 static int 1688 twa_submit_io(struct twa_request *tr) 1689 { 1690 int error; 1691 1692 if ((error = twa_start(tr))) { 1693 if (error == EBUSY) 1694 error = 0; /* request is in the pending queue */ 1695 else { 1696 tr->tr_error = error; 1697 } 1698 } 1699 return(error); 1700 } 1701 1702 /* 1703 * Function name: twa_setup_data_dmamap 1704 * Description: Callback of bus_dmamap_load for the buffer associated 1705 * with data. Updates the cmd pkt (size/sgl_entries 1706 * fields, as applicable) to reflect the number of sg 1707 * elements. 1708 * 1709 * Input: arg -- ptr to request pkt 1710 * segs -- ptr to a list of segment descriptors 1711 * nsegments--# of segments 1712 * error -- 0 if no errors encountered before callback, 1713 * non-zero if errors were encountered 1714 * Output: None 1715 * Return value: None 1716 */ 1717 static int 1718 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1719 { 1720 struct twa_request *tr = (struct twa_request *)arg; 1721 struct twa_command_packet *cmdpkt = tr->tr_command; 1722 struct twa_command_9k *cmd9k; 1723 union twa_command_7k *cmd7k; 1724 uint8_t sgl_offset; 1725 int error; 1726 1727 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1728 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1729 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1730 cmd9k->sgl_entries += nsegments - 1; 1731 } else { 1732 /* It's a 7000 command packet. */ 1733 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1734 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1735 twa_fillin_sgl((struct twa_sg *) 1736 (((uint32_t *)cmd7k) + sgl_offset), 1737 segs, nsegments); 1738 /* Modify the size field, based on sg address size. */ 1739 cmd7k->generic.size += 1740 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1741 } 1742 if (tr->tr_flags & TWA_CMD_DATA_IN) 1743 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1744 tr->tr_length, BUS_DMASYNC_PREWRITE); 1745 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1746 /* 1747 * If we're using an alignment buffer, and we're 1748 * writing data, copy the real data out. 1749 */ 1750 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1751 memcpy(tr->tr_data, tr->tr_real_data, 1752 tr->tr_real_length); 1753 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1754 tr->tr_length, BUS_DMASYNC_PREREAD); 1755 } 1756 error = twa_submit_io(tr); 1757 1758 if (error) { 1759 twa_unmap_request(tr); 1760 /* 1761 * If the caller had been returned EINPROGRESS, and he has 1762 * registered a callback for handling completion, the callback 1763 * will never get called because we were unable to submit the 1764 * request. So, free up the request right here. 1765 */ 1766 if (tr->tr_callback) 1767 twa_release_request(tr); 1768 } 1769 return (error); 1770 } 1771 1772 /* 1773 * Function name: twa_map_request 1774 * Description: Maps a cmd pkt and data associated with it, into 1775 * DMA'able memory. 1776 * 1777 * Input: tr -- ptr to request pkt 1778 * Output: None 1779 * Return value: 0 -- success 1780 * non-zero-- failure 1781 */ 1782 int 1783 twa_map_request(struct twa_request *tr) 1784 { 1785 struct twa_softc *sc = tr->tr_sc; 1786 int s, rv; 1787 1788 /* If the command involves data, map that too. */ 1789 if (tr->tr_data != NULL) { 1790 1791 if (((u_long)tr->tr_data & (511)) != 0) { 1792 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1793 tr->tr_real_data = tr->tr_data; 1794 tr->tr_real_length = tr->tr_length; 1795 s = splvm(); 1796 tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1797 tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1798 splx(s); 1799 1800 if (tr->tr_data == NULL) { 1801 tr->tr_data = tr->tr_real_data; 1802 tr->tr_length = tr->tr_real_length; 1803 return(ENOMEM); 1804 } 1805 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1806 memcpy(tr->tr_data, tr->tr_real_data, 1807 tr->tr_length); 1808 } 1809 1810 /* 1811 * Map the data buffer into bus space and build the S/G list. 1812 */ 1813 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1814 tr->tr_data, tr->tr_length, NULL, 1815 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1816 1817 if (rv != 0) { 1818 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1819 s = splvm(); 1820 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1821 tr->tr_length, UVM_KMF_WIRED); 1822 splx(s); 1823 } 1824 return (rv); 1825 } 1826 1827 if ((rv = twa_setup_data_dmamap(tr, 1828 tr->tr_dma_map->dm_segs, 1829 tr->tr_dma_map->dm_nsegs))) { 1830 1831 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1832 s = splvm(); 1833 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1834 tr->tr_length, UVM_KMF_WIRED); 1835 splx(s); 1836 tr->tr_data = tr->tr_real_data; 1837 tr->tr_length = tr->tr_real_length; 1838 } 1839 } 1840 1841 } else 1842 if ((rv = twa_submit_io(tr))) 1843 twa_unmap_request(tr); 1844 1845 return (rv); 1846 } 1847 1848 /* 1849 * Function name: twa_intr 1850 * Description: Interrupt handler. Determines the kind of interrupt, 1851 * and calls the appropriate handler. 1852 * 1853 * Input: sc -- ptr to per ctlr structure 1854 * Output: None 1855 * Return value: None 1856 */ 1857 1858 static int 1859 twa_intr(void *arg) 1860 { 1861 int caught, s, rv; 1862 struct twa_softc *sc; 1863 uint32_t status_reg; 1864 sc = (struct twa_softc *)arg; 1865 1866 caught = 0; 1867 /* Collect current interrupt status. */ 1868 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1869 if (twa_check_ctlr_state(sc, status_reg)) { 1870 caught = 1; 1871 goto bail; 1872 } 1873 /* Dispatch based on the kind of interrupt. */ 1874 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1875 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1876 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1877 caught = 1; 1878 } 1879 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1880 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1881 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1882 rv = twa_fetch_aen(sc); 1883 #ifdef DIAGNOSTIC 1884 if (rv != 0) 1885 printf("%s: unable to retrieve AEN (%d)\n", 1886 device_xname(&sc->twa_dv), rv); 1887 #endif 1888 caught = 1; 1889 } 1890 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1891 /* Start any requests that might be in the pending queue. */ 1892 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1893 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1894 (void)twa_drain_pending_queue(sc); 1895 caught = 1; 1896 } 1897 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1898 s = splbio(); 1899 twa_done(sc); 1900 splx(s); 1901 caught = 1; 1902 } 1903 bail: 1904 return (caught); 1905 } 1906 1907 /* 1908 * Accept an open operation on the control device. 1909 */ 1910 static int 1911 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1912 { 1913 struct twa_softc *twa; 1914 1915 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1916 return (ENXIO); 1917 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1918 return (EBUSY); 1919 1920 twa->twa_sc_flags |= TWA_STATE_OPEN; 1921 1922 return (0); 1923 } 1924 1925 /* 1926 * Accept the last close on the control device. 1927 */ 1928 static int 1929 twaclose(dev_t dev, int flag, int mode, 1930 struct lwp *l) 1931 { 1932 struct twa_softc *twa; 1933 1934 twa = device_lookup_private(&twa_cd, minor(dev)); 1935 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1936 return (0); 1937 } 1938 1939 /* 1940 * Function name: twaioctl 1941 * Description: ioctl handler. 1942 * 1943 * Input: sc -- ptr to per ctlr structure 1944 * cmd -- ioctl cmd 1945 * buf -- ptr to buffer in kernel memory, which is 1946 * a copy of the input buffer in user-space 1947 * Output: buf -- ptr to buffer in kernel memory, which will 1948 * be copied of the output buffer in user-space 1949 * Return value: 0 -- success 1950 * non-zero-- failure 1951 */ 1952 static int 1953 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1954 struct lwp *l) 1955 { 1956 struct twa_softc *sc; 1957 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1958 struct tw_cl_event_packet event_buf; 1959 struct twa_request *tr = 0; 1960 int32_t event_index = 0; 1961 int32_t start_index; 1962 int s, error = 0; 1963 1964 sc = device_lookup_private(&twa_cd, minor(dev)); 1965 1966 switch (cmd) { 1967 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1968 { 1969 struct twa_command_packet *cmdpkt; 1970 uint32_t data_buf_size_adjusted; 1971 1972 /* Get a request packet */ 1973 tr = twa_get_request_wait(sc, 0); 1974 KASSERT(tr != NULL); 1975 /* 1976 * Make sure that the data buffer sent to firmware is a 1977 * 512 byte multiple in size. 1978 */ 1979 data_buf_size_adjusted = 1980 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1981 1982 if ((tr->tr_length = data_buf_size_adjusted)) { 1983 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1984 M_DEVBUF, M_WAITOK)) == NULL) { 1985 error = ENOMEM; 1986 goto fw_passthru_done; 1987 } 1988 /* Copy the payload. */ 1989 if ((error = copyin((void *) (user_buf->pdata), 1990 (void *) (tr->tr_data), 1991 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 1992 goto fw_passthru_done; 1993 } 1994 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 1995 } 1996 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 1997 cmdpkt = tr->tr_command; 1998 1999 /* Copy the command packet. */ 2000 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2001 sizeof(struct twa_command_packet)); 2002 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2003 tr->tr_request_id; 2004 2005 /* Send down the request, and wait for it to complete. */ 2006 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2007 if (error == ETIMEDOUT) 2008 break; /* clean-up done by twa_wait_request */ 2009 goto fw_passthru_done; 2010 } 2011 2012 /* Copy the command packet back into user space. */ 2013 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2014 sizeof(struct twa_command_packet)); 2015 2016 /* If there was a payload, copy it back too. */ 2017 if (tr->tr_length) 2018 error = copyout(tr->tr_data, user_buf->pdata, 2019 user_buf->twa_drvr_pkt.buffer_length); 2020 fw_passthru_done: 2021 /* Free resources. */ 2022 if (tr->tr_data) 2023 free(tr->tr_data, M_DEVBUF); 2024 2025 if (tr) 2026 twa_release_request(tr); 2027 break; 2028 } 2029 2030 case TW_OSL_IOCTL_SCAN_BUS: 2031 twa_request_bus_scan(sc); 2032 break; 2033 2034 case TW_CL_IOCTL_GET_FIRST_EVENT: 2035 if (sc->twa_aen_queue_wrapped) { 2036 if (sc->twa_aen_queue_overflow) { 2037 /* 2038 * The aen queue has wrapped, even before some 2039 * events have been retrieved. Let the caller 2040 * know that he missed out on some AEN's. 2041 */ 2042 user_buf->twa_drvr_pkt.status = 2043 TWA_ERROR_AEN_OVERFLOW; 2044 sc->twa_aen_queue_overflow = FALSE; 2045 } else 2046 user_buf->twa_drvr_pkt.status = 0; 2047 event_index = sc->twa_aen_head; 2048 } else { 2049 if (sc->twa_aen_head == sc->twa_aen_tail) { 2050 user_buf->twa_drvr_pkt.status = 2051 TWA_ERROR_AEN_NO_EVENTS; 2052 break; 2053 } 2054 user_buf->twa_drvr_pkt.status = 0; 2055 event_index = sc->twa_aen_tail; /* = 0 */ 2056 } 2057 if ((error = copyout(sc->twa_aen_queue[event_index], 2058 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2059 (sc->twa_aen_queue[event_index])->retrieved = 2060 TWA_AEN_RETRIEVED; 2061 break; 2062 2063 case TW_CL_IOCTL_GET_LAST_EVENT: 2064 if (sc->twa_aen_queue_wrapped) { 2065 if (sc->twa_aen_queue_overflow) { 2066 /* 2067 * The aen queue has wrapped, even before some 2068 * events have been retrieved. Let the caller 2069 * know that he missed out on some AEN's. 2070 */ 2071 user_buf->twa_drvr_pkt.status = 2072 TWA_ERROR_AEN_OVERFLOW; 2073 sc->twa_aen_queue_overflow = FALSE; 2074 } else 2075 user_buf->twa_drvr_pkt.status = 0; 2076 } else { 2077 if (sc->twa_aen_head == sc->twa_aen_tail) { 2078 user_buf->twa_drvr_pkt.status = 2079 TWA_ERROR_AEN_NO_EVENTS; 2080 break; 2081 } 2082 user_buf->twa_drvr_pkt.status = 0; 2083 } 2084 event_index = 2085 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2086 if ((error = copyout(sc->twa_aen_queue[event_index], 2087 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2088 (sc->twa_aen_queue[event_index])->retrieved = 2089 TWA_AEN_RETRIEVED; 2090 break; 2091 2092 case TW_CL_IOCTL_GET_NEXT_EVENT: 2093 user_buf->twa_drvr_pkt.status = 0; 2094 if (sc->twa_aen_queue_wrapped) { 2095 2096 if (sc->twa_aen_queue_overflow) { 2097 /* 2098 * The aen queue has wrapped, even before some 2099 * events have been retrieved. Let the caller 2100 * know that he missed out on some AEN's. 2101 */ 2102 user_buf->twa_drvr_pkt.status = 2103 TWA_ERROR_AEN_OVERFLOW; 2104 sc->twa_aen_queue_overflow = FALSE; 2105 } 2106 start_index = sc->twa_aen_head; 2107 } else { 2108 if (sc->twa_aen_head == sc->twa_aen_tail) { 2109 user_buf->twa_drvr_pkt.status = 2110 TWA_ERROR_AEN_NO_EVENTS; 2111 break; 2112 } 2113 start_index = sc->twa_aen_tail; /* = 0 */ 2114 } 2115 error = copyin(user_buf->pdata, &event_buf, 2116 sizeof(struct tw_cl_event_packet)); 2117 2118 event_index = (start_index + event_buf.sequence_id - 2119 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2120 % TWA_Q_LENGTH; 2121 2122 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2123 event_buf.sequence_id)) { 2124 if (user_buf->twa_drvr_pkt.status == 2125 TWA_ERROR_AEN_OVERFLOW) 2126 /* so we report the overflow next time */ 2127 sc->twa_aen_queue_overflow = TRUE; 2128 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2129 break; 2130 } 2131 if ((error = copyout(sc->twa_aen_queue[event_index], 2132 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2133 (sc->twa_aen_queue[event_index])->retrieved = 2134 TWA_AEN_RETRIEVED; 2135 break; 2136 2137 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2138 user_buf->twa_drvr_pkt.status = 0; 2139 if (sc->twa_aen_queue_wrapped) { 2140 if (sc->twa_aen_queue_overflow) { 2141 /* 2142 * The aen queue has wrapped, even before some 2143 * events have been retrieved. Let the caller 2144 * know that he missed out on some AEN's. 2145 */ 2146 user_buf->twa_drvr_pkt.status = 2147 TWA_ERROR_AEN_OVERFLOW; 2148 sc->twa_aen_queue_overflow = FALSE; 2149 } 2150 start_index = sc->twa_aen_head; 2151 } else { 2152 if (sc->twa_aen_head == sc->twa_aen_tail) { 2153 user_buf->twa_drvr_pkt.status = 2154 TWA_ERROR_AEN_NO_EVENTS; 2155 break; 2156 } 2157 start_index = sc->twa_aen_tail; /* = 0 */ 2158 } 2159 if ((error = copyin(user_buf->pdata, &event_buf, 2160 sizeof(struct tw_cl_event_packet))) != 0) 2161 2162 event_index = (start_index + event_buf.sequence_id - 2163 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2164 % TWA_Q_LENGTH; 2165 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2166 event_buf.sequence_id)) { 2167 if (user_buf->twa_drvr_pkt.status == 2168 TWA_ERROR_AEN_OVERFLOW) 2169 /* so we report the overflow next time */ 2170 sc->twa_aen_queue_overflow = TRUE; 2171 user_buf->twa_drvr_pkt.status = 2172 TWA_ERROR_AEN_NO_EVENTS; 2173 break; 2174 } 2175 if ((error = copyout(sc->twa_aen_queue [event_index], 2176 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2177 aprint_error_dev(&sc->twa_dv, "get_previous: Could not copyout to " 2178 "event_buf. error = %x\n", 2179 error); 2180 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2181 break; 2182 2183 case TW_CL_IOCTL_GET_LOCK: 2184 { 2185 struct tw_cl_lock_packet twa_lock; 2186 2187 copyin(user_buf->pdata, &twa_lock, 2188 sizeof(struct tw_cl_lock_packet)); 2189 s = splbio(); 2190 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2191 (twa_lock.force_flag) || 2192 (time_second >= sc->twa_ioctl_lock.timeout)) { 2193 2194 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2195 sc->twa_ioctl_lock.timeout = time_second + 2196 (twa_lock.timeout_msec / 1000); 2197 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2198 user_buf->twa_drvr_pkt.status = 0; 2199 } else { 2200 twa_lock.time_remaining_msec = 2201 (sc->twa_ioctl_lock.timeout - time_second) * 2202 1000; 2203 user_buf->twa_drvr_pkt.status = 2204 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2205 } 2206 splx(s); 2207 copyout(&twa_lock, user_buf->pdata, 2208 sizeof(struct tw_cl_lock_packet)); 2209 break; 2210 } 2211 2212 case TW_CL_IOCTL_RELEASE_LOCK: 2213 s = splbio(); 2214 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2215 user_buf->twa_drvr_pkt.status = 2216 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2217 } else { 2218 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2219 user_buf->twa_drvr_pkt.status = 0; 2220 } 2221 splx(s); 2222 break; 2223 2224 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2225 { 2226 struct tw_cl_compatibility_packet comp_pkt; 2227 2228 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2229 sizeof(TWA_DRIVER_VERSION_STRING)); 2230 comp_pkt.working_srl = sc->working_srl; 2231 comp_pkt.working_branch = sc->working_branch; 2232 comp_pkt.working_build = sc->working_build; 2233 user_buf->twa_drvr_pkt.status = 0; 2234 2235 /* Copy compatibility information to user space. */ 2236 copyout(&comp_pkt, user_buf->pdata, 2237 min(sizeof(struct tw_cl_compatibility_packet), 2238 user_buf->twa_drvr_pkt.buffer_length)); 2239 break; 2240 } 2241 2242 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2243 { 2244 struct twa_unitname *tn; 2245 struct twa_drive *tdr; 2246 2247 tn = (struct twa_unitname *)data; 2248 /* XXX mutex */ 2249 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2250 return (EINVAL); 2251 tdr = &sc->sc_units[tn->tn_unit]; 2252 if (tdr->td_dev == NULL) 2253 tn->tn_name[0] = '\0'; 2254 else 2255 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2256 sizeof(tn->tn_name)); 2257 return (0); 2258 } 2259 2260 default: 2261 /* Unknown opcode. */ 2262 error = ENOTTY; 2263 } 2264 2265 return(error); 2266 } 2267 2268 const struct cdevsw twa_cdevsw = { 2269 twaopen, twaclose, noread, nowrite, twaioctl, 2270 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2271 }; 2272 2273 /* 2274 * Function name: twa_get_param 2275 * Description: Get a firmware parameter. 2276 * 2277 * Input: sc -- ptr to per ctlr structure 2278 * table_id -- parameter table # 2279 * param_id -- index of the parameter in the table 2280 * param_size -- size of the parameter in bytes 2281 * callback -- ptr to function, if any, to be called 2282 * back on completion; NULL if no callback. 2283 * Output: None 2284 * Return value: ptr to param structure -- success 2285 * NULL -- failure 2286 */ 2287 static int 2288 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2289 size_t param_size, void (* callback)(struct twa_request *tr), 2290 struct twa_param_9k **param) 2291 { 2292 int rv = 0; 2293 struct twa_request *tr; 2294 union twa_command_7k *cmd; 2295 2296 /* Get a request packet. */ 2297 if ((tr = twa_get_request(sc, 0)) == NULL) { 2298 rv = EAGAIN; 2299 goto out; 2300 } 2301 2302 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2303 2304 /* Allocate memory to read data into. */ 2305 if ((*param = (struct twa_param_9k *) 2306 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2307 rv = ENOMEM; 2308 goto out; 2309 } 2310 2311 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2312 tr->tr_data = *param; 2313 tr->tr_length = TWA_SECTOR_SIZE; 2314 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2315 2316 /* Build the cmd pkt. */ 2317 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2318 2319 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2320 2321 cmd->param.opcode = TWA_OP_GET_PARAM; 2322 cmd->param.sgl_offset = 2; 2323 cmd->param.size = 2; 2324 cmd->param.request_id = tr->tr_request_id; 2325 cmd->param.unit = 0; 2326 cmd->param.param_count = 1; 2327 2328 /* Specify which parameter we need. */ 2329 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2330 (*param)->parameter_id = param_id; 2331 (*param)->parameter_size_bytes = param_size; 2332 2333 /* Submit the command. */ 2334 if (callback == NULL) { 2335 /* There's no call back; wait till the command completes. */ 2336 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2337 2338 if (rv != 0) 2339 goto out; 2340 2341 if ((rv = cmd->param.status) != 0) { 2342 /* twa_drain_complete_queue will have done the unmapping */ 2343 goto out; 2344 } 2345 twa_release_request(tr); 2346 return (rv); 2347 } else { 2348 /* There's a call back. Simply submit the command. */ 2349 tr->tr_callback = callback; 2350 rv = twa_map_request(tr); 2351 return (rv); 2352 } 2353 out: 2354 if (tr) 2355 twa_release_request(tr); 2356 return(rv); 2357 } 2358 2359 /* 2360 * Function name: twa_set_param 2361 * Description: Set a firmware parameter. 2362 * 2363 * Input: sc -- ptr to per ctlr structure 2364 * table_id -- parameter table # 2365 * param_id -- index of the parameter in the table 2366 * param_size -- size of the parameter in bytes 2367 * callback -- ptr to function, if any, to be called 2368 * back on completion; NULL if no callback. 2369 * Output: None 2370 * Return value: 0 -- success 2371 * non-zero-- failure 2372 */ 2373 static int 2374 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2375 void *data, void (* callback)(struct twa_request *tr)) 2376 { 2377 struct twa_request *tr; 2378 union twa_command_7k *cmd; 2379 struct twa_param_9k *param = NULL; 2380 int error = ENOMEM; 2381 2382 tr = twa_get_request(sc, 0); 2383 if (tr == NULL) 2384 return (EAGAIN); 2385 2386 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2387 2388 /* Allocate memory to send data using. */ 2389 if ((param = (struct twa_param_9k *) 2390 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2391 goto out; 2392 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2393 tr->tr_data = param; 2394 tr->tr_length = TWA_SECTOR_SIZE; 2395 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2396 2397 /* Build the cmd pkt. */ 2398 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2399 2400 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2401 2402 cmd->param.opcode = TWA_OP_SET_PARAM; 2403 cmd->param.sgl_offset = 2; 2404 cmd->param.size = 2; 2405 cmd->param.request_id = tr->tr_request_id; 2406 cmd->param.unit = 0; 2407 cmd->param.param_count = 1; 2408 2409 /* Specify which parameter we want to set. */ 2410 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2411 param->parameter_id = param_id; 2412 param->parameter_size_bytes = param_size; 2413 memcpy(param->data, data, param_size); 2414 2415 /* Submit the command. */ 2416 if (callback == NULL) { 2417 /* There's no call back; wait till the command completes. */ 2418 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2419 if (error == ETIMEDOUT) 2420 /* clean-up done by twa_immediate_request */ 2421 return(error); 2422 if (error) 2423 goto out; 2424 if ((error = cmd->param.status)) { 2425 /* 2426 * twa_drain_complete_queue will have done the 2427 * unmapping. 2428 */ 2429 goto out; 2430 } 2431 free(param, M_DEVBUF); 2432 twa_release_request(tr); 2433 return(error); 2434 } else { 2435 /* There's a call back. Simply submit the command. */ 2436 tr->tr_callback = callback; 2437 if ((error = twa_map_request(tr))) 2438 goto out; 2439 2440 return (0); 2441 } 2442 out: 2443 if (param) 2444 free(param, M_DEVBUF); 2445 if (tr) 2446 twa_release_request(tr); 2447 return(error); 2448 } 2449 2450 /* 2451 * Function name: twa_init_connection 2452 * Description: Send init_connection cmd to firmware 2453 * 2454 * Input: sc -- ptr to per ctlr structure 2455 * message_credits -- max # of requests that we might send 2456 * down simultaneously. This will be 2457 * typically set to 256 at init-time or 2458 * after a reset, and to 1 at shutdown-time 2459 * set_features -- indicates if we intend to use 64-bit 2460 * sg, also indicates if we want to do a 2461 * basic or an extended init_connection; 2462 * 2463 * Note: The following input/output parameters are valid, only in case of an 2464 * extended init_connection: 2465 * 2466 * current_fw_srl -- srl of fw we are bundled 2467 * with, if any; 0 otherwise 2468 * current_fw_arch_id -- arch_id of fw we are bundled 2469 * with, if any; 0 otherwise 2470 * current_fw_branch -- branch # of fw we are bundled 2471 * with, if any; 0 otherwise 2472 * current_fw_build -- build # of fw we are bundled 2473 * with, if any; 0 otherwise 2474 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2475 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2476 * fw_on_ctlr_branch -- branch # of fw on ctlr 2477 * fw_on_ctlr_build -- build # of fw on ctlr 2478 * init_connect_result -- result bitmap of fw response 2479 * Return value: 0 -- success 2480 * non-zero-- failure 2481 */ 2482 static int 2483 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2484 uint32_t set_features, uint16_t current_fw_srl, 2485 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2486 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2487 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2488 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2489 { 2490 struct twa_request *tr; 2491 struct twa_command_init_connect *init_connect; 2492 int error = 1; 2493 2494 /* Get a request packet. */ 2495 if ((tr = twa_get_request(sc, 0)) == NULL) 2496 goto out; 2497 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2498 /* Build the cmd pkt. */ 2499 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2500 2501 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2502 2503 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2504 init_connect->request_id = tr->tr_request_id; 2505 init_connect->message_credits = message_credits; 2506 init_connect->features = set_features; 2507 if (TWA_64BIT_ADDRESSES) 2508 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2509 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2510 /* 2511 * Fill in the extra fields needed for 2512 * an extended init_connect. 2513 */ 2514 init_connect->size = 6; 2515 init_connect->fw_srl = current_fw_srl; 2516 init_connect->fw_arch_id = current_fw_arch_id; 2517 init_connect->fw_branch = current_fw_branch; 2518 } else 2519 init_connect->size = 3; 2520 2521 /* Submit the command, and wait for it to complete. */ 2522 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2523 if (error == ETIMEDOUT) 2524 return(error); /* clean-up done by twa_immediate_request */ 2525 if (error) 2526 goto out; 2527 if ((error = init_connect->status)) { 2528 /* twa_drain_complete_queue will have done the unmapping */ 2529 goto out; 2530 } 2531 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2532 *fw_on_ctlr_srl = init_connect->fw_srl; 2533 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2534 *fw_on_ctlr_branch = init_connect->fw_branch; 2535 *fw_on_ctlr_build = init_connect->fw_build; 2536 *init_connect_result = init_connect->result; 2537 } 2538 twa_release_request(tr); 2539 return(error); 2540 2541 out: 2542 if (tr) 2543 twa_release_request(tr); 2544 return(error); 2545 } 2546 2547 static int 2548 twa_reset(struct twa_softc *sc) 2549 { 2550 int s; 2551 int error = 0; 2552 2553 /* Set the 'in reset' flag. */ 2554 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2555 2556 /* 2557 * Disable interrupts from the controller, and mask any 2558 * accidental entry into our interrupt handler. 2559 */ 2560 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2561 TWA_CONTROL_DISABLE_INTERRUPTS); 2562 2563 s = splbio(); 2564 2565 /* Soft reset the controller. */ 2566 if ((error = twa_soft_reset(sc))) 2567 goto out; 2568 2569 /* Re-establish logical connection with the controller. */ 2570 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2571 0, 0, 0, 0, 0, 2572 NULL, NULL, NULL, NULL, NULL))) { 2573 goto out; 2574 } 2575 /* 2576 * Complete all requests in the complete queue; error back all requests 2577 * in the busy queue. Any internal requests will be simply freed. 2578 * Re-submit any requests in the pending queue. 2579 */ 2580 twa_drain_busy_queue(sc); 2581 2582 out: 2583 splx(s); 2584 /* 2585 * Enable interrupts, and also clear attention and response interrupts. 2586 */ 2587 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2588 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2589 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2590 TWA_CONTROL_ENABLE_INTERRUPTS); 2591 2592 /* Clear the 'in reset' flag. */ 2593 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2594 2595 return(error); 2596 } 2597 2598 static int 2599 twa_soft_reset(struct twa_softc *sc) 2600 { 2601 uint32_t status_reg; 2602 2603 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2604 TWA_CONTROL_ISSUE_SOFT_RESET | 2605 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2606 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2607 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2608 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2609 TWA_CONTROL_DISABLE_INTERRUPTS); 2610 2611 if (twa_drain_response_queue_large(sc, 30) != 0) { 2612 aprint_error_dev(&sc->twa_dv, 2613 "response queue not empty after reset.\n"); 2614 return(1); 2615 } 2616 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2617 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2618 aprint_error_dev(&sc->twa_dv, "no attention interrupt after reset.\n"); 2619 return(1); 2620 } 2621 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2622 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2623 2624 if (twa_drain_response_queue(sc)) { 2625 aprint_error_dev(&sc->twa_dv, "cannot drain response queue.\n"); 2626 return(1); 2627 } 2628 if (twa_drain_aen_queue(sc)) { 2629 aprint_error_dev(&sc->twa_dv, "cannot drain AEN queue.\n"); 2630 return(1); 2631 } 2632 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2633 aprint_error_dev(&sc->twa_dv, "reset not reported by controller.\n"); 2634 return(1); 2635 } 2636 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2637 if (TWA_STATUS_ERRORS(status_reg) || 2638 twa_check_ctlr_state(sc, status_reg)) { 2639 aprint_error_dev(&sc->twa_dv, "controller errors detected.\n"); 2640 return(1); 2641 } 2642 return(0); 2643 } 2644 2645 static int 2646 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2647 { 2648 struct timeval t1; 2649 time_t end_time; 2650 uint32_t status_reg; 2651 2652 timeout = (timeout * 1000 * 100); 2653 2654 microtime(&t1); 2655 2656 end_time = t1.tv_usec + timeout; 2657 2658 do { 2659 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2660 /* got the required bit(s)? */ 2661 if ((status_reg & status) == status) 2662 return(0); 2663 DELAY(100000); 2664 microtime(&t1); 2665 } while (t1.tv_usec <= end_time); 2666 2667 return(1); 2668 } 2669 2670 static int 2671 twa_fetch_aen(struct twa_softc *sc) 2672 { 2673 struct twa_request *tr; 2674 int s, error = 0; 2675 2676 s = splbio(); 2677 2678 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2679 splx(s); 2680 return(EIO); 2681 } 2682 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2683 tr->tr_callback = twa_aen_callback; 2684 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2685 if (twa_request_sense(tr, 0) != 0) { 2686 if (tr->tr_data) 2687 free(tr->tr_data, M_DEVBUF); 2688 twa_release_request(tr); 2689 error = 1; 2690 } 2691 splx(s); 2692 2693 return(error); 2694 } 2695 2696 /* 2697 * Function name: twa_aen_callback 2698 * Description: Callback for requests to fetch AEN's. 2699 * 2700 * Input: tr -- ptr to completed request pkt 2701 * Output: None 2702 * Return value: None 2703 */ 2704 static void 2705 twa_aen_callback(struct twa_request *tr) 2706 { 2707 int i; 2708 int fetch_more_aens = 0; 2709 struct twa_softc *sc = tr->tr_sc; 2710 struct twa_command_header *cmd_hdr = 2711 (struct twa_command_header *)(tr->tr_data); 2712 struct twa_command_9k *cmd = 2713 &(tr->tr_command->command.cmd_pkt_9k); 2714 2715 if (! cmd->status) { 2716 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2717 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2718 if (twa_enqueue_aen(sc, cmd_hdr) 2719 != TWA_AEN_QUEUE_EMPTY) 2720 fetch_more_aens = 1; 2721 } else { 2722 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2723 for (i = 0; i < 18; i++) 2724 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2725 2726 printf(""); /* print new line */ 2727 2728 for (i = 0; i < 128; i++) 2729 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2730 } 2731 if (tr->tr_data) 2732 free(tr->tr_data, M_DEVBUF); 2733 twa_release_request(tr); 2734 2735 if (fetch_more_aens) 2736 twa_fetch_aen(sc); 2737 } 2738 2739 /* 2740 * Function name: twa_enqueue_aen 2741 * Description: Queues AEN's to be supplied to user-space tools on request. 2742 * 2743 * Input: sc -- ptr to per ctlr structure 2744 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2745 * details can be retrieved. 2746 * Output: None 2747 * Return value: None 2748 */ 2749 static uint16_t 2750 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2751 { 2752 int rv, s; 2753 struct tw_cl_event_packet *event; 2754 uint16_t aen_code; 2755 unsigned long sync_time; 2756 2757 s = splbio(); 2758 aen_code = cmd_hdr->status_block.error; 2759 2760 switch (aen_code) { 2761 case TWA_AEN_SYNC_TIME_WITH_HOST: 2762 2763 sync_time = (time_second - (3 * 86400)) % 604800; 2764 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2765 TWA_PARAM_TIME_SchedulerTime, 4, 2766 &sync_time, twa_aen_callback); 2767 #ifdef DIAGNOSTIC 2768 if (rv != 0) 2769 aprint_error_dev(&sc->twa_dv, "unable to sync time with ctlr\n"); 2770 #endif 2771 break; 2772 2773 case TWA_AEN_QUEUE_EMPTY: 2774 break; 2775 2776 default: 2777 /* Queue the event. */ 2778 event = sc->twa_aen_queue[sc->twa_aen_head]; 2779 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2780 sc->twa_aen_queue_overflow = TRUE; 2781 event->severity = 2782 cmd_hdr->status_block.substatus_block.severity; 2783 event->time_stamp_sec = time_second; 2784 event->aen_code = aen_code; 2785 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2786 event->sequence_id = ++(sc->twa_current_sequence_id); 2787 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2788 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2789 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2790 event->parameter_len); 2791 2792 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2793 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2794 device_xname(&sc->twa_dv), 2795 aen_code, 2796 twa_aen_severity_table[event->severity], 2797 twa_find_msg_string(twa_aen_table, aen_code), 2798 event->parameter_data); 2799 } 2800 2801 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2802 sc->twa_aen_queue_wrapped = TRUE; 2803 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2804 break; 2805 } /* switch */ 2806 splx(s); 2807 2808 return (aen_code); 2809 } 2810 2811 /* 2812 * Function name: twa_find_aen 2813 * Description: Reports whether a given AEN ever occurred. 2814 * 2815 * Input: sc -- ptr to per ctlr structure 2816 * aen_code-- AEN to look for 2817 * Output: None 2818 * Return value: 0 -- success 2819 * non-zero-- failure 2820 */ 2821 static int 2822 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2823 { 2824 uint32_t last_index; 2825 int s; 2826 int i; 2827 2828 s = splbio(); 2829 2830 if (sc->twa_aen_queue_wrapped) 2831 last_index = sc->twa_aen_head; 2832 else 2833 last_index = 0; 2834 2835 i = sc->twa_aen_head; 2836 do { 2837 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2838 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2839 splx(s); 2840 return(0); 2841 } 2842 } while (i != last_index); 2843 2844 splx(s); 2845 return(1); 2846 } 2847 2848 static inline void 2849 twa_request_init(struct twa_request *tr, int flags) 2850 { 2851 tr->tr_data = NULL; 2852 tr->tr_real_data = NULL; 2853 tr->tr_length = 0; 2854 tr->tr_real_length = 0; 2855 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2856 tr->tr_flags = flags; 2857 tr->tr_error = 0; 2858 tr->tr_callback = NULL; 2859 tr->tr_cmd_pkt_type = 0; 2860 tr->bp = 0; 2861 2862 /* 2863 * Look at the status field in the command packet to see how 2864 * it completed the last time it was used, and zero out only 2865 * the portions that might have changed. Note that we don't 2866 * care to zero out the sglist. 2867 */ 2868 if (tr->tr_command->command.cmd_pkt_9k.status) 2869 memset(tr->tr_command, 0, 2870 sizeof(struct twa_command_header) + 28); 2871 else 2872 memset(&(tr->tr_command->command), 0, 28); 2873 } 2874 2875 struct twa_request * 2876 twa_get_request_wait(struct twa_softc *sc, int flags) 2877 { 2878 struct twa_request *tr; 2879 int s; 2880 2881 KASSERT((flags & TWA_CMD_AEN) == 0); 2882 2883 s = splbio(); 2884 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2885 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2886 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2887 } 2888 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2889 2890 splx(s); 2891 2892 twa_request_init(tr, flags); 2893 2894 return(tr); 2895 } 2896 2897 struct twa_request * 2898 twa_get_request(struct twa_softc *sc, int flags) 2899 { 2900 int s; 2901 struct twa_request *tr; 2902 2903 /* Get a free request packet. */ 2904 s = splbio(); 2905 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2906 2907 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2908 tr = sc->sc_twa_request; 2909 flags |= TWA_CMD_AEN_BUSY; 2910 } else { 2911 splx(s); 2912 return (NULL); 2913 } 2914 } else { 2915 if (__predict_false((tr = 2916 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2917 splx(s); 2918 return (NULL); 2919 } 2920 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2921 } 2922 splx(s); 2923 2924 twa_request_init(tr, flags); 2925 2926 return(tr); 2927 } 2928 2929 /* 2930 * Print some information about the controller 2931 */ 2932 static void 2933 twa_describe_controller(struct twa_softc *sc) 2934 { 2935 struct twa_param_9k *p[10]; 2936 int i, rv = 0; 2937 uint32_t dsize; 2938 uint8_t ports; 2939 2940 memset(p, sizeof(struct twa_param_9k *), 10); 2941 2942 /* Get the port count. */ 2943 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2944 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2945 2946 /* get version strings */ 2947 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2948 16, NULL, &p[1]); 2949 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2950 16, NULL, &p[2]); 2951 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2952 16, NULL, &p[3]); 2953 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2954 8, NULL, &p[4]); 2955 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2956 8, NULL, &p[5]); 2957 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2958 8, NULL, &p[6]); 2959 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2960 16, NULL, &p[7]); 2961 2962 if (rv) { 2963 /* some error occurred */ 2964 aprint_error_dev(&sc->twa_dv, "failed to fetch version information\n"); 2965 goto bail; 2966 } 2967 2968 ports = *(uint8_t *)(p[0]->data); 2969 2970 aprint_normal_dev(&sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2971 ports, p[1]->data, p[2]->data); 2972 2973 aprint_verbose_dev(&sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2974 p[3]->data, p[4]->data, 2975 p[5]->data, p[6]->data); 2976 2977 for (i = 0; i < ports; i++) { 2978 2979 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2980 continue; 2981 2982 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2983 TWA_PARAM_DRIVEMODELINDEX, 2984 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 2985 2986 if (rv != 0) { 2987 aprint_error_dev(&sc->twa_dv, "unable to get drive model for port" 2988 " %d\n", i); 2989 continue; 2990 } 2991 2992 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2993 TWA_PARAM_DRIVESIZEINDEX, 2994 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 2995 2996 if (rv != 0) { 2997 aprint_error_dev(&sc->twa_dv, "unable to get drive size" 2998 " for port %d\n", i); 2999 free(p[8], M_DEVBUF); 3000 continue; 3001 } 3002 3003 dsize = *(uint32_t *)(p[9]->data); 3004 3005 aprint_verbose_dev(&sc->twa_dv, "port %d: %.40s %d MB\n", 3006 i, p[8]->data, dsize / 2048); 3007 3008 if (p[8]) 3009 free(p[8], M_DEVBUF); 3010 if (p[9]) 3011 free(p[9], M_DEVBUF); 3012 } 3013 bail: 3014 if (p[0]) 3015 free(p[0], M_DEVBUF); 3016 if (p[1]) 3017 free(p[1], M_DEVBUF); 3018 if (p[2]) 3019 free(p[2], M_DEVBUF); 3020 if (p[3]) 3021 free(p[3], M_DEVBUF); 3022 if (p[4]) 3023 free(p[4], M_DEVBUF); 3024 if (p[5]) 3025 free(p[5], M_DEVBUF); 3026 if (p[6]) 3027 free(p[6], M_DEVBUF); 3028 } 3029 3030 /* 3031 * Function name: twa_check_ctlr_state 3032 * Description: Makes sure that the fw status register reports a 3033 * proper status. 3034 * 3035 * Input: sc -- ptr to per ctlr structure 3036 * status_reg -- value in the status register 3037 * Output: None 3038 * Return value: 0 -- no errors 3039 * non-zero-- errors 3040 */ 3041 static int 3042 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3043 { 3044 int result = 0; 3045 struct timeval t1; 3046 static time_t last_warning[2] = {0, 0}; 3047 3048 /* Check if the 'micro-controller ready' bit is not set. */ 3049 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3050 TWA_STATUS_EXPECTED_BITS) { 3051 3052 microtime(&t1); 3053 3054 last_warning[0] += (5 * 1000 * 100); 3055 3056 if (t1.tv_usec > last_warning[0]) { 3057 microtime(&t1); 3058 last_warning[0] = t1.tv_usec; 3059 } 3060 result = 1; 3061 } 3062 3063 /* Check if any error bits are set. */ 3064 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3065 3066 microtime(&t1); 3067 last_warning[1] += (5 * 1000 * 100); 3068 if (t1.tv_usec > last_warning[1]) { 3069 microtime(&t1); 3070 last_warning[1] = t1.tv_usec; 3071 } 3072 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3073 aprint_error_dev(&sc->twa_dv, "clearing PCI parity error " 3074 "re-seat/move/replace card.\n"); 3075 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3076 TWA_CONTROL_CLEAR_PARITY_ERROR); 3077 pci_conf_write(sc->pc, sc->tag, 3078 PCI_COMMAND_STATUS_REG, 3079 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3080 } 3081 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3082 aprint_error_dev(&sc->twa_dv, "clearing PCI abort\n"); 3083 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3084 TWA_CONTROL_CLEAR_PCI_ABORT); 3085 pci_conf_write(sc->pc, sc->tag, 3086 PCI_COMMAND_STATUS_REG, 3087 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3088 } 3089 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3090 /* 3091 * As documented by 3ware, the 9650 erroneously 3092 * flags queue errors during resets. 3093 * Just ignore them during the reset instead of 3094 * bothering the console. 3095 */ 3096 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3097 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3098 aprint_error_dev(&sc->twa_dv, 3099 "clearing controller queue error\n"); 3100 } 3101 3102 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3103 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3104 } 3105 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3106 aprint_error_dev(&sc->twa_dv, "micro-controller error\n"); 3107 result = 1; 3108 } 3109 } 3110 return(result); 3111 } 3112
Indexes created Tue Oct 14 15:09:51 GMT 2025