twa.c revision 1.35
1 /* $NetBSD: twa.c,v 1.35 2010/11/14 05:33:44 uebayasi Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.35 2010/11/14 05:33:44 uebayasi Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/device.h> 76 #include <sys/queue.h> 77 #include <sys/proc.h> 78 #include <sys/bswap.h> 79 #include <sys/buf.h> 80 #include <sys/bufq.h> 81 #include <sys/endian.h> 82 #include <sys/malloc.h> 83 #include <sys/conf.h> 84 #include <sys/disk.h> 85 #include <sys/sysctl.h> 86 #include <sys/syslog.h> 87 #if 1 88 #include <sys/ktrace.h> 89 #endif 90 91 #include <sys/bus.h> 92 93 #include <dev/pci/pcireg.h> 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/twareg.h> 97 #include <dev/pci/twavar.h> 98 #include <dev/pci/twaio.h> 99 100 #include <dev/scsipi/scsipi_all.h> 101 #include <dev/scsipi/scsipi_disk.h> 102 #include <dev/scsipi/scsipiconf.h> 103 #include <dev/scsipi/scsi_spc.h> 104 105 #include <dev/ldvar.h> 106 107 #include "locators.h" 108 109 #define PCI_CBIO 0x10 110 111 static int twa_fetch_aen(struct twa_softc *); 112 static void twa_aen_callback(struct twa_request *); 113 static int twa_find_aen(struct twa_softc *sc, uint16_t); 114 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 115 struct twa_command_header *); 116 117 static void twa_attach(device_t, device_t, void *); 118 static void twa_shutdown(void *); 119 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 120 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 121 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 122 static int twa_intr(void *); 123 static int twa_match(device_t, cfdata_t, void *); 124 static int twa_reset(struct twa_softc *); 125 126 static int twa_print(void *, const char *); 127 static int twa_soft_reset(struct twa_softc *); 128 129 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 130 static int twa_get_param(struct twa_softc *, int, int, size_t, 131 void (* callback)(struct twa_request *), 132 struct twa_param_9k **); 133 static int twa_set_param(struct twa_softc *, int, int, int, void *, 134 void (* callback)(struct twa_request *)); 135 static void twa_describe_controller(struct twa_softc *); 136 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 137 static int twa_done(struct twa_softc *); 138 139 extern struct cfdriver twa_cd; 140 extern uint32_t twa_fw_img_size; 141 extern uint8_t twa_fw_img[]; 142 143 CFATTACH_DECL(twa, sizeof(struct twa_softc), 144 twa_match, twa_attach, NULL, NULL); 145 146 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 147 const char twaver[] = "1.50.01.002"; 148 149 /* AEN messages. */ 150 static const struct twa_message twa_aen_table[] = { 151 {0x0000, "AEN queue empty"}, 152 {0x0001, "Controller reset occurred"}, 153 {0x0002, "Degraded unit detected"}, 154 {0x0003, "Controller error occured"}, 155 {0x0004, "Background rebuild failed"}, 156 {0x0005, "Background rebuild done"}, 157 {0x0006, "Incomplete unit detected"}, 158 {0x0007, "Background initialize done"}, 159 {0x0008, "Unclean shutdown detected"}, 160 {0x0009, "Drive timeout detected"}, 161 {0x000A, "Drive error detected"}, 162 {0x000B, "Rebuild started"}, 163 {0x000C, "Background initialize started"}, 164 {0x000D, "Entire logical unit was deleted"}, 165 {0x000E, "Background initialize failed"}, 166 {0x000F, "SMART attribute exceeded threshold"}, 167 {0x0010, "Power supply reported AC under range"}, 168 {0x0011, "Power supply reported DC out of range"}, 169 {0x0012, "Power supply reported a malfunction"}, 170 {0x0013, "Power supply predicted malfunction"}, 171 {0x0014, "Battery charge is below threshold"}, 172 {0x0015, "Fan speed is below threshold"}, 173 {0x0016, "Temperature sensor is above threshold"}, 174 {0x0017, "Power supply was removed"}, 175 {0x0018, "Power supply was inserted"}, 176 {0x0019, "Drive was removed from a bay"}, 177 {0x001A, "Drive was inserted into a bay"}, 178 {0x001B, "Drive bay cover door was opened"}, 179 {0x001C, "Drive bay cover door was closed"}, 180 {0x001D, "Product case was opened"}, 181 {0x0020, "Prepare for shutdown (power-off)"}, 182 {0x0021, "Downgrade UDMA mode to lower speed"}, 183 {0x0022, "Upgrade UDMA mode to higher speed"}, 184 {0x0023, "Sector repair completed"}, 185 {0x0024, "Sbuf memory test failed"}, 186 {0x0025, "Error flushing cached write data to disk"}, 187 {0x0026, "Drive reported data ECC error"}, 188 {0x0027, "DCB has checksum error"}, 189 {0x0028, "DCB version is unsupported"}, 190 {0x0029, "Background verify started"}, 191 {0x002A, "Background verify failed"}, 192 {0x002B, "Background verify done"}, 193 {0x002C, "Bad sector overwritten during rebuild"}, 194 {0x002D, "Source drive error occurred"}, 195 {0x002E, "Replace failed because replacement drive too small"}, 196 {0x002F, "Verify failed because array was never initialized"}, 197 {0x0030, "Unsupported ATA drive"}, 198 {0x0031, "Synchronize host/controller time"}, 199 {0x0032, "Spare capacity is inadequate for some units"}, 200 {0x0033, "Background migration started"}, 201 {0x0034, "Background migration failed"}, 202 {0x0035, "Background migration done"}, 203 {0x0036, "Verify detected and fixed data/parity mismatch"}, 204 {0x0037, "SO-DIMM incompatible"}, 205 {0x0038, "SO-DIMM not detected"}, 206 {0x0039, "Corrected Sbuf ECC error"}, 207 {0x003A, "Drive power on reset detected"}, 208 {0x003B, "Background rebuild paused"}, 209 {0x003C, "Background initialize paused"}, 210 {0x003D, "Background verify paused"}, 211 {0x003E, "Background migration paused"}, 212 {0x003F, "Corrupt flash file system detected"}, 213 {0x0040, "Flash file system repaired"}, 214 {0x0041, "Unit number assignments were lost"}, 215 {0x0042, "Error during read of primary DCB"}, 216 {0x0043, "Latent error found in backup DCB"}, 217 {0x0044, "Battery voltage is normal"}, 218 {0x0045, "Battery voltage is low"}, 219 {0x0046, "Battery voltage is high"}, 220 {0x0047, "Battery voltage is too low"}, 221 {0x0048, "Battery voltage is too high"}, 222 {0x0049, "Battery temperature is normal"}, 223 {0x004A, "Battery temperature is low"}, 224 {0x004B, "Battery temperature is high"}, 225 {0x004C, "Battery temperature is too low"}, 226 {0x004D, "Battery temperature is too high"}, 227 {0x004E, "Battery capacity test started"}, 228 {0x004F, "Cache synchronization skipped"}, 229 {0x0050, "Battery capacity test completed"}, 230 {0x0051, "Battery health check started"}, 231 {0x0052, "Battery health check completed"}, 232 {0x0053, "Battery capacity test needed"}, 233 {0x0054, "Battery charge termination voltage is at high level"}, 234 {0x0055, "Battery charging started"}, 235 {0x0056, "Battery charging completed"}, 236 {0x0057, "Battery charging fault"}, 237 {0x0058, "Battery capacity is below warning level"}, 238 {0x0059, "Battery capacity is below error level"}, 239 {0x005A, "Battery is present"}, 240 {0x005B, "Battery is not present"}, 241 {0x005C, "Battery is weak"}, 242 {0x005D, "Battery health check failed"}, 243 {0x005E, "Cache synchronized after power fail"}, 244 {0x005F, "Cache synchronization failed; some data lost"}, 245 {0x0060, "Bad cache meta data checksum"}, 246 {0x0061, "Bad cache meta data signature"}, 247 {0x0062, "Cache meta data restore failed"}, 248 {0x0063, "BBU not found after power fail"}, 249 {0x00FC, "Recovered/finished array membership update"}, 250 {0x00FD, "Handler lockup"}, 251 {0x00FE, "Retrying PCI transfer"}, 252 {0x00FF, "AEN queue is full"}, 253 {0xFFFFFFFF, (char *)NULL} 254 }; 255 256 /* AEN severity table. */ 257 static const char *twa_aen_severity_table[] = { 258 "None", 259 "ERROR", 260 "WARNING", 261 "INFO", 262 "DEBUG", 263 (char *)NULL 264 }; 265 266 /* Error messages. */ 267 static const struct twa_message twa_error_table[] = { 268 {0x0100, "SGL entry contains zero data"}, 269 {0x0101, "Invalid command opcode"}, 270 {0x0102, "SGL entry has unaligned address"}, 271 {0x0103, "SGL size does not match command"}, 272 {0x0104, "SGL entry has illegal length"}, 273 {0x0105, "Command packet is not aligned"}, 274 {0x0106, "Invalid request ID"}, 275 {0x0107, "Duplicate request ID"}, 276 {0x0108, "ID not locked"}, 277 {0x0109, "LBA out of range"}, 278 {0x010A, "Logical unit not supported"}, 279 {0x010B, "Parameter table does not exist"}, 280 {0x010C, "Parameter index does not exist"}, 281 {0x010D, "Invalid field in CDB"}, 282 {0x010E, "Specified port has invalid drive"}, 283 {0x010F, "Parameter item size mismatch"}, 284 {0x0110, "Failed memory allocation"}, 285 {0x0111, "Memory request too large"}, 286 {0x0112, "Out of memory segments"}, 287 {0x0113, "Invalid address to deallocate"}, 288 {0x0114, "Out of memory"}, 289 {0x0115, "Out of heap"}, 290 {0x0120, "Double degrade"}, 291 {0x0121, "Drive not degraded"}, 292 {0x0122, "Reconstruct error"}, 293 {0x0123, "Replace not accepted"}, 294 {0x0124, "Replace drive capacity too small"}, 295 {0x0125, "Sector count not allowed"}, 296 {0x0126, "No spares left"}, 297 {0x0127, "Reconstruct error"}, 298 {0x0128, "Unit is offline"}, 299 {0x0129, "Cannot update status to DCB"}, 300 {0x0130, "Invalid stripe handle"}, 301 {0x0131, "Handle that was not locked"}, 302 {0x0132, "Handle that was not empy"}, 303 {0x0133, "Handle has different owner"}, 304 {0x0140, "IPR has parent"}, 305 {0x0150, "Illegal Pbuf address alignment"}, 306 {0x0151, "Illegal Pbuf transfer length"}, 307 {0x0152, "Illegal Sbuf address alignment"}, 308 {0x0153, "Illegal Sbuf transfer length"}, 309 {0x0160, "Command packet too large"}, 310 {0x0161, "SGL exceeds maximum length"}, 311 {0x0162, "SGL has too many entries"}, 312 {0x0170, "Insufficient resources for rebuilder"}, 313 {0x0171, "Verify error (data != parity)"}, 314 {0x0180, "Requested segment not in directory of this DCB"}, 315 {0x0181, "DCB segment has unsupported version"}, 316 {0x0182, "DCB segment has checksum error"}, 317 {0x0183, "DCB support (settings) segment invalid"}, 318 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 319 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 320 {0x01A0, "Could not clear Sbuf"}, 321 {0x01C0, "Flash identify failed"}, 322 {0x01C1, "Flash out of bounds"}, 323 {0x01C2, "Flash verify error"}, 324 {0x01C3, "Flash file object not found"}, 325 {0x01C4, "Flash file already present"}, 326 {0x01C5, "Flash file system full"}, 327 {0x01C6, "Flash file not present"}, 328 {0x01C7, "Flash file size error"}, 329 {0x01C8, "Bad flash file checksum"}, 330 {0x01CA, "Corrupt flash file system detected"}, 331 {0x01D0, "Invalid field in parameter list"}, 332 {0x01D1, "Parameter list length error"}, 333 {0x01D2, "Parameter item is not changeable"}, 334 {0x01D3, "Parameter item is not saveable"}, 335 {0x0200, "UDMA CRC error"}, 336 {0x0201, "Internal CRC error"}, 337 {0x0202, "Data ECC error"}, 338 {0x0203, "ADP level 1 error"}, 339 {0x0204, "Port timeout"}, 340 {0x0205, "Drive power on reset"}, 341 {0x0206, "ADP level 2 error"}, 342 {0x0207, "Soft reset failed"}, 343 {0x0208, "Drive not ready"}, 344 {0x0209, "Unclassified port error"}, 345 {0x020A, "Drive aborted command"}, 346 {0x0210, "Internal CRC error"}, 347 {0x0211, "Host PCI bus abort"}, 348 {0x0212, "Host PCI parity error"}, 349 {0x0213, "Port handler error"}, 350 {0x0214, "Token interrupt count error"}, 351 {0x0215, "Timeout waiting for PCI transfer"}, 352 {0x0216, "Corrected buffer ECC"}, 353 {0x0217, "Uncorrected buffer ECC"}, 354 {0x0230, "Unsupported command during flash recovery"}, 355 {0x0231, "Next image buffer expected"}, 356 {0x0232, "Binary image architecture incompatible"}, 357 {0x0233, "Binary image has no signature"}, 358 {0x0234, "Binary image has bad checksum"}, 359 {0x0235, "Image downloaded overflowed buffer"}, 360 {0x0240, "I2C device not found"}, 361 {0x0241, "I2C transaction aborted"}, 362 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 363 {0x0243, "SO-DIMM unsupported"}, 364 {0x0248, "SPI transfer status error"}, 365 {0x0249, "SPI transfer timeout error"}, 366 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 367 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 368 {0x0252, "Invalid value in CreateUnit descriptor"}, 369 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 370 {0x0254, "Unable to create data channel for this unit descriptor"}, 371 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 372 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 373 {0x0257, "CreateUnit does not support this descriptor version"}, 374 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 375 {0x0259, "Too many descriptors in CreateUnit"}, 376 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 377 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 378 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 379 {0x0260, "SMART attribute exceeded threshold"}, 380 {0xFFFFFFFF, (char *)NULL} 381 }; 382 383 struct twa_pci_identity { 384 uint32_t vendor_id; 385 uint32_t product_id; 386 const char *name; 387 }; 388 389 static const struct twa_pci_identity pci_twa_products[] = { 390 { PCI_VENDOR_3WARE, 391 PCI_PRODUCT_3WARE_9000, 392 "3ware 9000 series", 393 }, 394 { PCI_VENDOR_3WARE, 395 PCI_PRODUCT_3WARE_9550, 396 "3ware 9550SX series", 397 }, 398 { PCI_VENDOR_3WARE, 399 PCI_PRODUCT_3WARE_9650, 400 "3ware 9650SE series", 401 }, 402 { PCI_VENDOR_3WARE, 403 PCI_PRODUCT_3WARE_9690, 404 "3ware 9690 series", 405 }, 406 { 0, 407 0, 408 NULL, 409 }, 410 }; 411 412 413 static inline void 414 twa_outl(struct twa_softc *sc, int off, uint32_t val) 415 { 416 417 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 418 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 419 BUS_SPACE_BARRIER_WRITE); 420 } 421 422 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 423 { 424 425 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 426 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 427 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 428 } 429 430 void 431 twa_request_wait_handler(struct twa_request *tr) 432 { 433 434 wakeup(tr); 435 } 436 437 static int 438 twa_match(device_t parent, cfdata_t cfdata, 439 void *aux) 440 { 441 int i; 442 struct pci_attach_args *pa = aux; 443 const struct twa_pci_identity *entry = 0; 444 445 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 446 for (i = 0; (pci_twa_products[i].product_id); i++) { 447 entry = &pci_twa_products[i]; 448 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 449 aprint_normal("%s: (rev. 0x%02x)\n", 450 entry->name, PCI_REVISION(pa->pa_class)); 451 return (1); 452 } 453 } 454 } 455 return (0); 456 } 457 458 static const char * 459 twa_find_msg_string(const struct twa_message *table, uint16_t code) 460 { 461 int i; 462 463 for (i = 0; table[i].message != NULL; i++) 464 if (table[i].code == code) 465 return(table[i].message); 466 467 return(table[i].message); 468 } 469 470 void 471 twa_release_request(struct twa_request *tr) 472 { 473 int s; 474 struct twa_softc *sc; 475 476 sc = tr->tr_sc; 477 478 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 479 s = splbio(); 480 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 481 splx(s); 482 if (__predict_false((tr->tr_sc->twa_sc_flags & 483 TWA_STATE_REQUEST_WAIT) != 0)) { 484 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 485 wakeup(&sc->twa_free); 486 } 487 } else 488 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 489 } 490 491 static void 492 twa_unmap_request(struct twa_request *tr) 493 { 494 struct twa_softc *sc = tr->tr_sc; 495 uint8_t cmd_status; 496 int s; 497 498 /* If the command involved data, unmap that too. */ 499 if (tr->tr_data != NULL) { 500 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 501 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 502 else 503 cmd_status = 504 tr->tr_command->command.cmd_pkt_7k.generic.status; 505 506 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 507 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 508 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 509 /* 510 * If we are using a bounce buffer, and we are reading 511 * data, copy the real data in. 512 */ 513 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 514 if (cmd_status == 0) 515 memcpy(tr->tr_real_data, tr->tr_data, 516 tr->tr_real_length); 517 } 518 if (tr->tr_flags & TWA_CMD_DATA_IN) 519 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 520 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 521 522 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 523 } 524 525 /* Free alignment buffer if it was used. */ 526 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 527 s = splvm(); 528 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 529 tr->tr_length, UVM_KMF_WIRED); 530 splx(s); 531 tr->tr_data = tr->tr_real_data; 532 tr->tr_length = tr->tr_real_length; 533 } 534 } 535 536 /* 537 * Function name: twa_wait_request 538 * Description: Sends down a firmware cmd, and waits for the completion, 539 * but NOT in a tight loop. 540 * 541 * Input: tr -- ptr to request pkt 542 * timeout -- max # of seconds to wait before giving up 543 * Output: None 544 * Return value: 0 -- success 545 * non-zero-- failure 546 */ 547 static int 548 twa_wait_request(struct twa_request *tr, uint32_t timeout) 549 { 550 time_t end_time; 551 struct timeval t1; 552 int s, rv; 553 554 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 555 tr->tr_callback = twa_request_wait_handler; 556 tr->tr_status = TWA_CMD_BUSY; 557 558 rv = twa_map_request(tr); 559 560 if (rv != 0) 561 return (rv); 562 563 microtime(&t1); 564 end_time = t1.tv_usec + 565 (timeout * 1000 * 100); 566 567 while (tr->tr_status != TWA_CMD_COMPLETE) { 568 rv = tr->tr_error; 569 if (rv != 0) 570 return(rv); 571 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 572 break; 573 574 if (rv == EWOULDBLOCK) { 575 /* 576 * We will reset the controller only if the request has 577 * already been submitted, so as to not lose the 578 * request packet. If a busy request timed out, the 579 * reset will take care of freeing resources. If a 580 * pending request timed out, we will free resources 581 * for that request, right here. So, the caller is 582 * expected to NOT cleanup when ETIMEDOUT is returned. 583 */ 584 if (tr->tr_status == TWA_CMD_BUSY) 585 twa_reset(tr->tr_sc); 586 else { 587 /* Request was never submitted. Clean up. */ 588 s = splbio(); 589 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 590 tr_link); 591 splx(s); 592 593 twa_unmap_request(tr); 594 if (tr->tr_data) 595 free(tr->tr_data, M_DEVBUF); 596 597 twa_release_request(tr); 598 } 599 return(ETIMEDOUT); 600 } 601 /* 602 * Either the request got completed, or we were woken up by a 603 * signal. Calculate the new timeout, in case it was the 604 * latter. 605 */ 606 microtime(&t1); 607 608 timeout = (end_time - t1.tv_usec) / (1000 * 100); 609 } 610 return(rv); 611 } 612 613 /* 614 * Function name: twa_immediate_request 615 * Description: Sends down a firmware cmd, and waits for the completion 616 * in a tight loop. 617 * 618 * Input: tr -- ptr to request pkt 619 * timeout -- max # of seconds to wait before giving up 620 * Output: None 621 * Return value: 0 -- success 622 * non-zero-- failure 623 */ 624 static int 625 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 626 { 627 struct timeval t1; 628 int s = 0, rv = 0; 629 630 rv = twa_map_request(tr); 631 632 if (rv != 0) 633 return(rv); 634 635 timeout = (timeout * 10000 * 10); 636 637 microtime(&t1); 638 639 timeout += t1.tv_usec; 640 641 do { 642 rv = tr->tr_error; 643 if (rv != 0) 644 return(rv); 645 s = splbio(); 646 twa_done(tr->tr_sc); 647 splx(s); 648 if (tr->tr_status == TWA_CMD_COMPLETE) 649 return(rv); 650 microtime(&t1); 651 } while (t1.tv_usec <= timeout); 652 653 /* 654 * We will reset the controller only if the request has 655 * already been submitted, so as to not lose the 656 * request packet. If a busy request timed out, the 657 * reset will take care of freeing resources. If a 658 * pending request timed out, we will free resources 659 * for that request, right here. So, the caller is 660 * expected to NOT cleanup when ETIMEDOUT is returned. 661 */ 662 rv = ETIMEDOUT; 663 664 if (tr->tr_status == TWA_CMD_BUSY) 665 twa_reset(tr->tr_sc); 666 else { 667 /* Request was never submitted. Clean up. */ 668 s = splbio(); 669 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 670 splx(s); 671 twa_unmap_request(tr); 672 if (tr->tr_data) 673 free(tr->tr_data, M_DEVBUF); 674 675 twa_release_request(tr); 676 } 677 return (rv); 678 } 679 680 static int 681 twa_inquiry(struct twa_request *tr, int lunid) 682 { 683 int error; 684 struct twa_command_9k *tr_9k_cmd; 685 686 if (tr->tr_data == NULL) 687 return (ENOMEM); 688 689 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 690 691 tr->tr_length = TWA_SECTOR_SIZE; 692 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 693 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 694 695 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 696 697 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 698 tr_9k_cmd->unit = lunid; 699 tr_9k_cmd->request_id = tr->tr_request_id; 700 tr_9k_cmd->status = 0; 701 tr_9k_cmd->sgl_offset = 16; 702 tr_9k_cmd->sgl_entries = 1; 703 /* create the CDB here */ 704 tr_9k_cmd->cdb[0] = INQUIRY; 705 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 706 tr_9k_cmd->cdb[4] = 255; 707 708 /* XXXX setup page data no lun device 709 * it seems 9000 series does not indicate 710 * NOTPRESENT - need more investigation 711 */ 712 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 713 SID_QUAL_LU_NOTPRESENT; 714 715 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 716 717 if (error != 0) 718 return (error); 719 720 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 721 SID_QUAL_LU_NOTPRESENT) 722 error = 1; 723 724 return (error); 725 } 726 727 static int 728 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 729 { 730 731 printf("%s: %s\n", device_xname(&sc->twa_dv), scsipi->vendor); 732 733 return (1); 734 } 735 736 737 static uint64_t 738 twa_read_capacity(struct twa_request *tr, int lunid) 739 { 740 int error; 741 struct twa_command_9k *tr_9k_cmd; 742 uint64_t array_size = 0LL; 743 744 if (tr->tr_data == NULL) 745 return (ENOMEM); 746 747 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 748 749 tr->tr_length = TWA_SECTOR_SIZE; 750 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 751 tr->tr_flags |= TWA_CMD_DATA_OUT; 752 753 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 754 755 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 756 tr_9k_cmd->unit = lunid; 757 tr_9k_cmd->request_id = tr->tr_request_id; 758 tr_9k_cmd->status = 0; 759 tr_9k_cmd->sgl_offset = 16; 760 tr_9k_cmd->sgl_entries = 1; 761 /* create the CDB here */ 762 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 763 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 764 765 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 766 767 if (error == 0) { 768 #if BYTE_ORDER == BIG_ENDIAN 769 array_size = bswap64(_8btol( 770 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 771 #else 772 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 773 tr->tr_data)->addr) + 1; 774 #endif 775 } 776 return (array_size); 777 } 778 779 static int 780 twa_request_sense(struct twa_request *tr, int lunid) 781 { 782 int error = 1; 783 struct twa_command_9k *tr_9k_cmd; 784 785 if (tr->tr_data == NULL) 786 return (error); 787 788 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 789 790 tr->tr_length = TWA_SECTOR_SIZE; 791 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 792 tr->tr_flags |= TWA_CMD_DATA_OUT; 793 794 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 795 796 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 797 tr_9k_cmd->unit = lunid; 798 tr_9k_cmd->request_id = tr->tr_request_id; 799 tr_9k_cmd->status = 0; 800 tr_9k_cmd->sgl_offset = 16; 801 tr_9k_cmd->sgl_entries = 1; 802 /* create the CDB here */ 803 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 804 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 805 tr_9k_cmd->cdb[4] = 255; 806 807 /*XXX AEN notification called in interrupt context 808 * so just queue the request. Return as quickly 809 * as possible from interrupt 810 */ 811 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 812 error = twa_map_request(tr); 813 else 814 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 815 816 return (error); 817 } 818 819 static int 820 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 821 { 822 struct twa_request *tr; 823 struct twa_command_packet *tc; 824 bus_dma_segment_t seg; 825 size_t max_segs, max_xfer; 826 int i, rv, rseg, size; 827 828 if ((sc->sc_units = malloc(sc->sc_nunits * 829 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 830 return(ENOMEM); 831 832 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 833 M_DEVBUF, M_NOWAIT)) == NULL) 834 return(ENOMEM); 835 836 size = num_reqs * sizeof(struct twa_command_packet); 837 838 /* Allocate memory for cmd pkts. */ 839 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 840 size, PAGE_SIZE, 0, &seg, 841 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 842 aprint_error_dev(&sc->twa_dv, "unable to allocate " 843 "command packets, rv = %d\n", rv); 844 return (ENOMEM); 845 } 846 847 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 848 &seg, rseg, size, (void **)&sc->twa_cmds, 849 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 850 aprint_error_dev(&sc->twa_dv, "unable to map commands, rv = %d\n", rv); 851 return (1); 852 } 853 854 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 855 size, num_reqs, size, 856 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 857 aprint_error_dev(&sc->twa_dv, "unable to create command DMA map, " 858 "rv = %d\n", rv); 859 return (ENOMEM); 860 } 861 862 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 863 sc->twa_cmds, size, NULL, 864 BUS_DMA_NOWAIT)) != 0) { 865 aprint_error_dev(&sc->twa_dv, "unable to load command DMA map, " 866 "rv = %d\n", rv); 867 return (1); 868 } 869 870 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 871 aprint_error_dev(&sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 872 873 return (1); 874 } 875 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 876 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 877 878 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 879 memset(sc->twa_cmd_pkt_buf, 0, 880 num_reqs * sizeof(struct twa_command_packet)); 881 882 sc->sc_twa_request = sc->twa_req_buf; 883 max_segs = twa_get_maxsegs(); 884 max_xfer = twa_get_maxxfer(max_segs); 885 886 for (i = 0; i < num_reqs; i++, tc++) { 887 tr = &(sc->twa_req_buf[i]); 888 tr->tr_command = tc; 889 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 890 (i * sizeof(struct twa_command_packet)); 891 tr->tr_request_id = i; 892 tr->tr_sc = sc; 893 894 /* 895 * Create a map for data buffers. maxsize (256 * 1024) used in 896 * bus_dma_tag_create above should suffice the bounce page needs 897 * for data buffers, since the max I/O size we support is 128KB. 898 * If we supported I/O's bigger than 256KB, we would have to 899 * create a second dma_tag, with the appropriate maxsize. 900 */ 901 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 902 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 903 &tr->tr_dma_map)) != 0) { 904 aprint_error_dev(&sc->twa_dv, "unable to create command " 905 "DMA map, rv = %d\n", rv); 906 return (ENOMEM); 907 } 908 /* Insert request into the free queue. */ 909 if (i != 0) { 910 sc->twa_lookup[i] = tr; 911 twa_release_request(tr); 912 } else 913 tr->tr_flags |= TWA_CMD_AEN; 914 } 915 return(0); 916 } 917 918 static void 919 twa_recompute_openings(struct twa_softc *sc) 920 { 921 struct twa_drive *td; 922 int unit; 923 int openings; 924 uint64_t total_size; 925 926 total_size = 0; 927 for (unit = 0; unit < sc->sc_nunits; unit++) { 928 td = &sc->sc_units[unit]; 929 total_size += td->td_size; 930 } 931 932 for (unit = 0; unit < sc->sc_nunits; unit++) { 933 td = &sc->sc_units[unit]; 934 /* 935 * In theory, TWA_Q_LENGTH - 1 should be usable, but 936 * keep one additional ccb for internal commands. 937 * This makes the controller more reliable under load. 938 */ 939 if (total_size > 0) { 940 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 941 } else 942 openings = 0; 943 944 if (openings == td->td_openings) 945 continue; 946 td->td_openings = openings; 947 948 #ifdef TWA_DEBUG 949 printf("%s: unit %d openings %d\n", 950 device_xname(&sc->twa_dv), unit, openings); 951 #endif 952 if (td->td_dev != NULL) 953 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 954 } 955 } 956 957 static int 958 twa_request_bus_scan(struct twa_softc *sc) 959 { 960 struct twa_drive *td; 961 struct twa_request *tr; 962 struct twa_attach_args twaa; 963 int locs[TWACF_NLOCS]; 964 int s, unit; 965 966 s = splbio(); 967 for (unit = 0; unit < sc->sc_nunits; unit++) { 968 969 if ((tr = twa_get_request(sc, 0)) == NULL) { 970 splx(s); 971 return (EIO); 972 } 973 974 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 975 976 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 977 978 if (tr->tr_data == NULL) { 979 twa_release_request(tr); 980 splx(s); 981 return (ENOMEM); 982 } 983 td = &sc->sc_units[unit]; 984 985 if (twa_inquiry(tr, unit) == 0) { 986 if (td->td_dev == NULL) { 987 twa_print_inquiry_data(sc, 988 ((struct scsipi_inquiry_data *)tr->tr_data)); 989 990 sc->sc_units[unit].td_size = 991 twa_read_capacity(tr, unit); 992 993 twaa.twaa_unit = unit; 994 995 twa_recompute_openings(sc); 996 997 locs[TWACF_UNIT] = unit; 998 999 sc->sc_units[unit].td_dev = 1000 config_found_sm_loc(&sc->twa_dv, "twa", 1001 locs, &twaa, twa_print, config_stdsubmatch); 1002 } 1003 } else { 1004 if (td->td_dev != NULL) { 1005 (void) config_detach(td->td_dev, DETACH_FORCE); 1006 td->td_dev = NULL; 1007 td->td_size = 0; 1008 1009 twa_recompute_openings(sc); 1010 } 1011 } 1012 free(tr->tr_data, M_DEVBUF); 1013 1014 twa_release_request(tr); 1015 } 1016 splx(s); 1017 1018 return (0); 1019 } 1020 1021 1022 #ifdef DIAGNOSTIC 1023 static inline void 1024 twa_check_busy_q(struct twa_request *tr) 1025 { 1026 struct twa_request *rq; 1027 struct twa_softc *sc = tr->tr_sc; 1028 1029 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1030 if (tr->tr_request_id == rq->tr_request_id) { 1031 panic("cannot submit same request more than once"); 1032 } else if (tr->bp == rq->bp && tr->bp != 0) { 1033 /* XXX A check for 0 for the buf ptr is needed to 1034 * guard against ioctl requests with a buf ptr of 1035 * 0 and also aen notifications. Looking for 1036 * external cmds only. 1037 */ 1038 panic("cannot submit same buf more than once"); 1039 } else { 1040 /* Empty else statement */ 1041 } 1042 } 1043 } 1044 #endif 1045 1046 static int 1047 twa_start(struct twa_request *tr) 1048 { 1049 struct twa_softc *sc = tr->tr_sc; 1050 uint32_t status_reg; 1051 int s; 1052 int error; 1053 1054 s = splbio(); 1055 1056 /* 1057 * The 9650 has a bug in the detection of the full queue condition. 1058 * If a write operation has filled the queue and is directly followed 1059 * by a status read, it sometimes doesn't return the correct result. 1060 * To work around this, the upper 32bit are written first. 1061 * This effectively serialises the hardware, but does not change 1062 * the state of the queue. 1063 */ 1064 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9650) { 1065 /* Write lower 32 bits of address */ 1066 TWA_WRITE_9650_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1067 sizeof(struct twa_command_header)); 1068 } 1069 1070 /* Check to see if we can post a command. */ 1071 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1072 if ((error = twa_check_ctlr_state(sc, status_reg))) 1073 goto out; 1074 1075 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1076 if (tr->tr_status != TWA_CMD_PENDING) { 1077 tr->tr_status = TWA_CMD_PENDING; 1078 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1079 tr, tr_link); 1080 } 1081 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1082 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1083 error = EBUSY; 1084 } else { 1085 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1086 (char *)tr->tr_command - (char *)sc->twa_cmds, 1087 sizeof(struct twa_command_packet), 1088 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1089 1090 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9650) { 1091 /* 1092 * Cmd queue is not full. Post the command to 9650 1093 * by writing upper 32 bits of address. 1094 */ 1095 TWA_WRITE_9650_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1096 sizeof(struct twa_command_header)); 1097 } else { 1098 /* Cmd queue is not full. Post the command. */ 1099 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1100 sizeof(struct twa_command_header)); 1101 } 1102 1103 /* Mark the request as currently being processed. */ 1104 tr->tr_status = TWA_CMD_BUSY; 1105 1106 #ifdef DIAGNOSTIC 1107 twa_check_busy_q(tr); 1108 #endif 1109 1110 /* Move the request into the busy queue. */ 1111 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1112 } 1113 out: 1114 splx(s); 1115 return(error); 1116 } 1117 1118 static int 1119 twa_drain_response_queue(struct twa_softc *sc) 1120 { 1121 union twa_response_queue rq; 1122 uint32_t status_reg; 1123 1124 for (;;) { 1125 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1126 if (twa_check_ctlr_state(sc, status_reg)) 1127 return(1); 1128 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1129 return(0); /* no more response queue entries */ 1130 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1131 } 1132 } 1133 1134 /* 1135 * twa_drain_response_queue_large: 1136 * 1137 * specific to the 9550 and 9650 controller to remove requests. 1138 * 1139 * Removes all requests from "large" response queue on the 9550 controller. 1140 * This procedure is called as part of the 9550 controller reset sequence. 1141 */ 1142 static int 1143 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1144 { 1145 uint32_t start_time = 0, end_time; 1146 uint32_t response = 0; 1147 1148 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1149 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1150 start_time = 0; 1151 end_time = (timeout * TWA_MICROSECOND); 1152 1153 while ((response & 1154 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1155 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1156 if (start_time >= end_time) 1157 return (1); 1158 DELAY(1); 1159 start_time++; 1160 } 1161 /* P-chip delay */ 1162 DELAY(500000); 1163 } 1164 return (0); 1165 } 1166 1167 static void 1168 twa_drain_busy_queue(struct twa_softc *sc) 1169 { 1170 struct twa_request *tr; 1171 1172 /* Walk the busy queue. */ 1173 1174 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1175 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1176 1177 twa_unmap_request(tr); 1178 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1179 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1180 /* It's an internal/ioctl request. Simply free it. */ 1181 if (tr->tr_data) 1182 free(tr->tr_data, M_DEVBUF); 1183 twa_release_request(tr); 1184 } else { 1185 /* It's a SCSI request. Complete it. */ 1186 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1187 if (tr->tr_callback) 1188 tr->tr_callback(tr); 1189 } 1190 } 1191 } 1192 1193 static int 1194 twa_drain_pending_queue(struct twa_softc *sc) 1195 { 1196 struct twa_request *tr; 1197 int s, error = 0; 1198 1199 /* 1200 * Pull requests off the pending queue, and submit them. 1201 */ 1202 s = splbio(); 1203 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1204 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1205 1206 if ((error = twa_start(tr))) { 1207 if (error == EBUSY) { 1208 tr->tr_status = TWA_CMD_PENDING; 1209 1210 /* queue at the head */ 1211 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1212 tr, tr_link); 1213 error = 0; 1214 break; 1215 } else { 1216 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1217 tr->tr_error = error; 1218 tr->tr_callback(tr); 1219 error = EIO; 1220 } 1221 } 1222 } 1223 } 1224 splx(s); 1225 1226 return(error); 1227 } 1228 1229 static int 1230 twa_drain_aen_queue(struct twa_softc *sc) 1231 { 1232 int s, error = 0; 1233 struct twa_request *tr; 1234 struct twa_command_header *cmd_hdr; 1235 struct timeval t1; 1236 uint32_t timeout; 1237 1238 for (;;) { 1239 if ((tr = twa_get_request(sc, 0)) == NULL) { 1240 error = EIO; 1241 break; 1242 } 1243 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1244 tr->tr_callback = NULL; 1245 1246 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1247 1248 if (tr->tr_data == NULL) { 1249 error = 1; 1250 goto out; 1251 } 1252 1253 if (twa_request_sense(tr, 0) != 0) { 1254 error = 1; 1255 break; 1256 } 1257 1258 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1259 1260 microtime(&t1); 1261 1262 timeout += t1.tv_usec; 1263 1264 do { 1265 s = splbio(); 1266 twa_done(tr->tr_sc); 1267 splx(s); 1268 if (tr->tr_status != TWA_CMD_BUSY) 1269 break; 1270 microtime(&t1); 1271 } while (t1.tv_usec <= timeout); 1272 1273 if (tr->tr_status != TWA_CMD_COMPLETE) { 1274 error = ETIMEDOUT; 1275 break; 1276 } 1277 1278 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1279 break; 1280 1281 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1282 if ((cmd_hdr->status_block.error) /* aen_code */ 1283 == TWA_AEN_QUEUE_EMPTY) 1284 break; 1285 (void)twa_enqueue_aen(sc, cmd_hdr); 1286 1287 free(tr->tr_data, M_DEVBUF); 1288 twa_release_request(tr); 1289 } 1290 out: 1291 if (tr) { 1292 if (tr->tr_data) 1293 free(tr->tr_data, M_DEVBUF); 1294 1295 twa_release_request(tr); 1296 } 1297 return(error); 1298 } 1299 1300 1301 #if 0 1302 static void 1303 twa_check_response_q(struct twa_request *tr, int clear) 1304 { 1305 int j; 1306 static int i = 0; 1307 static struct twa_request *req = 0; 1308 static struct buf *hist[255]; 1309 1310 1311 if (clear) { 1312 i = 0; 1313 for (j = 0; j < 255; j++) 1314 hist[j] = 0; 1315 return; 1316 } 1317 1318 if (req == 0) 1319 req = tr; 1320 1321 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1322 /* XXX this is bogus ! req can't be anything else but tr ! */ 1323 if (req->tr_request_id == tr->tr_request_id) 1324 panic("req id: %d on controller queue twice", 1325 tr->tr_request_id); 1326 1327 for (j = 0; j < i; j++) 1328 if (tr->bp == hist[j]) 1329 panic("req id: %d buf found twice", 1330 tr->tr_request_id); 1331 } 1332 req = tr; 1333 1334 hist[i++] = req->bp; 1335 } 1336 #endif 1337 1338 static int 1339 twa_done(struct twa_softc *sc) 1340 { 1341 union twa_response_queue rq; 1342 struct twa_request *tr; 1343 int rv = 0; 1344 uint32_t status_reg; 1345 1346 for (;;) { 1347 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1348 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1349 break; 1350 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1351 break; 1352 /* Response queue is not empty. */ 1353 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1354 tr = sc->sc_twa_request + rq.u.response_id; 1355 #if 0 1356 twa_check_response_q(tr, 0); 1357 #endif 1358 /* Unmap the command packet, and any associated data buffer. */ 1359 twa_unmap_request(tr); 1360 1361 tr->tr_status = TWA_CMD_COMPLETE; 1362 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1363 1364 if (tr->tr_callback) 1365 tr->tr_callback(tr); 1366 } 1367 (void)twa_drain_pending_queue(sc); 1368 1369 #if 0 1370 twa_check_response_q(NULL, 1); 1371 #endif 1372 return(rv); 1373 } 1374 1375 /* 1376 * Function name: twa_init_ctlr 1377 * Description: Establishes a logical connection with the controller. 1378 * If bundled with firmware, determines whether or not 1379 * the driver is compatible with the firmware on the 1380 * controller, before proceeding to work with it. 1381 * 1382 * Input: sc -- ptr to per ctlr structure 1383 * Output: None 1384 * Return value: 0 -- success 1385 * non-zero-- failure 1386 */ 1387 static int 1388 twa_init_ctlr(struct twa_softc *sc) 1389 { 1390 uint16_t fw_on_ctlr_srl = 0; 1391 uint16_t fw_on_ctlr_arch_id = 0; 1392 uint16_t fw_on_ctlr_branch = 0; 1393 uint16_t fw_on_ctlr_build = 0; 1394 uint32_t init_connect_result = 0; 1395 int error = 0; 1396 1397 /* Wait for the controller to become ready. */ 1398 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1399 TWA_REQUEST_TIMEOUT_PERIOD)) { 1400 return(ENXIO); 1401 } 1402 /* Drain the response queue. */ 1403 if (twa_drain_response_queue(sc)) 1404 return(1); 1405 1406 /* Establish a logical connection with the controller. */ 1407 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1408 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1409 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1410 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1411 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1412 &fw_on_ctlr_build, &init_connect_result))) { 1413 return(error); 1414 } 1415 twa_drain_aen_queue(sc); 1416 1417 /* Set controller state to initialized. */ 1418 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1419 return(0); 1420 } 1421 1422 static int 1423 twa_setup(struct twa_softc *sc) 1424 { 1425 struct tw_cl_event_packet *aen_queue; 1426 uint32_t i = 0; 1427 int error = 0; 1428 1429 /* Initialize request queues. */ 1430 TAILQ_INIT(&sc->twa_free); 1431 TAILQ_INIT(&sc->twa_busy); 1432 TAILQ_INIT(&sc->twa_pending); 1433 1434 sc->twa_sc_flags = 0; 1435 1436 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1437 1438 return(ENOMEM); 1439 } 1440 1441 /* Allocate memory for the AEN queue. */ 1442 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1443 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1444 /* 1445 * This should not cause us to return error. We will only be 1446 * unable to support AEN's. But then, we will have to check 1447 * time and again to see if we can support AEN's, if we 1448 * continue. So, we will just return error. 1449 */ 1450 return (ENOMEM); 1451 } 1452 /* Initialize the aen queue. */ 1453 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1454 1455 for (i = 0; i < TWA_Q_LENGTH; i++) 1456 sc->twa_aen_queue[i] = &(aen_queue[i]); 1457 1458 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1459 TWA_CONTROL_DISABLE_INTERRUPTS); 1460 1461 /* Initialize the controller. */ 1462 if ((error = twa_init_ctlr(sc))) { 1463 /* Soft reset the controller, and try one more time. */ 1464 1465 printf("%s: controller initialization failed. " 1466 "Retrying initialization\n", device_xname(&sc->twa_dv)); 1467 1468 if ((error = twa_soft_reset(sc)) == 0) 1469 error = twa_init_ctlr(sc); 1470 } 1471 1472 twa_describe_controller(sc); 1473 1474 error = twa_request_bus_scan(sc); 1475 1476 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1477 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1478 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1479 TWA_CONTROL_ENABLE_INTERRUPTS); 1480 1481 return (error); 1482 } 1483 1484 void *twa_sdh; 1485 1486 static void 1487 twa_attach(device_t parent, device_t self, void *aux) 1488 { 1489 struct pci_attach_args *pa; 1490 struct twa_softc *sc; 1491 pci_chipset_tag_t pc; 1492 pcireg_t csr; 1493 pci_intr_handle_t ih; 1494 const char *intrstr; 1495 const struct sysctlnode *node; 1496 int i; 1497 bool use_64bit; 1498 1499 sc = device_private(self); 1500 1501 pa = aux; 1502 pc = pa->pa_pc; 1503 sc->pc = pa->pa_pc; 1504 sc->tag = pa->pa_tag; 1505 1506 aprint_naive(": RAID controller\n"); 1507 aprint_normal(": 3ware Apache\n"); 1508 1509 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1510 sc->sc_nunits = TWA_MAX_UNITS; 1511 use_64bit = false; 1512 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1513 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1514 aprint_error_dev(&sc->twa_dv, "can't map i/o space\n"); 1515 return; 1516 } 1517 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1518 sc->sc_nunits = TWA_MAX_UNITS; 1519 use_64bit = true; 1520 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1521 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1522 &sc->twa_bus_ioh, NULL, NULL)) { 1523 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1524 return; 1525 } 1526 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1527 sc->sc_nunits = TWA_9650_MAX_UNITS; 1528 use_64bit = true; 1529 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1530 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1531 &sc->twa_bus_ioh, NULL, NULL)) { 1532 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1533 return; 1534 } 1535 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1536 sc->sc_nunits = TWA_9690_MAX_UNITS; 1537 use_64bit = true; 1538 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1539 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1540 &sc->twa_bus_ioh, NULL, NULL)) { 1541 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1542 return; 1543 } 1544 } else { 1545 sc->sc_nunits = 0; 1546 use_64bit = false; 1547 aprint_error_dev(&sc->twa_dv, "product id 0x%02x not recognized\n", 1548 PCI_PRODUCT(pa->pa_id)); 1549 return; 1550 } 1551 1552 if (pci_dma64_available(pa) && use_64bit) { 1553 aprint_verbose_dev(self, "64bit DMA addressing active"); 1554 sc->twa_dma_tag = pa->pa_dmat64; 1555 } else { 1556 sc->twa_dma_tag = pa->pa_dmat; 1557 } 1558 1559 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1560 /* Enable the device. */ 1561 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1562 1563 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1564 csr | PCI_COMMAND_MASTER_ENABLE); 1565 1566 /* Map and establish the interrupt. */ 1567 if (pci_intr_map(pa, &ih)) { 1568 aprint_error_dev(&sc->twa_dv, "can't map interrupt\n"); 1569 return; 1570 } 1571 intrstr = pci_intr_string(pc, ih); 1572 1573 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1574 if (sc->twa_ih == NULL) { 1575 aprint_error_dev(&sc->twa_dv, "can't establish interrupt%s%s\n", 1576 (intrstr) ? " at " : "", 1577 (intrstr) ? intrstr : ""); 1578 return; 1579 } 1580 1581 if (intrstr != NULL) 1582 aprint_normal_dev(&sc->twa_dv, "interrupting at %s\n", 1583 intrstr); 1584 1585 twa_setup(sc); 1586 1587 if (twa_sdh == NULL) 1588 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1589 1590 /* sysctl set-up for 3ware cli */ 1591 if (sysctl_createv(NULL, 0, NULL, NULL, 1592 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1593 NULL, NULL, 0, NULL, 0, 1594 CTL_HW, CTL_EOL) != 0) { 1595 aprint_error_dev(&sc->twa_dv, "could not create %s sysctl node\n", 1596 "hw"); 1597 return; 1598 } 1599 if (sysctl_createv(NULL, 0, NULL, &node, 1600 0, CTLTYPE_NODE, device_xname(&sc->twa_dv), 1601 SYSCTL_DESCR("twa driver information"), 1602 NULL, 0, NULL, 0, 1603 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1604 aprint_error_dev(&sc->twa_dv, "could not create %s.%s sysctl node\n", 1605 "hw", 1606 device_xname(&sc->twa_dv)); 1607 return; 1608 } 1609 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1610 0, CTLTYPE_STRING, "driver_version", 1611 SYSCTL_DESCR("twa driver version"), 1612 NULL, 0, &twaver, 0, 1613 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1614 != 0) { 1615 aprint_error_dev(&sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1616 "hw", 1617 device_xname(&sc->twa_dv)); 1618 return; 1619 } 1620 1621 return; 1622 } 1623 1624 static void 1625 twa_shutdown(void *arg) 1626 { 1627 extern struct cfdriver twa_cd; 1628 struct twa_softc *sc; 1629 int i, rv, unit; 1630 1631 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1632 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1633 continue; 1634 1635 for (unit = 0; unit < sc->sc_nunits; unit++) 1636 if (sc->sc_units[unit].td_dev != NULL) 1637 (void) config_detach(sc->sc_units[unit].td_dev, 1638 DETACH_FORCE | DETACH_QUIET); 1639 1640 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1641 TWA_CONTROL_DISABLE_INTERRUPTS); 1642 1643 /* Let the controller know that we are going down. */ 1644 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1645 0, 0, 0, 0, 0, 1646 NULL, NULL, NULL, NULL, NULL); 1647 } 1648 } 1649 1650 void 1651 twa_register_callbacks(struct twa_softc *sc, int unit, 1652 const struct twa_callbacks *tcb) 1653 { 1654 1655 sc->sc_units[unit].td_callbacks = tcb; 1656 } 1657 1658 /* 1659 * Print autoconfiguration message for a sub-device 1660 */ 1661 static int 1662 twa_print(void *aux, const char *pnp) 1663 { 1664 struct twa_attach_args *twaa; 1665 1666 twaa = aux; 1667 1668 if (pnp !=NULL) 1669 aprint_normal("block device at %s\n", pnp); 1670 aprint_normal(" unit %d\n", twaa->twaa_unit); 1671 return (UNCONF); 1672 } 1673 1674 static void 1675 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1676 { 1677 int i; 1678 for (i = 0; i < nsegments; i++) { 1679 sgl[i].address = segs[i].ds_addr; 1680 sgl[i].length = (uint32_t)(segs[i].ds_len); 1681 } 1682 } 1683 1684 static int 1685 twa_submit_io(struct twa_request *tr) 1686 { 1687 int error; 1688 1689 if ((error = twa_start(tr))) { 1690 if (error == EBUSY) 1691 error = 0; /* request is in the pending queue */ 1692 else { 1693 tr->tr_error = error; 1694 } 1695 } 1696 return(error); 1697 } 1698 1699 /* 1700 * Function name: twa_setup_data_dmamap 1701 * Description: Callback of bus_dmamap_load for the buffer associated 1702 * with data. Updates the cmd pkt (size/sgl_entries 1703 * fields, as applicable) to reflect the number of sg 1704 * elements. 1705 * 1706 * Input: arg -- ptr to request pkt 1707 * segs -- ptr to a list of segment descriptors 1708 * nsegments--# of segments 1709 * error -- 0 if no errors encountered before callback, 1710 * non-zero if errors were encountered 1711 * Output: None 1712 * Return value: None 1713 */ 1714 static int 1715 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1716 { 1717 struct twa_request *tr = (struct twa_request *)arg; 1718 struct twa_command_packet *cmdpkt = tr->tr_command; 1719 struct twa_command_9k *cmd9k; 1720 union twa_command_7k *cmd7k; 1721 uint8_t sgl_offset; 1722 int error; 1723 1724 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1725 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1726 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1727 cmd9k->sgl_entries += nsegments - 1; 1728 } else { 1729 /* It's a 7000 command packet. */ 1730 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1731 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1732 twa_fillin_sgl((struct twa_sg *) 1733 (((uint32_t *)cmd7k) + sgl_offset), 1734 segs, nsegments); 1735 /* Modify the size field, based on sg address size. */ 1736 cmd7k->generic.size += 1737 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1738 } 1739 if (tr->tr_flags & TWA_CMD_DATA_IN) 1740 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1741 tr->tr_length, BUS_DMASYNC_PREWRITE); 1742 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1743 /* 1744 * If we're using an alignment buffer, and we're 1745 * writing data, copy the real data out. 1746 */ 1747 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1748 memcpy(tr->tr_data, tr->tr_real_data, 1749 tr->tr_real_length); 1750 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1751 tr->tr_length, BUS_DMASYNC_PREREAD); 1752 } 1753 error = twa_submit_io(tr); 1754 1755 if (error) { 1756 twa_unmap_request(tr); 1757 /* 1758 * If the caller had been returned EINPROGRESS, and he has 1759 * registered a callback for handling completion, the callback 1760 * will never get called because we were unable to submit the 1761 * request. So, free up the request right here. 1762 */ 1763 if (tr->tr_callback) 1764 twa_release_request(tr); 1765 } 1766 return (error); 1767 } 1768 1769 /* 1770 * Function name: twa_map_request 1771 * Description: Maps a cmd pkt and data associated with it, into 1772 * DMA'able memory. 1773 * 1774 * Input: tr -- ptr to request pkt 1775 * Output: None 1776 * Return value: 0 -- success 1777 * non-zero-- failure 1778 */ 1779 int 1780 twa_map_request(struct twa_request *tr) 1781 { 1782 struct twa_softc *sc = tr->tr_sc; 1783 int s, rv; 1784 1785 /* If the command involves data, map that too. */ 1786 if (tr->tr_data != NULL) { 1787 1788 if (((u_long)tr->tr_data & (511)) != 0) { 1789 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1790 tr->tr_real_data = tr->tr_data; 1791 tr->tr_real_length = tr->tr_length; 1792 s = splvm(); 1793 tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1794 tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1795 splx(s); 1796 1797 if (tr->tr_data == NULL) { 1798 tr->tr_data = tr->tr_real_data; 1799 tr->tr_length = tr->tr_real_length; 1800 return(ENOMEM); 1801 } 1802 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1803 memcpy(tr->tr_data, tr->tr_real_data, 1804 tr->tr_length); 1805 } 1806 1807 /* 1808 * Map the data buffer into bus space and build the S/G list. 1809 */ 1810 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1811 tr->tr_data, tr->tr_length, NULL, 1812 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1813 1814 if (rv != 0) { 1815 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1816 s = splvm(); 1817 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1818 tr->tr_length, UVM_KMF_WIRED); 1819 splx(s); 1820 } 1821 return (rv); 1822 } 1823 1824 if ((rv = twa_setup_data_dmamap(tr, 1825 tr->tr_dma_map->dm_segs, 1826 tr->tr_dma_map->dm_nsegs))) { 1827 1828 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1829 s = splvm(); 1830 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1831 tr->tr_length, UVM_KMF_WIRED); 1832 splx(s); 1833 tr->tr_data = tr->tr_real_data; 1834 tr->tr_length = tr->tr_real_length; 1835 } 1836 } 1837 1838 } else 1839 if ((rv = twa_submit_io(tr))) 1840 twa_unmap_request(tr); 1841 1842 return (rv); 1843 } 1844 1845 /* 1846 * Function name: twa_intr 1847 * Description: Interrupt handler. Determines the kind of interrupt, 1848 * and calls the appropriate handler. 1849 * 1850 * Input: sc -- ptr to per ctlr structure 1851 * Output: None 1852 * Return value: None 1853 */ 1854 1855 static int 1856 twa_intr(void *arg) 1857 { 1858 int caught, s, rv; 1859 struct twa_softc *sc; 1860 uint32_t status_reg; 1861 sc = (struct twa_softc *)arg; 1862 1863 caught = 0; 1864 /* Collect current interrupt status. */ 1865 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1866 if (twa_check_ctlr_state(sc, status_reg)) { 1867 caught = 1; 1868 goto bail; 1869 } 1870 /* Dispatch based on the kind of interrupt. */ 1871 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1872 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1873 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1874 caught = 1; 1875 } 1876 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1877 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1878 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1879 rv = twa_fetch_aen(sc); 1880 #ifdef DIAGNOSTIC 1881 if (rv != 0) 1882 printf("%s: unable to retrieve AEN (%d)\n", 1883 device_xname(&sc->twa_dv), rv); 1884 #endif 1885 caught = 1; 1886 } 1887 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1888 /* Start any requests that might be in the pending queue. */ 1889 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1890 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1891 (void)twa_drain_pending_queue(sc); 1892 caught = 1; 1893 } 1894 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1895 s = splbio(); 1896 twa_done(sc); 1897 splx(s); 1898 caught = 1; 1899 } 1900 bail: 1901 return (caught); 1902 } 1903 1904 /* 1905 * Accept an open operation on the control device. 1906 */ 1907 static int 1908 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1909 { 1910 struct twa_softc *twa; 1911 1912 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1913 return (ENXIO); 1914 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1915 return (EBUSY); 1916 1917 twa->twa_sc_flags |= TWA_STATE_OPEN; 1918 1919 return (0); 1920 } 1921 1922 /* 1923 * Accept the last close on the control device. 1924 */ 1925 static int 1926 twaclose(dev_t dev, int flag, int mode, 1927 struct lwp *l) 1928 { 1929 struct twa_softc *twa; 1930 1931 twa = device_lookup_private(&twa_cd, minor(dev)); 1932 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1933 return (0); 1934 } 1935 1936 /* 1937 * Function name: twaioctl 1938 * Description: ioctl handler. 1939 * 1940 * Input: sc -- ptr to per ctlr structure 1941 * cmd -- ioctl cmd 1942 * buf -- ptr to buffer in kernel memory, which is 1943 * a copy of the input buffer in user-space 1944 * Output: buf -- ptr to buffer in kernel memory, which will 1945 * be copied of the output buffer in user-space 1946 * Return value: 0 -- success 1947 * non-zero-- failure 1948 */ 1949 static int 1950 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1951 struct lwp *l) 1952 { 1953 struct twa_softc *sc; 1954 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1955 struct tw_cl_event_packet event_buf; 1956 struct twa_request *tr = 0; 1957 int32_t event_index = 0; 1958 int32_t start_index; 1959 int s, error = 0; 1960 1961 sc = device_lookup_private(&twa_cd, minor(dev)); 1962 1963 switch (cmd) { 1964 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1965 { 1966 struct twa_command_packet *cmdpkt; 1967 uint32_t data_buf_size_adjusted; 1968 1969 /* Get a request packet */ 1970 tr = twa_get_request_wait(sc, 0); 1971 KASSERT(tr != NULL); 1972 /* 1973 * Make sure that the data buffer sent to firmware is a 1974 * 512 byte multiple in size. 1975 */ 1976 data_buf_size_adjusted = 1977 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1978 1979 if ((tr->tr_length = data_buf_size_adjusted)) { 1980 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1981 M_DEVBUF, M_WAITOK)) == NULL) { 1982 error = ENOMEM; 1983 goto fw_passthru_done; 1984 } 1985 /* Copy the payload. */ 1986 if ((error = copyin((void *) (user_buf->pdata), 1987 (void *) (tr->tr_data), 1988 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 1989 goto fw_passthru_done; 1990 } 1991 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 1992 } 1993 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 1994 cmdpkt = tr->tr_command; 1995 1996 /* Copy the command packet. */ 1997 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 1998 sizeof(struct twa_command_packet)); 1999 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2000 tr->tr_request_id; 2001 2002 /* Send down the request, and wait for it to complete. */ 2003 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2004 if (error == ETIMEDOUT) 2005 break; /* clean-up done by twa_wait_request */ 2006 goto fw_passthru_done; 2007 } 2008 2009 /* Copy the command packet back into user space. */ 2010 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2011 sizeof(struct twa_command_packet)); 2012 2013 /* If there was a payload, copy it back too. */ 2014 if (tr->tr_length) 2015 error = copyout(tr->tr_data, user_buf->pdata, 2016 user_buf->twa_drvr_pkt.buffer_length); 2017 fw_passthru_done: 2018 /* Free resources. */ 2019 if (tr->tr_data) 2020 free(tr->tr_data, M_DEVBUF); 2021 2022 if (tr) 2023 twa_release_request(tr); 2024 break; 2025 } 2026 2027 case TW_OSL_IOCTL_SCAN_BUS: 2028 twa_request_bus_scan(sc); 2029 break; 2030 2031 case TW_CL_IOCTL_GET_FIRST_EVENT: 2032 if (sc->twa_aen_queue_wrapped) { 2033 if (sc->twa_aen_queue_overflow) { 2034 /* 2035 * The aen queue has wrapped, even before some 2036 * events have been retrieved. Let the caller 2037 * know that he missed out on some AEN's. 2038 */ 2039 user_buf->twa_drvr_pkt.status = 2040 TWA_ERROR_AEN_OVERFLOW; 2041 sc->twa_aen_queue_overflow = FALSE; 2042 } else 2043 user_buf->twa_drvr_pkt.status = 0; 2044 event_index = sc->twa_aen_head; 2045 } else { 2046 if (sc->twa_aen_head == sc->twa_aen_tail) { 2047 user_buf->twa_drvr_pkt.status = 2048 TWA_ERROR_AEN_NO_EVENTS; 2049 break; 2050 } 2051 user_buf->twa_drvr_pkt.status = 0; 2052 event_index = sc->twa_aen_tail; /* = 0 */ 2053 } 2054 if ((error = copyout(sc->twa_aen_queue[event_index], 2055 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2056 (sc->twa_aen_queue[event_index])->retrieved = 2057 TWA_AEN_RETRIEVED; 2058 break; 2059 2060 case TW_CL_IOCTL_GET_LAST_EVENT: 2061 if (sc->twa_aen_queue_wrapped) { 2062 if (sc->twa_aen_queue_overflow) { 2063 /* 2064 * The aen queue has wrapped, even before some 2065 * events have been retrieved. Let the caller 2066 * know that he missed out on some AEN's. 2067 */ 2068 user_buf->twa_drvr_pkt.status = 2069 TWA_ERROR_AEN_OVERFLOW; 2070 sc->twa_aen_queue_overflow = FALSE; 2071 } else 2072 user_buf->twa_drvr_pkt.status = 0; 2073 } else { 2074 if (sc->twa_aen_head == sc->twa_aen_tail) { 2075 user_buf->twa_drvr_pkt.status = 2076 TWA_ERROR_AEN_NO_EVENTS; 2077 break; 2078 } 2079 user_buf->twa_drvr_pkt.status = 0; 2080 } 2081 event_index = 2082 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2083 if ((error = copyout(sc->twa_aen_queue[event_index], 2084 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2085 (sc->twa_aen_queue[event_index])->retrieved = 2086 TWA_AEN_RETRIEVED; 2087 break; 2088 2089 case TW_CL_IOCTL_GET_NEXT_EVENT: 2090 user_buf->twa_drvr_pkt.status = 0; 2091 if (sc->twa_aen_queue_wrapped) { 2092 2093 if (sc->twa_aen_queue_overflow) { 2094 /* 2095 * The aen queue has wrapped, even before some 2096 * events have been retrieved. Let the caller 2097 * know that he missed out on some AEN's. 2098 */ 2099 user_buf->twa_drvr_pkt.status = 2100 TWA_ERROR_AEN_OVERFLOW; 2101 sc->twa_aen_queue_overflow = FALSE; 2102 } 2103 start_index = sc->twa_aen_head; 2104 } else { 2105 if (sc->twa_aen_head == sc->twa_aen_tail) { 2106 user_buf->twa_drvr_pkt.status = 2107 TWA_ERROR_AEN_NO_EVENTS; 2108 break; 2109 } 2110 start_index = sc->twa_aen_tail; /* = 0 */ 2111 } 2112 error = copyin(user_buf->pdata, &event_buf, 2113 sizeof(struct tw_cl_event_packet)); 2114 2115 event_index = (start_index + event_buf.sequence_id - 2116 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2117 % TWA_Q_LENGTH; 2118 2119 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2120 event_buf.sequence_id)) { 2121 if (user_buf->twa_drvr_pkt.status == 2122 TWA_ERROR_AEN_OVERFLOW) 2123 /* so we report the overflow next time */ 2124 sc->twa_aen_queue_overflow = TRUE; 2125 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2126 break; 2127 } 2128 if ((error = copyout(sc->twa_aen_queue[event_index], 2129 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2130 (sc->twa_aen_queue[event_index])->retrieved = 2131 TWA_AEN_RETRIEVED; 2132 break; 2133 2134 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2135 user_buf->twa_drvr_pkt.status = 0; 2136 if (sc->twa_aen_queue_wrapped) { 2137 if (sc->twa_aen_queue_overflow) { 2138 /* 2139 * The aen queue has wrapped, even before some 2140 * events have been retrieved. Let the caller 2141 * know that he missed out on some AEN's. 2142 */ 2143 user_buf->twa_drvr_pkt.status = 2144 TWA_ERROR_AEN_OVERFLOW; 2145 sc->twa_aen_queue_overflow = FALSE; 2146 } 2147 start_index = sc->twa_aen_head; 2148 } else { 2149 if (sc->twa_aen_head == sc->twa_aen_tail) { 2150 user_buf->twa_drvr_pkt.status = 2151 TWA_ERROR_AEN_NO_EVENTS; 2152 break; 2153 } 2154 start_index = sc->twa_aen_tail; /* = 0 */ 2155 } 2156 if ((error = copyin(user_buf->pdata, &event_buf, 2157 sizeof(struct tw_cl_event_packet))) != 0) 2158 2159 event_index = (start_index + event_buf.sequence_id - 2160 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2161 % TWA_Q_LENGTH; 2162 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2163 event_buf.sequence_id)) { 2164 if (user_buf->twa_drvr_pkt.status == 2165 TWA_ERROR_AEN_OVERFLOW) 2166 /* so we report the overflow next time */ 2167 sc->twa_aen_queue_overflow = TRUE; 2168 user_buf->twa_drvr_pkt.status = 2169 TWA_ERROR_AEN_NO_EVENTS; 2170 break; 2171 } 2172 if ((error = copyout(sc->twa_aen_queue [event_index], 2173 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2174 aprint_error_dev(&sc->twa_dv, "get_previous: Could not copyout to " 2175 "event_buf. error = %x\n", 2176 error); 2177 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2178 break; 2179 2180 case TW_CL_IOCTL_GET_LOCK: 2181 { 2182 struct tw_cl_lock_packet twa_lock; 2183 2184 copyin(user_buf->pdata, &twa_lock, 2185 sizeof(struct tw_cl_lock_packet)); 2186 s = splbio(); 2187 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2188 (twa_lock.force_flag) || 2189 (time_second >= sc->twa_ioctl_lock.timeout)) { 2190 2191 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2192 sc->twa_ioctl_lock.timeout = time_second + 2193 (twa_lock.timeout_msec / 1000); 2194 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2195 user_buf->twa_drvr_pkt.status = 0; 2196 } else { 2197 twa_lock.time_remaining_msec = 2198 (sc->twa_ioctl_lock.timeout - time_second) * 2199 1000; 2200 user_buf->twa_drvr_pkt.status = 2201 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2202 } 2203 splx(s); 2204 copyout(&twa_lock, user_buf->pdata, 2205 sizeof(struct tw_cl_lock_packet)); 2206 break; 2207 } 2208 2209 case TW_CL_IOCTL_RELEASE_LOCK: 2210 s = splbio(); 2211 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2212 user_buf->twa_drvr_pkt.status = 2213 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2214 } else { 2215 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2216 user_buf->twa_drvr_pkt.status = 0; 2217 } 2218 splx(s); 2219 break; 2220 2221 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2222 { 2223 struct tw_cl_compatibility_packet comp_pkt; 2224 2225 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2226 sizeof(TWA_DRIVER_VERSION_STRING)); 2227 comp_pkt.working_srl = sc->working_srl; 2228 comp_pkt.working_branch = sc->working_branch; 2229 comp_pkt.working_build = sc->working_build; 2230 user_buf->twa_drvr_pkt.status = 0; 2231 2232 /* Copy compatibility information to user space. */ 2233 copyout(&comp_pkt, user_buf->pdata, 2234 min(sizeof(struct tw_cl_compatibility_packet), 2235 user_buf->twa_drvr_pkt.buffer_length)); 2236 break; 2237 } 2238 2239 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2240 { 2241 struct twa_unitname *tn; 2242 struct twa_drive *tdr; 2243 2244 tn = (struct twa_unitname *)data; 2245 /* XXX mutex */ 2246 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2247 return (EINVAL); 2248 tdr = &sc->sc_units[tn->tn_unit]; 2249 if (tdr->td_dev == NULL) 2250 tn->tn_name[0] = '\0'; 2251 else 2252 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2253 sizeof(tn->tn_name)); 2254 return (0); 2255 } 2256 2257 default: 2258 /* Unknown opcode. */ 2259 error = ENOTTY; 2260 } 2261 2262 return(error); 2263 } 2264 2265 const struct cdevsw twa_cdevsw = { 2266 twaopen, twaclose, noread, nowrite, twaioctl, 2267 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2268 }; 2269 2270 /* 2271 * Function name: twa_get_param 2272 * Description: Get a firmware parameter. 2273 * 2274 * Input: sc -- ptr to per ctlr structure 2275 * table_id -- parameter table # 2276 * param_id -- index of the parameter in the table 2277 * param_size -- size of the parameter in bytes 2278 * callback -- ptr to function, if any, to be called 2279 * back on completion; NULL if no callback. 2280 * Output: None 2281 * Return value: ptr to param structure -- success 2282 * NULL -- failure 2283 */ 2284 static int 2285 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2286 size_t param_size, void (* callback)(struct twa_request *tr), 2287 struct twa_param_9k **param) 2288 { 2289 int rv = 0; 2290 struct twa_request *tr; 2291 union twa_command_7k *cmd; 2292 2293 /* Get a request packet. */ 2294 if ((tr = twa_get_request(sc, 0)) == NULL) { 2295 rv = EAGAIN; 2296 goto out; 2297 } 2298 2299 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2300 2301 /* Allocate memory to read data into. */ 2302 if ((*param = (struct twa_param_9k *) 2303 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2304 rv = ENOMEM; 2305 goto out; 2306 } 2307 2308 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2309 tr->tr_data = *param; 2310 tr->tr_length = TWA_SECTOR_SIZE; 2311 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2312 2313 /* Build the cmd pkt. */ 2314 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2315 2316 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2317 2318 cmd->param.opcode = TWA_OP_GET_PARAM; 2319 cmd->param.sgl_offset = 2; 2320 cmd->param.size = 2; 2321 cmd->param.request_id = tr->tr_request_id; 2322 cmd->param.unit = 0; 2323 cmd->param.param_count = 1; 2324 2325 /* Specify which parameter we need. */ 2326 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2327 (*param)->parameter_id = param_id; 2328 (*param)->parameter_size_bytes = param_size; 2329 2330 /* Submit the command. */ 2331 if (callback == NULL) { 2332 /* There's no call back; wait till the command completes. */ 2333 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2334 2335 if (rv != 0) 2336 goto out; 2337 2338 if ((rv = cmd->param.status) != 0) { 2339 /* twa_drain_complete_queue will have done the unmapping */ 2340 goto out; 2341 } 2342 twa_release_request(tr); 2343 return (rv); 2344 } else { 2345 /* There's a call back. Simply submit the command. */ 2346 tr->tr_callback = callback; 2347 rv = twa_map_request(tr); 2348 return (rv); 2349 } 2350 out: 2351 if (tr) 2352 twa_release_request(tr); 2353 return(rv); 2354 } 2355 2356 /* 2357 * Function name: twa_set_param 2358 * Description: Set a firmware parameter. 2359 * 2360 * Input: sc -- ptr to per ctlr structure 2361 * table_id -- parameter table # 2362 * param_id -- index of the parameter in the table 2363 * param_size -- size of the parameter in bytes 2364 * callback -- ptr to function, if any, to be called 2365 * back on completion; NULL if no callback. 2366 * Output: None 2367 * Return value: 0 -- success 2368 * non-zero-- failure 2369 */ 2370 static int 2371 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2372 void *data, void (* callback)(struct twa_request *tr)) 2373 { 2374 struct twa_request *tr; 2375 union twa_command_7k *cmd; 2376 struct twa_param_9k *param = NULL; 2377 int error = ENOMEM; 2378 2379 tr = twa_get_request(sc, 0); 2380 if (tr == NULL) 2381 return (EAGAIN); 2382 2383 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2384 2385 /* Allocate memory to send data using. */ 2386 if ((param = (struct twa_param_9k *) 2387 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2388 goto out; 2389 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2390 tr->tr_data = param; 2391 tr->tr_length = TWA_SECTOR_SIZE; 2392 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2393 2394 /* Build the cmd pkt. */ 2395 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2396 2397 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2398 2399 cmd->param.opcode = TWA_OP_SET_PARAM; 2400 cmd->param.sgl_offset = 2; 2401 cmd->param.size = 2; 2402 cmd->param.request_id = tr->tr_request_id; 2403 cmd->param.unit = 0; 2404 cmd->param.param_count = 1; 2405 2406 /* Specify which parameter we want to set. */ 2407 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2408 param->parameter_id = param_id; 2409 param->parameter_size_bytes = param_size; 2410 memcpy(param->data, data, param_size); 2411 2412 /* Submit the command. */ 2413 if (callback == NULL) { 2414 /* There's no call back; wait till the command completes. */ 2415 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2416 if (error == ETIMEDOUT) 2417 /* clean-up done by twa_immediate_request */ 2418 return(error); 2419 if (error) 2420 goto out; 2421 if ((error = cmd->param.status)) { 2422 /* 2423 * twa_drain_complete_queue will have done the 2424 * unmapping. 2425 */ 2426 goto out; 2427 } 2428 free(param, M_DEVBUF); 2429 twa_release_request(tr); 2430 return(error); 2431 } else { 2432 /* There's a call back. Simply submit the command. */ 2433 tr->tr_callback = callback; 2434 if ((error = twa_map_request(tr))) 2435 goto out; 2436 2437 return (0); 2438 } 2439 out: 2440 if (param) 2441 free(param, M_DEVBUF); 2442 if (tr) 2443 twa_release_request(tr); 2444 return(error); 2445 } 2446 2447 /* 2448 * Function name: twa_init_connection 2449 * Description: Send init_connection cmd to firmware 2450 * 2451 * Input: sc -- ptr to per ctlr structure 2452 * message_credits -- max # of requests that we might send 2453 * down simultaneously. This will be 2454 * typically set to 256 at init-time or 2455 * after a reset, and to 1 at shutdown-time 2456 * set_features -- indicates if we intend to use 64-bit 2457 * sg, also indicates if we want to do a 2458 * basic or an extended init_connection; 2459 * 2460 * Note: The following input/output parameters are valid, only in case of an 2461 * extended init_connection: 2462 * 2463 * current_fw_srl -- srl of fw we are bundled 2464 * with, if any; 0 otherwise 2465 * current_fw_arch_id -- arch_id of fw we are bundled 2466 * with, if any; 0 otherwise 2467 * current_fw_branch -- branch # of fw we are bundled 2468 * with, if any; 0 otherwise 2469 * current_fw_build -- build # of fw we are bundled 2470 * with, if any; 0 otherwise 2471 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2472 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2473 * fw_on_ctlr_branch -- branch # of fw on ctlr 2474 * fw_on_ctlr_build -- build # of fw on ctlr 2475 * init_connect_result -- result bitmap of fw response 2476 * Return value: 0 -- success 2477 * non-zero-- failure 2478 */ 2479 static int 2480 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2481 uint32_t set_features, uint16_t current_fw_srl, 2482 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2483 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2484 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2485 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2486 { 2487 struct twa_request *tr; 2488 struct twa_command_init_connect *init_connect; 2489 int error = 1; 2490 2491 /* Get a request packet. */ 2492 if ((tr = twa_get_request(sc, 0)) == NULL) 2493 goto out; 2494 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2495 /* Build the cmd pkt. */ 2496 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2497 2498 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2499 2500 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2501 init_connect->request_id = tr->tr_request_id; 2502 init_connect->message_credits = message_credits; 2503 init_connect->features = set_features; 2504 if (TWA_64BIT_ADDRESSES) 2505 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2506 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2507 /* 2508 * Fill in the extra fields needed for 2509 * an extended init_connect. 2510 */ 2511 init_connect->size = 6; 2512 init_connect->fw_srl = current_fw_srl; 2513 init_connect->fw_arch_id = current_fw_arch_id; 2514 init_connect->fw_branch = current_fw_branch; 2515 } else 2516 init_connect->size = 3; 2517 2518 /* Submit the command, and wait for it to complete. */ 2519 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2520 if (error == ETIMEDOUT) 2521 return(error); /* clean-up done by twa_immediate_request */ 2522 if (error) 2523 goto out; 2524 if ((error = init_connect->status)) { 2525 /* twa_drain_complete_queue will have done the unmapping */ 2526 goto out; 2527 } 2528 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2529 *fw_on_ctlr_srl = init_connect->fw_srl; 2530 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2531 *fw_on_ctlr_branch = init_connect->fw_branch; 2532 *fw_on_ctlr_build = init_connect->fw_build; 2533 *init_connect_result = init_connect->result; 2534 } 2535 twa_release_request(tr); 2536 return(error); 2537 2538 out: 2539 if (tr) 2540 twa_release_request(tr); 2541 return(error); 2542 } 2543 2544 static int 2545 twa_reset(struct twa_softc *sc) 2546 { 2547 int s; 2548 int error = 0; 2549 2550 /* Set the 'in reset' flag. */ 2551 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2552 2553 /* 2554 * Disable interrupts from the controller, and mask any 2555 * accidental entry into our interrupt handler. 2556 */ 2557 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2558 TWA_CONTROL_DISABLE_INTERRUPTS); 2559 2560 s = splbio(); 2561 2562 /* Soft reset the controller. */ 2563 if ((error = twa_soft_reset(sc))) 2564 goto out; 2565 2566 /* Re-establish logical connection with the controller. */ 2567 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2568 0, 0, 0, 0, 0, 2569 NULL, NULL, NULL, NULL, NULL))) { 2570 goto out; 2571 } 2572 /* 2573 * Complete all requests in the complete queue; error back all requests 2574 * in the busy queue. Any internal requests will be simply freed. 2575 * Re-submit any requests in the pending queue. 2576 */ 2577 twa_drain_busy_queue(sc); 2578 2579 out: 2580 splx(s); 2581 /* 2582 * Enable interrupts, and also clear attention and response interrupts. 2583 */ 2584 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2585 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2586 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2587 TWA_CONTROL_ENABLE_INTERRUPTS); 2588 2589 /* Clear the 'in reset' flag. */ 2590 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2591 2592 return(error); 2593 } 2594 2595 static int 2596 twa_soft_reset(struct twa_softc *sc) 2597 { 2598 uint32_t status_reg; 2599 2600 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2601 TWA_CONTROL_ISSUE_SOFT_RESET | 2602 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2603 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2604 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2605 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2606 TWA_CONTROL_DISABLE_INTERRUPTS); 2607 2608 if (twa_drain_response_queue_large(sc, 30) != 0) { 2609 aprint_error_dev(&sc->twa_dv, 2610 "response queue not empty after reset.\n"); 2611 return(1); 2612 } 2613 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2614 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2615 aprint_error_dev(&sc->twa_dv, "no attention interrupt after reset.\n"); 2616 return(1); 2617 } 2618 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2619 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2620 2621 if (twa_drain_response_queue(sc)) { 2622 aprint_error_dev(&sc->twa_dv, "cannot drain response queue.\n"); 2623 return(1); 2624 } 2625 if (twa_drain_aen_queue(sc)) { 2626 aprint_error_dev(&sc->twa_dv, "cannot drain AEN queue.\n"); 2627 return(1); 2628 } 2629 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2630 aprint_error_dev(&sc->twa_dv, "reset not reported by controller.\n"); 2631 return(1); 2632 } 2633 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2634 if (TWA_STATUS_ERRORS(status_reg) || 2635 twa_check_ctlr_state(sc, status_reg)) { 2636 aprint_error_dev(&sc->twa_dv, "controller errors detected.\n"); 2637 return(1); 2638 } 2639 return(0); 2640 } 2641 2642 static int 2643 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2644 { 2645 struct timeval t1; 2646 time_t end_time; 2647 uint32_t status_reg; 2648 2649 timeout = (timeout * 1000 * 100); 2650 2651 microtime(&t1); 2652 2653 end_time = t1.tv_usec + timeout; 2654 2655 do { 2656 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2657 /* got the required bit(s)? */ 2658 if ((status_reg & status) == status) 2659 return(0); 2660 DELAY(100000); 2661 microtime(&t1); 2662 } while (t1.tv_usec <= end_time); 2663 2664 return(1); 2665 } 2666 2667 static int 2668 twa_fetch_aen(struct twa_softc *sc) 2669 { 2670 struct twa_request *tr; 2671 int s, error = 0; 2672 2673 s = splbio(); 2674 2675 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2676 splx(s); 2677 return(EIO); 2678 } 2679 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2680 tr->tr_callback = twa_aen_callback; 2681 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2682 if (twa_request_sense(tr, 0) != 0) { 2683 if (tr->tr_data) 2684 free(tr->tr_data, M_DEVBUF); 2685 twa_release_request(tr); 2686 error = 1; 2687 } 2688 splx(s); 2689 2690 return(error); 2691 } 2692 2693 /* 2694 * Function name: twa_aen_callback 2695 * Description: Callback for requests to fetch AEN's. 2696 * 2697 * Input: tr -- ptr to completed request pkt 2698 * Output: None 2699 * Return value: None 2700 */ 2701 static void 2702 twa_aen_callback(struct twa_request *tr) 2703 { 2704 int i; 2705 int fetch_more_aens = 0; 2706 struct twa_softc *sc = tr->tr_sc; 2707 struct twa_command_header *cmd_hdr = 2708 (struct twa_command_header *)(tr->tr_data); 2709 struct twa_command_9k *cmd = 2710 &(tr->tr_command->command.cmd_pkt_9k); 2711 2712 if (! cmd->status) { 2713 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2714 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2715 if (twa_enqueue_aen(sc, cmd_hdr) 2716 != TWA_AEN_QUEUE_EMPTY) 2717 fetch_more_aens = 1; 2718 } else { 2719 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2720 for (i = 0; i < 18; i++) 2721 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2722 2723 printf(""); /* print new line */ 2724 2725 for (i = 0; i < 128; i++) 2726 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2727 } 2728 if (tr->tr_data) 2729 free(tr->tr_data, M_DEVBUF); 2730 twa_release_request(tr); 2731 2732 if (fetch_more_aens) 2733 twa_fetch_aen(sc); 2734 } 2735 2736 /* 2737 * Function name: twa_enqueue_aen 2738 * Description: Queues AEN's to be supplied to user-space tools on request. 2739 * 2740 * Input: sc -- ptr to per ctlr structure 2741 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2742 * details can be retrieved. 2743 * Output: None 2744 * Return value: None 2745 */ 2746 static uint16_t 2747 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2748 { 2749 int rv, s; 2750 struct tw_cl_event_packet *event; 2751 uint16_t aen_code; 2752 unsigned long sync_time; 2753 2754 s = splbio(); 2755 aen_code = cmd_hdr->status_block.error; 2756 2757 switch (aen_code) { 2758 case TWA_AEN_SYNC_TIME_WITH_HOST: 2759 2760 sync_time = (time_second - (3 * 86400)) % 604800; 2761 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2762 TWA_PARAM_TIME_SchedulerTime, 4, 2763 &sync_time, twa_aen_callback); 2764 #ifdef DIAGNOSTIC 2765 if (rv != 0) 2766 aprint_error_dev(&sc->twa_dv, "unable to sync time with ctlr\n"); 2767 #endif 2768 break; 2769 2770 case TWA_AEN_QUEUE_EMPTY: 2771 break; 2772 2773 default: 2774 /* Queue the event. */ 2775 event = sc->twa_aen_queue[sc->twa_aen_head]; 2776 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2777 sc->twa_aen_queue_overflow = TRUE; 2778 event->severity = 2779 cmd_hdr->status_block.substatus_block.severity; 2780 event->time_stamp_sec = time_second; 2781 event->aen_code = aen_code; 2782 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2783 event->sequence_id = ++(sc->twa_current_sequence_id); 2784 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2785 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2786 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2787 event->parameter_len); 2788 2789 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2790 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2791 device_xname(&sc->twa_dv), 2792 aen_code, 2793 twa_aen_severity_table[event->severity], 2794 twa_find_msg_string(twa_aen_table, aen_code), 2795 event->parameter_data); 2796 } 2797 2798 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2799 sc->twa_aen_queue_wrapped = TRUE; 2800 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2801 break; 2802 } /* switch */ 2803 splx(s); 2804 2805 return (aen_code); 2806 } 2807 2808 /* 2809 * Function name: twa_find_aen 2810 * Description: Reports whether a given AEN ever occurred. 2811 * 2812 * Input: sc -- ptr to per ctlr structure 2813 * aen_code-- AEN to look for 2814 * Output: None 2815 * Return value: 0 -- success 2816 * non-zero-- failure 2817 */ 2818 static int 2819 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2820 { 2821 uint32_t last_index; 2822 int s; 2823 int i; 2824 2825 s = splbio(); 2826 2827 if (sc->twa_aen_queue_wrapped) 2828 last_index = sc->twa_aen_head; 2829 else 2830 last_index = 0; 2831 2832 i = sc->twa_aen_head; 2833 do { 2834 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2835 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2836 splx(s); 2837 return(0); 2838 } 2839 } while (i != last_index); 2840 2841 splx(s); 2842 return(1); 2843 } 2844 2845 static inline void 2846 twa_request_init(struct twa_request *tr, int flags) 2847 { 2848 tr->tr_data = NULL; 2849 tr->tr_real_data = NULL; 2850 tr->tr_length = 0; 2851 tr->tr_real_length = 0; 2852 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2853 tr->tr_flags = flags; 2854 tr->tr_error = 0; 2855 tr->tr_callback = NULL; 2856 tr->tr_cmd_pkt_type = 0; 2857 tr->bp = 0; 2858 2859 /* 2860 * Look at the status field in the command packet to see how 2861 * it completed the last time it was used, and zero out only 2862 * the portions that might have changed. Note that we don't 2863 * care to zero out the sglist. 2864 */ 2865 if (tr->tr_command->command.cmd_pkt_9k.status) 2866 memset(tr->tr_command, 0, 2867 sizeof(struct twa_command_header) + 28); 2868 else 2869 memset(&(tr->tr_command->command), 0, 28); 2870 } 2871 2872 struct twa_request * 2873 twa_get_request_wait(struct twa_softc *sc, int flags) 2874 { 2875 struct twa_request *tr; 2876 int s; 2877 2878 KASSERT((flags & TWA_CMD_AEN) == 0); 2879 2880 s = splbio(); 2881 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2882 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2883 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2884 } 2885 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2886 2887 splx(s); 2888 2889 twa_request_init(tr, flags); 2890 2891 return(tr); 2892 } 2893 2894 struct twa_request * 2895 twa_get_request(struct twa_softc *sc, int flags) 2896 { 2897 int s; 2898 struct twa_request *tr; 2899 2900 /* Get a free request packet. */ 2901 s = splbio(); 2902 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2903 2904 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2905 tr = sc->sc_twa_request; 2906 flags |= TWA_CMD_AEN_BUSY; 2907 } else { 2908 splx(s); 2909 return (NULL); 2910 } 2911 } else { 2912 if (__predict_false((tr = 2913 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2914 splx(s); 2915 return (NULL); 2916 } 2917 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2918 } 2919 splx(s); 2920 2921 twa_request_init(tr, flags); 2922 2923 return(tr); 2924 } 2925 2926 /* 2927 * Print some information about the controller 2928 */ 2929 static void 2930 twa_describe_controller(struct twa_softc *sc) 2931 { 2932 struct twa_param_9k *p[10]; 2933 int i, rv = 0; 2934 uint32_t dsize; 2935 uint8_t ports; 2936 2937 memset(p, sizeof(struct twa_param_9k *), 10); 2938 2939 /* Get the port count. */ 2940 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2941 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2942 2943 /* get version strings */ 2944 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2945 16, NULL, &p[1]); 2946 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2947 16, NULL, &p[2]); 2948 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2949 16, NULL, &p[3]); 2950 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2951 8, NULL, &p[4]); 2952 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2953 8, NULL, &p[5]); 2954 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2955 8, NULL, &p[6]); 2956 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2957 16, NULL, &p[7]); 2958 2959 if (rv) { 2960 /* some error occurred */ 2961 aprint_error_dev(&sc->twa_dv, "failed to fetch version information\n"); 2962 goto bail; 2963 } 2964 2965 ports = *(uint8_t *)(p[0]->data); 2966 2967 aprint_normal_dev(&sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2968 ports, p[1]->data, p[2]->data); 2969 2970 aprint_verbose_dev(&sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2971 p[3]->data, p[4]->data, 2972 p[5]->data, p[6]->data); 2973 2974 for (i = 0; i < ports; i++) { 2975 2976 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2977 continue; 2978 2979 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2980 TWA_PARAM_DRIVEMODELINDEX, 2981 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 2982 2983 if (rv != 0) { 2984 aprint_error_dev(&sc->twa_dv, "unable to get drive model for port" 2985 " %d\n", i); 2986 continue; 2987 } 2988 2989 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2990 TWA_PARAM_DRIVESIZEINDEX, 2991 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 2992 2993 if (rv != 0) { 2994 aprint_error_dev(&sc->twa_dv, "unable to get drive size" 2995 " for port %d\n", i); 2996 free(p[8], M_DEVBUF); 2997 continue; 2998 } 2999 3000 dsize = *(uint32_t *)(p[9]->data); 3001 3002 aprint_verbose_dev(&sc->twa_dv, "port %d: %.40s %d MB\n", 3003 i, p[8]->data, dsize / 2048); 3004 3005 if (p[8]) 3006 free(p[8], M_DEVBUF); 3007 if (p[9]) 3008 free(p[9], M_DEVBUF); 3009 } 3010 bail: 3011 if (p[0]) 3012 free(p[0], M_DEVBUF); 3013 if (p[1]) 3014 free(p[1], M_DEVBUF); 3015 if (p[2]) 3016 free(p[2], M_DEVBUF); 3017 if (p[3]) 3018 free(p[3], M_DEVBUF); 3019 if (p[4]) 3020 free(p[4], M_DEVBUF); 3021 if (p[5]) 3022 free(p[5], M_DEVBUF); 3023 if (p[6]) 3024 free(p[6], M_DEVBUF); 3025 } 3026 3027 /* 3028 * Function name: twa_check_ctlr_state 3029 * Description: Makes sure that the fw status register reports a 3030 * proper status. 3031 * 3032 * Input: sc -- ptr to per ctlr structure 3033 * status_reg -- value in the status register 3034 * Output: None 3035 * Return value: 0 -- no errors 3036 * non-zero-- errors 3037 */ 3038 static int 3039 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3040 { 3041 int result = 0; 3042 struct timeval t1; 3043 static time_t last_warning[2] = {0, 0}; 3044 3045 /* Check if the 'micro-controller ready' bit is not set. */ 3046 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3047 TWA_STATUS_EXPECTED_BITS) { 3048 3049 microtime(&t1); 3050 3051 last_warning[0] += (5 * 1000 * 100); 3052 3053 if (t1.tv_usec > last_warning[0]) { 3054 microtime(&t1); 3055 last_warning[0] = t1.tv_usec; 3056 } 3057 result = 1; 3058 } 3059 3060 /* Check if any error bits are set. */ 3061 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3062 3063 microtime(&t1); 3064 last_warning[1] += (5 * 1000 * 100); 3065 if (t1.tv_usec > last_warning[1]) { 3066 microtime(&t1); 3067 last_warning[1] = t1.tv_usec; 3068 } 3069 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3070 aprint_error_dev(&sc->twa_dv, "clearing PCI parity error " 3071 "re-seat/move/replace card.\n"); 3072 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3073 TWA_CONTROL_CLEAR_PARITY_ERROR); 3074 pci_conf_write(sc->pc, sc->tag, 3075 PCI_COMMAND_STATUS_REG, 3076 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3077 } 3078 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3079 aprint_error_dev(&sc->twa_dv, "clearing PCI abort\n"); 3080 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3081 TWA_CONTROL_CLEAR_PCI_ABORT); 3082 pci_conf_write(sc->pc, sc->tag, 3083 PCI_COMMAND_STATUS_REG, 3084 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3085 } 3086 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3087 /* 3088 * As documented by 3ware, the 9650 erroneously 3089 * flags queue errors during resets. 3090 * Just ignore them during the reset instead of 3091 * bothering the console. 3092 */ 3093 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3094 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3095 aprint_error_dev(&sc->twa_dv, 3096 "clearing controller queue error\n"); 3097 } 3098 3099 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3100 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3101 } 3102 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3103 aprint_error_dev(&sc->twa_dv, "micro-controller error\n"); 3104 result = 1; 3105 } 3106 } 3107 return(result); 3108 } 3109
Indexes created Tue Sep 23 07:09:52 GMT 2025