twa.c revision 1.37
1 /* $NetBSD: twa.c,v 1.37 2011/05/24 18:28:01 joerg Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.37 2011/05/24 18:28:01 joerg Exp $"); 71 72 #include <sys/param.h> 73 #include <sys/systm.h> 74 #include <sys/kernel.h> 75 #include <sys/device.h> 76 #include <sys/queue.h> 77 #include <sys/proc.h> 78 #include <sys/bswap.h> 79 #include <sys/buf.h> 80 #include <sys/bufq.h> 81 #include <sys/endian.h> 82 #include <sys/malloc.h> 83 #include <sys/conf.h> 84 #include <sys/disk.h> 85 #include <sys/sysctl.h> 86 #include <sys/syslog.h> 87 #if 1 88 #include <sys/ktrace.h> 89 #endif 90 91 #include <sys/bus.h> 92 93 #include <dev/pci/pcireg.h> 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/twareg.h> 97 #include <dev/pci/twavar.h> 98 #include <dev/pci/twaio.h> 99 100 #include <dev/scsipi/scsipi_all.h> 101 #include <dev/scsipi/scsipi_disk.h> 102 #include <dev/scsipi/scsipiconf.h> 103 #include <dev/scsipi/scsi_spc.h> 104 105 #include <dev/ldvar.h> 106 107 #include "locators.h" 108 109 #define PCI_CBIO 0x10 110 111 static int twa_fetch_aen(struct twa_softc *); 112 static void twa_aen_callback(struct twa_request *); 113 static int twa_find_aen(struct twa_softc *sc, uint16_t); 114 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 115 struct twa_command_header *); 116 117 static void twa_attach(device_t, device_t, void *); 118 static void twa_shutdown(void *); 119 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 120 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 121 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 122 static int twa_intr(void *); 123 static int twa_match(device_t, cfdata_t, void *); 124 static int twa_reset(struct twa_softc *); 125 126 static int twa_print(void *, const char *); 127 static int twa_soft_reset(struct twa_softc *); 128 129 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 130 static int twa_get_param(struct twa_softc *, int, int, size_t, 131 void (* callback)(struct twa_request *), 132 struct twa_param_9k **); 133 static int twa_set_param(struct twa_softc *, int, int, int, void *, 134 void (* callback)(struct twa_request *)); 135 static void twa_describe_controller(struct twa_softc *); 136 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 137 static int twa_done(struct twa_softc *); 138 139 extern struct cfdriver twa_cd; 140 extern uint32_t twa_fw_img_size; 141 extern uint8_t twa_fw_img[]; 142 143 CFATTACH_DECL(twa, sizeof(struct twa_softc), 144 twa_match, twa_attach, NULL, NULL); 145 146 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 147 const char twaver[] = "1.50.01.002"; 148 149 /* AEN messages. */ 150 static const struct twa_message twa_aen_table[] = { 151 {0x0000, "AEN queue empty"}, 152 {0x0001, "Controller reset occurred"}, 153 {0x0002, "Degraded unit detected"}, 154 {0x0003, "Controller error occured"}, 155 {0x0004, "Background rebuild failed"}, 156 {0x0005, "Background rebuild done"}, 157 {0x0006, "Incomplete unit detected"}, 158 {0x0007, "Background initialize done"}, 159 {0x0008, "Unclean shutdown detected"}, 160 {0x0009, "Drive timeout detected"}, 161 {0x000A, "Drive error detected"}, 162 {0x000B, "Rebuild started"}, 163 {0x000C, "Background initialize started"}, 164 {0x000D, "Entire logical unit was deleted"}, 165 {0x000E, "Background initialize failed"}, 166 {0x000F, "SMART attribute exceeded threshold"}, 167 {0x0010, "Power supply reported AC under range"}, 168 {0x0011, "Power supply reported DC out of range"}, 169 {0x0012, "Power supply reported a malfunction"}, 170 {0x0013, "Power supply predicted malfunction"}, 171 {0x0014, "Battery charge is below threshold"}, 172 {0x0015, "Fan speed is below threshold"}, 173 {0x0016, "Temperature sensor is above threshold"}, 174 {0x0017, "Power supply was removed"}, 175 {0x0018, "Power supply was inserted"}, 176 {0x0019, "Drive was removed from a bay"}, 177 {0x001A, "Drive was inserted into a bay"}, 178 {0x001B, "Drive bay cover door was opened"}, 179 {0x001C, "Drive bay cover door was closed"}, 180 {0x001D, "Product case was opened"}, 181 {0x0020, "Prepare for shutdown (power-off)"}, 182 {0x0021, "Downgrade UDMA mode to lower speed"}, 183 {0x0022, "Upgrade UDMA mode to higher speed"}, 184 {0x0023, "Sector repair completed"}, 185 {0x0024, "Sbuf memory test failed"}, 186 {0x0025, "Error flushing cached write data to disk"}, 187 {0x0026, "Drive reported data ECC error"}, 188 {0x0027, "DCB has checksum error"}, 189 {0x0028, "DCB version is unsupported"}, 190 {0x0029, "Background verify started"}, 191 {0x002A, "Background verify failed"}, 192 {0x002B, "Background verify done"}, 193 {0x002C, "Bad sector overwritten during rebuild"}, 194 {0x002D, "Source drive error occurred"}, 195 {0x002E, "Replace failed because replacement drive too small"}, 196 {0x002F, "Verify failed because array was never initialized"}, 197 {0x0030, "Unsupported ATA drive"}, 198 {0x0031, "Synchronize host/controller time"}, 199 {0x0032, "Spare capacity is inadequate for some units"}, 200 {0x0033, "Background migration started"}, 201 {0x0034, "Background migration failed"}, 202 {0x0035, "Background migration done"}, 203 {0x0036, "Verify detected and fixed data/parity mismatch"}, 204 {0x0037, "SO-DIMM incompatible"}, 205 {0x0038, "SO-DIMM not detected"}, 206 {0x0039, "Corrected Sbuf ECC error"}, 207 {0x003A, "Drive power on reset detected"}, 208 {0x003B, "Background rebuild paused"}, 209 {0x003C, "Background initialize paused"}, 210 {0x003D, "Background verify paused"}, 211 {0x003E, "Background migration paused"}, 212 {0x003F, "Corrupt flash file system detected"}, 213 {0x0040, "Flash file system repaired"}, 214 {0x0041, "Unit number assignments were lost"}, 215 {0x0042, "Error during read of primary DCB"}, 216 {0x0043, "Latent error found in backup DCB"}, 217 {0x0044, "Battery voltage is normal"}, 218 {0x0045, "Battery voltage is low"}, 219 {0x0046, "Battery voltage is high"}, 220 {0x0047, "Battery voltage is too low"}, 221 {0x0048, "Battery voltage is too high"}, 222 {0x0049, "Battery temperature is normal"}, 223 {0x004A, "Battery temperature is low"}, 224 {0x004B, "Battery temperature is high"}, 225 {0x004C, "Battery temperature is too low"}, 226 {0x004D, "Battery temperature is too high"}, 227 {0x004E, "Battery capacity test started"}, 228 {0x004F, "Cache synchronization skipped"}, 229 {0x0050, "Battery capacity test completed"}, 230 {0x0051, "Battery health check started"}, 231 {0x0052, "Battery health check completed"}, 232 {0x0053, "Battery capacity test needed"}, 233 {0x0054, "Battery charge termination voltage is at high level"}, 234 {0x0055, "Battery charging started"}, 235 {0x0056, "Battery charging completed"}, 236 {0x0057, "Battery charging fault"}, 237 {0x0058, "Battery capacity is below warning level"}, 238 {0x0059, "Battery capacity is below error level"}, 239 {0x005A, "Battery is present"}, 240 {0x005B, "Battery is not present"}, 241 {0x005C, "Battery is weak"}, 242 {0x005D, "Battery health check failed"}, 243 {0x005E, "Cache synchronized after power fail"}, 244 {0x005F, "Cache synchronization failed; some data lost"}, 245 {0x0060, "Bad cache meta data checksum"}, 246 {0x0061, "Bad cache meta data signature"}, 247 {0x0062, "Cache meta data restore failed"}, 248 {0x0063, "BBU not found after power fail"}, 249 {0x00FC, "Recovered/finished array membership update"}, 250 {0x00FD, "Handler lockup"}, 251 {0x00FE, "Retrying PCI transfer"}, 252 {0x00FF, "AEN queue is full"}, 253 {0xFFFFFFFF, (char *)NULL} 254 }; 255 256 /* AEN severity table. */ 257 static const char *twa_aen_severity_table[] = { 258 "None", 259 "ERROR", 260 "WARNING", 261 "INFO", 262 "DEBUG", 263 (char *)NULL 264 }; 265 266 /* Error messages. */ 267 static const struct twa_message twa_error_table[] = { 268 {0x0100, "SGL entry contains zero data"}, 269 {0x0101, "Invalid command opcode"}, 270 {0x0102, "SGL entry has unaligned address"}, 271 {0x0103, "SGL size does not match command"}, 272 {0x0104, "SGL entry has illegal length"}, 273 {0x0105, "Command packet is not aligned"}, 274 {0x0106, "Invalid request ID"}, 275 {0x0107, "Duplicate request ID"}, 276 {0x0108, "ID not locked"}, 277 {0x0109, "LBA out of range"}, 278 {0x010A, "Logical unit not supported"}, 279 {0x010B, "Parameter table does not exist"}, 280 {0x010C, "Parameter index does not exist"}, 281 {0x010D, "Invalid field in CDB"}, 282 {0x010E, "Specified port has invalid drive"}, 283 {0x010F, "Parameter item size mismatch"}, 284 {0x0110, "Failed memory allocation"}, 285 {0x0111, "Memory request too large"}, 286 {0x0112, "Out of memory segments"}, 287 {0x0113, "Invalid address to deallocate"}, 288 {0x0114, "Out of memory"}, 289 {0x0115, "Out of heap"}, 290 {0x0120, "Double degrade"}, 291 {0x0121, "Drive not degraded"}, 292 {0x0122, "Reconstruct error"}, 293 {0x0123, "Replace not accepted"}, 294 {0x0124, "Replace drive capacity too small"}, 295 {0x0125, "Sector count not allowed"}, 296 {0x0126, "No spares left"}, 297 {0x0127, "Reconstruct error"}, 298 {0x0128, "Unit is offline"}, 299 {0x0129, "Cannot update status to DCB"}, 300 {0x0130, "Invalid stripe handle"}, 301 {0x0131, "Handle that was not locked"}, 302 {0x0132, "Handle that was not empy"}, 303 {0x0133, "Handle has different owner"}, 304 {0x0140, "IPR has parent"}, 305 {0x0150, "Illegal Pbuf address alignment"}, 306 {0x0151, "Illegal Pbuf transfer length"}, 307 {0x0152, "Illegal Sbuf address alignment"}, 308 {0x0153, "Illegal Sbuf transfer length"}, 309 {0x0160, "Command packet too large"}, 310 {0x0161, "SGL exceeds maximum length"}, 311 {0x0162, "SGL has too many entries"}, 312 {0x0170, "Insufficient resources for rebuilder"}, 313 {0x0171, "Verify error (data != parity)"}, 314 {0x0180, "Requested segment not in directory of this DCB"}, 315 {0x0181, "DCB segment has unsupported version"}, 316 {0x0182, "DCB segment has checksum error"}, 317 {0x0183, "DCB support (settings) segment invalid"}, 318 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 319 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 320 {0x01A0, "Could not clear Sbuf"}, 321 {0x01C0, "Flash identify failed"}, 322 {0x01C1, "Flash out of bounds"}, 323 {0x01C2, "Flash verify error"}, 324 {0x01C3, "Flash file object not found"}, 325 {0x01C4, "Flash file already present"}, 326 {0x01C5, "Flash file system full"}, 327 {0x01C6, "Flash file not present"}, 328 {0x01C7, "Flash file size error"}, 329 {0x01C8, "Bad flash file checksum"}, 330 {0x01CA, "Corrupt flash file system detected"}, 331 {0x01D0, "Invalid field in parameter list"}, 332 {0x01D1, "Parameter list length error"}, 333 {0x01D2, "Parameter item is not changeable"}, 334 {0x01D3, "Parameter item is not saveable"}, 335 {0x0200, "UDMA CRC error"}, 336 {0x0201, "Internal CRC error"}, 337 {0x0202, "Data ECC error"}, 338 {0x0203, "ADP level 1 error"}, 339 {0x0204, "Port timeout"}, 340 {0x0205, "Drive power on reset"}, 341 {0x0206, "ADP level 2 error"}, 342 {0x0207, "Soft reset failed"}, 343 {0x0208, "Drive not ready"}, 344 {0x0209, "Unclassified port error"}, 345 {0x020A, "Drive aborted command"}, 346 {0x0210, "Internal CRC error"}, 347 {0x0211, "Host PCI bus abort"}, 348 {0x0212, "Host PCI parity error"}, 349 {0x0213, "Port handler error"}, 350 {0x0214, "Token interrupt count error"}, 351 {0x0215, "Timeout waiting for PCI transfer"}, 352 {0x0216, "Corrected buffer ECC"}, 353 {0x0217, "Uncorrected buffer ECC"}, 354 {0x0230, "Unsupported command during flash recovery"}, 355 {0x0231, "Next image buffer expected"}, 356 {0x0232, "Binary image architecture incompatible"}, 357 {0x0233, "Binary image has no signature"}, 358 {0x0234, "Binary image has bad checksum"}, 359 {0x0235, "Image downloaded overflowed buffer"}, 360 {0x0240, "I2C device not found"}, 361 {0x0241, "I2C transaction aborted"}, 362 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 363 {0x0243, "SO-DIMM unsupported"}, 364 {0x0248, "SPI transfer status error"}, 365 {0x0249, "SPI transfer timeout error"}, 366 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 367 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 368 {0x0252, "Invalid value in CreateUnit descriptor"}, 369 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 370 {0x0254, "Unable to create data channel for this unit descriptor"}, 371 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 372 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 373 {0x0257, "CreateUnit does not support this descriptor version"}, 374 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 375 {0x0259, "Too many descriptors in CreateUnit"}, 376 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 377 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 378 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 379 {0x0260, "SMART attribute exceeded threshold"}, 380 {0xFFFFFFFF, (char *)NULL} 381 }; 382 383 struct twa_pci_identity { 384 uint32_t vendor_id; 385 uint32_t product_id; 386 const char *name; 387 }; 388 389 static const struct twa_pci_identity pci_twa_products[] = { 390 { PCI_VENDOR_3WARE, 391 PCI_PRODUCT_3WARE_9000, 392 "3ware 9000 series", 393 }, 394 { PCI_VENDOR_3WARE, 395 PCI_PRODUCT_3WARE_9550, 396 "3ware 9550SX series", 397 }, 398 { PCI_VENDOR_3WARE, 399 PCI_PRODUCT_3WARE_9650, 400 "3ware 9650SE series", 401 }, 402 { PCI_VENDOR_3WARE, 403 PCI_PRODUCT_3WARE_9690, 404 "3ware 9690 series", 405 }, 406 { 0, 407 0, 408 NULL, 409 }, 410 }; 411 412 413 static inline void 414 twa_outl(struct twa_softc *sc, int off, uint32_t val) 415 { 416 417 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 418 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 419 BUS_SPACE_BARRIER_WRITE); 420 } 421 422 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 423 { 424 425 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 426 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 427 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 428 } 429 430 void 431 twa_request_wait_handler(struct twa_request *tr) 432 { 433 434 wakeup(tr); 435 } 436 437 static int 438 twa_match(device_t parent, cfdata_t cfdata, 439 void *aux) 440 { 441 int i; 442 struct pci_attach_args *pa = aux; 443 const struct twa_pci_identity *entry = 0; 444 445 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 446 for (i = 0; (pci_twa_products[i].product_id); i++) { 447 entry = &pci_twa_products[i]; 448 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 449 aprint_normal("%s: (rev. 0x%02x)\n", 450 entry->name, PCI_REVISION(pa->pa_class)); 451 return (1); 452 } 453 } 454 } 455 return (0); 456 } 457 458 static const char * 459 twa_find_msg_string(const struct twa_message *table, uint16_t code) 460 { 461 int i; 462 463 for (i = 0; table[i].message != NULL; i++) 464 if (table[i].code == code) 465 return(table[i].message); 466 467 return(table[i].message); 468 } 469 470 void 471 twa_release_request(struct twa_request *tr) 472 { 473 int s; 474 struct twa_softc *sc; 475 476 sc = tr->tr_sc; 477 478 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 479 s = splbio(); 480 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 481 splx(s); 482 if (__predict_false((tr->tr_sc->twa_sc_flags & 483 TWA_STATE_REQUEST_WAIT) != 0)) { 484 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 485 wakeup(&sc->twa_free); 486 } 487 } else 488 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 489 } 490 491 static void 492 twa_unmap_request(struct twa_request *tr) 493 { 494 struct twa_softc *sc = tr->tr_sc; 495 uint8_t cmd_status; 496 int s; 497 498 /* If the command involved data, unmap that too. */ 499 if (tr->tr_data != NULL) { 500 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 501 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 502 else 503 cmd_status = 504 tr->tr_command->command.cmd_pkt_7k.generic.status; 505 506 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 507 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 508 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 509 /* 510 * If we are using a bounce buffer, and we are reading 511 * data, copy the real data in. 512 */ 513 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 514 if (cmd_status == 0) 515 memcpy(tr->tr_real_data, tr->tr_data, 516 tr->tr_real_length); 517 } 518 if (tr->tr_flags & TWA_CMD_DATA_IN) 519 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 520 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 521 522 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 523 } 524 525 /* Free alignment buffer if it was used. */ 526 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 527 s = splvm(); 528 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 529 tr->tr_length, UVM_KMF_WIRED); 530 splx(s); 531 tr->tr_data = tr->tr_real_data; 532 tr->tr_length = tr->tr_real_length; 533 } 534 } 535 536 /* 537 * Function name: twa_wait_request 538 * Description: Sends down a firmware cmd, and waits for the completion, 539 * but NOT in a tight loop. 540 * 541 * Input: tr -- ptr to request pkt 542 * timeout -- max # of seconds to wait before giving up 543 * Output: None 544 * Return value: 0 -- success 545 * non-zero-- failure 546 */ 547 static int 548 twa_wait_request(struct twa_request *tr, uint32_t timeout) 549 { 550 time_t end_time; 551 struct timeval t1; 552 int s, rv; 553 554 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 555 tr->tr_callback = twa_request_wait_handler; 556 tr->tr_status = TWA_CMD_BUSY; 557 558 rv = twa_map_request(tr); 559 560 if (rv != 0) 561 return (rv); 562 563 microtime(&t1); 564 end_time = t1.tv_usec + 565 (timeout * 1000 * 100); 566 567 while (tr->tr_status != TWA_CMD_COMPLETE) { 568 rv = tr->tr_error; 569 if (rv != 0) 570 return(rv); 571 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 572 break; 573 574 if (rv == EWOULDBLOCK) { 575 /* 576 * We will reset the controller only if the request has 577 * already been submitted, so as to not lose the 578 * request packet. If a busy request timed out, the 579 * reset will take care of freeing resources. If a 580 * pending request timed out, we will free resources 581 * for that request, right here. So, the caller is 582 * expected to NOT cleanup when ETIMEDOUT is returned. 583 */ 584 if (tr->tr_status == TWA_CMD_BUSY) 585 twa_reset(tr->tr_sc); 586 else { 587 /* Request was never submitted. Clean up. */ 588 s = splbio(); 589 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 590 tr_link); 591 splx(s); 592 593 twa_unmap_request(tr); 594 if (tr->tr_data) 595 free(tr->tr_data, M_DEVBUF); 596 597 twa_release_request(tr); 598 } 599 return(ETIMEDOUT); 600 } 601 /* 602 * Either the request got completed, or we were woken up by a 603 * signal. Calculate the new timeout, in case it was the 604 * latter. 605 */ 606 microtime(&t1); 607 608 timeout = (end_time - t1.tv_usec) / (1000 * 100); 609 } 610 return(rv); 611 } 612 613 /* 614 * Function name: twa_immediate_request 615 * Description: Sends down a firmware cmd, and waits for the completion 616 * in a tight loop. 617 * 618 * Input: tr -- ptr to request pkt 619 * timeout -- max # of seconds to wait before giving up 620 * Output: None 621 * Return value: 0 -- success 622 * non-zero-- failure 623 */ 624 static int 625 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 626 { 627 struct timeval t1; 628 int s = 0, rv = 0; 629 630 rv = twa_map_request(tr); 631 632 if (rv != 0) 633 return(rv); 634 635 timeout = (timeout * 10000 * 10); 636 637 microtime(&t1); 638 639 timeout += t1.tv_usec; 640 641 do { 642 rv = tr->tr_error; 643 if (rv != 0) 644 return(rv); 645 s = splbio(); 646 twa_done(tr->tr_sc); 647 splx(s); 648 if (tr->tr_status == TWA_CMD_COMPLETE) 649 return(rv); 650 microtime(&t1); 651 } while (t1.tv_usec <= timeout); 652 653 /* 654 * We will reset the controller only if the request has 655 * already been submitted, so as to not lose the 656 * request packet. If a busy request timed out, the 657 * reset will take care of freeing resources. If a 658 * pending request timed out, we will free resources 659 * for that request, right here. So, the caller is 660 * expected to NOT cleanup when ETIMEDOUT is returned. 661 */ 662 rv = ETIMEDOUT; 663 664 if (tr->tr_status == TWA_CMD_BUSY) 665 twa_reset(tr->tr_sc); 666 else { 667 /* Request was never submitted. Clean up. */ 668 s = splbio(); 669 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 670 splx(s); 671 twa_unmap_request(tr); 672 if (tr->tr_data) 673 free(tr->tr_data, M_DEVBUF); 674 675 twa_release_request(tr); 676 } 677 return (rv); 678 } 679 680 static int 681 twa_inquiry(struct twa_request *tr, int lunid) 682 { 683 int error; 684 struct twa_command_9k *tr_9k_cmd; 685 686 if (tr->tr_data == NULL) 687 return (ENOMEM); 688 689 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 690 691 tr->tr_length = TWA_SECTOR_SIZE; 692 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 693 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 694 695 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 696 697 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 698 tr_9k_cmd->unit = lunid; 699 tr_9k_cmd->request_id = tr->tr_request_id; 700 tr_9k_cmd->status = 0; 701 tr_9k_cmd->sgl_offset = 16; 702 tr_9k_cmd->sgl_entries = 1; 703 /* create the CDB here */ 704 tr_9k_cmd->cdb[0] = INQUIRY; 705 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 706 tr_9k_cmd->cdb[4] = 255; 707 708 /* XXXX setup page data no lun device 709 * it seems 9000 series does not indicate 710 * NOTPRESENT - need more investigation 711 */ 712 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 713 SID_QUAL_LU_NOTPRESENT; 714 715 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 716 717 if (error != 0) 718 return (error); 719 720 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 721 SID_QUAL_LU_NOTPRESENT) 722 error = 1; 723 724 return (error); 725 } 726 727 static int 728 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 729 { 730 731 printf("%s: %s\n", device_xname(&sc->twa_dv), scsipi->vendor); 732 733 return (1); 734 } 735 736 737 static uint64_t 738 twa_read_capacity(struct twa_request *tr, int lunid) 739 { 740 int error; 741 struct twa_command_9k *tr_9k_cmd; 742 uint64_t array_size = 0LL; 743 744 if (tr->tr_data == NULL) 745 return (ENOMEM); 746 747 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 748 749 tr->tr_length = TWA_SECTOR_SIZE; 750 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 751 tr->tr_flags |= TWA_CMD_DATA_OUT; 752 753 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 754 755 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 756 tr_9k_cmd->unit = lunid; 757 tr_9k_cmd->request_id = tr->tr_request_id; 758 tr_9k_cmd->status = 0; 759 tr_9k_cmd->sgl_offset = 16; 760 tr_9k_cmd->sgl_entries = 1; 761 /* create the CDB here */ 762 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 763 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 764 765 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 766 767 if (error == 0) { 768 #if BYTE_ORDER == BIG_ENDIAN 769 array_size = bswap64(_8btol( 770 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 771 #else 772 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 773 tr->tr_data)->addr) + 1; 774 #endif 775 } 776 return (array_size); 777 } 778 779 static int 780 twa_request_sense(struct twa_request *tr, int lunid) 781 { 782 int error = 1; 783 struct twa_command_9k *tr_9k_cmd; 784 785 if (tr->tr_data == NULL) 786 return (error); 787 788 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 789 790 tr->tr_length = TWA_SECTOR_SIZE; 791 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 792 tr->tr_flags |= TWA_CMD_DATA_OUT; 793 794 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 795 796 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 797 tr_9k_cmd->unit = lunid; 798 tr_9k_cmd->request_id = tr->tr_request_id; 799 tr_9k_cmd->status = 0; 800 tr_9k_cmd->sgl_offset = 16; 801 tr_9k_cmd->sgl_entries = 1; 802 /* create the CDB here */ 803 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 804 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 805 tr_9k_cmd->cdb[4] = 255; 806 807 /*XXX AEN notification called in interrupt context 808 * so just queue the request. Return as quickly 809 * as possible from interrupt 810 */ 811 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 812 error = twa_map_request(tr); 813 else 814 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 815 816 return (error); 817 } 818 819 static int 820 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 821 { 822 struct twa_request *tr; 823 struct twa_command_packet *tc; 824 bus_dma_segment_t seg; 825 size_t max_segs, max_xfer; 826 int i, rv, rseg, size; 827 828 if ((sc->sc_units = malloc(sc->sc_nunits * 829 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 830 return(ENOMEM); 831 832 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 833 M_DEVBUF, M_NOWAIT)) == NULL) 834 return(ENOMEM); 835 836 size = num_reqs * sizeof(struct twa_command_packet); 837 838 /* Allocate memory for cmd pkts. */ 839 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 840 size, PAGE_SIZE, 0, &seg, 841 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 842 aprint_error_dev(&sc->twa_dv, "unable to allocate " 843 "command packets, rv = %d\n", rv); 844 return (ENOMEM); 845 } 846 847 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 848 &seg, rseg, size, (void **)&sc->twa_cmds, 849 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 850 aprint_error_dev(&sc->twa_dv, "unable to map commands, rv = %d\n", rv); 851 return (1); 852 } 853 854 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 855 size, num_reqs, size, 856 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 857 aprint_error_dev(&sc->twa_dv, "unable to create command DMA map, " 858 "rv = %d\n", rv); 859 return (ENOMEM); 860 } 861 862 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 863 sc->twa_cmds, size, NULL, 864 BUS_DMA_NOWAIT)) != 0) { 865 aprint_error_dev(&sc->twa_dv, "unable to load command DMA map, " 866 "rv = %d\n", rv); 867 return (1); 868 } 869 870 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 871 aprint_error_dev(&sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 872 873 return (1); 874 } 875 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 876 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 877 878 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 879 memset(sc->twa_cmd_pkt_buf, 0, 880 num_reqs * sizeof(struct twa_command_packet)); 881 882 sc->sc_twa_request = sc->twa_req_buf; 883 max_segs = twa_get_maxsegs(); 884 max_xfer = twa_get_maxxfer(max_segs); 885 886 for (i = 0; i < num_reqs; i++, tc++) { 887 tr = &(sc->twa_req_buf[i]); 888 tr->tr_command = tc; 889 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 890 (i * sizeof(struct twa_command_packet)); 891 tr->tr_request_id = i; 892 tr->tr_sc = sc; 893 894 /* 895 * Create a map for data buffers. maxsize (256 * 1024) used in 896 * bus_dma_tag_create above should suffice the bounce page needs 897 * for data buffers, since the max I/O size we support is 128KB. 898 * If we supported I/O's bigger than 256KB, we would have to 899 * create a second dma_tag, with the appropriate maxsize. 900 */ 901 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 902 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 903 &tr->tr_dma_map)) != 0) { 904 aprint_error_dev(&sc->twa_dv, "unable to create command " 905 "DMA map, rv = %d\n", rv); 906 return (ENOMEM); 907 } 908 /* Insert request into the free queue. */ 909 if (i != 0) { 910 sc->twa_lookup[i] = tr; 911 twa_release_request(tr); 912 } else 913 tr->tr_flags |= TWA_CMD_AEN; 914 } 915 return(0); 916 } 917 918 static void 919 twa_recompute_openings(struct twa_softc *sc) 920 { 921 struct twa_drive *td; 922 int unit; 923 int openings; 924 uint64_t total_size; 925 926 total_size = 0; 927 for (unit = 0; unit < sc->sc_nunits; unit++) { 928 td = &sc->sc_units[unit]; 929 total_size += td->td_size; 930 } 931 932 for (unit = 0; unit < sc->sc_nunits; unit++) { 933 td = &sc->sc_units[unit]; 934 /* 935 * In theory, TWA_Q_LENGTH - 1 should be usable, but 936 * keep one additional ccb for internal commands. 937 * This makes the controller more reliable under load. 938 */ 939 if (total_size > 0) { 940 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 941 } else 942 openings = 0; 943 944 if (openings == td->td_openings) 945 continue; 946 td->td_openings = openings; 947 948 #ifdef TWA_DEBUG 949 printf("%s: unit %d openings %d\n", 950 device_xname(&sc->twa_dv), unit, openings); 951 #endif 952 if (td->td_dev != NULL) 953 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 954 } 955 } 956 957 static int 958 twa_request_bus_scan(struct twa_softc *sc) 959 { 960 struct twa_drive *td; 961 struct twa_request *tr; 962 struct twa_attach_args twaa; 963 int locs[TWACF_NLOCS]; 964 int s, unit; 965 966 s = splbio(); 967 for (unit = 0; unit < sc->sc_nunits; unit++) { 968 969 if ((tr = twa_get_request(sc, 0)) == NULL) { 970 splx(s); 971 return (EIO); 972 } 973 974 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 975 976 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 977 978 if (tr->tr_data == NULL) { 979 twa_release_request(tr); 980 splx(s); 981 return (ENOMEM); 982 } 983 td = &sc->sc_units[unit]; 984 985 if (twa_inquiry(tr, unit) == 0) { 986 if (td->td_dev == NULL) { 987 twa_print_inquiry_data(sc, 988 ((struct scsipi_inquiry_data *)tr->tr_data)); 989 990 sc->sc_units[unit].td_size = 991 twa_read_capacity(tr, unit); 992 993 twaa.twaa_unit = unit; 994 995 twa_recompute_openings(sc); 996 997 locs[TWACF_UNIT] = unit; 998 999 sc->sc_units[unit].td_dev = 1000 config_found_sm_loc(&sc->twa_dv, "twa", 1001 locs, &twaa, twa_print, config_stdsubmatch); 1002 } 1003 } else { 1004 if (td->td_dev != NULL) { 1005 (void) config_detach(td->td_dev, DETACH_FORCE); 1006 td->td_dev = NULL; 1007 td->td_size = 0; 1008 1009 twa_recompute_openings(sc); 1010 } 1011 } 1012 free(tr->tr_data, M_DEVBUF); 1013 1014 twa_release_request(tr); 1015 } 1016 splx(s); 1017 1018 return (0); 1019 } 1020 1021 1022 #ifdef DIAGNOSTIC 1023 static inline void 1024 twa_check_busy_q(struct twa_request *tr) 1025 { 1026 struct twa_request *rq; 1027 struct twa_softc *sc = tr->tr_sc; 1028 1029 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1030 if (tr->tr_request_id == rq->tr_request_id) { 1031 panic("cannot submit same request more than once"); 1032 } else if (tr->bp == rq->bp && tr->bp != 0) { 1033 /* XXX A check for 0 for the buf ptr is needed to 1034 * guard against ioctl requests with a buf ptr of 1035 * 0 and also aen notifications. Looking for 1036 * external cmds only. 1037 */ 1038 panic("cannot submit same buf more than once"); 1039 } else { 1040 /* Empty else statement */ 1041 } 1042 } 1043 } 1044 #endif 1045 1046 static int 1047 twa_start(struct twa_request *tr) 1048 { 1049 struct twa_softc *sc = tr->tr_sc; 1050 uint32_t status_reg; 1051 int s; 1052 int error; 1053 1054 s = splbio(); 1055 1056 /* 1057 * The 9650 and 9690 have a bug in the detection of the full queue 1058 * condition. 1059 * 1060 * If a write operation has filled the queue and is directly followed 1061 * by a status read, it sometimes doesn't return the correct result. 1062 * To work around this, the upper 32bit are written first. 1063 * This effectively serialises the hardware, but does not change 1064 * the state of the queue. 1065 */ 1066 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1067 /* Write lower 32 bits of address */ 1068 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1069 sizeof(struct twa_command_header)); 1070 } 1071 1072 /* Check to see if we can post a command. */ 1073 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1074 if ((error = twa_check_ctlr_state(sc, status_reg))) 1075 goto out; 1076 1077 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1078 if (tr->tr_status != TWA_CMD_PENDING) { 1079 tr->tr_status = TWA_CMD_PENDING; 1080 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1081 tr, tr_link); 1082 } 1083 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1084 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1085 error = EBUSY; 1086 } else { 1087 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1088 (char *)tr->tr_command - (char *)sc->twa_cmds, 1089 sizeof(struct twa_command_packet), 1090 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1091 1092 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1093 /* 1094 * Cmd queue is not full. Post the command 1095 * by writing upper 32 bits of address. 1096 */ 1097 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1098 sizeof(struct twa_command_header)); 1099 } else { 1100 /* Cmd queue is not full. Post the command. */ 1101 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1102 sizeof(struct twa_command_header)); 1103 } 1104 1105 /* Mark the request as currently being processed. */ 1106 tr->tr_status = TWA_CMD_BUSY; 1107 1108 #ifdef DIAGNOSTIC 1109 twa_check_busy_q(tr); 1110 #endif 1111 1112 /* Move the request into the busy queue. */ 1113 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1114 } 1115 out: 1116 splx(s); 1117 return(error); 1118 } 1119 1120 static int 1121 twa_drain_response_queue(struct twa_softc *sc) 1122 { 1123 union twa_response_queue rq; 1124 uint32_t status_reg; 1125 1126 for (;;) { 1127 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1128 if (twa_check_ctlr_state(sc, status_reg)) 1129 return(1); 1130 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1131 return(0); /* no more response queue entries */ 1132 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1133 } 1134 } 1135 1136 /* 1137 * twa_drain_response_queue_large: 1138 * 1139 * specific to the 9550 and 9650 controller to remove requests. 1140 * 1141 * Removes all requests from "large" response queue on the 9550 controller. 1142 * This procedure is called as part of the 9550 controller reset sequence. 1143 */ 1144 static int 1145 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1146 { 1147 uint32_t start_time = 0, end_time; 1148 uint32_t response = 0; 1149 1150 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1151 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1152 start_time = 0; 1153 end_time = (timeout * TWA_MICROSECOND); 1154 1155 while ((response & 1156 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1157 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1158 if (start_time >= end_time) 1159 return (1); 1160 DELAY(1); 1161 start_time++; 1162 } 1163 /* P-chip delay */ 1164 DELAY(500000); 1165 } 1166 return (0); 1167 } 1168 1169 static void 1170 twa_drain_busy_queue(struct twa_softc *sc) 1171 { 1172 struct twa_request *tr; 1173 1174 /* Walk the busy queue. */ 1175 1176 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1177 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1178 1179 twa_unmap_request(tr); 1180 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1181 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1182 /* It's an internal/ioctl request. Simply free it. */ 1183 if (tr->tr_data) 1184 free(tr->tr_data, M_DEVBUF); 1185 twa_release_request(tr); 1186 } else { 1187 /* It's a SCSI request. Complete it. */ 1188 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1189 if (tr->tr_callback) 1190 tr->tr_callback(tr); 1191 } 1192 } 1193 } 1194 1195 static int 1196 twa_drain_pending_queue(struct twa_softc *sc) 1197 { 1198 struct twa_request *tr; 1199 int s, error = 0; 1200 1201 /* 1202 * Pull requests off the pending queue, and submit them. 1203 */ 1204 s = splbio(); 1205 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1206 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1207 1208 if ((error = twa_start(tr))) { 1209 if (error == EBUSY) { 1210 tr->tr_status = TWA_CMD_PENDING; 1211 1212 /* queue at the head */ 1213 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1214 tr, tr_link); 1215 error = 0; 1216 break; 1217 } else { 1218 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1219 tr->tr_error = error; 1220 tr->tr_callback(tr); 1221 error = EIO; 1222 } 1223 } 1224 } 1225 } 1226 splx(s); 1227 1228 return(error); 1229 } 1230 1231 static int 1232 twa_drain_aen_queue(struct twa_softc *sc) 1233 { 1234 int s, error = 0; 1235 struct twa_request *tr; 1236 struct twa_command_header *cmd_hdr; 1237 struct timeval t1; 1238 uint32_t timeout; 1239 1240 for (;;) { 1241 if ((tr = twa_get_request(sc, 0)) == NULL) { 1242 error = EIO; 1243 break; 1244 } 1245 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1246 tr->tr_callback = NULL; 1247 1248 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1249 1250 if (tr->tr_data == NULL) { 1251 error = 1; 1252 goto out; 1253 } 1254 1255 if (twa_request_sense(tr, 0) != 0) { 1256 error = 1; 1257 break; 1258 } 1259 1260 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1261 1262 microtime(&t1); 1263 1264 timeout += t1.tv_usec; 1265 1266 do { 1267 s = splbio(); 1268 twa_done(tr->tr_sc); 1269 splx(s); 1270 if (tr->tr_status != TWA_CMD_BUSY) 1271 break; 1272 microtime(&t1); 1273 } while (t1.tv_usec <= timeout); 1274 1275 if (tr->tr_status != TWA_CMD_COMPLETE) { 1276 error = ETIMEDOUT; 1277 break; 1278 } 1279 1280 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1281 break; 1282 1283 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1284 if ((cmd_hdr->status_block.error) /* aen_code */ 1285 == TWA_AEN_QUEUE_EMPTY) 1286 break; 1287 (void)twa_enqueue_aen(sc, cmd_hdr); 1288 1289 free(tr->tr_data, M_DEVBUF); 1290 twa_release_request(tr); 1291 } 1292 out: 1293 if (tr) { 1294 if (tr->tr_data) 1295 free(tr->tr_data, M_DEVBUF); 1296 1297 twa_release_request(tr); 1298 } 1299 return(error); 1300 } 1301 1302 1303 #if 0 1304 static void 1305 twa_check_response_q(struct twa_request *tr, int clear) 1306 { 1307 int j; 1308 static int i = 0; 1309 static struct twa_request *req = 0; 1310 static struct buf *hist[255]; 1311 1312 1313 if (clear) { 1314 i = 0; 1315 for (j = 0; j < 255; j++) 1316 hist[j] = 0; 1317 return; 1318 } 1319 1320 if (req == 0) 1321 req = tr; 1322 1323 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1324 /* XXX this is bogus ! req can't be anything else but tr ! */ 1325 if (req->tr_request_id == tr->tr_request_id) 1326 panic("req id: %d on controller queue twice", 1327 tr->tr_request_id); 1328 1329 for (j = 0; j < i; j++) 1330 if (tr->bp == hist[j]) 1331 panic("req id: %d buf found twice", 1332 tr->tr_request_id); 1333 } 1334 req = tr; 1335 1336 hist[i++] = req->bp; 1337 } 1338 #endif 1339 1340 static int 1341 twa_done(struct twa_softc *sc) 1342 { 1343 union twa_response_queue rq; 1344 struct twa_request *tr; 1345 int rv = 0; 1346 uint32_t status_reg; 1347 1348 for (;;) { 1349 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1350 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1351 break; 1352 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1353 break; 1354 /* Response queue is not empty. */ 1355 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1356 tr = sc->sc_twa_request + rq.u.response_id; 1357 #if 0 1358 twa_check_response_q(tr, 0); 1359 #endif 1360 /* Unmap the command packet, and any associated data buffer. */ 1361 twa_unmap_request(tr); 1362 1363 tr->tr_status = TWA_CMD_COMPLETE; 1364 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1365 1366 if (tr->tr_callback) 1367 tr->tr_callback(tr); 1368 } 1369 (void)twa_drain_pending_queue(sc); 1370 1371 #if 0 1372 twa_check_response_q(NULL, 1); 1373 #endif 1374 return(rv); 1375 } 1376 1377 /* 1378 * Function name: twa_init_ctlr 1379 * Description: Establishes a logical connection with the controller. 1380 * If bundled with firmware, determines whether or not 1381 * the driver is compatible with the firmware on the 1382 * controller, before proceeding to work with it. 1383 * 1384 * Input: sc -- ptr to per ctlr structure 1385 * Output: None 1386 * Return value: 0 -- success 1387 * non-zero-- failure 1388 */ 1389 static int 1390 twa_init_ctlr(struct twa_softc *sc) 1391 { 1392 uint16_t fw_on_ctlr_srl = 0; 1393 uint16_t fw_on_ctlr_arch_id = 0; 1394 uint16_t fw_on_ctlr_branch = 0; 1395 uint16_t fw_on_ctlr_build = 0; 1396 uint32_t init_connect_result = 0; 1397 int error = 0; 1398 1399 /* Wait for the controller to become ready. */ 1400 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1401 TWA_REQUEST_TIMEOUT_PERIOD)) { 1402 return(ENXIO); 1403 } 1404 /* Drain the response queue. */ 1405 if (twa_drain_response_queue(sc)) 1406 return(1); 1407 1408 /* Establish a logical connection with the controller. */ 1409 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1410 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1411 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1412 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1413 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1414 &fw_on_ctlr_build, &init_connect_result))) { 1415 return(error); 1416 } 1417 twa_drain_aen_queue(sc); 1418 1419 /* Set controller state to initialized. */ 1420 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1421 return(0); 1422 } 1423 1424 static int 1425 twa_setup(struct twa_softc *sc) 1426 { 1427 struct tw_cl_event_packet *aen_queue; 1428 uint32_t i = 0; 1429 int error = 0; 1430 1431 /* Initialize request queues. */ 1432 TAILQ_INIT(&sc->twa_free); 1433 TAILQ_INIT(&sc->twa_busy); 1434 TAILQ_INIT(&sc->twa_pending); 1435 1436 sc->twa_sc_flags = 0; 1437 1438 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1439 1440 return(ENOMEM); 1441 } 1442 1443 /* Allocate memory for the AEN queue. */ 1444 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1445 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1446 /* 1447 * This should not cause us to return error. We will only be 1448 * unable to support AEN's. But then, we will have to check 1449 * time and again to see if we can support AEN's, if we 1450 * continue. So, we will just return error. 1451 */ 1452 return (ENOMEM); 1453 } 1454 /* Initialize the aen queue. */ 1455 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1456 1457 for (i = 0; i < TWA_Q_LENGTH; i++) 1458 sc->twa_aen_queue[i] = &(aen_queue[i]); 1459 1460 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1461 TWA_CONTROL_DISABLE_INTERRUPTS); 1462 1463 /* Initialize the controller. */ 1464 if ((error = twa_init_ctlr(sc))) { 1465 /* Soft reset the controller, and try one more time. */ 1466 1467 printf("%s: controller initialization failed. " 1468 "Retrying initialization\n", device_xname(&sc->twa_dv)); 1469 1470 if ((error = twa_soft_reset(sc)) == 0) 1471 error = twa_init_ctlr(sc); 1472 } 1473 1474 twa_describe_controller(sc); 1475 1476 error = twa_request_bus_scan(sc); 1477 1478 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1479 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1480 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1481 TWA_CONTROL_ENABLE_INTERRUPTS); 1482 1483 return (error); 1484 } 1485 1486 void *twa_sdh; 1487 1488 static void 1489 twa_attach(device_t parent, device_t self, void *aux) 1490 { 1491 struct pci_attach_args *pa; 1492 struct twa_softc *sc; 1493 pci_chipset_tag_t pc; 1494 pcireg_t csr; 1495 pci_intr_handle_t ih; 1496 const char *intrstr; 1497 const struct sysctlnode *node; 1498 int i; 1499 bool use_64bit; 1500 1501 sc = device_private(self); 1502 1503 pa = aux; 1504 pc = pa->pa_pc; 1505 sc->pc = pa->pa_pc; 1506 sc->tag = pa->pa_tag; 1507 1508 aprint_naive(": RAID controller\n"); 1509 aprint_normal(": 3ware Apache\n"); 1510 1511 sc->sc_quirks = 0; 1512 1513 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1514 sc->sc_nunits = TWA_MAX_UNITS; 1515 use_64bit = false; 1516 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1517 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1518 aprint_error_dev(&sc->twa_dv, "can't map i/o space\n"); 1519 return; 1520 } 1521 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1522 sc->sc_nunits = TWA_MAX_UNITS; 1523 use_64bit = true; 1524 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1525 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1526 &sc->twa_bus_ioh, NULL, NULL)) { 1527 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1528 return; 1529 } 1530 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1531 sc->sc_nunits = TWA_9650_MAX_UNITS; 1532 use_64bit = true; 1533 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1534 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1535 &sc->twa_bus_ioh, NULL, NULL)) { 1536 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1537 return; 1538 } 1539 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1540 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1541 sc->sc_nunits = TWA_9690_MAX_UNITS; 1542 use_64bit = true; 1543 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1544 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1545 &sc->twa_bus_ioh, NULL, NULL)) { 1546 aprint_error_dev(&sc->twa_dv, "can't map mem space\n"); 1547 return; 1548 } 1549 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1550 } else { 1551 sc->sc_nunits = 0; 1552 use_64bit = false; 1553 aprint_error_dev(&sc->twa_dv, "product id 0x%02x not recognized\n", 1554 PCI_PRODUCT(pa->pa_id)); 1555 return; 1556 } 1557 1558 if (pci_dma64_available(pa) && use_64bit) { 1559 aprint_verbose_dev(self, "64bit DMA addressing active"); 1560 sc->twa_dma_tag = pa->pa_dmat64; 1561 } else { 1562 sc->twa_dma_tag = pa->pa_dmat; 1563 } 1564 1565 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1566 /* Enable the device. */ 1567 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1568 1569 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1570 csr | PCI_COMMAND_MASTER_ENABLE); 1571 1572 /* Map and establish the interrupt. */ 1573 if (pci_intr_map(pa, &ih)) { 1574 aprint_error_dev(&sc->twa_dv, "can't map interrupt\n"); 1575 return; 1576 } 1577 intrstr = pci_intr_string(pc, ih); 1578 1579 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1580 if (sc->twa_ih == NULL) { 1581 aprint_error_dev(&sc->twa_dv, "can't establish interrupt%s%s\n", 1582 (intrstr) ? " at " : "", 1583 (intrstr) ? intrstr : ""); 1584 return; 1585 } 1586 1587 if (intrstr != NULL) 1588 aprint_normal_dev(&sc->twa_dv, "interrupting at %s\n", 1589 intrstr); 1590 1591 twa_setup(sc); 1592 1593 if (twa_sdh == NULL) 1594 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1595 1596 /* sysctl set-up for 3ware cli */ 1597 if (sysctl_createv(NULL, 0, NULL, NULL, 1598 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1599 NULL, NULL, 0, NULL, 0, 1600 CTL_HW, CTL_EOL) != 0) { 1601 aprint_error_dev(&sc->twa_dv, "could not create %s sysctl node\n", 1602 "hw"); 1603 return; 1604 } 1605 if (sysctl_createv(NULL, 0, NULL, &node, 1606 0, CTLTYPE_NODE, device_xname(&sc->twa_dv), 1607 SYSCTL_DESCR("twa driver information"), 1608 NULL, 0, NULL, 0, 1609 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1610 aprint_error_dev(&sc->twa_dv, "could not create %s.%s sysctl node\n", 1611 "hw", 1612 device_xname(&sc->twa_dv)); 1613 return; 1614 } 1615 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1616 0, CTLTYPE_STRING, "driver_version", 1617 SYSCTL_DESCR("twa driver version"), 1618 NULL, 0, __UNCONST(&twaver), 0, 1619 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1620 != 0) { 1621 aprint_error_dev(&sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1622 "hw", 1623 device_xname(&sc->twa_dv)); 1624 return; 1625 } 1626 1627 return; 1628 } 1629 1630 static void 1631 twa_shutdown(void *arg) 1632 { 1633 extern struct cfdriver twa_cd; 1634 struct twa_softc *sc; 1635 int i, rv, unit; 1636 1637 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1638 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1639 continue; 1640 1641 for (unit = 0; unit < sc->sc_nunits; unit++) 1642 if (sc->sc_units[unit].td_dev != NULL) 1643 (void) config_detach(sc->sc_units[unit].td_dev, 1644 DETACH_FORCE | DETACH_QUIET); 1645 1646 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1647 TWA_CONTROL_DISABLE_INTERRUPTS); 1648 1649 /* Let the controller know that we are going down. */ 1650 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1651 0, 0, 0, 0, 0, 1652 NULL, NULL, NULL, NULL, NULL); 1653 } 1654 } 1655 1656 void 1657 twa_register_callbacks(struct twa_softc *sc, int unit, 1658 const struct twa_callbacks *tcb) 1659 { 1660 1661 sc->sc_units[unit].td_callbacks = tcb; 1662 } 1663 1664 /* 1665 * Print autoconfiguration message for a sub-device 1666 */ 1667 static int 1668 twa_print(void *aux, const char *pnp) 1669 { 1670 struct twa_attach_args *twaa; 1671 1672 twaa = aux; 1673 1674 if (pnp !=NULL) 1675 aprint_normal("block device at %s\n", pnp); 1676 aprint_normal(" unit %d\n", twaa->twaa_unit); 1677 return (UNCONF); 1678 } 1679 1680 static void 1681 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1682 { 1683 int i; 1684 for (i = 0; i < nsegments; i++) { 1685 sgl[i].address = segs[i].ds_addr; 1686 sgl[i].length = (uint32_t)(segs[i].ds_len); 1687 } 1688 } 1689 1690 static int 1691 twa_submit_io(struct twa_request *tr) 1692 { 1693 int error; 1694 1695 if ((error = twa_start(tr))) { 1696 if (error == EBUSY) 1697 error = 0; /* request is in the pending queue */ 1698 else { 1699 tr->tr_error = error; 1700 } 1701 } 1702 return(error); 1703 } 1704 1705 /* 1706 * Function name: twa_setup_data_dmamap 1707 * Description: Callback of bus_dmamap_load for the buffer associated 1708 * with data. Updates the cmd pkt (size/sgl_entries 1709 * fields, as applicable) to reflect the number of sg 1710 * elements. 1711 * 1712 * Input: arg -- ptr to request pkt 1713 * segs -- ptr to a list of segment descriptors 1714 * nsegments--# of segments 1715 * error -- 0 if no errors encountered before callback, 1716 * non-zero if errors were encountered 1717 * Output: None 1718 * Return value: None 1719 */ 1720 static int 1721 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1722 { 1723 struct twa_request *tr = (struct twa_request *)arg; 1724 struct twa_command_packet *cmdpkt = tr->tr_command; 1725 struct twa_command_9k *cmd9k; 1726 union twa_command_7k *cmd7k; 1727 uint8_t sgl_offset; 1728 int error; 1729 1730 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1731 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1732 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1733 cmd9k->sgl_entries += nsegments - 1; 1734 } else { 1735 /* It's a 7000 command packet. */ 1736 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1737 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1738 twa_fillin_sgl((struct twa_sg *) 1739 (((uint32_t *)cmd7k) + sgl_offset), 1740 segs, nsegments); 1741 /* Modify the size field, based on sg address size. */ 1742 cmd7k->generic.size += 1743 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1744 } 1745 if (tr->tr_flags & TWA_CMD_DATA_IN) 1746 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1747 tr->tr_length, BUS_DMASYNC_PREWRITE); 1748 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1749 /* 1750 * If we're using an alignment buffer, and we're 1751 * writing data, copy the real data out. 1752 */ 1753 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1754 memcpy(tr->tr_data, tr->tr_real_data, 1755 tr->tr_real_length); 1756 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1757 tr->tr_length, BUS_DMASYNC_PREREAD); 1758 } 1759 error = twa_submit_io(tr); 1760 1761 if (error) { 1762 twa_unmap_request(tr); 1763 /* 1764 * If the caller had been returned EINPROGRESS, and he has 1765 * registered a callback for handling completion, the callback 1766 * will never get called because we were unable to submit the 1767 * request. So, free up the request right here. 1768 */ 1769 if (tr->tr_callback) 1770 twa_release_request(tr); 1771 } 1772 return (error); 1773 } 1774 1775 /* 1776 * Function name: twa_map_request 1777 * Description: Maps a cmd pkt and data associated with it, into 1778 * DMA'able memory. 1779 * 1780 * Input: tr -- ptr to request pkt 1781 * Output: None 1782 * Return value: 0 -- success 1783 * non-zero-- failure 1784 */ 1785 int 1786 twa_map_request(struct twa_request *tr) 1787 { 1788 struct twa_softc *sc = tr->tr_sc; 1789 int s, rv; 1790 1791 /* If the command involves data, map that too. */ 1792 if (tr->tr_data != NULL) { 1793 1794 if (((u_long)tr->tr_data & (511)) != 0) { 1795 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1796 tr->tr_real_data = tr->tr_data; 1797 tr->tr_real_length = tr->tr_length; 1798 s = splvm(); 1799 tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1800 tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1801 splx(s); 1802 1803 if (tr->tr_data == NULL) { 1804 tr->tr_data = tr->tr_real_data; 1805 tr->tr_length = tr->tr_real_length; 1806 return(ENOMEM); 1807 } 1808 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1809 memcpy(tr->tr_data, tr->tr_real_data, 1810 tr->tr_length); 1811 } 1812 1813 /* 1814 * Map the data buffer into bus space and build the S/G list. 1815 */ 1816 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1817 tr->tr_data, tr->tr_length, NULL, 1818 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1819 1820 if (rv != 0) { 1821 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1822 s = splvm(); 1823 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1824 tr->tr_length, UVM_KMF_WIRED); 1825 splx(s); 1826 } 1827 return (rv); 1828 } 1829 1830 if ((rv = twa_setup_data_dmamap(tr, 1831 tr->tr_dma_map->dm_segs, 1832 tr->tr_dma_map->dm_nsegs))) { 1833 1834 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1835 s = splvm(); 1836 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1837 tr->tr_length, UVM_KMF_WIRED); 1838 splx(s); 1839 tr->tr_data = tr->tr_real_data; 1840 tr->tr_length = tr->tr_real_length; 1841 } 1842 } 1843 1844 } else 1845 if ((rv = twa_submit_io(tr))) 1846 twa_unmap_request(tr); 1847 1848 return (rv); 1849 } 1850 1851 /* 1852 * Function name: twa_intr 1853 * Description: Interrupt handler. Determines the kind of interrupt, 1854 * and calls the appropriate handler. 1855 * 1856 * Input: sc -- ptr to per ctlr structure 1857 * Output: None 1858 * Return value: None 1859 */ 1860 1861 static int 1862 twa_intr(void *arg) 1863 { 1864 int caught, s, rv; 1865 struct twa_softc *sc; 1866 uint32_t status_reg; 1867 sc = (struct twa_softc *)arg; 1868 1869 caught = 0; 1870 /* Collect current interrupt status. */ 1871 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1872 if (twa_check_ctlr_state(sc, status_reg)) { 1873 caught = 1; 1874 goto bail; 1875 } 1876 /* Dispatch based on the kind of interrupt. */ 1877 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1878 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1879 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1880 caught = 1; 1881 } 1882 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1883 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1884 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1885 rv = twa_fetch_aen(sc); 1886 #ifdef DIAGNOSTIC 1887 if (rv != 0) 1888 printf("%s: unable to retrieve AEN (%d)\n", 1889 device_xname(&sc->twa_dv), rv); 1890 #endif 1891 caught = 1; 1892 } 1893 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1894 /* Start any requests that might be in the pending queue. */ 1895 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1896 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1897 (void)twa_drain_pending_queue(sc); 1898 caught = 1; 1899 } 1900 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1901 s = splbio(); 1902 twa_done(sc); 1903 splx(s); 1904 caught = 1; 1905 } 1906 bail: 1907 return (caught); 1908 } 1909 1910 /* 1911 * Accept an open operation on the control device. 1912 */ 1913 static int 1914 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1915 { 1916 struct twa_softc *twa; 1917 1918 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1919 return (ENXIO); 1920 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1921 return (EBUSY); 1922 1923 twa->twa_sc_flags |= TWA_STATE_OPEN; 1924 1925 return (0); 1926 } 1927 1928 /* 1929 * Accept the last close on the control device. 1930 */ 1931 static int 1932 twaclose(dev_t dev, int flag, int mode, 1933 struct lwp *l) 1934 { 1935 struct twa_softc *twa; 1936 1937 twa = device_lookup_private(&twa_cd, minor(dev)); 1938 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1939 return (0); 1940 } 1941 1942 /* 1943 * Function name: twaioctl 1944 * Description: ioctl handler. 1945 * 1946 * Input: sc -- ptr to per ctlr structure 1947 * cmd -- ioctl cmd 1948 * buf -- ptr to buffer in kernel memory, which is 1949 * a copy of the input buffer in user-space 1950 * Output: buf -- ptr to buffer in kernel memory, which will 1951 * be copied of the output buffer in user-space 1952 * Return value: 0 -- success 1953 * non-zero-- failure 1954 */ 1955 static int 1956 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1957 struct lwp *l) 1958 { 1959 struct twa_softc *sc; 1960 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1961 struct tw_cl_event_packet event_buf; 1962 struct twa_request *tr = 0; 1963 int32_t event_index = 0; 1964 int32_t start_index; 1965 int s, error = 0; 1966 1967 sc = device_lookup_private(&twa_cd, minor(dev)); 1968 1969 switch (cmd) { 1970 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1971 { 1972 struct twa_command_packet *cmdpkt; 1973 uint32_t data_buf_size_adjusted; 1974 1975 /* Get a request packet */ 1976 tr = twa_get_request_wait(sc, 0); 1977 KASSERT(tr != NULL); 1978 /* 1979 * Make sure that the data buffer sent to firmware is a 1980 * 512 byte multiple in size. 1981 */ 1982 data_buf_size_adjusted = 1983 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1984 1985 if ((tr->tr_length = data_buf_size_adjusted)) { 1986 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1987 M_DEVBUF, M_WAITOK)) == NULL) { 1988 error = ENOMEM; 1989 goto fw_passthru_done; 1990 } 1991 /* Copy the payload. */ 1992 if ((error = copyin((void *) (user_buf->pdata), 1993 (void *) (tr->tr_data), 1994 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 1995 goto fw_passthru_done; 1996 } 1997 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 1998 } 1999 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2000 cmdpkt = tr->tr_command; 2001 2002 /* Copy the command packet. */ 2003 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2004 sizeof(struct twa_command_packet)); 2005 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2006 tr->tr_request_id; 2007 2008 /* Send down the request, and wait for it to complete. */ 2009 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2010 if (error == ETIMEDOUT) 2011 break; /* clean-up done by twa_wait_request */ 2012 goto fw_passthru_done; 2013 } 2014 2015 /* Copy the command packet back into user space. */ 2016 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2017 sizeof(struct twa_command_packet)); 2018 2019 /* If there was a payload, copy it back too. */ 2020 if (tr->tr_length) 2021 error = copyout(tr->tr_data, user_buf->pdata, 2022 user_buf->twa_drvr_pkt.buffer_length); 2023 fw_passthru_done: 2024 /* Free resources. */ 2025 if (tr->tr_data) 2026 free(tr->tr_data, M_DEVBUF); 2027 2028 if (tr) 2029 twa_release_request(tr); 2030 break; 2031 } 2032 2033 case TW_OSL_IOCTL_SCAN_BUS: 2034 twa_request_bus_scan(sc); 2035 break; 2036 2037 case TW_CL_IOCTL_GET_FIRST_EVENT: 2038 if (sc->twa_aen_queue_wrapped) { 2039 if (sc->twa_aen_queue_overflow) { 2040 /* 2041 * The aen queue has wrapped, even before some 2042 * events have been retrieved. Let the caller 2043 * know that he missed out on some AEN's. 2044 */ 2045 user_buf->twa_drvr_pkt.status = 2046 TWA_ERROR_AEN_OVERFLOW; 2047 sc->twa_aen_queue_overflow = FALSE; 2048 } else 2049 user_buf->twa_drvr_pkt.status = 0; 2050 event_index = sc->twa_aen_head; 2051 } else { 2052 if (sc->twa_aen_head == sc->twa_aen_tail) { 2053 user_buf->twa_drvr_pkt.status = 2054 TWA_ERROR_AEN_NO_EVENTS; 2055 break; 2056 } 2057 user_buf->twa_drvr_pkt.status = 0; 2058 event_index = sc->twa_aen_tail; /* = 0 */ 2059 } 2060 if ((error = copyout(sc->twa_aen_queue[event_index], 2061 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2062 (sc->twa_aen_queue[event_index])->retrieved = 2063 TWA_AEN_RETRIEVED; 2064 break; 2065 2066 case TW_CL_IOCTL_GET_LAST_EVENT: 2067 if (sc->twa_aen_queue_wrapped) { 2068 if (sc->twa_aen_queue_overflow) { 2069 /* 2070 * The aen queue has wrapped, even before some 2071 * events have been retrieved. Let the caller 2072 * know that he missed out on some AEN's. 2073 */ 2074 user_buf->twa_drvr_pkt.status = 2075 TWA_ERROR_AEN_OVERFLOW; 2076 sc->twa_aen_queue_overflow = FALSE; 2077 } else 2078 user_buf->twa_drvr_pkt.status = 0; 2079 } else { 2080 if (sc->twa_aen_head == sc->twa_aen_tail) { 2081 user_buf->twa_drvr_pkt.status = 2082 TWA_ERROR_AEN_NO_EVENTS; 2083 break; 2084 } 2085 user_buf->twa_drvr_pkt.status = 0; 2086 } 2087 event_index = 2088 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2089 if ((error = copyout(sc->twa_aen_queue[event_index], 2090 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2091 (sc->twa_aen_queue[event_index])->retrieved = 2092 TWA_AEN_RETRIEVED; 2093 break; 2094 2095 case TW_CL_IOCTL_GET_NEXT_EVENT: 2096 user_buf->twa_drvr_pkt.status = 0; 2097 if (sc->twa_aen_queue_wrapped) { 2098 2099 if (sc->twa_aen_queue_overflow) { 2100 /* 2101 * The aen queue has wrapped, even before some 2102 * events have been retrieved. Let the caller 2103 * know that he missed out on some AEN's. 2104 */ 2105 user_buf->twa_drvr_pkt.status = 2106 TWA_ERROR_AEN_OVERFLOW; 2107 sc->twa_aen_queue_overflow = FALSE; 2108 } 2109 start_index = sc->twa_aen_head; 2110 } else { 2111 if (sc->twa_aen_head == sc->twa_aen_tail) { 2112 user_buf->twa_drvr_pkt.status = 2113 TWA_ERROR_AEN_NO_EVENTS; 2114 break; 2115 } 2116 start_index = sc->twa_aen_tail; /* = 0 */ 2117 } 2118 error = copyin(user_buf->pdata, &event_buf, 2119 sizeof(struct tw_cl_event_packet)); 2120 2121 event_index = (start_index + event_buf.sequence_id - 2122 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2123 % TWA_Q_LENGTH; 2124 2125 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2126 event_buf.sequence_id)) { 2127 if (user_buf->twa_drvr_pkt.status == 2128 TWA_ERROR_AEN_OVERFLOW) 2129 /* so we report the overflow next time */ 2130 sc->twa_aen_queue_overflow = TRUE; 2131 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2132 break; 2133 } 2134 if ((error = copyout(sc->twa_aen_queue[event_index], 2135 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2136 (sc->twa_aen_queue[event_index])->retrieved = 2137 TWA_AEN_RETRIEVED; 2138 break; 2139 2140 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2141 user_buf->twa_drvr_pkt.status = 0; 2142 if (sc->twa_aen_queue_wrapped) { 2143 if (sc->twa_aen_queue_overflow) { 2144 /* 2145 * The aen queue has wrapped, even before some 2146 * events have been retrieved. Let the caller 2147 * know that he missed out on some AEN's. 2148 */ 2149 user_buf->twa_drvr_pkt.status = 2150 TWA_ERROR_AEN_OVERFLOW; 2151 sc->twa_aen_queue_overflow = FALSE; 2152 } 2153 start_index = sc->twa_aen_head; 2154 } else { 2155 if (sc->twa_aen_head == sc->twa_aen_tail) { 2156 user_buf->twa_drvr_pkt.status = 2157 TWA_ERROR_AEN_NO_EVENTS; 2158 break; 2159 } 2160 start_index = sc->twa_aen_tail; /* = 0 */ 2161 } 2162 if ((error = copyin(user_buf->pdata, &event_buf, 2163 sizeof(struct tw_cl_event_packet))) != 0) 2164 2165 event_index = (start_index + event_buf.sequence_id - 2166 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2167 % TWA_Q_LENGTH; 2168 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2169 event_buf.sequence_id)) { 2170 if (user_buf->twa_drvr_pkt.status == 2171 TWA_ERROR_AEN_OVERFLOW) 2172 /* so we report the overflow next time */ 2173 sc->twa_aen_queue_overflow = TRUE; 2174 user_buf->twa_drvr_pkt.status = 2175 TWA_ERROR_AEN_NO_EVENTS; 2176 break; 2177 } 2178 if ((error = copyout(sc->twa_aen_queue [event_index], 2179 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2180 aprint_error_dev(&sc->twa_dv, "get_previous: Could not copyout to " 2181 "event_buf. error = %x\n", 2182 error); 2183 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2184 break; 2185 2186 case TW_CL_IOCTL_GET_LOCK: 2187 { 2188 struct tw_cl_lock_packet twa_lock; 2189 2190 copyin(user_buf->pdata, &twa_lock, 2191 sizeof(struct tw_cl_lock_packet)); 2192 s = splbio(); 2193 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2194 (twa_lock.force_flag) || 2195 (time_second >= sc->twa_ioctl_lock.timeout)) { 2196 2197 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2198 sc->twa_ioctl_lock.timeout = time_second + 2199 (twa_lock.timeout_msec / 1000); 2200 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2201 user_buf->twa_drvr_pkt.status = 0; 2202 } else { 2203 twa_lock.time_remaining_msec = 2204 (sc->twa_ioctl_lock.timeout - time_second) * 2205 1000; 2206 user_buf->twa_drvr_pkt.status = 2207 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2208 } 2209 splx(s); 2210 copyout(&twa_lock, user_buf->pdata, 2211 sizeof(struct tw_cl_lock_packet)); 2212 break; 2213 } 2214 2215 case TW_CL_IOCTL_RELEASE_LOCK: 2216 s = splbio(); 2217 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2218 user_buf->twa_drvr_pkt.status = 2219 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2220 } else { 2221 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2222 user_buf->twa_drvr_pkt.status = 0; 2223 } 2224 splx(s); 2225 break; 2226 2227 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2228 { 2229 struct tw_cl_compatibility_packet comp_pkt; 2230 2231 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2232 sizeof(TWA_DRIVER_VERSION_STRING)); 2233 comp_pkt.working_srl = sc->working_srl; 2234 comp_pkt.working_branch = sc->working_branch; 2235 comp_pkt.working_build = sc->working_build; 2236 user_buf->twa_drvr_pkt.status = 0; 2237 2238 /* Copy compatibility information to user space. */ 2239 copyout(&comp_pkt, user_buf->pdata, 2240 min(sizeof(struct tw_cl_compatibility_packet), 2241 user_buf->twa_drvr_pkt.buffer_length)); 2242 break; 2243 } 2244 2245 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2246 { 2247 struct twa_unitname *tn; 2248 struct twa_drive *tdr; 2249 2250 tn = (struct twa_unitname *)data; 2251 /* XXX mutex */ 2252 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2253 return (EINVAL); 2254 tdr = &sc->sc_units[tn->tn_unit]; 2255 if (tdr->td_dev == NULL) 2256 tn->tn_name[0] = '\0'; 2257 else 2258 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2259 sizeof(tn->tn_name)); 2260 return (0); 2261 } 2262 2263 default: 2264 /* Unknown opcode. */ 2265 error = ENOTTY; 2266 } 2267 2268 return(error); 2269 } 2270 2271 const struct cdevsw twa_cdevsw = { 2272 twaopen, twaclose, noread, nowrite, twaioctl, 2273 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2274 }; 2275 2276 /* 2277 * Function name: twa_get_param 2278 * Description: Get a firmware parameter. 2279 * 2280 * Input: sc -- ptr to per ctlr structure 2281 * table_id -- parameter table # 2282 * param_id -- index of the parameter in the table 2283 * param_size -- size of the parameter in bytes 2284 * callback -- ptr to function, if any, to be called 2285 * back on completion; NULL if no callback. 2286 * Output: None 2287 * Return value: ptr to param structure -- success 2288 * NULL -- failure 2289 */ 2290 static int 2291 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2292 size_t param_size, void (* callback)(struct twa_request *tr), 2293 struct twa_param_9k **param) 2294 { 2295 int rv = 0; 2296 struct twa_request *tr; 2297 union twa_command_7k *cmd; 2298 2299 /* Get a request packet. */ 2300 if ((tr = twa_get_request(sc, 0)) == NULL) { 2301 rv = EAGAIN; 2302 goto out; 2303 } 2304 2305 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2306 2307 /* Allocate memory to read data into. */ 2308 if ((*param = (struct twa_param_9k *) 2309 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2310 rv = ENOMEM; 2311 goto out; 2312 } 2313 2314 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2315 tr->tr_data = *param; 2316 tr->tr_length = TWA_SECTOR_SIZE; 2317 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2318 2319 /* Build the cmd pkt. */ 2320 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2321 2322 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2323 2324 cmd->param.opcode = TWA_OP_GET_PARAM; 2325 cmd->param.sgl_offset = 2; 2326 cmd->param.size = 2; 2327 cmd->param.request_id = tr->tr_request_id; 2328 cmd->param.unit = 0; 2329 cmd->param.param_count = 1; 2330 2331 /* Specify which parameter we need. */ 2332 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2333 (*param)->parameter_id = param_id; 2334 (*param)->parameter_size_bytes = param_size; 2335 2336 /* Submit the command. */ 2337 if (callback == NULL) { 2338 /* There's no call back; wait till the command completes. */ 2339 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2340 2341 if (rv != 0) 2342 goto out; 2343 2344 if ((rv = cmd->param.status) != 0) { 2345 /* twa_drain_complete_queue will have done the unmapping */ 2346 goto out; 2347 } 2348 twa_release_request(tr); 2349 return (rv); 2350 } else { 2351 /* There's a call back. Simply submit the command. */ 2352 tr->tr_callback = callback; 2353 rv = twa_map_request(tr); 2354 return (rv); 2355 } 2356 out: 2357 if (tr) 2358 twa_release_request(tr); 2359 return(rv); 2360 } 2361 2362 /* 2363 * Function name: twa_set_param 2364 * Description: Set a firmware parameter. 2365 * 2366 * Input: sc -- ptr to per ctlr structure 2367 * table_id -- parameter table # 2368 * param_id -- index of the parameter in the table 2369 * param_size -- size of the parameter in bytes 2370 * callback -- ptr to function, if any, to be called 2371 * back on completion; NULL if no callback. 2372 * Output: None 2373 * Return value: 0 -- success 2374 * non-zero-- failure 2375 */ 2376 static int 2377 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2378 void *data, void (* callback)(struct twa_request *tr)) 2379 { 2380 struct twa_request *tr; 2381 union twa_command_7k *cmd; 2382 struct twa_param_9k *param = NULL; 2383 int error = ENOMEM; 2384 2385 tr = twa_get_request(sc, 0); 2386 if (tr == NULL) 2387 return (EAGAIN); 2388 2389 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2390 2391 /* Allocate memory to send data using. */ 2392 if ((param = (struct twa_param_9k *) 2393 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2394 goto out; 2395 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2396 tr->tr_data = param; 2397 tr->tr_length = TWA_SECTOR_SIZE; 2398 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2399 2400 /* Build the cmd pkt. */ 2401 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2402 2403 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2404 2405 cmd->param.opcode = TWA_OP_SET_PARAM; 2406 cmd->param.sgl_offset = 2; 2407 cmd->param.size = 2; 2408 cmd->param.request_id = tr->tr_request_id; 2409 cmd->param.unit = 0; 2410 cmd->param.param_count = 1; 2411 2412 /* Specify which parameter we want to set. */ 2413 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2414 param->parameter_id = param_id; 2415 param->parameter_size_bytes = param_size; 2416 memcpy(param->data, data, param_size); 2417 2418 /* Submit the command. */ 2419 if (callback == NULL) { 2420 /* There's no call back; wait till the command completes. */ 2421 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2422 if (error == ETIMEDOUT) 2423 /* clean-up done by twa_immediate_request */ 2424 return(error); 2425 if (error) 2426 goto out; 2427 if ((error = cmd->param.status)) { 2428 /* 2429 * twa_drain_complete_queue will have done the 2430 * unmapping. 2431 */ 2432 goto out; 2433 } 2434 free(param, M_DEVBUF); 2435 twa_release_request(tr); 2436 return(error); 2437 } else { 2438 /* There's a call back. Simply submit the command. */ 2439 tr->tr_callback = callback; 2440 if ((error = twa_map_request(tr))) 2441 goto out; 2442 2443 return (0); 2444 } 2445 out: 2446 if (param) 2447 free(param, M_DEVBUF); 2448 if (tr) 2449 twa_release_request(tr); 2450 return(error); 2451 } 2452 2453 /* 2454 * Function name: twa_init_connection 2455 * Description: Send init_connection cmd to firmware 2456 * 2457 * Input: sc -- ptr to per ctlr structure 2458 * message_credits -- max # of requests that we might send 2459 * down simultaneously. This will be 2460 * typically set to 256 at init-time or 2461 * after a reset, and to 1 at shutdown-time 2462 * set_features -- indicates if we intend to use 64-bit 2463 * sg, also indicates if we want to do a 2464 * basic or an extended init_connection; 2465 * 2466 * Note: The following input/output parameters are valid, only in case of an 2467 * extended init_connection: 2468 * 2469 * current_fw_srl -- srl of fw we are bundled 2470 * with, if any; 0 otherwise 2471 * current_fw_arch_id -- arch_id of fw we are bundled 2472 * with, if any; 0 otherwise 2473 * current_fw_branch -- branch # of fw we are bundled 2474 * with, if any; 0 otherwise 2475 * current_fw_build -- build # of fw we are bundled 2476 * with, if any; 0 otherwise 2477 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2478 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2479 * fw_on_ctlr_branch -- branch # of fw on ctlr 2480 * fw_on_ctlr_build -- build # of fw on ctlr 2481 * init_connect_result -- result bitmap of fw response 2482 * Return value: 0 -- success 2483 * non-zero-- failure 2484 */ 2485 static int 2486 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2487 uint32_t set_features, uint16_t current_fw_srl, 2488 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2489 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2490 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2491 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2492 { 2493 struct twa_request *tr; 2494 struct twa_command_init_connect *init_connect; 2495 int error = 1; 2496 2497 /* Get a request packet. */ 2498 if ((tr = twa_get_request(sc, 0)) == NULL) 2499 goto out; 2500 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2501 /* Build the cmd pkt. */ 2502 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2503 2504 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2505 2506 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2507 init_connect->request_id = tr->tr_request_id; 2508 init_connect->message_credits = message_credits; 2509 init_connect->features = set_features; 2510 if (TWA_64BIT_ADDRESSES) 2511 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2512 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2513 /* 2514 * Fill in the extra fields needed for 2515 * an extended init_connect. 2516 */ 2517 init_connect->size = 6; 2518 init_connect->fw_srl = current_fw_srl; 2519 init_connect->fw_arch_id = current_fw_arch_id; 2520 init_connect->fw_branch = current_fw_branch; 2521 } else 2522 init_connect->size = 3; 2523 2524 /* Submit the command, and wait for it to complete. */ 2525 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2526 if (error == ETIMEDOUT) 2527 return(error); /* clean-up done by twa_immediate_request */ 2528 if (error) 2529 goto out; 2530 if ((error = init_connect->status)) { 2531 /* twa_drain_complete_queue will have done the unmapping */ 2532 goto out; 2533 } 2534 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2535 *fw_on_ctlr_srl = init_connect->fw_srl; 2536 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2537 *fw_on_ctlr_branch = init_connect->fw_branch; 2538 *fw_on_ctlr_build = init_connect->fw_build; 2539 *init_connect_result = init_connect->result; 2540 } 2541 twa_release_request(tr); 2542 return(error); 2543 2544 out: 2545 if (tr) 2546 twa_release_request(tr); 2547 return(error); 2548 } 2549 2550 static int 2551 twa_reset(struct twa_softc *sc) 2552 { 2553 int s; 2554 int error = 0; 2555 2556 /* Set the 'in reset' flag. */ 2557 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2558 2559 /* 2560 * Disable interrupts from the controller, and mask any 2561 * accidental entry into our interrupt handler. 2562 */ 2563 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2564 TWA_CONTROL_DISABLE_INTERRUPTS); 2565 2566 s = splbio(); 2567 2568 /* Soft reset the controller. */ 2569 if ((error = twa_soft_reset(sc))) 2570 goto out; 2571 2572 /* Re-establish logical connection with the controller. */ 2573 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2574 0, 0, 0, 0, 0, 2575 NULL, NULL, NULL, NULL, NULL))) { 2576 goto out; 2577 } 2578 /* 2579 * Complete all requests in the complete queue; error back all requests 2580 * in the busy queue. Any internal requests will be simply freed. 2581 * Re-submit any requests in the pending queue. 2582 */ 2583 twa_drain_busy_queue(sc); 2584 2585 out: 2586 splx(s); 2587 /* 2588 * Enable interrupts, and also clear attention and response interrupts. 2589 */ 2590 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2591 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2592 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2593 TWA_CONTROL_ENABLE_INTERRUPTS); 2594 2595 /* Clear the 'in reset' flag. */ 2596 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2597 2598 return(error); 2599 } 2600 2601 static int 2602 twa_soft_reset(struct twa_softc *sc) 2603 { 2604 uint32_t status_reg; 2605 2606 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2607 TWA_CONTROL_ISSUE_SOFT_RESET | 2608 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2609 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2610 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2611 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2612 TWA_CONTROL_DISABLE_INTERRUPTS); 2613 2614 if (twa_drain_response_queue_large(sc, 30) != 0) { 2615 aprint_error_dev(&sc->twa_dv, 2616 "response queue not empty after reset.\n"); 2617 return(1); 2618 } 2619 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2620 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2621 aprint_error_dev(&sc->twa_dv, "no attention interrupt after reset.\n"); 2622 return(1); 2623 } 2624 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2625 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2626 2627 if (twa_drain_response_queue(sc)) { 2628 aprint_error_dev(&sc->twa_dv, "cannot drain response queue.\n"); 2629 return(1); 2630 } 2631 if (twa_drain_aen_queue(sc)) { 2632 aprint_error_dev(&sc->twa_dv, "cannot drain AEN queue.\n"); 2633 return(1); 2634 } 2635 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2636 aprint_error_dev(&sc->twa_dv, "reset not reported by controller.\n"); 2637 return(1); 2638 } 2639 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2640 if (TWA_STATUS_ERRORS(status_reg) || 2641 twa_check_ctlr_state(sc, status_reg)) { 2642 aprint_error_dev(&sc->twa_dv, "controller errors detected.\n"); 2643 return(1); 2644 } 2645 return(0); 2646 } 2647 2648 static int 2649 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2650 { 2651 struct timeval t1; 2652 time_t end_time; 2653 uint32_t status_reg; 2654 2655 timeout = (timeout * 1000 * 100); 2656 2657 microtime(&t1); 2658 2659 end_time = t1.tv_usec + timeout; 2660 2661 do { 2662 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2663 /* got the required bit(s)? */ 2664 if ((status_reg & status) == status) 2665 return(0); 2666 DELAY(100000); 2667 microtime(&t1); 2668 } while (t1.tv_usec <= end_time); 2669 2670 return(1); 2671 } 2672 2673 static int 2674 twa_fetch_aen(struct twa_softc *sc) 2675 { 2676 struct twa_request *tr; 2677 int s, error = 0; 2678 2679 s = splbio(); 2680 2681 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2682 splx(s); 2683 return(EIO); 2684 } 2685 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2686 tr->tr_callback = twa_aen_callback; 2687 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2688 if (twa_request_sense(tr, 0) != 0) { 2689 if (tr->tr_data) 2690 free(tr->tr_data, M_DEVBUF); 2691 twa_release_request(tr); 2692 error = 1; 2693 } 2694 splx(s); 2695 2696 return(error); 2697 } 2698 2699 /* 2700 * Function name: twa_aen_callback 2701 * Description: Callback for requests to fetch AEN's. 2702 * 2703 * Input: tr -- ptr to completed request pkt 2704 * Output: None 2705 * Return value: None 2706 */ 2707 static void 2708 twa_aen_callback(struct twa_request *tr) 2709 { 2710 int i; 2711 int fetch_more_aens = 0; 2712 struct twa_softc *sc = tr->tr_sc; 2713 struct twa_command_header *cmd_hdr = 2714 (struct twa_command_header *)(tr->tr_data); 2715 struct twa_command_9k *cmd = 2716 &(tr->tr_command->command.cmd_pkt_9k); 2717 2718 if (! cmd->status) { 2719 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2720 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2721 if (twa_enqueue_aen(sc, cmd_hdr) 2722 != TWA_AEN_QUEUE_EMPTY) 2723 fetch_more_aens = 1; 2724 } else { 2725 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2726 for (i = 0; i < 18; i++) 2727 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2728 2729 printf(""); /* print new line */ 2730 2731 for (i = 0; i < 128; i++) 2732 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2733 } 2734 if (tr->tr_data) 2735 free(tr->tr_data, M_DEVBUF); 2736 twa_release_request(tr); 2737 2738 if (fetch_more_aens) 2739 twa_fetch_aen(sc); 2740 } 2741 2742 /* 2743 * Function name: twa_enqueue_aen 2744 * Description: Queues AEN's to be supplied to user-space tools on request. 2745 * 2746 * Input: sc -- ptr to per ctlr structure 2747 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2748 * details can be retrieved. 2749 * Output: None 2750 * Return value: None 2751 */ 2752 static uint16_t 2753 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2754 { 2755 int rv, s; 2756 struct tw_cl_event_packet *event; 2757 uint16_t aen_code; 2758 unsigned long sync_time; 2759 2760 s = splbio(); 2761 aen_code = cmd_hdr->status_block.error; 2762 2763 switch (aen_code) { 2764 case TWA_AEN_SYNC_TIME_WITH_HOST: 2765 2766 sync_time = (time_second - (3 * 86400)) % 604800; 2767 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2768 TWA_PARAM_TIME_SchedulerTime, 4, 2769 &sync_time, twa_aen_callback); 2770 #ifdef DIAGNOSTIC 2771 if (rv != 0) 2772 aprint_error_dev(&sc->twa_dv, "unable to sync time with ctlr\n"); 2773 #endif 2774 break; 2775 2776 case TWA_AEN_QUEUE_EMPTY: 2777 break; 2778 2779 default: 2780 /* Queue the event. */ 2781 event = sc->twa_aen_queue[sc->twa_aen_head]; 2782 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2783 sc->twa_aen_queue_overflow = TRUE; 2784 event->severity = 2785 cmd_hdr->status_block.substatus_block.severity; 2786 event->time_stamp_sec = time_second; 2787 event->aen_code = aen_code; 2788 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2789 event->sequence_id = ++(sc->twa_current_sequence_id); 2790 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2791 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2792 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2793 event->parameter_len); 2794 2795 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2796 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2797 device_xname(&sc->twa_dv), 2798 aen_code, 2799 twa_aen_severity_table[event->severity], 2800 twa_find_msg_string(twa_aen_table, aen_code), 2801 event->parameter_data); 2802 } 2803 2804 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2805 sc->twa_aen_queue_wrapped = TRUE; 2806 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2807 break; 2808 } /* switch */ 2809 splx(s); 2810 2811 return (aen_code); 2812 } 2813 2814 /* 2815 * Function name: twa_find_aen 2816 * Description: Reports whether a given AEN ever occurred. 2817 * 2818 * Input: sc -- ptr to per ctlr structure 2819 * aen_code-- AEN to look for 2820 * Output: None 2821 * Return value: 0 -- success 2822 * non-zero-- failure 2823 */ 2824 static int 2825 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2826 { 2827 uint32_t last_index; 2828 int s; 2829 int i; 2830 2831 s = splbio(); 2832 2833 if (sc->twa_aen_queue_wrapped) 2834 last_index = sc->twa_aen_head; 2835 else 2836 last_index = 0; 2837 2838 i = sc->twa_aen_head; 2839 do { 2840 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2841 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2842 splx(s); 2843 return(0); 2844 } 2845 } while (i != last_index); 2846 2847 splx(s); 2848 return(1); 2849 } 2850 2851 static inline void 2852 twa_request_init(struct twa_request *tr, int flags) 2853 { 2854 tr->tr_data = NULL; 2855 tr->tr_real_data = NULL; 2856 tr->tr_length = 0; 2857 tr->tr_real_length = 0; 2858 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2859 tr->tr_flags = flags; 2860 tr->tr_error = 0; 2861 tr->tr_callback = NULL; 2862 tr->tr_cmd_pkt_type = 0; 2863 tr->bp = 0; 2864 2865 /* 2866 * Look at the status field in the command packet to see how 2867 * it completed the last time it was used, and zero out only 2868 * the portions that might have changed. Note that we don't 2869 * care to zero out the sglist. 2870 */ 2871 if (tr->tr_command->command.cmd_pkt_9k.status) 2872 memset(tr->tr_command, 0, 2873 sizeof(struct twa_command_header) + 28); 2874 else 2875 memset(&(tr->tr_command->command), 0, 28); 2876 } 2877 2878 struct twa_request * 2879 twa_get_request_wait(struct twa_softc *sc, int flags) 2880 { 2881 struct twa_request *tr; 2882 int s; 2883 2884 KASSERT((flags & TWA_CMD_AEN) == 0); 2885 2886 s = splbio(); 2887 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2888 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2889 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2890 } 2891 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2892 2893 splx(s); 2894 2895 twa_request_init(tr, flags); 2896 2897 return(tr); 2898 } 2899 2900 struct twa_request * 2901 twa_get_request(struct twa_softc *sc, int flags) 2902 { 2903 int s; 2904 struct twa_request *tr; 2905 2906 /* Get a free request packet. */ 2907 s = splbio(); 2908 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2909 2910 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2911 tr = sc->sc_twa_request; 2912 flags |= TWA_CMD_AEN_BUSY; 2913 } else { 2914 splx(s); 2915 return (NULL); 2916 } 2917 } else { 2918 if (__predict_false((tr = 2919 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2920 splx(s); 2921 return (NULL); 2922 } 2923 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2924 } 2925 splx(s); 2926 2927 twa_request_init(tr, flags); 2928 2929 return(tr); 2930 } 2931 2932 /* 2933 * Print some information about the controller 2934 */ 2935 static void 2936 twa_describe_controller(struct twa_softc *sc) 2937 { 2938 struct twa_param_9k *p[10]; 2939 int i, rv = 0; 2940 uint32_t dsize; 2941 uint8_t ports; 2942 2943 memset(p, sizeof(struct twa_param_9k *), 10); 2944 2945 /* Get the port count. */ 2946 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2947 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2948 2949 /* get version strings */ 2950 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2951 16, NULL, &p[1]); 2952 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2953 16, NULL, &p[2]); 2954 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2955 16, NULL, &p[3]); 2956 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2957 8, NULL, &p[4]); 2958 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2959 8, NULL, &p[5]); 2960 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2961 8, NULL, &p[6]); 2962 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2963 16, NULL, &p[7]); 2964 2965 if (rv) { 2966 /* some error occurred */ 2967 aprint_error_dev(&sc->twa_dv, "failed to fetch version information\n"); 2968 goto bail; 2969 } 2970 2971 ports = *(uint8_t *)(p[0]->data); 2972 2973 aprint_normal_dev(&sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2974 ports, p[1]->data, p[2]->data); 2975 2976 aprint_verbose_dev(&sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2977 p[3]->data, p[4]->data, 2978 p[5]->data, p[6]->data); 2979 2980 for (i = 0; i < ports; i++) { 2981 2982 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2983 continue; 2984 2985 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2986 TWA_PARAM_DRIVEMODELINDEX, 2987 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 2988 2989 if (rv != 0) { 2990 aprint_error_dev(&sc->twa_dv, "unable to get drive model for port" 2991 " %d\n", i); 2992 continue; 2993 } 2994 2995 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2996 TWA_PARAM_DRIVESIZEINDEX, 2997 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 2998 2999 if (rv != 0) { 3000 aprint_error_dev(&sc->twa_dv, "unable to get drive size" 3001 " for port %d\n", i); 3002 free(p[8], M_DEVBUF); 3003 continue; 3004 } 3005 3006 dsize = *(uint32_t *)(p[9]->data); 3007 3008 aprint_verbose_dev(&sc->twa_dv, "port %d: %.40s %d MB\n", 3009 i, p[8]->data, dsize / 2048); 3010 3011 if (p[8]) 3012 free(p[8], M_DEVBUF); 3013 if (p[9]) 3014 free(p[9], M_DEVBUF); 3015 } 3016 bail: 3017 if (p[0]) 3018 free(p[0], M_DEVBUF); 3019 if (p[1]) 3020 free(p[1], M_DEVBUF); 3021 if (p[2]) 3022 free(p[2], M_DEVBUF); 3023 if (p[3]) 3024 free(p[3], M_DEVBUF); 3025 if (p[4]) 3026 free(p[4], M_DEVBUF); 3027 if (p[5]) 3028 free(p[5], M_DEVBUF); 3029 if (p[6]) 3030 free(p[6], M_DEVBUF); 3031 } 3032 3033 /* 3034 * Function name: twa_check_ctlr_state 3035 * Description: Makes sure that the fw status register reports a 3036 * proper status. 3037 * 3038 * Input: sc -- ptr to per ctlr structure 3039 * status_reg -- value in the status register 3040 * Output: None 3041 * Return value: 0 -- no errors 3042 * non-zero-- errors 3043 */ 3044 static int 3045 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3046 { 3047 int result = 0; 3048 struct timeval t1; 3049 static time_t last_warning[2] = {0, 0}; 3050 3051 /* Check if the 'micro-controller ready' bit is not set. */ 3052 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3053 TWA_STATUS_EXPECTED_BITS) { 3054 3055 microtime(&t1); 3056 3057 last_warning[0] += (5 * 1000 * 100); 3058 3059 if (t1.tv_usec > last_warning[0]) { 3060 microtime(&t1); 3061 last_warning[0] = t1.tv_usec; 3062 } 3063 result = 1; 3064 } 3065 3066 /* Check if any error bits are set. */ 3067 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3068 3069 microtime(&t1); 3070 last_warning[1] += (5 * 1000 * 100); 3071 if (t1.tv_usec > last_warning[1]) { 3072 microtime(&t1); 3073 last_warning[1] = t1.tv_usec; 3074 } 3075 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3076 aprint_error_dev(&sc->twa_dv, "clearing PCI parity error " 3077 "re-seat/move/replace card.\n"); 3078 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3079 TWA_CONTROL_CLEAR_PARITY_ERROR); 3080 pci_conf_write(sc->pc, sc->tag, 3081 PCI_COMMAND_STATUS_REG, 3082 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3083 } 3084 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3085 aprint_error_dev(&sc->twa_dv, "clearing PCI abort\n"); 3086 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3087 TWA_CONTROL_CLEAR_PCI_ABORT); 3088 pci_conf_write(sc->pc, sc->tag, 3089 PCI_COMMAND_STATUS_REG, 3090 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3091 } 3092 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3093 /* 3094 * As documented by 3ware, the 9650 erroneously 3095 * flags queue errors during resets. 3096 * Just ignore them during the reset instead of 3097 * bothering the console. 3098 */ 3099 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3100 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3101 aprint_error_dev(&sc->twa_dv, 3102 "clearing controller queue error\n"); 3103 } 3104 3105 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3106 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3107 } 3108 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3109 aprint_error_dev(&sc->twa_dv, "micro-controller error\n"); 3110 result = 1; 3111 } 3112 } 3113 return(result); 3114 } 3115
Indexes created Tue Sep 23 07:09:52 GMT 2025