twa.c revision 1.41
1 /* $NetBSD: twa.c,v 1.41 2012/07/27 14:02:17 jakllsch Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.41 2012/07/27 14:02:17 jakllsch Exp $"); 71 72 #define TWA_DEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/device.h> 78 #include <sys/queue.h> 79 #include <sys/proc.h> 80 #include <sys/bswap.h> 81 #include <sys/buf.h> 82 #include <sys/bufq.h> 83 #include <sys/endian.h> 84 #include <sys/malloc.h> 85 #include <sys/conf.h> 86 #include <sys/disk.h> 87 #include <sys/sysctl.h> 88 #include <sys/syslog.h> 89 #if 1 90 #include <sys/ktrace.h> 91 #endif 92 93 #include <sys/bus.h> 94 95 #include <dev/pci/pcireg.h> 96 #include <dev/pci/pcivar.h> 97 #include <dev/pci/pcidevs.h> 98 #include <dev/pci/twareg.h> 99 #include <dev/pci/twavar.h> 100 #include <dev/pci/twaio.h> 101 102 #include <dev/scsipi/scsipi_all.h> 103 #include <dev/scsipi/scsipi_disk.h> 104 #include <dev/scsipi/scsipiconf.h> 105 #include <dev/scsipi/scsi_spc.h> 106 107 #include <dev/ldvar.h> 108 109 #include "locators.h" 110 111 #define PCI_CBIO 0x10 112 113 static int twa_fetch_aen(struct twa_softc *); 114 static void twa_aen_callback(struct twa_request *); 115 static int twa_find_aen(struct twa_softc *sc, uint16_t); 116 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 117 struct twa_command_header *); 118 119 static void twa_attach(device_t, device_t, void *); 120 static void twa_shutdown(void *); 121 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 122 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 123 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 124 static int twa_intr(void *); 125 static int twa_match(device_t, cfdata_t, void *); 126 static int twa_reset(struct twa_softc *); 127 128 static int twa_print(void *, const char *); 129 static int twa_soft_reset(struct twa_softc *); 130 131 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 132 static int twa_get_param(struct twa_softc *, int, int, size_t, 133 void (* callback)(struct twa_request *), 134 struct twa_param_9k **); 135 static int twa_set_param(struct twa_softc *, int, int, int, void *, 136 void (* callback)(struct twa_request *)); 137 static void twa_describe_controller(struct twa_softc *); 138 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 139 static int twa_done(struct twa_softc *); 140 141 extern struct cfdriver twa_cd; 142 extern uint32_t twa_fw_img_size; 143 extern uint8_t twa_fw_img[]; 144 145 CFATTACH_DECL_NEW(twa, sizeof(struct twa_softc), 146 twa_match, twa_attach, NULL, NULL); 147 148 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 149 const char twaver[] = "1.50.01.002"; 150 151 /* AEN messages. */ 152 static const struct twa_message twa_aen_table[] = { 153 {0x0000, "AEN queue empty"}, 154 {0x0001, "Controller reset occurred"}, 155 {0x0002, "Degraded unit detected"}, 156 {0x0003, "Controller error occured"}, 157 {0x0004, "Background rebuild failed"}, 158 {0x0005, "Background rebuild done"}, 159 {0x0006, "Incomplete unit detected"}, 160 {0x0007, "Background initialize done"}, 161 {0x0008, "Unclean shutdown detected"}, 162 {0x0009, "Drive timeout detected"}, 163 {0x000A, "Drive error detected"}, 164 {0x000B, "Rebuild started"}, 165 {0x000C, "Background initialize started"}, 166 {0x000D, "Entire logical unit was deleted"}, 167 {0x000E, "Background initialize failed"}, 168 {0x000F, "SMART attribute exceeded threshold"}, 169 {0x0010, "Power supply reported AC under range"}, 170 {0x0011, "Power supply reported DC out of range"}, 171 {0x0012, "Power supply reported a malfunction"}, 172 {0x0013, "Power supply predicted malfunction"}, 173 {0x0014, "Battery charge is below threshold"}, 174 {0x0015, "Fan speed is below threshold"}, 175 {0x0016, "Temperature sensor is above threshold"}, 176 {0x0017, "Power supply was removed"}, 177 {0x0018, "Power supply was inserted"}, 178 {0x0019, "Drive was removed from a bay"}, 179 {0x001A, "Drive was inserted into a bay"}, 180 {0x001B, "Drive bay cover door was opened"}, 181 {0x001C, "Drive bay cover door was closed"}, 182 {0x001D, "Product case was opened"}, 183 {0x0020, "Prepare for shutdown (power-off)"}, 184 {0x0021, "Downgrade UDMA mode to lower speed"}, 185 {0x0022, "Upgrade UDMA mode to higher speed"}, 186 {0x0023, "Sector repair completed"}, 187 {0x0024, "Sbuf memory test failed"}, 188 {0x0025, "Error flushing cached write data to disk"}, 189 {0x0026, "Drive reported data ECC error"}, 190 {0x0027, "DCB has checksum error"}, 191 {0x0028, "DCB version is unsupported"}, 192 {0x0029, "Background verify started"}, 193 {0x002A, "Background verify failed"}, 194 {0x002B, "Background verify done"}, 195 {0x002C, "Bad sector overwritten during rebuild"}, 196 {0x002D, "Source drive error occurred"}, 197 {0x002E, "Replace failed because replacement drive too small"}, 198 {0x002F, "Verify failed because array was never initialized"}, 199 {0x0030, "Unsupported ATA drive"}, 200 {0x0031, "Synchronize host/controller time"}, 201 {0x0032, "Spare capacity is inadequate for some units"}, 202 {0x0033, "Background migration started"}, 203 {0x0034, "Background migration failed"}, 204 {0x0035, "Background migration done"}, 205 {0x0036, "Verify detected and fixed data/parity mismatch"}, 206 {0x0037, "SO-DIMM incompatible"}, 207 {0x0038, "SO-DIMM not detected"}, 208 {0x0039, "Corrected Sbuf ECC error"}, 209 {0x003A, "Drive power on reset detected"}, 210 {0x003B, "Background rebuild paused"}, 211 {0x003C, "Background initialize paused"}, 212 {0x003D, "Background verify paused"}, 213 {0x003E, "Background migration paused"}, 214 {0x003F, "Corrupt flash file system detected"}, 215 {0x0040, "Flash file system repaired"}, 216 {0x0041, "Unit number assignments were lost"}, 217 {0x0042, "Error during read of primary DCB"}, 218 {0x0043, "Latent error found in backup DCB"}, 219 {0x0044, "Battery voltage is normal"}, 220 {0x0045, "Battery voltage is low"}, 221 {0x0046, "Battery voltage is high"}, 222 {0x0047, "Battery voltage is too low"}, 223 {0x0048, "Battery voltage is too high"}, 224 {0x0049, "Battery temperature is normal"}, 225 {0x004A, "Battery temperature is low"}, 226 {0x004B, "Battery temperature is high"}, 227 {0x004C, "Battery temperature is too low"}, 228 {0x004D, "Battery temperature is too high"}, 229 {0x004E, "Battery capacity test started"}, 230 {0x004F, "Cache synchronization skipped"}, 231 {0x0050, "Battery capacity test completed"}, 232 {0x0051, "Battery health check started"}, 233 {0x0052, "Battery health check completed"}, 234 {0x0053, "Battery capacity test needed"}, 235 {0x0054, "Battery charge termination voltage is at high level"}, 236 {0x0055, "Battery charging started"}, 237 {0x0056, "Battery charging completed"}, 238 {0x0057, "Battery charging fault"}, 239 {0x0058, "Battery capacity is below warning level"}, 240 {0x0059, "Battery capacity is below error level"}, 241 {0x005A, "Battery is present"}, 242 {0x005B, "Battery is not present"}, 243 {0x005C, "Battery is weak"}, 244 {0x005D, "Battery health check failed"}, 245 {0x005E, "Cache synchronized after power fail"}, 246 {0x005F, "Cache synchronization failed; some data lost"}, 247 {0x0060, "Bad cache meta data checksum"}, 248 {0x0061, "Bad cache meta data signature"}, 249 {0x0062, "Cache meta data restore failed"}, 250 {0x0063, "BBU not found after power fail"}, 251 {0x00FC, "Recovered/finished array membership update"}, 252 {0x00FD, "Handler lockup"}, 253 {0x00FE, "Retrying PCI transfer"}, 254 {0x00FF, "AEN queue is full"}, 255 {0xFFFFFFFF, NULL} 256 }; 257 258 /* AEN severity table. */ 259 static const char *twa_aen_severity_table[] = { 260 "None", 261 "ERROR", 262 "WARNING", 263 "INFO", 264 "DEBUG", 265 NULL 266 }; 267 268 /* Error messages. */ 269 static const struct twa_message twa_error_table[] = { 270 {0x0100, "SGL entry contains zero data"}, 271 {0x0101, "Invalid command opcode"}, 272 {0x0102, "SGL entry has unaligned address"}, 273 {0x0103, "SGL size does not match command"}, 274 {0x0104, "SGL entry has illegal length"}, 275 {0x0105, "Command packet is not aligned"}, 276 {0x0106, "Invalid request ID"}, 277 {0x0107, "Duplicate request ID"}, 278 {0x0108, "ID not locked"}, 279 {0x0109, "LBA out of range"}, 280 {0x010A, "Logical unit not supported"}, 281 {0x010B, "Parameter table does not exist"}, 282 {0x010C, "Parameter index does not exist"}, 283 {0x010D, "Invalid field in CDB"}, 284 {0x010E, "Specified port has invalid drive"}, 285 {0x010F, "Parameter item size mismatch"}, 286 {0x0110, "Failed memory allocation"}, 287 {0x0111, "Memory request too large"}, 288 {0x0112, "Out of memory segments"}, 289 {0x0113, "Invalid address to deallocate"}, 290 {0x0114, "Out of memory"}, 291 {0x0115, "Out of heap"}, 292 {0x0120, "Double degrade"}, 293 {0x0121, "Drive not degraded"}, 294 {0x0122, "Reconstruct error"}, 295 {0x0123, "Replace not accepted"}, 296 {0x0124, "Replace drive capacity too small"}, 297 {0x0125, "Sector count not allowed"}, 298 {0x0126, "No spares left"}, 299 {0x0127, "Reconstruct error"}, 300 {0x0128, "Unit is offline"}, 301 {0x0129, "Cannot update status to DCB"}, 302 {0x0130, "Invalid stripe handle"}, 303 {0x0131, "Handle that was not locked"}, 304 {0x0132, "Handle that was not empy"}, 305 {0x0133, "Handle has different owner"}, 306 {0x0140, "IPR has parent"}, 307 {0x0150, "Illegal Pbuf address alignment"}, 308 {0x0151, "Illegal Pbuf transfer length"}, 309 {0x0152, "Illegal Sbuf address alignment"}, 310 {0x0153, "Illegal Sbuf transfer length"}, 311 {0x0160, "Command packet too large"}, 312 {0x0161, "SGL exceeds maximum length"}, 313 {0x0162, "SGL has too many entries"}, 314 {0x0170, "Insufficient resources for rebuilder"}, 315 {0x0171, "Verify error (data != parity)"}, 316 {0x0180, "Requested segment not in directory of this DCB"}, 317 {0x0181, "DCB segment has unsupported version"}, 318 {0x0182, "DCB segment has checksum error"}, 319 {0x0183, "DCB support (settings) segment invalid"}, 320 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 321 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 322 {0x01A0, "Could not clear Sbuf"}, 323 {0x01C0, "Flash identify failed"}, 324 {0x01C1, "Flash out of bounds"}, 325 {0x01C2, "Flash verify error"}, 326 {0x01C3, "Flash file object not found"}, 327 {0x01C4, "Flash file already present"}, 328 {0x01C5, "Flash file system full"}, 329 {0x01C6, "Flash file not present"}, 330 {0x01C7, "Flash file size error"}, 331 {0x01C8, "Bad flash file checksum"}, 332 {0x01CA, "Corrupt flash file system detected"}, 333 {0x01D0, "Invalid field in parameter list"}, 334 {0x01D1, "Parameter list length error"}, 335 {0x01D2, "Parameter item is not changeable"}, 336 {0x01D3, "Parameter item is not saveable"}, 337 {0x0200, "UDMA CRC error"}, 338 {0x0201, "Internal CRC error"}, 339 {0x0202, "Data ECC error"}, 340 {0x0203, "ADP level 1 error"}, 341 {0x0204, "Port timeout"}, 342 {0x0205, "Drive power on reset"}, 343 {0x0206, "ADP level 2 error"}, 344 {0x0207, "Soft reset failed"}, 345 {0x0208, "Drive not ready"}, 346 {0x0209, "Unclassified port error"}, 347 {0x020A, "Drive aborted command"}, 348 {0x0210, "Internal CRC error"}, 349 {0x0211, "Host PCI bus abort"}, 350 {0x0212, "Host PCI parity error"}, 351 {0x0213, "Port handler error"}, 352 {0x0214, "Token interrupt count error"}, 353 {0x0215, "Timeout waiting for PCI transfer"}, 354 {0x0216, "Corrected buffer ECC"}, 355 {0x0217, "Uncorrected buffer ECC"}, 356 {0x0230, "Unsupported command during flash recovery"}, 357 {0x0231, "Next image buffer expected"}, 358 {0x0232, "Binary image architecture incompatible"}, 359 {0x0233, "Binary image has no signature"}, 360 {0x0234, "Binary image has bad checksum"}, 361 {0x0235, "Image downloaded overflowed buffer"}, 362 {0x0240, "I2C device not found"}, 363 {0x0241, "I2C transaction aborted"}, 364 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 365 {0x0243, "SO-DIMM unsupported"}, 366 {0x0248, "SPI transfer status error"}, 367 {0x0249, "SPI transfer timeout error"}, 368 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 369 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 370 {0x0252, "Invalid value in CreateUnit descriptor"}, 371 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 372 {0x0254, "Unable to create data channel for this unit descriptor"}, 373 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 374 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 375 {0x0257, "CreateUnit does not support this descriptor version"}, 376 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 377 {0x0259, "Too many descriptors in CreateUnit"}, 378 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 379 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 380 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 381 {0x0260, "SMART attribute exceeded threshold"}, 382 {0xFFFFFFFF, NULL} 383 }; 384 385 struct twa_pci_identity { 386 uint32_t vendor_id; 387 uint32_t product_id; 388 const char *name; 389 }; 390 391 static const struct twa_pci_identity pci_twa_products[] = { 392 { PCI_VENDOR_3WARE, 393 PCI_PRODUCT_3WARE_9000, 394 "3ware 9000 series", 395 }, 396 { PCI_VENDOR_3WARE, 397 PCI_PRODUCT_3WARE_9550, 398 "3ware 9550SX series", 399 }, 400 { PCI_VENDOR_3WARE, 401 PCI_PRODUCT_3WARE_9650, 402 "3ware 9650SE series", 403 }, 404 { PCI_VENDOR_3WARE, 405 PCI_PRODUCT_3WARE_9690, 406 "3ware 9690 series", 407 }, 408 { 0, 409 0, 410 NULL, 411 }, 412 }; 413 414 415 static inline void 416 twa_outl(struct twa_softc *sc, int off, uint32_t val) 417 { 418 419 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 420 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 421 BUS_SPACE_BARRIER_WRITE); 422 } 423 424 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 425 { 426 427 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 428 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 429 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 430 } 431 432 void 433 twa_request_wait_handler(struct twa_request *tr) 434 { 435 436 wakeup(tr); 437 } 438 439 static int 440 twa_match(device_t parent, cfdata_t cfdata, 441 void *aux) 442 { 443 int i; 444 struct pci_attach_args *pa = aux; 445 const struct twa_pci_identity *entry = 0; 446 447 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 448 for (i = 0; (pci_twa_products[i].product_id); i++) { 449 entry = &pci_twa_products[i]; 450 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 451 aprint_normal("%s: (rev. 0x%02x)\n", 452 entry->name, PCI_REVISION(pa->pa_class)); 453 return (1); 454 } 455 } 456 } 457 return (0); 458 } 459 460 static const char * 461 twa_find_msg_string(const struct twa_message *table, uint16_t code) 462 { 463 int i; 464 465 for (i = 0; table[i].message != NULL; i++) 466 if (table[i].code == code) 467 return(table[i].message); 468 469 return(table[i].message); 470 } 471 472 void 473 twa_release_request(struct twa_request *tr) 474 { 475 int s; 476 struct twa_softc *sc; 477 478 sc = tr->tr_sc; 479 480 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 481 s = splbio(); 482 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 483 splx(s); 484 if (__predict_false((tr->tr_sc->twa_sc_flags & 485 TWA_STATE_REQUEST_WAIT) != 0)) { 486 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 487 wakeup(&sc->twa_free); 488 } 489 } else 490 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 491 } 492 493 static void 494 twa_unmap_request(struct twa_request *tr) 495 { 496 struct twa_softc *sc = tr->tr_sc; 497 uint8_t cmd_status; 498 int s; 499 500 /* If the command involved data, unmap that too. */ 501 if (tr->tr_data != NULL) { 502 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 503 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 504 else 505 cmd_status = 506 tr->tr_command->command.cmd_pkt_7k.generic.status; 507 508 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 509 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 510 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 511 /* 512 * If we are using a bounce buffer, and we are reading 513 * data, copy the real data in. 514 */ 515 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 516 if (cmd_status == 0) 517 memcpy(tr->tr_real_data, tr->tr_data, 518 tr->tr_real_length); 519 } 520 if (tr->tr_flags & TWA_CMD_DATA_IN) 521 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 522 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 523 524 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 525 } 526 527 /* Free alignment buffer if it was used. */ 528 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 529 s = splvm(); 530 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 531 tr->tr_length); 532 splx(s); 533 tr->tr_data = tr->tr_real_data; 534 tr->tr_length = tr->tr_real_length; 535 } 536 } 537 538 /* 539 * Function name: twa_wait_request 540 * Description: Sends down a firmware cmd, and waits for the completion, 541 * but NOT in a tight loop. 542 * 543 * Input: tr -- ptr to request pkt 544 * timeout -- max # of seconds to wait before giving up 545 * Output: None 546 * Return value: 0 -- success 547 * non-zero-- failure 548 */ 549 static int 550 twa_wait_request(struct twa_request *tr, uint32_t timeout) 551 { 552 time_t end_time; 553 struct timeval t1; 554 int s, rv; 555 556 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 557 tr->tr_callback = twa_request_wait_handler; 558 tr->tr_status = TWA_CMD_BUSY; 559 560 rv = twa_map_request(tr); 561 562 if (rv != 0) 563 return (rv); 564 565 microtime(&t1); 566 end_time = t1.tv_usec + 567 (timeout * 1000 * 100); 568 569 while (tr->tr_status != TWA_CMD_COMPLETE) { 570 rv = tr->tr_error; 571 if (rv != 0) 572 return(rv); 573 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 574 break; 575 576 if (rv == EWOULDBLOCK) { 577 /* 578 * We will reset the controller only if the request has 579 * already been submitted, so as to not lose the 580 * request packet. If a busy request timed out, the 581 * reset will take care of freeing resources. If a 582 * pending request timed out, we will free resources 583 * for that request, right here. So, the caller is 584 * expected to NOT cleanup when ETIMEDOUT is returned. 585 */ 586 if (tr->tr_status == TWA_CMD_BUSY) 587 twa_reset(tr->tr_sc); 588 else { 589 /* Request was never submitted. Clean up. */ 590 s = splbio(); 591 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 592 tr_link); 593 splx(s); 594 595 twa_unmap_request(tr); 596 if (tr->tr_data) 597 free(tr->tr_data, M_DEVBUF); 598 599 twa_release_request(tr); 600 } 601 return(ETIMEDOUT); 602 } 603 /* 604 * Either the request got completed, or we were woken up by a 605 * signal. Calculate the new timeout, in case it was the 606 * latter. 607 */ 608 microtime(&t1); 609 610 timeout = (end_time - t1.tv_usec) / (1000 * 100); 611 } 612 return(rv); 613 } 614 615 /* 616 * Function name: twa_immediate_request 617 * Description: Sends down a firmware cmd, and waits for the completion 618 * in a tight loop. 619 * 620 * Input: tr -- ptr to request pkt 621 * timeout -- max # of seconds to wait before giving up 622 * Output: None 623 * Return value: 0 -- success 624 * non-zero-- failure 625 */ 626 static int 627 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 628 { 629 struct timeval t1; 630 int s = 0, rv = 0; 631 632 rv = twa_map_request(tr); 633 634 if (rv != 0) 635 return(rv); 636 637 timeout = (timeout * 10000 * 10); 638 639 microtime(&t1); 640 641 timeout += t1.tv_usec; 642 643 do { 644 rv = tr->tr_error; 645 if (rv != 0) 646 return(rv); 647 s = splbio(); 648 twa_done(tr->tr_sc); 649 splx(s); 650 if (tr->tr_status == TWA_CMD_COMPLETE) 651 return(rv); 652 microtime(&t1); 653 } while (t1.tv_usec <= timeout); 654 655 /* 656 * We will reset the controller only if the request has 657 * already been submitted, so as to not lose the 658 * request packet. If a busy request timed out, the 659 * reset will take care of freeing resources. If a 660 * pending request timed out, we will free resources 661 * for that request, right here. So, the caller is 662 * expected to NOT cleanup when ETIMEDOUT is returned. 663 */ 664 rv = ETIMEDOUT; 665 666 if (tr->tr_status == TWA_CMD_BUSY) 667 twa_reset(tr->tr_sc); 668 else { 669 /* Request was never submitted. Clean up. */ 670 s = splbio(); 671 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 672 splx(s); 673 twa_unmap_request(tr); 674 if (tr->tr_data) 675 free(tr->tr_data, M_DEVBUF); 676 677 twa_release_request(tr); 678 } 679 return (rv); 680 } 681 682 static int 683 twa_inquiry(struct twa_request *tr, int lunid) 684 { 685 int error; 686 struct twa_command_9k *tr_9k_cmd; 687 688 if (tr->tr_data == NULL) 689 return (ENOMEM); 690 691 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 692 693 tr->tr_length = TWA_SECTOR_SIZE; 694 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 695 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 696 697 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 698 699 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 700 tr_9k_cmd->unit = lunid; 701 tr_9k_cmd->request_id = tr->tr_request_id; 702 tr_9k_cmd->status = 0; 703 tr_9k_cmd->sgl_offset = 16; 704 tr_9k_cmd->sgl_entries = 1; 705 /* create the CDB here */ 706 tr_9k_cmd->cdb[0] = INQUIRY; 707 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 708 tr_9k_cmd->cdb[4] = 255; 709 710 /* XXXX setup page data no lun device 711 * it seems 9000 series does not indicate 712 * NOTPRESENT - need more investigation 713 */ 714 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 715 SID_QUAL_LU_NOTPRESENT; 716 717 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 718 719 if (error != 0) 720 return (error); 721 722 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 723 SID_QUAL_LU_NOTPRESENT) 724 error = 1; 725 726 return (error); 727 } 728 729 static int 730 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 731 { 732 733 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor); 734 735 return (1); 736 } 737 738 739 static uint64_t 740 twa_read_capacity(struct twa_request *tr, int lunid) 741 { 742 int error; 743 struct twa_command_9k *tr_9k_cmd; 744 uint64_t array_size = 0LL; 745 746 if (tr->tr_data == NULL) 747 return (ENOMEM); 748 749 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 750 751 tr->tr_length = TWA_SECTOR_SIZE; 752 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 753 tr->tr_flags |= TWA_CMD_DATA_OUT; 754 755 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 756 757 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 758 tr_9k_cmd->unit = lunid; 759 tr_9k_cmd->request_id = tr->tr_request_id; 760 tr_9k_cmd->status = 0; 761 tr_9k_cmd->sgl_offset = 16; 762 tr_9k_cmd->sgl_entries = 1; 763 /* create the CDB here */ 764 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 765 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 766 767 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 768 769 if (error == 0) { 770 #if BYTE_ORDER == BIG_ENDIAN 771 array_size = bswap64(_8btol( 772 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 773 #else 774 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 775 tr->tr_data)->addr) + 1; 776 #endif 777 } 778 return (array_size); 779 } 780 781 static int 782 twa_request_sense(struct twa_request *tr, int lunid) 783 { 784 int error = 1; 785 struct twa_command_9k *tr_9k_cmd; 786 787 if (tr->tr_data == NULL) 788 return (error); 789 790 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 791 792 tr->tr_length = TWA_SECTOR_SIZE; 793 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 794 tr->tr_flags |= TWA_CMD_DATA_OUT; 795 796 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 797 798 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 799 tr_9k_cmd->unit = lunid; 800 tr_9k_cmd->request_id = tr->tr_request_id; 801 tr_9k_cmd->status = 0; 802 tr_9k_cmd->sgl_offset = 16; 803 tr_9k_cmd->sgl_entries = 1; 804 /* create the CDB here */ 805 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 806 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 807 tr_9k_cmd->cdb[4] = 255; 808 809 /*XXX AEN notification called in interrupt context 810 * so just queue the request. Return as quickly 811 * as possible from interrupt 812 */ 813 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 814 error = twa_map_request(tr); 815 else 816 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 817 818 return (error); 819 } 820 821 static int 822 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 823 { 824 struct twa_request *tr; 825 struct twa_command_packet *tc; 826 bus_dma_segment_t seg; 827 size_t max_segs, max_xfer; 828 int i, rv, rseg, size; 829 830 if ((sc->sc_units = malloc(sc->sc_nunits * 831 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 832 return(ENOMEM); 833 834 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 835 M_DEVBUF, M_NOWAIT)) == NULL) 836 return(ENOMEM); 837 838 size = num_reqs * sizeof(struct twa_command_packet); 839 840 /* Allocate memory for cmd pkts. */ 841 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 842 size, PAGE_SIZE, 0, &seg, 843 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 844 aprint_error_dev(sc->twa_dv, "unable to allocate " 845 "command packets, rv = %d\n", rv); 846 return (ENOMEM); 847 } 848 849 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 850 &seg, rseg, size, (void **)&sc->twa_cmds, 851 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 852 aprint_error_dev(sc->twa_dv, "unable to map commands, rv = %d\n", rv); 853 return (1); 854 } 855 856 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 857 size, num_reqs, size, 858 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 859 aprint_error_dev(sc->twa_dv, "unable to create command DMA map, " 860 "rv = %d\n", rv); 861 return (ENOMEM); 862 } 863 864 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 865 sc->twa_cmds, size, NULL, 866 BUS_DMA_NOWAIT)) != 0) { 867 aprint_error_dev(sc->twa_dv, "unable to load command DMA map, " 868 "rv = %d\n", rv); 869 return (1); 870 } 871 872 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 873 aprint_error_dev(sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 874 875 return (1); 876 } 877 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 878 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 879 880 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 881 memset(sc->twa_cmd_pkt_buf, 0, 882 num_reqs * sizeof(struct twa_command_packet)); 883 884 sc->sc_twa_request = sc->twa_req_buf; 885 max_segs = twa_get_maxsegs(); 886 max_xfer = twa_get_maxxfer(max_segs); 887 888 for (i = 0; i < num_reqs; i++, tc++) { 889 tr = &(sc->twa_req_buf[i]); 890 tr->tr_command = tc; 891 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 892 (i * sizeof(struct twa_command_packet)); 893 tr->tr_request_id = i; 894 tr->tr_sc = sc; 895 896 /* 897 * Create a map for data buffers. maxsize (256 * 1024) used in 898 * bus_dma_tag_create above should suffice the bounce page needs 899 * for data buffers, since the max I/O size we support is 128KB. 900 * If we supported I/O's bigger than 256KB, we would have to 901 * create a second dma_tag, with the appropriate maxsize. 902 */ 903 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 904 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 905 &tr->tr_dma_map)) != 0) { 906 aprint_error_dev(sc->twa_dv, "unable to create command " 907 "DMA map, rv = %d\n", rv); 908 return (ENOMEM); 909 } 910 /* Insert request into the free queue. */ 911 if (i != 0) { 912 sc->twa_lookup[i] = tr; 913 twa_release_request(tr); 914 } else 915 tr->tr_flags |= TWA_CMD_AEN; 916 } 917 return(0); 918 } 919 920 static void 921 twa_recompute_openings(struct twa_softc *sc) 922 { 923 struct twa_drive *td; 924 int unit; 925 int openings; 926 uint64_t total_size; 927 928 total_size = 0; 929 for (unit = 0; unit < sc->sc_nunits; unit++) { 930 td = &sc->sc_units[unit]; 931 total_size += td->td_size; 932 } 933 934 for (unit = 0; unit < sc->sc_nunits; unit++) { 935 td = &sc->sc_units[unit]; 936 /* 937 * In theory, TWA_Q_LENGTH - 1 should be usable, but 938 * keep one additional ccb for internal commands. 939 * This makes the controller more reliable under load. 940 */ 941 if (total_size > 0) { 942 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 943 } else 944 openings = 0; 945 946 if (openings == td->td_openings) 947 continue; 948 td->td_openings = openings; 949 950 #ifdef TWA_DEBUG 951 printf("%s: unit %d openings %d\n", 952 device_xname(sc->twa_dv), unit, openings); 953 #endif 954 if (td->td_dev != NULL) 955 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 956 } 957 } 958 959 static int 960 twa_request_bus_scan(struct twa_softc *sc) 961 { 962 struct twa_drive *td; 963 struct twa_request *tr; 964 struct twa_attach_args twaa; 965 int locs[TWACF_NLOCS]; 966 int s, unit; 967 968 s = splbio(); 969 for (unit = 0; unit < sc->sc_nunits; unit++) { 970 971 if ((tr = twa_get_request(sc, 0)) == NULL) { 972 splx(s); 973 return (EIO); 974 } 975 976 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 977 978 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 979 980 if (tr->tr_data == NULL) { 981 twa_release_request(tr); 982 splx(s); 983 return (ENOMEM); 984 } 985 td = &sc->sc_units[unit]; 986 987 if (twa_inquiry(tr, unit) == 0) { 988 if (td->td_dev == NULL) { 989 twa_print_inquiry_data(sc, 990 ((struct scsipi_inquiry_data *)tr->tr_data)); 991 992 sc->sc_units[unit].td_size = 993 twa_read_capacity(tr, unit); 994 995 twaa.twaa_unit = unit; 996 997 twa_recompute_openings(sc); 998 999 locs[TWACF_UNIT] = unit; 1000 1001 sc->sc_units[unit].td_dev = 1002 config_found_sm_loc(sc->twa_dv, "twa", 1003 locs, &twaa, twa_print, config_stdsubmatch); 1004 } 1005 } else { 1006 if (td->td_dev != NULL) { 1007 (void) config_detach(td->td_dev, DETACH_FORCE); 1008 td->td_dev = NULL; 1009 td->td_size = 0; 1010 1011 twa_recompute_openings(sc); 1012 } 1013 } 1014 free(tr->tr_data, M_DEVBUF); 1015 1016 twa_release_request(tr); 1017 } 1018 splx(s); 1019 1020 return (0); 1021 } 1022 1023 1024 #ifdef DIAGNOSTIC 1025 static inline void 1026 twa_check_busy_q(struct twa_request *tr) 1027 { 1028 struct twa_request *rq; 1029 struct twa_softc *sc = tr->tr_sc; 1030 1031 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1032 if (tr->tr_request_id == rq->tr_request_id) { 1033 panic("cannot submit same request more than once"); 1034 } else if (tr->bp == rq->bp && tr->bp != 0) { 1035 /* XXX A check for 0 for the buf ptr is needed to 1036 * guard against ioctl requests with a buf ptr of 1037 * 0 and also aen notifications. Looking for 1038 * external cmds only. 1039 */ 1040 panic("cannot submit same buf more than once"); 1041 } else { 1042 /* Empty else statement */ 1043 } 1044 } 1045 } 1046 #endif 1047 1048 static int 1049 twa_start(struct twa_request *tr) 1050 { 1051 struct twa_softc *sc = tr->tr_sc; 1052 uint32_t status_reg; 1053 int s; 1054 int error; 1055 1056 s = splbio(); 1057 1058 /* 1059 * The 9650 and 9690 have a bug in the detection of the full queue 1060 * condition. 1061 * 1062 * If a write operation has filled the queue and is directly followed 1063 * by a status read, it sometimes doesn't return the correct result. 1064 * To work around this, the upper 32bit are written first. 1065 * This effectively serialises the hardware, but does not change 1066 * the state of the queue. 1067 */ 1068 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1069 /* Write lower 32 bits of address */ 1070 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1071 sizeof(struct twa_command_header)); 1072 } 1073 1074 /* Check to see if we can post a command. */ 1075 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1076 if ((error = twa_check_ctlr_state(sc, status_reg))) 1077 goto out; 1078 1079 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1080 if (tr->tr_status != TWA_CMD_PENDING) { 1081 tr->tr_status = TWA_CMD_PENDING; 1082 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1083 tr, tr_link); 1084 } 1085 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1086 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1087 error = EBUSY; 1088 } else { 1089 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1090 (char *)tr->tr_command - (char *)sc->twa_cmds, 1091 sizeof(struct twa_command_packet), 1092 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1093 1094 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1095 /* 1096 * Cmd queue is not full. Post the command 1097 * by writing upper 32 bits of address. 1098 */ 1099 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1100 sizeof(struct twa_command_header)); 1101 } else { 1102 /* Cmd queue is not full. Post the command. */ 1103 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1104 sizeof(struct twa_command_header)); 1105 } 1106 1107 /* Mark the request as currently being processed. */ 1108 tr->tr_status = TWA_CMD_BUSY; 1109 1110 #ifdef DIAGNOSTIC 1111 twa_check_busy_q(tr); 1112 #endif 1113 1114 /* Move the request into the busy queue. */ 1115 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1116 } 1117 out: 1118 splx(s); 1119 return(error); 1120 } 1121 1122 static int 1123 twa_drain_response_queue(struct twa_softc *sc) 1124 { 1125 union twa_response_queue rq; 1126 uint32_t status_reg; 1127 1128 for (;;) { 1129 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1130 if (twa_check_ctlr_state(sc, status_reg)) 1131 return(1); 1132 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1133 return(0); /* no more response queue entries */ 1134 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1135 } 1136 } 1137 1138 /* 1139 * twa_drain_response_queue_large: 1140 * 1141 * specific to the 9550 and 9650 controller to remove requests. 1142 * 1143 * Removes all requests from "large" response queue on the 9550 controller. 1144 * This procedure is called as part of the 9550 controller reset sequence. 1145 */ 1146 static int 1147 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1148 { 1149 uint32_t start_time = 0, end_time; 1150 uint32_t response = 0; 1151 1152 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1153 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1154 start_time = 0; 1155 end_time = (timeout * TWA_MICROSECOND); 1156 1157 while ((response & 1158 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1159 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1160 if (start_time >= end_time) 1161 return (1); 1162 DELAY(1); 1163 start_time++; 1164 } 1165 /* P-chip delay */ 1166 DELAY(500000); 1167 } 1168 return (0); 1169 } 1170 1171 static void 1172 twa_drain_busy_queue(struct twa_softc *sc) 1173 { 1174 struct twa_request *tr; 1175 1176 /* Walk the busy queue. */ 1177 1178 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1179 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1180 1181 twa_unmap_request(tr); 1182 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1183 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1184 /* It's an internal/ioctl request. Simply free it. */ 1185 if (tr->tr_data) 1186 free(tr->tr_data, M_DEVBUF); 1187 twa_release_request(tr); 1188 } else { 1189 /* It's a SCSI request. Complete it. */ 1190 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1191 if (tr->tr_callback) 1192 tr->tr_callback(tr); 1193 } 1194 } 1195 } 1196 1197 static int 1198 twa_drain_pending_queue(struct twa_softc *sc) 1199 { 1200 struct twa_request *tr; 1201 int s, error = 0; 1202 1203 /* 1204 * Pull requests off the pending queue, and submit them. 1205 */ 1206 s = splbio(); 1207 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1208 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1209 1210 if ((error = twa_start(tr))) { 1211 if (error == EBUSY) { 1212 tr->tr_status = TWA_CMD_PENDING; 1213 1214 /* queue at the head */ 1215 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1216 tr, tr_link); 1217 error = 0; 1218 break; 1219 } else { 1220 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1221 tr->tr_error = error; 1222 tr->tr_callback(tr); 1223 error = EIO; 1224 } 1225 } 1226 } 1227 } 1228 splx(s); 1229 1230 return(error); 1231 } 1232 1233 static int 1234 twa_drain_aen_queue(struct twa_softc *sc) 1235 { 1236 int s, error = 0; 1237 struct twa_request *tr; 1238 struct twa_command_header *cmd_hdr; 1239 struct timeval t1; 1240 uint32_t timeout; 1241 1242 for (;;) { 1243 if ((tr = twa_get_request(sc, 0)) == NULL) { 1244 error = EIO; 1245 break; 1246 } 1247 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1248 tr->tr_callback = NULL; 1249 1250 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1251 1252 if (tr->tr_data == NULL) { 1253 error = 1; 1254 goto out; 1255 } 1256 1257 if (twa_request_sense(tr, 0) != 0) { 1258 error = 1; 1259 break; 1260 } 1261 1262 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1263 1264 microtime(&t1); 1265 1266 timeout += t1.tv_usec; 1267 1268 do { 1269 s = splbio(); 1270 twa_done(tr->tr_sc); 1271 splx(s); 1272 if (tr->tr_status != TWA_CMD_BUSY) 1273 break; 1274 microtime(&t1); 1275 } while (t1.tv_usec <= timeout); 1276 1277 if (tr->tr_status != TWA_CMD_COMPLETE) { 1278 error = ETIMEDOUT; 1279 break; 1280 } 1281 1282 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1283 break; 1284 1285 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1286 if ((cmd_hdr->status_block.error) /* aen_code */ 1287 == TWA_AEN_QUEUE_EMPTY) 1288 break; 1289 (void)twa_enqueue_aen(sc, cmd_hdr); 1290 1291 free(tr->tr_data, M_DEVBUF); 1292 twa_release_request(tr); 1293 } 1294 out: 1295 if (tr) { 1296 if (tr->tr_data) 1297 free(tr->tr_data, M_DEVBUF); 1298 1299 twa_release_request(tr); 1300 } 1301 return(error); 1302 } 1303 1304 1305 #if 0 1306 static void 1307 twa_check_response_q(struct twa_request *tr, int clear) 1308 { 1309 int j; 1310 static int i = 0; 1311 static struct twa_request *req = 0; 1312 static struct buf *hist[255]; 1313 1314 1315 if (clear) { 1316 i = 0; 1317 for (j = 0; j < 255; j++) 1318 hist[j] = 0; 1319 return; 1320 } 1321 1322 if (req == 0) 1323 req = tr; 1324 1325 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1326 /* XXX this is bogus ! req can't be anything else but tr ! */ 1327 if (req->tr_request_id == tr->tr_request_id) 1328 panic("req id: %d on controller queue twice", 1329 tr->tr_request_id); 1330 1331 for (j = 0; j < i; j++) 1332 if (tr->bp == hist[j]) 1333 panic("req id: %d buf found twice", 1334 tr->tr_request_id); 1335 } 1336 req = tr; 1337 1338 hist[i++] = req->bp; 1339 } 1340 #endif 1341 1342 static int 1343 twa_done(struct twa_softc *sc) 1344 { 1345 union twa_response_queue rq; 1346 struct twa_request *tr; 1347 int rv = 0; 1348 uint32_t status_reg; 1349 1350 for (;;) { 1351 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1352 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1353 break; 1354 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1355 break; 1356 /* Response queue is not empty. */ 1357 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1358 tr = sc->sc_twa_request + rq.u.response_id; 1359 #if 0 1360 twa_check_response_q(tr, 0); 1361 #endif 1362 /* Unmap the command packet, and any associated data buffer. */ 1363 twa_unmap_request(tr); 1364 1365 tr->tr_status = TWA_CMD_COMPLETE; 1366 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1367 1368 if (tr->tr_callback) 1369 tr->tr_callback(tr); 1370 } 1371 (void)twa_drain_pending_queue(sc); 1372 1373 #if 0 1374 twa_check_response_q(NULL, 1); 1375 #endif 1376 return(rv); 1377 } 1378 1379 /* 1380 * Function name: twa_init_ctlr 1381 * Description: Establishes a logical connection with the controller. 1382 * If bundled with firmware, determines whether or not 1383 * the driver is compatible with the firmware on the 1384 * controller, before proceeding to work with it. 1385 * 1386 * Input: sc -- ptr to per ctlr structure 1387 * Output: None 1388 * Return value: 0 -- success 1389 * non-zero-- failure 1390 */ 1391 static int 1392 twa_init_ctlr(struct twa_softc *sc) 1393 { 1394 uint16_t fw_on_ctlr_srl = 0; 1395 uint16_t fw_on_ctlr_arch_id = 0; 1396 uint16_t fw_on_ctlr_branch = 0; 1397 uint16_t fw_on_ctlr_build = 0; 1398 uint32_t init_connect_result = 0; 1399 int error = 0; 1400 1401 /* Wait for the controller to become ready. */ 1402 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1403 TWA_REQUEST_TIMEOUT_PERIOD)) { 1404 return(ENXIO); 1405 } 1406 /* Drain the response queue. */ 1407 if (twa_drain_response_queue(sc)) 1408 return(1); 1409 1410 /* Establish a logical connection with the controller. */ 1411 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1412 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1413 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1414 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1415 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1416 &fw_on_ctlr_build, &init_connect_result))) { 1417 return(error); 1418 } 1419 twa_drain_aen_queue(sc); 1420 1421 /* Set controller state to initialized. */ 1422 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1423 return(0); 1424 } 1425 1426 static int 1427 twa_setup(struct twa_softc *sc) 1428 { 1429 struct tw_cl_event_packet *aen_queue; 1430 uint32_t i = 0; 1431 int error = 0; 1432 1433 /* Initialize request queues. */ 1434 TAILQ_INIT(&sc->twa_free); 1435 TAILQ_INIT(&sc->twa_busy); 1436 TAILQ_INIT(&sc->twa_pending); 1437 1438 sc->twa_sc_flags = 0; 1439 1440 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1441 1442 return(ENOMEM); 1443 } 1444 1445 /* Allocate memory for the AEN queue. */ 1446 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1447 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1448 /* 1449 * This should not cause us to return error. We will only be 1450 * unable to support AEN's. But then, we will have to check 1451 * time and again to see if we can support AEN's, if we 1452 * continue. So, we will just return error. 1453 */ 1454 return (ENOMEM); 1455 } 1456 /* Initialize the aen queue. */ 1457 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1458 1459 for (i = 0; i < TWA_Q_LENGTH; i++) 1460 sc->twa_aen_queue[i] = &(aen_queue[i]); 1461 1462 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1463 TWA_CONTROL_DISABLE_INTERRUPTS); 1464 1465 /* Initialize the controller. */ 1466 if ((error = twa_init_ctlr(sc))) { 1467 /* Soft reset the controller, and try one more time. */ 1468 1469 printf("%s: controller initialization failed. " 1470 "Retrying initialization\n", device_xname(sc->twa_dv)); 1471 1472 if ((error = twa_soft_reset(sc)) == 0) 1473 error = twa_init_ctlr(sc); 1474 } 1475 1476 twa_describe_controller(sc); 1477 1478 error = twa_request_bus_scan(sc); 1479 1480 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1481 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1482 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1483 TWA_CONTROL_ENABLE_INTERRUPTS); 1484 1485 return (error); 1486 } 1487 1488 void *twa_sdh; 1489 1490 static void 1491 twa_attach(device_t parent, device_t self, void *aux) 1492 { 1493 struct pci_attach_args *pa; 1494 struct twa_softc *sc; 1495 pci_chipset_tag_t pc; 1496 pcireg_t csr; 1497 pci_intr_handle_t ih; 1498 const char *intrstr; 1499 const struct sysctlnode *node; 1500 int i; 1501 bool use_64bit; 1502 1503 sc = device_private(self); 1504 1505 sc->twa_dv = self; 1506 1507 pa = aux; 1508 pc = pa->pa_pc; 1509 sc->pc = pa->pa_pc; 1510 sc->tag = pa->pa_tag; 1511 1512 pci_aprint_devinfo_fancy(pa, "RAID controller", "3ware Apache", 0); 1513 1514 sc->sc_quirks = 0; 1515 1516 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1517 sc->sc_nunits = TWA_MAX_UNITS; 1518 use_64bit = false; 1519 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1520 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1521 aprint_error_dev(sc->twa_dv, "can't map i/o space\n"); 1522 return; 1523 } 1524 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1525 sc->sc_nunits = TWA_MAX_UNITS; 1526 use_64bit = true; 1527 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1528 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1529 &sc->twa_bus_ioh, NULL, NULL)) { 1530 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1531 return; 1532 } 1533 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1534 sc->sc_nunits = TWA_9650_MAX_UNITS; 1535 use_64bit = true; 1536 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1537 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1538 &sc->twa_bus_ioh, NULL, NULL)) { 1539 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1540 return; 1541 } 1542 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1543 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1544 sc->sc_nunits = TWA_9690_MAX_UNITS; 1545 use_64bit = true; 1546 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1547 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1548 &sc->twa_bus_ioh, NULL, NULL)) { 1549 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1550 return; 1551 } 1552 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1553 } else { 1554 sc->sc_nunits = 0; 1555 use_64bit = false; 1556 aprint_error_dev(sc->twa_dv, "product id 0x%02x not recognized\n", 1557 PCI_PRODUCT(pa->pa_id)); 1558 return; 1559 } 1560 1561 if (pci_dma64_available(pa) && use_64bit) { 1562 aprint_verbose_dev(self, "64-bit DMA addressing active\n"); 1563 sc->twa_dma_tag = pa->pa_dmat64; 1564 } else { 1565 sc->twa_dma_tag = pa->pa_dmat; 1566 } 1567 1568 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1569 /* Enable the device. */ 1570 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1571 1572 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1573 csr | PCI_COMMAND_MASTER_ENABLE); 1574 1575 /* Map and establish the interrupt. */ 1576 if (pci_intr_map(pa, &ih)) { 1577 aprint_error_dev(sc->twa_dv, "can't map interrupt\n"); 1578 return; 1579 } 1580 intrstr = pci_intr_string(pc, ih); 1581 1582 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1583 if (sc->twa_ih == NULL) { 1584 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n", 1585 (intrstr) ? " at " : "", 1586 (intrstr) ? intrstr : ""); 1587 return; 1588 } 1589 1590 if (intrstr != NULL) 1591 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", 1592 intrstr); 1593 1594 twa_setup(sc); 1595 1596 if (twa_sdh == NULL) 1597 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1598 1599 /* sysctl set-up for 3ware cli */ 1600 if (sysctl_createv(NULL, 0, NULL, NULL, 1601 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1602 NULL, NULL, 0, NULL, 0, 1603 CTL_HW, CTL_EOL) != 0) { 1604 aprint_error_dev(sc->twa_dv, "could not create %s sysctl node\n", 1605 "hw"); 1606 return; 1607 } 1608 if (sysctl_createv(NULL, 0, NULL, &node, 1609 0, CTLTYPE_NODE, device_xname(sc->twa_dv), 1610 SYSCTL_DESCR("twa driver information"), 1611 NULL, 0, NULL, 0, 1612 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1613 aprint_error_dev(sc->twa_dv, "could not create %s.%s sysctl node\n", 1614 "hw", 1615 device_xname(sc->twa_dv)); 1616 return; 1617 } 1618 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1619 0, CTLTYPE_STRING, "driver_version", 1620 SYSCTL_DESCR("twa driver version"), 1621 NULL, 0, __UNCONST(&twaver), 0, 1622 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1623 != 0) { 1624 aprint_error_dev(sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1625 "hw", 1626 device_xname(sc->twa_dv)); 1627 return; 1628 } 1629 1630 return; 1631 } 1632 1633 static void 1634 twa_shutdown(void *arg) 1635 { 1636 extern struct cfdriver twa_cd; 1637 struct twa_softc *sc; 1638 int i, rv, unit; 1639 1640 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1641 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1642 continue; 1643 1644 for (unit = 0; unit < sc->sc_nunits; unit++) 1645 if (sc->sc_units[unit].td_dev != NULL) 1646 (void) config_detach(sc->sc_units[unit].td_dev, 1647 DETACH_FORCE | DETACH_QUIET); 1648 1649 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1650 TWA_CONTROL_DISABLE_INTERRUPTS); 1651 1652 /* Let the controller know that we are going down. */ 1653 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1654 0, 0, 0, 0, 0, 1655 NULL, NULL, NULL, NULL, NULL); 1656 } 1657 } 1658 1659 void 1660 twa_register_callbacks(struct twa_softc *sc, int unit, 1661 const struct twa_callbacks *tcb) 1662 { 1663 1664 sc->sc_units[unit].td_callbacks = tcb; 1665 } 1666 1667 /* 1668 * Print autoconfiguration message for a sub-device 1669 */ 1670 static int 1671 twa_print(void *aux, const char *pnp) 1672 { 1673 struct twa_attach_args *twaa; 1674 1675 twaa = aux; 1676 1677 if (pnp !=NULL) 1678 aprint_normal("block device at %s\n", pnp); 1679 aprint_normal(" unit %d\n", twaa->twaa_unit); 1680 return (UNCONF); 1681 } 1682 1683 static void 1684 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1685 { 1686 int i; 1687 for (i = 0; i < nsegments; i++) { 1688 sgl[i].address = segs[i].ds_addr; 1689 sgl[i].length = (uint32_t)(segs[i].ds_len); 1690 } 1691 } 1692 1693 static int 1694 twa_submit_io(struct twa_request *tr) 1695 { 1696 int error; 1697 1698 if ((error = twa_start(tr))) { 1699 if (error == EBUSY) 1700 error = 0; /* request is in the pending queue */ 1701 else { 1702 tr->tr_error = error; 1703 } 1704 } 1705 return(error); 1706 } 1707 1708 /* 1709 * Function name: twa_setup_data_dmamap 1710 * Description: Callback of bus_dmamap_load for the buffer associated 1711 * with data. Updates the cmd pkt (size/sgl_entries 1712 * fields, as applicable) to reflect the number of sg 1713 * elements. 1714 * 1715 * Input: arg -- ptr to request pkt 1716 * segs -- ptr to a list of segment descriptors 1717 * nsegments--# of segments 1718 * error -- 0 if no errors encountered before callback, 1719 * non-zero if errors were encountered 1720 * Output: None 1721 * Return value: None 1722 */ 1723 static int 1724 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1725 { 1726 struct twa_request *tr = (struct twa_request *)arg; 1727 struct twa_command_packet *cmdpkt = tr->tr_command; 1728 struct twa_command_9k *cmd9k; 1729 union twa_command_7k *cmd7k; 1730 uint8_t sgl_offset; 1731 int error; 1732 1733 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1734 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1735 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1736 cmd9k->sgl_entries += nsegments - 1; 1737 } else { 1738 /* It's a 7000 command packet. */ 1739 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1740 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1741 twa_fillin_sgl((struct twa_sg *) 1742 (((uint32_t *)cmd7k) + sgl_offset), 1743 segs, nsegments); 1744 /* Modify the size field, based on sg address size. */ 1745 cmd7k->generic.size += 1746 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1747 } 1748 if (tr->tr_flags & TWA_CMD_DATA_IN) 1749 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1750 tr->tr_length, BUS_DMASYNC_PREWRITE); 1751 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1752 /* 1753 * If we're using an alignment buffer, and we're 1754 * writing data, copy the real data out. 1755 */ 1756 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1757 memcpy(tr->tr_data, tr->tr_real_data, 1758 tr->tr_real_length); 1759 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1760 tr->tr_length, BUS_DMASYNC_PREREAD); 1761 } 1762 error = twa_submit_io(tr); 1763 1764 if (error) { 1765 twa_unmap_request(tr); 1766 /* 1767 * If the caller had been returned EINPROGRESS, and he has 1768 * registered a callback for handling completion, the callback 1769 * will never get called because we were unable to submit the 1770 * request. So, free up the request right here. 1771 */ 1772 if (tr->tr_callback) 1773 twa_release_request(tr); 1774 } 1775 return (error); 1776 } 1777 1778 /* 1779 * Function name: twa_map_request 1780 * Description: Maps a cmd pkt and data associated with it, into 1781 * DMA'able memory. 1782 * 1783 * Input: tr -- ptr to request pkt 1784 * Output: None 1785 * Return value: 0 -- success 1786 * non-zero-- failure 1787 */ 1788 int 1789 twa_map_request(struct twa_request *tr) 1790 { 1791 struct twa_softc *sc = tr->tr_sc; 1792 int s, rv, rc; 1793 1794 /* If the command involves data, map that too. */ 1795 if (tr->tr_data != NULL) { 1796 1797 if (((u_long)tr->tr_data & (511)) != 0) { 1798 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1799 tr->tr_real_data = tr->tr_data; 1800 tr->tr_real_length = tr->tr_length; 1801 s = splvm(); 1802 rc = uvm_km_kmem_alloc(kmem_va_arena, 1803 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT), 1804 (vmem_addr_t *)&tr->tr_data); 1805 splx(s); 1806 1807 if (rc != 0) { 1808 tr->tr_data = tr->tr_real_data; 1809 tr->tr_length = tr->tr_real_length; 1810 return(ENOMEM); 1811 } 1812 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1813 memcpy(tr->tr_data, tr->tr_real_data, 1814 tr->tr_length); 1815 } 1816 1817 /* 1818 * Map the data buffer into bus space and build the S/G list. 1819 */ 1820 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1821 tr->tr_data, tr->tr_length, NULL, 1822 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1823 1824 if (rv != 0) { 1825 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1826 s = splvm(); 1827 uvm_km_kmem_free(kmem_va_arena, 1828 (vaddr_t)tr->tr_data, 1829 tr->tr_length); 1830 splx(s); 1831 } 1832 return (rv); 1833 } 1834 1835 if ((rv = twa_setup_data_dmamap(tr, 1836 tr->tr_dma_map->dm_segs, 1837 tr->tr_dma_map->dm_nsegs))) { 1838 1839 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1840 s = splvm(); 1841 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 1842 tr->tr_length); 1843 splx(s); 1844 tr->tr_data = tr->tr_real_data; 1845 tr->tr_length = tr->tr_real_length; 1846 } 1847 } 1848 1849 } else 1850 if ((rv = twa_submit_io(tr))) 1851 twa_unmap_request(tr); 1852 1853 return (rv); 1854 } 1855 1856 /* 1857 * Function name: twa_intr 1858 * Description: Interrupt handler. Determines the kind of interrupt, 1859 * and calls the appropriate handler. 1860 * 1861 * Input: sc -- ptr to per ctlr structure 1862 * Output: None 1863 * Return value: None 1864 */ 1865 1866 static int 1867 twa_intr(void *arg) 1868 { 1869 int caught, s, rv; 1870 struct twa_softc *sc; 1871 uint32_t status_reg; 1872 sc = (struct twa_softc *)arg; 1873 1874 caught = 0; 1875 /* Collect current interrupt status. */ 1876 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1877 if (twa_check_ctlr_state(sc, status_reg)) { 1878 caught = 1; 1879 goto bail; 1880 } 1881 /* Dispatch based on the kind of interrupt. */ 1882 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1883 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1884 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1885 caught = 1; 1886 } 1887 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1888 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1889 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1890 rv = twa_fetch_aen(sc); 1891 #ifdef DIAGNOSTIC 1892 if (rv != 0) 1893 printf("%s: unable to retrieve AEN (%d)\n", 1894 device_xname(sc->twa_dv), rv); 1895 #endif 1896 caught = 1; 1897 } 1898 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1899 /* Start any requests that might be in the pending queue. */ 1900 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1901 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1902 (void)twa_drain_pending_queue(sc); 1903 caught = 1; 1904 } 1905 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1906 s = splbio(); 1907 twa_done(sc); 1908 splx(s); 1909 caught = 1; 1910 } 1911 bail: 1912 return (caught); 1913 } 1914 1915 /* 1916 * Accept an open operation on the control device. 1917 */ 1918 static int 1919 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1920 { 1921 struct twa_softc *twa; 1922 1923 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1924 return (ENXIO); 1925 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1926 return (EBUSY); 1927 1928 twa->twa_sc_flags |= TWA_STATE_OPEN; 1929 1930 return (0); 1931 } 1932 1933 /* 1934 * Accept the last close on the control device. 1935 */ 1936 static int 1937 twaclose(dev_t dev, int flag, int mode, 1938 struct lwp *l) 1939 { 1940 struct twa_softc *twa; 1941 1942 twa = device_lookup_private(&twa_cd, minor(dev)); 1943 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1944 return (0); 1945 } 1946 1947 /* 1948 * Function name: twaioctl 1949 * Description: ioctl handler. 1950 * 1951 * Input: sc -- ptr to per ctlr structure 1952 * cmd -- ioctl cmd 1953 * buf -- ptr to buffer in kernel memory, which is 1954 * a copy of the input buffer in user-space 1955 * Output: buf -- ptr to buffer in kernel memory, which will 1956 * be copied of the output buffer in user-space 1957 * Return value: 0 -- success 1958 * non-zero-- failure 1959 */ 1960 static int 1961 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1962 struct lwp *l) 1963 { 1964 struct twa_softc *sc; 1965 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1966 struct tw_cl_event_packet event_buf; 1967 struct twa_request *tr = 0; 1968 int32_t event_index = 0; 1969 int32_t start_index; 1970 int s, error = 0; 1971 1972 sc = device_lookup_private(&twa_cd, minor(dev)); 1973 1974 switch (cmd) { 1975 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1976 { 1977 struct twa_command_packet *cmdpkt; 1978 uint32_t data_buf_size_adjusted; 1979 1980 /* Get a request packet */ 1981 tr = twa_get_request_wait(sc, 0); 1982 KASSERT(tr != NULL); 1983 /* 1984 * Make sure that the data buffer sent to firmware is a 1985 * 512 byte multiple in size. 1986 */ 1987 data_buf_size_adjusted = 1988 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1989 1990 if ((tr->tr_length = data_buf_size_adjusted)) { 1991 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1992 M_DEVBUF, M_WAITOK)) == NULL) { 1993 error = ENOMEM; 1994 goto fw_passthru_done; 1995 } 1996 /* Copy the payload. */ 1997 if ((error = copyin((void *) (user_buf->pdata), 1998 (void *) (tr->tr_data), 1999 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2000 goto fw_passthru_done; 2001 } 2002 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2003 } 2004 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2005 cmdpkt = tr->tr_command; 2006 2007 /* Copy the command packet. */ 2008 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2009 sizeof(struct twa_command_packet)); 2010 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2011 tr->tr_request_id; 2012 2013 /* Send down the request, and wait for it to complete. */ 2014 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2015 if (error == ETIMEDOUT) 2016 break; /* clean-up done by twa_wait_request */ 2017 goto fw_passthru_done; 2018 } 2019 2020 /* Copy the command packet back into user space. */ 2021 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2022 sizeof(struct twa_command_packet)); 2023 2024 /* If there was a payload, copy it back too. */ 2025 if (tr->tr_length) 2026 error = copyout(tr->tr_data, user_buf->pdata, 2027 user_buf->twa_drvr_pkt.buffer_length); 2028 fw_passthru_done: 2029 /* Free resources. */ 2030 if (tr->tr_data) 2031 free(tr->tr_data, M_DEVBUF); 2032 2033 if (tr) 2034 twa_release_request(tr); 2035 break; 2036 } 2037 2038 case TW_OSL_IOCTL_SCAN_BUS: 2039 twa_request_bus_scan(sc); 2040 break; 2041 2042 case TW_CL_IOCTL_GET_FIRST_EVENT: 2043 if (sc->twa_aen_queue_wrapped) { 2044 if (sc->twa_aen_queue_overflow) { 2045 /* 2046 * The aen queue has wrapped, even before some 2047 * events have been retrieved. Let the caller 2048 * know that he missed out on some AEN's. 2049 */ 2050 user_buf->twa_drvr_pkt.status = 2051 TWA_ERROR_AEN_OVERFLOW; 2052 sc->twa_aen_queue_overflow = FALSE; 2053 } else 2054 user_buf->twa_drvr_pkt.status = 0; 2055 event_index = sc->twa_aen_head; 2056 } else { 2057 if (sc->twa_aen_head == sc->twa_aen_tail) { 2058 user_buf->twa_drvr_pkt.status = 2059 TWA_ERROR_AEN_NO_EVENTS; 2060 break; 2061 } 2062 user_buf->twa_drvr_pkt.status = 0; 2063 event_index = sc->twa_aen_tail; /* = 0 */ 2064 } 2065 if ((error = copyout(sc->twa_aen_queue[event_index], 2066 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2067 (sc->twa_aen_queue[event_index])->retrieved = 2068 TWA_AEN_RETRIEVED; 2069 break; 2070 2071 case TW_CL_IOCTL_GET_LAST_EVENT: 2072 if (sc->twa_aen_queue_wrapped) { 2073 if (sc->twa_aen_queue_overflow) { 2074 /* 2075 * The aen queue has wrapped, even before some 2076 * events have been retrieved. Let the caller 2077 * know that he missed out on some AEN's. 2078 */ 2079 user_buf->twa_drvr_pkt.status = 2080 TWA_ERROR_AEN_OVERFLOW; 2081 sc->twa_aen_queue_overflow = FALSE; 2082 } else 2083 user_buf->twa_drvr_pkt.status = 0; 2084 } else { 2085 if (sc->twa_aen_head == sc->twa_aen_tail) { 2086 user_buf->twa_drvr_pkt.status = 2087 TWA_ERROR_AEN_NO_EVENTS; 2088 break; 2089 } 2090 user_buf->twa_drvr_pkt.status = 0; 2091 } 2092 event_index = 2093 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2094 if ((error = copyout(sc->twa_aen_queue[event_index], 2095 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2096 (sc->twa_aen_queue[event_index])->retrieved = 2097 TWA_AEN_RETRIEVED; 2098 break; 2099 2100 case TW_CL_IOCTL_GET_NEXT_EVENT: 2101 user_buf->twa_drvr_pkt.status = 0; 2102 if (sc->twa_aen_queue_wrapped) { 2103 2104 if (sc->twa_aen_queue_overflow) { 2105 /* 2106 * The aen queue has wrapped, even before some 2107 * events have been retrieved. Let the caller 2108 * know that he missed out on some AEN's. 2109 */ 2110 user_buf->twa_drvr_pkt.status = 2111 TWA_ERROR_AEN_OVERFLOW; 2112 sc->twa_aen_queue_overflow = FALSE; 2113 } 2114 start_index = sc->twa_aen_head; 2115 } else { 2116 if (sc->twa_aen_head == sc->twa_aen_tail) { 2117 user_buf->twa_drvr_pkt.status = 2118 TWA_ERROR_AEN_NO_EVENTS; 2119 break; 2120 } 2121 start_index = sc->twa_aen_tail; /* = 0 */ 2122 } 2123 error = copyin(user_buf->pdata, &event_buf, 2124 sizeof(struct tw_cl_event_packet)); 2125 2126 event_index = (start_index + event_buf.sequence_id - 2127 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2128 % TWA_Q_LENGTH; 2129 2130 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2131 event_buf.sequence_id)) { 2132 if (user_buf->twa_drvr_pkt.status == 2133 TWA_ERROR_AEN_OVERFLOW) 2134 /* so we report the overflow next time */ 2135 sc->twa_aen_queue_overflow = TRUE; 2136 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2137 break; 2138 } 2139 if ((error = copyout(sc->twa_aen_queue[event_index], 2140 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2141 (sc->twa_aen_queue[event_index])->retrieved = 2142 TWA_AEN_RETRIEVED; 2143 break; 2144 2145 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2146 user_buf->twa_drvr_pkt.status = 0; 2147 if (sc->twa_aen_queue_wrapped) { 2148 if (sc->twa_aen_queue_overflow) { 2149 /* 2150 * The aen queue has wrapped, even before some 2151 * events have been retrieved. Let the caller 2152 * know that he missed out on some AEN's. 2153 */ 2154 user_buf->twa_drvr_pkt.status = 2155 TWA_ERROR_AEN_OVERFLOW; 2156 sc->twa_aen_queue_overflow = FALSE; 2157 } 2158 start_index = sc->twa_aen_head; 2159 } else { 2160 if (sc->twa_aen_head == sc->twa_aen_tail) { 2161 user_buf->twa_drvr_pkt.status = 2162 TWA_ERROR_AEN_NO_EVENTS; 2163 break; 2164 } 2165 start_index = sc->twa_aen_tail; /* = 0 */ 2166 } 2167 if ((error = copyin(user_buf->pdata, &event_buf, 2168 sizeof(struct tw_cl_event_packet))) != 0) 2169 2170 event_index = (start_index + event_buf.sequence_id - 2171 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2172 % TWA_Q_LENGTH; 2173 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2174 event_buf.sequence_id)) { 2175 if (user_buf->twa_drvr_pkt.status == 2176 TWA_ERROR_AEN_OVERFLOW) 2177 /* so we report the overflow next time */ 2178 sc->twa_aen_queue_overflow = TRUE; 2179 user_buf->twa_drvr_pkt.status = 2180 TWA_ERROR_AEN_NO_EVENTS; 2181 break; 2182 } 2183 if ((error = copyout(sc->twa_aen_queue [event_index], 2184 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2185 aprint_error_dev(sc->twa_dv, "get_previous: Could not copyout to " 2186 "event_buf. error = %x\n", 2187 error); 2188 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2189 break; 2190 2191 case TW_CL_IOCTL_GET_LOCK: 2192 { 2193 struct tw_cl_lock_packet twa_lock; 2194 2195 copyin(user_buf->pdata, &twa_lock, 2196 sizeof(struct tw_cl_lock_packet)); 2197 s = splbio(); 2198 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2199 (twa_lock.force_flag) || 2200 (time_second >= sc->twa_ioctl_lock.timeout)) { 2201 2202 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2203 sc->twa_ioctl_lock.timeout = time_second + 2204 (twa_lock.timeout_msec / 1000); 2205 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2206 user_buf->twa_drvr_pkt.status = 0; 2207 } else { 2208 twa_lock.time_remaining_msec = 2209 (sc->twa_ioctl_lock.timeout - time_second) * 2210 1000; 2211 user_buf->twa_drvr_pkt.status = 2212 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2213 } 2214 splx(s); 2215 copyout(&twa_lock, user_buf->pdata, 2216 sizeof(struct tw_cl_lock_packet)); 2217 break; 2218 } 2219 2220 case TW_CL_IOCTL_RELEASE_LOCK: 2221 s = splbio(); 2222 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2223 user_buf->twa_drvr_pkt.status = 2224 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2225 } else { 2226 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2227 user_buf->twa_drvr_pkt.status = 0; 2228 } 2229 splx(s); 2230 break; 2231 2232 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2233 { 2234 struct tw_cl_compatibility_packet comp_pkt; 2235 2236 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2237 sizeof(TWA_DRIVER_VERSION_STRING)); 2238 comp_pkt.working_srl = sc->working_srl; 2239 comp_pkt.working_branch = sc->working_branch; 2240 comp_pkt.working_build = sc->working_build; 2241 user_buf->twa_drvr_pkt.status = 0; 2242 2243 /* Copy compatibility information to user space. */ 2244 copyout(&comp_pkt, user_buf->pdata, 2245 min(sizeof(struct tw_cl_compatibility_packet), 2246 user_buf->twa_drvr_pkt.buffer_length)); 2247 break; 2248 } 2249 2250 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2251 { 2252 struct twa_unitname *tn; 2253 struct twa_drive *tdr; 2254 2255 tn = (struct twa_unitname *)data; 2256 /* XXX mutex */ 2257 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2258 return (EINVAL); 2259 tdr = &sc->sc_units[tn->tn_unit]; 2260 if (tdr->td_dev == NULL) 2261 tn->tn_name[0] = '\0'; 2262 else 2263 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2264 sizeof(tn->tn_name)); 2265 return (0); 2266 } 2267 2268 default: 2269 /* Unknown opcode. */ 2270 error = ENOTTY; 2271 } 2272 2273 return(error); 2274 } 2275 2276 const struct cdevsw twa_cdevsw = { 2277 twaopen, twaclose, noread, nowrite, twaioctl, 2278 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2279 }; 2280 2281 /* 2282 * Function name: twa_get_param 2283 * Description: Get a firmware parameter. 2284 * 2285 * Input: sc -- ptr to per ctlr structure 2286 * table_id -- parameter table # 2287 * param_id -- index of the parameter in the table 2288 * param_size -- size of the parameter in bytes 2289 * callback -- ptr to function, if any, to be called 2290 * back on completion; NULL if no callback. 2291 * Output: None 2292 * Return value: ptr to param structure -- success 2293 * NULL -- failure 2294 */ 2295 static int 2296 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2297 size_t param_size, void (* callback)(struct twa_request *tr), 2298 struct twa_param_9k **param) 2299 { 2300 int rv = 0; 2301 struct twa_request *tr; 2302 union twa_command_7k *cmd; 2303 2304 /* Get a request packet. */ 2305 if ((tr = twa_get_request(sc, 0)) == NULL) { 2306 rv = EAGAIN; 2307 goto out; 2308 } 2309 2310 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2311 2312 /* Allocate memory to read data into. */ 2313 if ((*param = (struct twa_param_9k *) 2314 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2315 rv = ENOMEM; 2316 goto out; 2317 } 2318 2319 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2320 tr->tr_data = *param; 2321 tr->tr_length = TWA_SECTOR_SIZE; 2322 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2323 2324 /* Build the cmd pkt. */ 2325 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2326 2327 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2328 2329 cmd->param.opcode = TWA_OP_GET_PARAM; 2330 cmd->param.sgl_offset = 2; 2331 cmd->param.size = 2; 2332 cmd->param.request_id = tr->tr_request_id; 2333 cmd->param.unit = 0; 2334 cmd->param.param_count = 1; 2335 2336 /* Specify which parameter we need. */ 2337 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2338 (*param)->parameter_id = param_id; 2339 (*param)->parameter_size_bytes = param_size; 2340 2341 /* Submit the command. */ 2342 if (callback == NULL) { 2343 /* There's no call back; wait till the command completes. */ 2344 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2345 2346 if (rv != 0) 2347 goto out; 2348 2349 if ((rv = cmd->param.status) != 0) { 2350 /* twa_drain_complete_queue will have done the unmapping */ 2351 goto out; 2352 } 2353 twa_release_request(tr); 2354 return (rv); 2355 } else { 2356 /* There's a call back. Simply submit the command. */ 2357 tr->tr_callback = callback; 2358 rv = twa_map_request(tr); 2359 return (rv); 2360 } 2361 out: 2362 if (tr) 2363 twa_release_request(tr); 2364 return(rv); 2365 } 2366 2367 /* 2368 * Function name: twa_set_param 2369 * Description: Set a firmware parameter. 2370 * 2371 * Input: sc -- ptr to per ctlr structure 2372 * table_id -- parameter table # 2373 * param_id -- index of the parameter in the table 2374 * param_size -- size of the parameter in bytes 2375 * callback -- ptr to function, if any, to be called 2376 * back on completion; NULL if no callback. 2377 * Output: None 2378 * Return value: 0 -- success 2379 * non-zero-- failure 2380 */ 2381 static int 2382 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2383 void *data, void (* callback)(struct twa_request *tr)) 2384 { 2385 struct twa_request *tr; 2386 union twa_command_7k *cmd; 2387 struct twa_param_9k *param = NULL; 2388 int error = ENOMEM; 2389 2390 tr = twa_get_request(sc, 0); 2391 if (tr == NULL) 2392 return (EAGAIN); 2393 2394 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2395 2396 /* Allocate memory to send data using. */ 2397 if ((param = (struct twa_param_9k *) 2398 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2399 goto out; 2400 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2401 tr->tr_data = param; 2402 tr->tr_length = TWA_SECTOR_SIZE; 2403 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2404 2405 /* Build the cmd pkt. */ 2406 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2407 2408 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2409 2410 cmd->param.opcode = TWA_OP_SET_PARAM; 2411 cmd->param.sgl_offset = 2; 2412 cmd->param.size = 2; 2413 cmd->param.request_id = tr->tr_request_id; 2414 cmd->param.unit = 0; 2415 cmd->param.param_count = 1; 2416 2417 /* Specify which parameter we want to set. */ 2418 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2419 param->parameter_id = param_id; 2420 param->parameter_size_bytes = param_size; 2421 memcpy(param->data, data, param_size); 2422 2423 /* Submit the command. */ 2424 if (callback == NULL) { 2425 /* There's no call back; wait till the command completes. */ 2426 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2427 if (error == ETIMEDOUT) 2428 /* clean-up done by twa_immediate_request */ 2429 return(error); 2430 if (error) 2431 goto out; 2432 if ((error = cmd->param.status)) { 2433 /* 2434 * twa_drain_complete_queue will have done the 2435 * unmapping. 2436 */ 2437 goto out; 2438 } 2439 free(param, M_DEVBUF); 2440 twa_release_request(tr); 2441 return(error); 2442 } else { 2443 /* There's a call back. Simply submit the command. */ 2444 tr->tr_callback = callback; 2445 if ((error = twa_map_request(tr))) 2446 goto out; 2447 2448 return (0); 2449 } 2450 out: 2451 if (param) 2452 free(param, M_DEVBUF); 2453 if (tr) 2454 twa_release_request(tr); 2455 return(error); 2456 } 2457 2458 /* 2459 * Function name: twa_init_connection 2460 * Description: Send init_connection cmd to firmware 2461 * 2462 * Input: sc -- ptr to per ctlr structure 2463 * message_credits -- max # of requests that we might send 2464 * down simultaneously. This will be 2465 * typically set to 256 at init-time or 2466 * after a reset, and to 1 at shutdown-time 2467 * set_features -- indicates if we intend to use 64-bit 2468 * sg, also indicates if we want to do a 2469 * basic or an extended init_connection; 2470 * 2471 * Note: The following input/output parameters are valid, only in case of an 2472 * extended init_connection: 2473 * 2474 * current_fw_srl -- srl of fw we are bundled 2475 * with, if any; 0 otherwise 2476 * current_fw_arch_id -- arch_id of fw we are bundled 2477 * with, if any; 0 otherwise 2478 * current_fw_branch -- branch # of fw we are bundled 2479 * with, if any; 0 otherwise 2480 * current_fw_build -- build # of fw we are bundled 2481 * with, if any; 0 otherwise 2482 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2483 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2484 * fw_on_ctlr_branch -- branch # of fw on ctlr 2485 * fw_on_ctlr_build -- build # of fw on ctlr 2486 * init_connect_result -- result bitmap of fw response 2487 * Return value: 0 -- success 2488 * non-zero-- failure 2489 */ 2490 static int 2491 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2492 uint32_t set_features, uint16_t current_fw_srl, 2493 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2494 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2495 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2496 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2497 { 2498 struct twa_request *tr; 2499 struct twa_command_init_connect *init_connect; 2500 int error = 1; 2501 2502 /* Get a request packet. */ 2503 if ((tr = twa_get_request(sc, 0)) == NULL) 2504 goto out; 2505 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2506 /* Build the cmd pkt. */ 2507 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2508 2509 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2510 2511 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2512 init_connect->request_id = tr->tr_request_id; 2513 init_connect->message_credits = message_credits; 2514 init_connect->features = set_features; 2515 if (TWA_64BIT_ADDRESSES) 2516 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2517 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2518 /* 2519 * Fill in the extra fields needed for 2520 * an extended init_connect. 2521 */ 2522 init_connect->size = 6; 2523 init_connect->fw_srl = current_fw_srl; 2524 init_connect->fw_arch_id = current_fw_arch_id; 2525 init_connect->fw_branch = current_fw_branch; 2526 } else 2527 init_connect->size = 3; 2528 2529 /* Submit the command, and wait for it to complete. */ 2530 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2531 if (error == ETIMEDOUT) 2532 return(error); /* clean-up done by twa_immediate_request */ 2533 if (error) 2534 goto out; 2535 if ((error = init_connect->status)) { 2536 /* twa_drain_complete_queue will have done the unmapping */ 2537 goto out; 2538 } 2539 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2540 *fw_on_ctlr_srl = init_connect->fw_srl; 2541 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2542 *fw_on_ctlr_branch = init_connect->fw_branch; 2543 *fw_on_ctlr_build = init_connect->fw_build; 2544 *init_connect_result = init_connect->result; 2545 } 2546 twa_release_request(tr); 2547 return(error); 2548 2549 out: 2550 if (tr) 2551 twa_release_request(tr); 2552 return(error); 2553 } 2554 2555 static int 2556 twa_reset(struct twa_softc *sc) 2557 { 2558 int s; 2559 int error = 0; 2560 2561 /* Set the 'in reset' flag. */ 2562 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2563 2564 /* 2565 * Disable interrupts from the controller, and mask any 2566 * accidental entry into our interrupt handler. 2567 */ 2568 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2569 TWA_CONTROL_DISABLE_INTERRUPTS); 2570 2571 s = splbio(); 2572 2573 /* Soft reset the controller. */ 2574 if ((error = twa_soft_reset(sc))) 2575 goto out; 2576 2577 /* Re-establish logical connection with the controller. */ 2578 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2579 0, 0, 0, 0, 0, 2580 NULL, NULL, NULL, NULL, NULL))) { 2581 goto out; 2582 } 2583 /* 2584 * Complete all requests in the complete queue; error back all requests 2585 * in the busy queue. Any internal requests will be simply freed. 2586 * Re-submit any requests in the pending queue. 2587 */ 2588 twa_drain_busy_queue(sc); 2589 2590 out: 2591 splx(s); 2592 /* 2593 * Enable interrupts, and also clear attention and response interrupts. 2594 */ 2595 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2596 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2597 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2598 TWA_CONTROL_ENABLE_INTERRUPTS); 2599 2600 /* Clear the 'in reset' flag. */ 2601 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2602 2603 return(error); 2604 } 2605 2606 static int 2607 twa_soft_reset(struct twa_softc *sc) 2608 { 2609 uint32_t status_reg; 2610 2611 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2612 TWA_CONTROL_ISSUE_SOFT_RESET | 2613 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2614 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2615 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2616 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2617 TWA_CONTROL_DISABLE_INTERRUPTS); 2618 2619 if (twa_drain_response_queue_large(sc, 30) != 0) { 2620 aprint_error_dev(sc->twa_dv, 2621 "response queue not empty after reset.\n"); 2622 return(1); 2623 } 2624 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2625 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2626 aprint_error_dev(sc->twa_dv, "no attention interrupt after reset.\n"); 2627 return(1); 2628 } 2629 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2630 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2631 2632 if (twa_drain_response_queue(sc)) { 2633 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n"); 2634 return(1); 2635 } 2636 if (twa_drain_aen_queue(sc)) { 2637 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n"); 2638 return(1); 2639 } 2640 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2641 aprint_error_dev(sc->twa_dv, "reset not reported by controller.\n"); 2642 return(1); 2643 } 2644 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2645 if (TWA_STATUS_ERRORS(status_reg) || 2646 twa_check_ctlr_state(sc, status_reg)) { 2647 aprint_error_dev(sc->twa_dv, "controller errors detected.\n"); 2648 return(1); 2649 } 2650 return(0); 2651 } 2652 2653 static int 2654 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2655 { 2656 struct timeval t1; 2657 time_t end_time; 2658 uint32_t status_reg; 2659 2660 timeout = (timeout * 1000 * 100); 2661 2662 microtime(&t1); 2663 2664 end_time = t1.tv_usec + timeout; 2665 2666 do { 2667 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2668 /* got the required bit(s)? */ 2669 if ((status_reg & status) == status) 2670 return(0); 2671 DELAY(100000); 2672 microtime(&t1); 2673 } while (t1.tv_usec <= end_time); 2674 2675 return(1); 2676 } 2677 2678 static int 2679 twa_fetch_aen(struct twa_softc *sc) 2680 { 2681 struct twa_request *tr; 2682 int s, error = 0; 2683 2684 s = splbio(); 2685 2686 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2687 splx(s); 2688 return(EIO); 2689 } 2690 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2691 tr->tr_callback = twa_aen_callback; 2692 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2693 if (twa_request_sense(tr, 0) != 0) { 2694 if (tr->tr_data) 2695 free(tr->tr_data, M_DEVBUF); 2696 twa_release_request(tr); 2697 error = 1; 2698 } 2699 splx(s); 2700 2701 return(error); 2702 } 2703 2704 /* 2705 * Function name: twa_aen_callback 2706 * Description: Callback for requests to fetch AEN's. 2707 * 2708 * Input: tr -- ptr to completed request pkt 2709 * Output: None 2710 * Return value: None 2711 */ 2712 static void 2713 twa_aen_callback(struct twa_request *tr) 2714 { 2715 int i; 2716 int fetch_more_aens = 0; 2717 struct twa_softc *sc = tr->tr_sc; 2718 struct twa_command_header *cmd_hdr = 2719 (struct twa_command_header *)(tr->tr_data); 2720 struct twa_command_9k *cmd = 2721 &(tr->tr_command->command.cmd_pkt_9k); 2722 2723 if (! cmd->status) { 2724 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2725 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2726 if (twa_enqueue_aen(sc, cmd_hdr) 2727 != TWA_AEN_QUEUE_EMPTY) 2728 fetch_more_aens = 1; 2729 } else { 2730 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2731 for (i = 0; i < 18; i++) 2732 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2733 2734 printf(""); /* print new line */ 2735 2736 for (i = 0; i < 128; i++) 2737 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2738 } 2739 if (tr->tr_data) 2740 free(tr->tr_data, M_DEVBUF); 2741 twa_release_request(tr); 2742 2743 if (fetch_more_aens) 2744 twa_fetch_aen(sc); 2745 } 2746 2747 /* 2748 * Function name: twa_enqueue_aen 2749 * Description: Queues AEN's to be supplied to user-space tools on request. 2750 * 2751 * Input: sc -- ptr to per ctlr structure 2752 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2753 * details can be retrieved. 2754 * Output: None 2755 * Return value: None 2756 */ 2757 static uint16_t 2758 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2759 { 2760 int rv, s; 2761 struct tw_cl_event_packet *event; 2762 uint16_t aen_code; 2763 unsigned long sync_time; 2764 2765 s = splbio(); 2766 aen_code = cmd_hdr->status_block.error; 2767 2768 switch (aen_code) { 2769 case TWA_AEN_SYNC_TIME_WITH_HOST: 2770 2771 sync_time = (time_second - (3 * 86400)) % 604800; 2772 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2773 TWA_PARAM_TIME_SchedulerTime, 4, 2774 &sync_time, twa_aen_callback); 2775 #ifdef DIAGNOSTIC 2776 if (rv != 0) 2777 aprint_error_dev(sc->twa_dv, "unable to sync time with ctlr\n"); 2778 #endif 2779 break; 2780 2781 case TWA_AEN_QUEUE_EMPTY: 2782 break; 2783 2784 default: 2785 /* Queue the event. */ 2786 event = sc->twa_aen_queue[sc->twa_aen_head]; 2787 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2788 sc->twa_aen_queue_overflow = TRUE; 2789 event->severity = 2790 cmd_hdr->status_block.substatus_block.severity; 2791 event->time_stamp_sec = time_second; 2792 event->aen_code = aen_code; 2793 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2794 event->sequence_id = ++(sc->twa_current_sequence_id); 2795 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2796 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2797 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2798 event->parameter_len); 2799 2800 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2801 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2802 device_xname(sc->twa_dv), 2803 aen_code, 2804 twa_aen_severity_table[event->severity], 2805 twa_find_msg_string(twa_aen_table, aen_code), 2806 event->parameter_data); 2807 } 2808 2809 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2810 sc->twa_aen_queue_wrapped = TRUE; 2811 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2812 break; 2813 } /* switch */ 2814 splx(s); 2815 2816 return (aen_code); 2817 } 2818 2819 /* 2820 * Function name: twa_find_aen 2821 * Description: Reports whether a given AEN ever occurred. 2822 * 2823 * Input: sc -- ptr to per ctlr structure 2824 * aen_code-- AEN to look for 2825 * Output: None 2826 * Return value: 0 -- success 2827 * non-zero-- failure 2828 */ 2829 static int 2830 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2831 { 2832 uint32_t last_index; 2833 int s; 2834 int i; 2835 2836 s = splbio(); 2837 2838 if (sc->twa_aen_queue_wrapped) 2839 last_index = sc->twa_aen_head; 2840 else 2841 last_index = 0; 2842 2843 i = sc->twa_aen_head; 2844 do { 2845 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2846 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2847 splx(s); 2848 return(0); 2849 } 2850 } while (i != last_index); 2851 2852 splx(s); 2853 return(1); 2854 } 2855 2856 static inline void 2857 twa_request_init(struct twa_request *tr, int flags) 2858 { 2859 tr->tr_data = NULL; 2860 tr->tr_real_data = NULL; 2861 tr->tr_length = 0; 2862 tr->tr_real_length = 0; 2863 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2864 tr->tr_flags = flags; 2865 tr->tr_error = 0; 2866 tr->tr_callback = NULL; 2867 tr->tr_cmd_pkt_type = 0; 2868 tr->bp = 0; 2869 2870 /* 2871 * Look at the status field in the command packet to see how 2872 * it completed the last time it was used, and zero out only 2873 * the portions that might have changed. Note that we don't 2874 * care to zero out the sglist. 2875 */ 2876 if (tr->tr_command->command.cmd_pkt_9k.status) 2877 memset(tr->tr_command, 0, 2878 sizeof(struct twa_command_header) + 28); 2879 else 2880 memset(&(tr->tr_command->command), 0, 28); 2881 } 2882 2883 struct twa_request * 2884 twa_get_request_wait(struct twa_softc *sc, int flags) 2885 { 2886 struct twa_request *tr; 2887 int s; 2888 2889 KASSERT((flags & TWA_CMD_AEN) == 0); 2890 2891 s = splbio(); 2892 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2893 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2894 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2895 } 2896 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2897 2898 splx(s); 2899 2900 twa_request_init(tr, flags); 2901 2902 return(tr); 2903 } 2904 2905 struct twa_request * 2906 twa_get_request(struct twa_softc *sc, int flags) 2907 { 2908 int s; 2909 struct twa_request *tr; 2910 2911 /* Get a free request packet. */ 2912 s = splbio(); 2913 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2914 2915 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2916 tr = sc->sc_twa_request; 2917 flags |= TWA_CMD_AEN_BUSY; 2918 } else { 2919 splx(s); 2920 return (NULL); 2921 } 2922 } else { 2923 if (__predict_false((tr = 2924 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2925 splx(s); 2926 return (NULL); 2927 } 2928 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2929 } 2930 splx(s); 2931 2932 twa_request_init(tr, flags); 2933 2934 return(tr); 2935 } 2936 2937 /* 2938 * Print some information about the controller 2939 */ 2940 static void 2941 twa_describe_controller(struct twa_softc *sc) 2942 { 2943 struct twa_param_9k *p[10]; 2944 int i, rv = 0; 2945 uint32_t dsize; 2946 uint8_t ports; 2947 2948 memset(p, sizeof(struct twa_param_9k *), 10); 2949 2950 /* Get the port count. */ 2951 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2952 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2953 2954 /* get version strings */ 2955 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2956 16, NULL, &p[1]); 2957 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2958 16, NULL, &p[2]); 2959 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2960 16, NULL, &p[3]); 2961 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2962 8, NULL, &p[4]); 2963 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2964 8, NULL, &p[5]); 2965 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2966 8, NULL, &p[6]); 2967 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2968 16, NULL, &p[7]); 2969 2970 if (rv) { 2971 /* some error occurred */ 2972 aprint_error_dev(sc->twa_dv, "failed to fetch version information\n"); 2973 goto bail; 2974 } 2975 2976 ports = *(uint8_t *)(p[0]->data); 2977 2978 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2979 ports, p[1]->data, p[2]->data); 2980 2981 aprint_verbose_dev(sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2982 p[3]->data, p[4]->data, 2983 p[5]->data, p[6]->data); 2984 2985 for (i = 0; i < ports; i++) { 2986 2987 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2988 continue; 2989 2990 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2991 TWA_PARAM_DRIVEMODELINDEX, 2992 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 2993 2994 if (rv != 0) { 2995 aprint_error_dev(sc->twa_dv, "unable to get drive model for port" 2996 " %d\n", i); 2997 continue; 2998 } 2999 3000 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3001 TWA_PARAM_DRIVESIZEINDEX, 3002 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3003 3004 if (rv != 0) { 3005 aprint_error_dev(sc->twa_dv, "unable to get drive size" 3006 " for port %d\n", i); 3007 free(p[8], M_DEVBUF); 3008 continue; 3009 } 3010 3011 dsize = *(uint32_t *)(p[9]->data); 3012 3013 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n", 3014 i, p[8]->data, dsize / 2048); 3015 3016 if (p[8]) 3017 free(p[8], M_DEVBUF); 3018 if (p[9]) 3019 free(p[9], M_DEVBUF); 3020 } 3021 bail: 3022 if (p[0]) 3023 free(p[0], M_DEVBUF); 3024 if (p[1]) 3025 free(p[1], M_DEVBUF); 3026 if (p[2]) 3027 free(p[2], M_DEVBUF); 3028 if (p[3]) 3029 free(p[3], M_DEVBUF); 3030 if (p[4]) 3031 free(p[4], M_DEVBUF); 3032 if (p[5]) 3033 free(p[5], M_DEVBUF); 3034 if (p[6]) 3035 free(p[6], M_DEVBUF); 3036 } 3037 3038 /* 3039 * Function name: twa_check_ctlr_state 3040 * Description: Makes sure that the fw status register reports a 3041 * proper status. 3042 * 3043 * Input: sc -- ptr to per ctlr structure 3044 * status_reg -- value in the status register 3045 * Output: None 3046 * Return value: 0 -- no errors 3047 * non-zero-- errors 3048 */ 3049 static int 3050 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3051 { 3052 int result = 0; 3053 struct timeval t1; 3054 static time_t last_warning[2] = {0, 0}; 3055 3056 /* Check if the 'micro-controller ready' bit is not set. */ 3057 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3058 TWA_STATUS_EXPECTED_BITS) { 3059 3060 microtime(&t1); 3061 3062 last_warning[0] += (5 * 1000 * 100); 3063 3064 if (t1.tv_usec > last_warning[0]) { 3065 microtime(&t1); 3066 last_warning[0] = t1.tv_usec; 3067 } 3068 result = 1; 3069 } 3070 3071 /* Check if any error bits are set. */ 3072 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3073 3074 microtime(&t1); 3075 last_warning[1] += (5 * 1000 * 100); 3076 if (t1.tv_usec > last_warning[1]) { 3077 microtime(&t1); 3078 last_warning[1] = t1.tv_usec; 3079 } 3080 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3081 aprint_error_dev(sc->twa_dv, "clearing PCI parity error " 3082 "re-seat/move/replace card.\n"); 3083 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3084 TWA_CONTROL_CLEAR_PARITY_ERROR); 3085 pci_conf_write(sc->pc, sc->tag, 3086 PCI_COMMAND_STATUS_REG, 3087 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3088 } 3089 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3090 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n"); 3091 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3092 TWA_CONTROL_CLEAR_PCI_ABORT); 3093 pci_conf_write(sc->pc, sc->tag, 3094 PCI_COMMAND_STATUS_REG, 3095 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3096 } 3097 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3098 /* 3099 * As documented by 3ware, the 9650 erroneously 3100 * flags queue errors during resets. 3101 * Just ignore them during the reset instead of 3102 * bothering the console. 3103 */ 3104 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3105 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3106 aprint_error_dev(sc->twa_dv, 3107 "clearing controller queue error\n"); 3108 } 3109 3110 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3111 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3112 } 3113 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3114 aprint_error_dev(sc->twa_dv, "micro-controller error\n"); 3115 result = 1; 3116 } 3117 } 3118 return(result); 3119 } 3120
Indexes created Wed Sep 24 02:09:48 GMT 2025