twa.c revision 1.44
1 /* $NetBSD: twa.c,v 1.44 2013/09/14 13:12:03 joerg Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.44 2013/09/14 13:12:03 joerg Exp $"); 71 72 //#define TWA_DEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/device.h> 78 #include <sys/queue.h> 79 #include <sys/proc.h> 80 #include <sys/bswap.h> 81 #include <sys/buf.h> 82 #include <sys/bufq.h> 83 #include <sys/endian.h> 84 #include <sys/malloc.h> 85 #include <sys/conf.h> 86 #include <sys/disk.h> 87 #include <sys/sysctl.h> 88 #include <sys/syslog.h> 89 90 #include <sys/bus.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 #include <dev/pci/twareg.h> 96 #include <dev/pci/twavar.h> 97 #include <dev/pci/twaio.h> 98 99 #include <dev/scsipi/scsipi_all.h> 100 #include <dev/scsipi/scsipi_disk.h> 101 #include <dev/scsipi/scsipiconf.h> 102 #include <dev/scsipi/scsi_spc.h> 103 104 #include <dev/ldvar.h> 105 106 #include "locators.h" 107 108 #define PCI_CBIO 0x10 109 110 static int twa_fetch_aen(struct twa_softc *); 111 static void twa_aen_callback(struct twa_request *); 112 static int twa_find_aen(struct twa_softc *sc, uint16_t); 113 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 114 struct twa_command_header *); 115 116 static void twa_attach(device_t, device_t, void *); 117 static void twa_shutdown(void *); 118 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 119 uint16_t, uint16_t, uint16_t, uint16_t, uint16_t *, 120 uint16_t *, uint16_t *, uint16_t *, uint32_t *); 121 static int twa_intr(void *); 122 static int twa_match(device_t, cfdata_t, void *); 123 static int twa_reset(struct twa_softc *); 124 125 static int twa_print(void *, const char *); 126 static int twa_soft_reset(struct twa_softc *); 127 128 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 129 static int twa_get_param(struct twa_softc *, int, int, size_t, 130 void (* callback)(struct twa_request *), 131 struct twa_param_9k **); 132 static int twa_set_param(struct twa_softc *, int, int, int, void *, 133 void (* callback)(struct twa_request *)); 134 static void twa_describe_controller(struct twa_softc *); 135 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 136 static int twa_done(struct twa_softc *); 137 138 extern struct cfdriver twa_cd; 139 extern uint32_t twa_fw_img_size; 140 extern uint8_t twa_fw_img[]; 141 142 CFATTACH_DECL_NEW(twa, sizeof(struct twa_softc), 143 twa_match, twa_attach, NULL, NULL); 144 145 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 146 const char twaver[] = "1.50.01.002"; 147 148 /* AEN messages. */ 149 static const struct twa_message twa_aen_table[] = { 150 {0x0000, "AEN queue empty"}, 151 {0x0001, "Controller reset occurred"}, 152 {0x0002, "Degraded unit detected"}, 153 {0x0003, "Controller error occured"}, 154 {0x0004, "Background rebuild failed"}, 155 {0x0005, "Background rebuild done"}, 156 {0x0006, "Incomplete unit detected"}, 157 {0x0007, "Background initialize done"}, 158 {0x0008, "Unclean shutdown detected"}, 159 {0x0009, "Drive timeout detected"}, 160 {0x000A, "Drive error detected"}, 161 {0x000B, "Rebuild started"}, 162 {0x000C, "Background initialize started"}, 163 {0x000D, "Entire logical unit was deleted"}, 164 {0x000E, "Background initialize failed"}, 165 {0x000F, "SMART attribute exceeded threshold"}, 166 {0x0010, "Power supply reported AC under range"}, 167 {0x0011, "Power supply reported DC out of range"}, 168 {0x0012, "Power supply reported a malfunction"}, 169 {0x0013, "Power supply predicted malfunction"}, 170 {0x0014, "Battery charge is below threshold"}, 171 {0x0015, "Fan speed is below threshold"}, 172 {0x0016, "Temperature sensor is above threshold"}, 173 {0x0017, "Power supply was removed"}, 174 {0x0018, "Power supply was inserted"}, 175 {0x0019, "Drive was removed from a bay"}, 176 {0x001A, "Drive was inserted into a bay"}, 177 {0x001B, "Drive bay cover door was opened"}, 178 {0x001C, "Drive bay cover door was closed"}, 179 {0x001D, "Product case was opened"}, 180 {0x0020, "Prepare for shutdown (power-off)"}, 181 {0x0021, "Downgrade UDMA mode to lower speed"}, 182 {0x0022, "Upgrade UDMA mode to higher speed"}, 183 {0x0023, "Sector repair completed"}, 184 {0x0024, "Sbuf memory test failed"}, 185 {0x0025, "Error flushing cached write data to disk"}, 186 {0x0026, "Drive reported data ECC error"}, 187 {0x0027, "DCB has checksum error"}, 188 {0x0028, "DCB version is unsupported"}, 189 {0x0029, "Background verify started"}, 190 {0x002A, "Background verify failed"}, 191 {0x002B, "Background verify done"}, 192 {0x002C, "Bad sector overwritten during rebuild"}, 193 {0x002D, "Source drive error occurred"}, 194 {0x002E, "Replace failed because replacement drive too small"}, 195 {0x002F, "Verify failed because array was never initialized"}, 196 {0x0030, "Unsupported ATA drive"}, 197 {0x0031, "Synchronize host/controller time"}, 198 {0x0032, "Spare capacity is inadequate for some units"}, 199 {0x0033, "Background migration started"}, 200 {0x0034, "Background migration failed"}, 201 {0x0035, "Background migration done"}, 202 {0x0036, "Verify detected and fixed data/parity mismatch"}, 203 {0x0037, "SO-DIMM incompatible"}, 204 {0x0038, "SO-DIMM not detected"}, 205 {0x0039, "Corrected Sbuf ECC error"}, 206 {0x003A, "Drive power on reset detected"}, 207 {0x003B, "Background rebuild paused"}, 208 {0x003C, "Background initialize paused"}, 209 {0x003D, "Background verify paused"}, 210 {0x003E, "Background migration paused"}, 211 {0x003F, "Corrupt flash file system detected"}, 212 {0x0040, "Flash file system repaired"}, 213 {0x0041, "Unit number assignments were lost"}, 214 {0x0042, "Error during read of primary DCB"}, 215 {0x0043, "Latent error found in backup DCB"}, 216 {0x0044, "Battery voltage is normal"}, 217 {0x0045, "Battery voltage is low"}, 218 {0x0046, "Battery voltage is high"}, 219 {0x0047, "Battery voltage is too low"}, 220 {0x0048, "Battery voltage is too high"}, 221 {0x0049, "Battery temperature is normal"}, 222 {0x004A, "Battery temperature is low"}, 223 {0x004B, "Battery temperature is high"}, 224 {0x004C, "Battery temperature is too low"}, 225 {0x004D, "Battery temperature is too high"}, 226 {0x004E, "Battery capacity test started"}, 227 {0x004F, "Cache synchronization skipped"}, 228 {0x0050, "Battery capacity test completed"}, 229 {0x0051, "Battery health check started"}, 230 {0x0052, "Battery health check completed"}, 231 {0x0053, "Battery capacity test needed"}, 232 {0x0054, "Battery charge termination voltage is at high level"}, 233 {0x0055, "Battery charging started"}, 234 {0x0056, "Battery charging completed"}, 235 {0x0057, "Battery charging fault"}, 236 {0x0058, "Battery capacity is below warning level"}, 237 {0x0059, "Battery capacity is below error level"}, 238 {0x005A, "Battery is present"}, 239 {0x005B, "Battery is not present"}, 240 {0x005C, "Battery is weak"}, 241 {0x005D, "Battery health check failed"}, 242 {0x005E, "Cache synchronized after power fail"}, 243 {0x005F, "Cache synchronization failed; some data lost"}, 244 {0x0060, "Bad cache meta data checksum"}, 245 {0x0061, "Bad cache meta data signature"}, 246 {0x0062, "Cache meta data restore failed"}, 247 {0x0063, "BBU not found after power fail"}, 248 {0x00FC, "Recovered/finished array membership update"}, 249 {0x00FD, "Handler lockup"}, 250 {0x00FE, "Retrying PCI transfer"}, 251 {0x00FF, "AEN queue is full"}, 252 {0xFFFFFFFF, NULL} 253 }; 254 255 /* AEN severity table. */ 256 static const char *twa_aen_severity_table[] = { 257 "None", 258 "ERROR", 259 "WARNING", 260 "INFO", 261 "DEBUG", 262 NULL 263 }; 264 265 #if 0 266 /* Error messages. */ 267 static const struct twa_message twa_error_table[] = { 268 {0x0100, "SGL entry contains zero data"}, 269 {0x0101, "Invalid command opcode"}, 270 {0x0102, "SGL entry has unaligned address"}, 271 {0x0103, "SGL size does not match command"}, 272 {0x0104, "SGL entry has illegal length"}, 273 {0x0105, "Command packet is not aligned"}, 274 {0x0106, "Invalid request ID"}, 275 {0x0107, "Duplicate request ID"}, 276 {0x0108, "ID not locked"}, 277 {0x0109, "LBA out of range"}, 278 {0x010A, "Logical unit not supported"}, 279 {0x010B, "Parameter table does not exist"}, 280 {0x010C, "Parameter index does not exist"}, 281 {0x010D, "Invalid field in CDB"}, 282 {0x010E, "Specified port has invalid drive"}, 283 {0x010F, "Parameter item size mismatch"}, 284 {0x0110, "Failed memory allocation"}, 285 {0x0111, "Memory request too large"}, 286 {0x0112, "Out of memory segments"}, 287 {0x0113, "Invalid address to deallocate"}, 288 {0x0114, "Out of memory"}, 289 {0x0115, "Out of heap"}, 290 {0x0120, "Double degrade"}, 291 {0x0121, "Drive not degraded"}, 292 {0x0122, "Reconstruct error"}, 293 {0x0123, "Replace not accepted"}, 294 {0x0124, "Replace drive capacity too small"}, 295 {0x0125, "Sector count not allowed"}, 296 {0x0126, "No spares left"}, 297 {0x0127, "Reconstruct error"}, 298 {0x0128, "Unit is offline"}, 299 {0x0129, "Cannot update status to DCB"}, 300 {0x0130, "Invalid stripe handle"}, 301 {0x0131, "Handle that was not locked"}, 302 {0x0132, "Handle that was not empy"}, 303 {0x0133, "Handle has different owner"}, 304 {0x0140, "IPR has parent"}, 305 {0x0150, "Illegal Pbuf address alignment"}, 306 {0x0151, "Illegal Pbuf transfer length"}, 307 {0x0152, "Illegal Sbuf address alignment"}, 308 {0x0153, "Illegal Sbuf transfer length"}, 309 {0x0160, "Command packet too large"}, 310 {0x0161, "SGL exceeds maximum length"}, 311 {0x0162, "SGL has too many entries"}, 312 {0x0170, "Insufficient resources for rebuilder"}, 313 {0x0171, "Verify error (data != parity)"}, 314 {0x0180, "Requested segment not in directory of this DCB"}, 315 {0x0181, "DCB segment has unsupported version"}, 316 {0x0182, "DCB segment has checksum error"}, 317 {0x0183, "DCB support (settings) segment invalid"}, 318 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 319 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 320 {0x01A0, "Could not clear Sbuf"}, 321 {0x01C0, "Flash identify failed"}, 322 {0x01C1, "Flash out of bounds"}, 323 {0x01C2, "Flash verify error"}, 324 {0x01C3, "Flash file object not found"}, 325 {0x01C4, "Flash file already present"}, 326 {0x01C5, "Flash file system full"}, 327 {0x01C6, "Flash file not present"}, 328 {0x01C7, "Flash file size error"}, 329 {0x01C8, "Bad flash file checksum"}, 330 {0x01CA, "Corrupt flash file system detected"}, 331 {0x01D0, "Invalid field in parameter list"}, 332 {0x01D1, "Parameter list length error"}, 333 {0x01D2, "Parameter item is not changeable"}, 334 {0x01D3, "Parameter item is not saveable"}, 335 {0x0200, "UDMA CRC error"}, 336 {0x0201, "Internal CRC error"}, 337 {0x0202, "Data ECC error"}, 338 {0x0203, "ADP level 1 error"}, 339 {0x0204, "Port timeout"}, 340 {0x0205, "Drive power on reset"}, 341 {0x0206, "ADP level 2 error"}, 342 {0x0207, "Soft reset failed"}, 343 {0x0208, "Drive not ready"}, 344 {0x0209, "Unclassified port error"}, 345 {0x020A, "Drive aborted command"}, 346 {0x0210, "Internal CRC error"}, 347 {0x0211, "Host PCI bus abort"}, 348 {0x0212, "Host PCI parity error"}, 349 {0x0213, "Port handler error"}, 350 {0x0214, "Token interrupt count error"}, 351 {0x0215, "Timeout waiting for PCI transfer"}, 352 {0x0216, "Corrected buffer ECC"}, 353 {0x0217, "Uncorrected buffer ECC"}, 354 {0x0230, "Unsupported command during flash recovery"}, 355 {0x0231, "Next image buffer expected"}, 356 {0x0232, "Binary image architecture incompatible"}, 357 {0x0233, "Binary image has no signature"}, 358 {0x0234, "Binary image has bad checksum"}, 359 {0x0235, "Image downloaded overflowed buffer"}, 360 {0x0240, "I2C device not found"}, 361 {0x0241, "I2C transaction aborted"}, 362 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 363 {0x0243, "SO-DIMM unsupported"}, 364 {0x0248, "SPI transfer status error"}, 365 {0x0249, "SPI transfer timeout error"}, 366 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 367 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 368 {0x0252, "Invalid value in CreateUnit descriptor"}, 369 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 370 {0x0254, "Unable to create data channel for this unit descriptor"}, 371 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 372 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 373 {0x0257, "CreateUnit does not support this descriptor version"}, 374 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 375 {0x0259, "Too many descriptors in CreateUnit"}, 376 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 377 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 378 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 379 {0x0260, "SMART attribute exceeded threshold"}, 380 {0xFFFFFFFF, NULL} 381 }; 382 #endif 383 384 struct twa_pci_identity { 385 uint32_t vendor_id; 386 uint32_t product_id; 387 const char *name; 388 }; 389 390 static const struct twa_pci_identity twa_pci_products[] = { 391 { PCI_VENDOR_3WARE, 392 PCI_PRODUCT_3WARE_9000, 393 "3ware 9000 series", 394 }, 395 { PCI_VENDOR_3WARE, 396 PCI_PRODUCT_3WARE_9550, 397 "3ware 9550SX series", 398 }, 399 { PCI_VENDOR_3WARE, 400 PCI_PRODUCT_3WARE_9650, 401 "3ware 9650SE series", 402 }, 403 { PCI_VENDOR_3WARE, 404 PCI_PRODUCT_3WARE_9690, 405 "3ware 9690 series", 406 }, 407 { 0, 408 0, 409 NULL, 410 }, 411 }; 412 413 414 static inline void 415 twa_outl(struct twa_softc *sc, int off, uint32_t val) 416 { 417 418 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 419 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 420 BUS_SPACE_BARRIER_WRITE); 421 } 422 423 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 424 { 425 426 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 427 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 428 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 429 } 430 431 void 432 twa_request_wait_handler(struct twa_request *tr) 433 { 434 435 wakeup(tr); 436 } 437 438 static const struct twa_pci_identity * 439 twa_lookup(pcireg_t id) 440 { 441 const struct twa_pci_identity *entry; 442 int i; 443 444 for (i = 0; i < __arraycount(twa_pci_products); i++) { 445 entry = &twa_pci_products[i]; 446 if (entry->vendor_id == PCI_VENDOR(id) && 447 entry->product_id == PCI_PRODUCT(id)) { 448 return entry; 449 } 450 } 451 return NULL; 452 } 453 454 static int 455 twa_match(device_t parent, cfdata_t cfdata, void *aux) 456 { 457 struct pci_attach_args *pa = aux; 458 const struct twa_pci_identity *entry; 459 460 entry = twa_lookup(pa->pa_id); 461 if (entry != NULL) { 462 return 1; 463 } 464 return (0); 465 } 466 467 static const char * 468 twa_find_msg_string(const struct twa_message *table, uint16_t code) 469 { 470 int i; 471 472 for (i = 0; table[i].message != NULL; i++) 473 if (table[i].code == code) 474 return(table[i].message); 475 476 return(table[i].message); 477 } 478 479 void 480 twa_release_request(struct twa_request *tr) 481 { 482 int s; 483 struct twa_softc *sc; 484 485 sc = tr->tr_sc; 486 487 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 488 s = splbio(); 489 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 490 splx(s); 491 if (__predict_false((tr->tr_sc->twa_sc_flags & 492 TWA_STATE_REQUEST_WAIT) != 0)) { 493 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 494 wakeup(&sc->twa_free); 495 } 496 } else 497 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 498 } 499 500 static void 501 twa_unmap_request(struct twa_request *tr) 502 { 503 struct twa_softc *sc = tr->tr_sc; 504 uint8_t cmd_status; 505 int s; 506 507 /* If the command involved data, unmap that too. */ 508 if (tr->tr_data != NULL) { 509 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 510 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 511 else 512 cmd_status = 513 tr->tr_command->command.cmd_pkt_7k.generic.status; 514 515 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 516 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 517 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 518 /* 519 * If we are using a bounce buffer, and we are reading 520 * data, copy the real data in. 521 */ 522 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 523 if (cmd_status == 0) 524 memcpy(tr->tr_real_data, tr->tr_data, 525 tr->tr_real_length); 526 } 527 if (tr->tr_flags & TWA_CMD_DATA_IN) 528 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 529 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 530 531 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 532 } 533 534 /* Free alignment buffer if it was used. */ 535 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 536 s = splvm(); 537 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 538 tr->tr_length); 539 splx(s); 540 tr->tr_data = tr->tr_real_data; 541 tr->tr_length = tr->tr_real_length; 542 } 543 } 544 545 /* 546 * Function name: twa_wait_request 547 * Description: Sends down a firmware cmd, and waits for the completion, 548 * but NOT in a tight loop. 549 * 550 * Input: tr -- ptr to request pkt 551 * timeout -- max # of seconds to wait before giving up 552 * Output: None 553 * Return value: 0 -- success 554 * non-zero-- failure 555 */ 556 static int 557 twa_wait_request(struct twa_request *tr, uint32_t timeout) 558 { 559 time_t end_time; 560 struct timeval t1; 561 int s, rv; 562 563 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 564 tr->tr_callback = twa_request_wait_handler; 565 tr->tr_status = TWA_CMD_BUSY; 566 567 rv = twa_map_request(tr); 568 569 if (rv != 0) 570 return (rv); 571 572 microtime(&t1); 573 end_time = t1.tv_usec + 574 (timeout * 1000 * 100); 575 576 while (tr->tr_status != TWA_CMD_COMPLETE) { 577 rv = tr->tr_error; 578 if (rv != 0) 579 return(rv); 580 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 581 break; 582 583 if (rv == EWOULDBLOCK) { 584 /* 585 * We will reset the controller only if the request has 586 * already been submitted, so as to not lose the 587 * request packet. If a busy request timed out, the 588 * reset will take care of freeing resources. If a 589 * pending request timed out, we will free resources 590 * for that request, right here. So, the caller is 591 * expected to NOT cleanup when ETIMEDOUT is returned. 592 */ 593 if (tr->tr_status == TWA_CMD_BUSY) 594 twa_reset(tr->tr_sc); 595 else { 596 /* Request was never submitted. Clean up. */ 597 s = splbio(); 598 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 599 tr_link); 600 splx(s); 601 602 twa_unmap_request(tr); 603 if (tr->tr_data) 604 free(tr->tr_data, M_DEVBUF); 605 606 twa_release_request(tr); 607 } 608 return(ETIMEDOUT); 609 } 610 /* 611 * Either the request got completed, or we were woken up by a 612 * signal. Calculate the new timeout, in case it was the 613 * latter. 614 */ 615 microtime(&t1); 616 617 timeout = (end_time - t1.tv_usec) / (1000 * 100); 618 } 619 return(rv); 620 } 621 622 /* 623 * Function name: twa_immediate_request 624 * Description: Sends down a firmware cmd, and waits for the completion 625 * in a tight loop. 626 * 627 * Input: tr -- ptr to request pkt 628 * timeout -- max # of seconds to wait before giving up 629 * Output: None 630 * Return value: 0 -- success 631 * non-zero-- failure 632 */ 633 static int 634 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 635 { 636 struct timeval t1; 637 int s = 0, rv = 0; 638 639 rv = twa_map_request(tr); 640 641 if (rv != 0) 642 return(rv); 643 644 timeout = (timeout * 10000 * 10); 645 646 microtime(&t1); 647 648 timeout += t1.tv_usec; 649 650 do { 651 rv = tr->tr_error; 652 if (rv != 0) 653 return(rv); 654 s = splbio(); 655 twa_done(tr->tr_sc); 656 splx(s); 657 if (tr->tr_status == TWA_CMD_COMPLETE) 658 return(rv); 659 microtime(&t1); 660 } while (t1.tv_usec <= timeout); 661 662 /* 663 * We will reset the controller only if the request has 664 * already been submitted, so as to not lose the 665 * request packet. If a busy request timed out, the 666 * reset will take care of freeing resources. If a 667 * pending request timed out, we will free resources 668 * for that request, right here. So, the caller is 669 * expected to NOT cleanup when ETIMEDOUT is returned. 670 */ 671 rv = ETIMEDOUT; 672 673 if (tr->tr_status == TWA_CMD_BUSY) 674 twa_reset(tr->tr_sc); 675 else { 676 /* Request was never submitted. Clean up. */ 677 s = splbio(); 678 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 679 splx(s); 680 twa_unmap_request(tr); 681 if (tr->tr_data) 682 free(tr->tr_data, M_DEVBUF); 683 684 twa_release_request(tr); 685 } 686 return (rv); 687 } 688 689 static int 690 twa_inquiry(struct twa_request *tr, int lunid) 691 { 692 int error; 693 struct twa_command_9k *tr_9k_cmd; 694 695 if (tr->tr_data == NULL) 696 return (ENOMEM); 697 698 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 699 700 tr->tr_length = TWA_SECTOR_SIZE; 701 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 702 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 703 704 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 705 706 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 707 tr_9k_cmd->unit = lunid; 708 tr_9k_cmd->request_id = tr->tr_request_id; 709 tr_9k_cmd->status = 0; 710 tr_9k_cmd->sgl_offset = 16; 711 tr_9k_cmd->sgl_entries = 1; 712 /* create the CDB here */ 713 tr_9k_cmd->cdb[0] = INQUIRY; 714 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 715 tr_9k_cmd->cdb[4] = 255; 716 717 /* XXXX setup page data no lun device 718 * it seems 9000 series does not indicate 719 * NOTPRESENT - need more investigation 720 */ 721 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 722 SID_QUAL_LU_NOTPRESENT; 723 724 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 725 if (error != 0) 726 return (error); 727 728 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 729 SID_QUAL_LU_NOTPRESENT) 730 error = 1; 731 732 return (error); 733 } 734 735 static int 736 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 737 { 738 739 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor); 740 741 return (1); 742 } 743 744 745 static uint64_t 746 twa_read_capacity(struct twa_request *tr, int lunid) 747 { 748 int error; 749 struct twa_command_9k *tr_9k_cmd; 750 uint64_t array_size = 0LL; 751 752 if (tr->tr_data == NULL) 753 return (ENOMEM); 754 755 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 756 757 tr->tr_length = TWA_SECTOR_SIZE; 758 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 759 tr->tr_flags |= TWA_CMD_DATA_OUT; 760 761 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 762 763 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 764 tr_9k_cmd->unit = lunid; 765 tr_9k_cmd->request_id = tr->tr_request_id; 766 tr_9k_cmd->status = 0; 767 tr_9k_cmd->sgl_offset = 16; 768 tr_9k_cmd->sgl_entries = 1; 769 /* create the CDB here */ 770 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 771 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 772 773 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 774 775 if (error == 0) { 776 #if BYTE_ORDER == BIG_ENDIAN 777 array_size = bswap64(_8btol( 778 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 779 #else 780 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 781 tr->tr_data)->addr) + 1; 782 #endif 783 } 784 return (array_size); 785 } 786 787 static int 788 twa_request_sense(struct twa_request *tr, int lunid) 789 { 790 int error = 1; 791 struct twa_command_9k *tr_9k_cmd; 792 793 if (tr->tr_data == NULL) 794 return (error); 795 796 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 797 798 tr->tr_length = TWA_SECTOR_SIZE; 799 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 800 tr->tr_flags |= TWA_CMD_DATA_OUT; 801 802 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 803 804 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 805 tr_9k_cmd->unit = lunid; 806 tr_9k_cmd->request_id = tr->tr_request_id; 807 tr_9k_cmd->status = 0; 808 tr_9k_cmd->sgl_offset = 16; 809 tr_9k_cmd->sgl_entries = 1; 810 /* create the CDB here */ 811 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 812 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 813 tr_9k_cmd->cdb[4] = 255; 814 815 /*XXX AEN notification called in interrupt context 816 * so just queue the request. Return as quickly 817 * as possible from interrupt 818 */ 819 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 820 error = twa_map_request(tr); 821 else 822 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 823 824 return (error); 825 } 826 827 static int 828 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 829 { 830 struct twa_request *tr; 831 struct twa_command_packet *tc; 832 bus_dma_segment_t seg; 833 size_t max_segs, max_xfer; 834 int i, rv, rseg, size; 835 836 if ((sc->sc_units = malloc(sc->sc_nunits * 837 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 838 return(ENOMEM); 839 840 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 841 M_DEVBUF, M_NOWAIT)) == NULL) 842 return(ENOMEM); 843 844 size = num_reqs * sizeof(struct twa_command_packet); 845 846 /* Allocate memory for cmd pkts. */ 847 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 848 size, PAGE_SIZE, 0, &seg, 849 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 850 aprint_error_dev(sc->twa_dv, "unable to allocate " 851 "command packets, rv = %d\n", rv); 852 return (ENOMEM); 853 } 854 855 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 856 &seg, rseg, size, (void **)&sc->twa_cmds, 857 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 858 aprint_error_dev(sc->twa_dv, "unable to map commands, rv = %d\n", rv); 859 return (1); 860 } 861 862 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 863 size, num_reqs, size, 864 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 865 aprint_error_dev(sc->twa_dv, "unable to create command DMA map, " 866 "rv = %d\n", rv); 867 return (ENOMEM); 868 } 869 870 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 871 sc->twa_cmds, size, NULL, 872 BUS_DMA_NOWAIT)) != 0) { 873 aprint_error_dev(sc->twa_dv, "unable to load command DMA map, " 874 "rv = %d\n", rv); 875 return (1); 876 } 877 878 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 879 aprint_error_dev(sc->twa_dv, "DMA map memory not aligned on %d boundary\n", TWA_ALIGNMENT); 880 881 return (1); 882 } 883 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 884 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 885 886 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 887 memset(sc->twa_cmd_pkt_buf, 0, 888 num_reqs * sizeof(struct twa_command_packet)); 889 890 sc->sc_twa_request = sc->twa_req_buf; 891 max_segs = twa_get_maxsegs(); 892 max_xfer = twa_get_maxxfer(max_segs); 893 894 for (i = 0; i < num_reqs; i++, tc++) { 895 tr = &(sc->twa_req_buf[i]); 896 tr->tr_command = tc; 897 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 898 (i * sizeof(struct twa_command_packet)); 899 tr->tr_request_id = i; 900 tr->tr_sc = sc; 901 902 /* 903 * Create a map for data buffers. maxsize (256 * 1024) used in 904 * bus_dma_tag_create above should suffice the bounce page needs 905 * for data buffers, since the max I/O size we support is 128KB. 906 * If we supported I/O's bigger than 256KB, we would have to 907 * create a second dma_tag, with the appropriate maxsize. 908 */ 909 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 910 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 911 &tr->tr_dma_map)) != 0) { 912 aprint_error_dev(sc->twa_dv, "unable to create command " 913 "DMA map, rv = %d\n", rv); 914 return (ENOMEM); 915 } 916 /* Insert request into the free queue. */ 917 if (i != 0) { 918 sc->twa_lookup[i] = tr; 919 twa_release_request(tr); 920 } else 921 tr->tr_flags |= TWA_CMD_AEN; 922 } 923 return(0); 924 } 925 926 static void 927 twa_recompute_openings(struct twa_softc *sc) 928 { 929 struct twa_drive *td; 930 int unit; 931 int openings; 932 uint64_t total_size; 933 934 total_size = 0; 935 for (unit = 0; unit < sc->sc_nunits; unit++) { 936 td = &sc->sc_units[unit]; 937 total_size += td->td_size; 938 } 939 940 for (unit = 0; unit < sc->sc_nunits; unit++) { 941 td = &sc->sc_units[unit]; 942 /* 943 * In theory, TWA_Q_LENGTH - 1 should be usable, but 944 * keep one additional ccb for internal commands. 945 * This makes the controller more reliable under load. 946 */ 947 if (total_size > 0) { 948 openings = (TWA_Q_LENGTH - 2) * td->td_size / total_size; 949 } else 950 openings = 0; 951 952 if (openings == td->td_openings) 953 continue; 954 td->td_openings = openings; 955 956 #ifdef TWA_DEBUG 957 printf("%s: unit %d openings %d\n", 958 device_xname(sc->twa_dv), unit, openings); 959 #endif 960 if (td->td_dev != NULL) 961 (*td->td_callbacks->tcb_openings)(td->td_dev, td->td_openings); 962 } 963 } 964 965 static int 966 twa_request_bus_scan(struct twa_softc *sc) 967 { 968 struct twa_drive *td; 969 struct twa_request *tr; 970 struct twa_attach_args twaa; 971 int locs[TWACF_NLOCS]; 972 int s, unit; 973 974 s = splbio(); 975 for (unit = 0; unit < sc->sc_nunits; unit++) { 976 977 if ((tr = twa_get_request(sc, 0)) == NULL) { 978 splx(s); 979 return (EIO); 980 } 981 982 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 983 984 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 985 986 if (tr->tr_data == NULL) { 987 twa_release_request(tr); 988 splx(s); 989 return (ENOMEM); 990 } 991 td = &sc->sc_units[unit]; 992 993 if (twa_inquiry(tr, unit) == 0) { 994 if (td->td_dev == NULL) { 995 twa_print_inquiry_data(sc, 996 ((struct scsipi_inquiry_data *)tr->tr_data)); 997 998 sc->sc_units[unit].td_size = 999 twa_read_capacity(tr, unit); 1000 1001 twaa.twaa_unit = unit; 1002 1003 twa_recompute_openings(sc); 1004 1005 locs[TWACF_UNIT] = unit; 1006 1007 sc->sc_units[unit].td_dev = 1008 config_found_sm_loc(sc->twa_dv, "twa", 1009 locs, &twaa, twa_print, config_stdsubmatch); 1010 } 1011 } else { 1012 if (td->td_dev != NULL) { 1013 (void) config_detach(td->td_dev, DETACH_FORCE); 1014 td->td_dev = NULL; 1015 td->td_size = 0; 1016 1017 twa_recompute_openings(sc); 1018 } 1019 } 1020 free(tr->tr_data, M_DEVBUF); 1021 1022 twa_release_request(tr); 1023 } 1024 splx(s); 1025 1026 return (0); 1027 } 1028 1029 1030 #ifdef DIAGNOSTIC 1031 static inline void 1032 twa_check_busy_q(struct twa_request *tr) 1033 { 1034 struct twa_request *rq; 1035 struct twa_softc *sc = tr->tr_sc; 1036 1037 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1038 if (tr->tr_request_id == rq->tr_request_id) { 1039 panic("cannot submit same request more than once"); 1040 } else if (tr->bp == rq->bp && tr->bp != 0) { 1041 /* XXX A check for 0 for the buf ptr is needed to 1042 * guard against ioctl requests with a buf ptr of 1043 * 0 and also aen notifications. Looking for 1044 * external cmds only. 1045 */ 1046 panic("cannot submit same buf more than once"); 1047 } else { 1048 /* Empty else statement */ 1049 } 1050 } 1051 } 1052 #endif 1053 1054 static int 1055 twa_start(struct twa_request *tr) 1056 { 1057 struct twa_softc *sc = tr->tr_sc; 1058 uint32_t status_reg; 1059 int s; 1060 int error; 1061 1062 s = splbio(); 1063 1064 /* 1065 * The 9650 and 9690 have a bug in the detection of the full queue 1066 * condition. 1067 * 1068 * If a write operation has filled the queue and is directly followed 1069 * by a status read, it sometimes doesn't return the correct result. 1070 * To work around this, the upper 32bit are written first. 1071 * This effectively serialises the hardware, but does not change 1072 * the state of the queue. 1073 */ 1074 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1075 /* Write lower 32 bits of address */ 1076 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1077 sizeof(struct twa_command_header)); 1078 } 1079 1080 /* Check to see if we can post a command. */ 1081 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1082 if ((error = twa_check_ctlr_state(sc, status_reg))) 1083 goto out; 1084 1085 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1086 if (tr->tr_status != TWA_CMD_PENDING) { 1087 tr->tr_status = TWA_CMD_PENDING; 1088 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1089 tr, tr_link); 1090 } 1091 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1092 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1093 error = EBUSY; 1094 } else { 1095 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1096 (char *)tr->tr_command - (char *)sc->twa_cmds, 1097 sizeof(struct twa_command_packet), 1098 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1099 1100 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1101 /* 1102 * Cmd queue is not full. Post the command 1103 * by writing upper 32 bits of address. 1104 */ 1105 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1106 sizeof(struct twa_command_header)); 1107 } else { 1108 /* Cmd queue is not full. Post the command. */ 1109 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1110 sizeof(struct twa_command_header)); 1111 } 1112 1113 /* Mark the request as currently being processed. */ 1114 tr->tr_status = TWA_CMD_BUSY; 1115 1116 #ifdef DIAGNOSTIC 1117 twa_check_busy_q(tr); 1118 #endif 1119 1120 /* Move the request into the busy queue. */ 1121 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1122 } 1123 out: 1124 splx(s); 1125 return(error); 1126 } 1127 1128 static int 1129 twa_drain_response_queue(struct twa_softc *sc) 1130 { 1131 union twa_response_queue rq; 1132 uint32_t status_reg; 1133 1134 for (;;) { 1135 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1136 if (twa_check_ctlr_state(sc, status_reg)) 1137 return(1); 1138 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1139 return(0); /* no more response queue entries */ 1140 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1141 } 1142 } 1143 1144 /* 1145 * twa_drain_response_queue_large: 1146 * 1147 * specific to the 9550 and 9650 controller to remove requests. 1148 * 1149 * Removes all requests from "large" response queue on the 9550 controller. 1150 * This procedure is called as part of the 9550 controller reset sequence. 1151 */ 1152 static int 1153 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1154 { 1155 uint32_t start_time = 0, end_time; 1156 uint32_t response = 0; 1157 1158 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1159 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1160 start_time = 0; 1161 end_time = (timeout * TWA_MICROSECOND); 1162 1163 while ((response & 1164 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1165 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1166 if (start_time >= end_time) 1167 return (1); 1168 DELAY(1); 1169 start_time++; 1170 } 1171 /* P-chip delay */ 1172 DELAY(500000); 1173 } 1174 return (0); 1175 } 1176 1177 static void 1178 twa_drain_busy_queue(struct twa_softc *sc) 1179 { 1180 struct twa_request *tr; 1181 1182 /* Walk the busy queue. */ 1183 1184 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1185 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1186 1187 twa_unmap_request(tr); 1188 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1189 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1190 /* It's an internal/ioctl request. Simply free it. */ 1191 if (tr->tr_data) 1192 free(tr->tr_data, M_DEVBUF); 1193 twa_release_request(tr); 1194 } else { 1195 /* It's a SCSI request. Complete it. */ 1196 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1197 if (tr->tr_callback) 1198 tr->tr_callback(tr); 1199 } 1200 } 1201 } 1202 1203 static int 1204 twa_drain_pending_queue(struct twa_softc *sc) 1205 { 1206 struct twa_request *tr; 1207 int s, error = 0; 1208 1209 /* 1210 * Pull requests off the pending queue, and submit them. 1211 */ 1212 s = splbio(); 1213 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1214 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1215 1216 if ((error = twa_start(tr))) { 1217 if (error == EBUSY) { 1218 tr->tr_status = TWA_CMD_PENDING; 1219 1220 /* queue at the head */ 1221 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1222 tr, tr_link); 1223 error = 0; 1224 break; 1225 } else { 1226 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1227 tr->tr_error = error; 1228 tr->tr_callback(tr); 1229 error = EIO; 1230 } 1231 } 1232 } 1233 } 1234 splx(s); 1235 1236 return(error); 1237 } 1238 1239 static int 1240 twa_drain_aen_queue(struct twa_softc *sc) 1241 { 1242 int s, error = 0; 1243 struct twa_request *tr; 1244 struct twa_command_header *cmd_hdr; 1245 struct timeval t1; 1246 uint32_t timeout; 1247 1248 for (;;) { 1249 if ((tr = twa_get_request(sc, 0)) == NULL) { 1250 error = EIO; 1251 break; 1252 } 1253 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1254 tr->tr_callback = NULL; 1255 1256 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1257 1258 if (tr->tr_data == NULL) { 1259 error = 1; 1260 goto out; 1261 } 1262 1263 if (twa_request_sense(tr, 0) != 0) { 1264 error = 1; 1265 break; 1266 } 1267 1268 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1269 1270 microtime(&t1); 1271 1272 timeout += t1.tv_usec; 1273 1274 do { 1275 s = splbio(); 1276 twa_done(tr->tr_sc); 1277 splx(s); 1278 if (tr->tr_status != TWA_CMD_BUSY) 1279 break; 1280 microtime(&t1); 1281 } while (t1.tv_usec <= timeout); 1282 1283 if (tr->tr_status != TWA_CMD_COMPLETE) { 1284 error = ETIMEDOUT; 1285 break; 1286 } 1287 1288 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1289 break; 1290 1291 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1292 if ((cmd_hdr->status_block.error) /* aen_code */ 1293 == TWA_AEN_QUEUE_EMPTY) 1294 break; 1295 (void)twa_enqueue_aen(sc, cmd_hdr); 1296 1297 free(tr->tr_data, M_DEVBUF); 1298 twa_release_request(tr); 1299 } 1300 out: 1301 if (tr) { 1302 if (tr->tr_data) 1303 free(tr->tr_data, M_DEVBUF); 1304 1305 twa_release_request(tr); 1306 } 1307 return(error); 1308 } 1309 1310 1311 #if 0 1312 static void 1313 twa_check_response_q(struct twa_request *tr, int clear) 1314 { 1315 int j; 1316 static int i = 0; 1317 static struct twa_request *req = 0; 1318 static struct buf *hist[255]; 1319 1320 1321 if (clear) { 1322 i = 0; 1323 for (j = 0; j < 255; j++) 1324 hist[j] = 0; 1325 return; 1326 } 1327 1328 if (req == 0) 1329 req = tr; 1330 1331 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1332 /* XXX this is bogus ! req can't be anything else but tr ! */ 1333 if (req->tr_request_id == tr->tr_request_id) 1334 panic("req id: %d on controller queue twice", 1335 tr->tr_request_id); 1336 1337 for (j = 0; j < i; j++) 1338 if (tr->bp == hist[j]) 1339 panic("req id: %d buf found twice", 1340 tr->tr_request_id); 1341 } 1342 req = tr; 1343 1344 hist[i++] = req->bp; 1345 } 1346 #endif 1347 1348 static int 1349 twa_done(struct twa_softc *sc) 1350 { 1351 union twa_response_queue rq; 1352 struct twa_request *tr; 1353 int rv = 0; 1354 uint32_t status_reg; 1355 1356 for (;;) { 1357 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1358 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1359 break; 1360 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1361 break; 1362 /* Response queue is not empty. */ 1363 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1364 tr = sc->sc_twa_request + rq.u.response_id; 1365 #if 0 1366 twa_check_response_q(tr, 0); 1367 #endif 1368 /* Unmap the command packet, and any associated data buffer. */ 1369 twa_unmap_request(tr); 1370 1371 tr->tr_status = TWA_CMD_COMPLETE; 1372 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1373 1374 if (tr->tr_callback) 1375 tr->tr_callback(tr); 1376 } 1377 (void)twa_drain_pending_queue(sc); 1378 1379 #if 0 1380 twa_check_response_q(NULL, 1); 1381 #endif 1382 return(rv); 1383 } 1384 1385 /* 1386 * Function name: twa_init_ctlr 1387 * Description: Establishes a logical connection with the controller. 1388 * If bundled with firmware, determines whether or not 1389 * the driver is compatible with the firmware on the 1390 * controller, before proceeding to work with it. 1391 * 1392 * Input: sc -- ptr to per ctlr structure 1393 * Output: None 1394 * Return value: 0 -- success 1395 * non-zero-- failure 1396 */ 1397 static int 1398 twa_init_ctlr(struct twa_softc *sc) 1399 { 1400 uint16_t fw_on_ctlr_srl = 0; 1401 uint16_t fw_on_ctlr_arch_id = 0; 1402 uint16_t fw_on_ctlr_branch = 0; 1403 uint16_t fw_on_ctlr_build = 0; 1404 uint32_t init_connect_result = 0; 1405 int error = 0; 1406 1407 /* Wait for the controller to become ready. */ 1408 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1409 TWA_REQUEST_TIMEOUT_PERIOD)) { 1410 return(ENXIO); 1411 } 1412 /* Drain the response queue. */ 1413 if (twa_drain_response_queue(sc)) 1414 return(1); 1415 1416 /* Establish a logical connection with the controller. */ 1417 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1418 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1419 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1420 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1421 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1422 &fw_on_ctlr_build, &init_connect_result))) { 1423 return(error); 1424 } 1425 twa_drain_aen_queue(sc); 1426 1427 /* Set controller state to initialized. */ 1428 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1429 return(0); 1430 } 1431 1432 static int 1433 twa_setup(struct twa_softc *sc) 1434 { 1435 struct tw_cl_event_packet *aen_queue; 1436 uint32_t i = 0; 1437 int error = 0; 1438 1439 /* Initialize request queues. */ 1440 TAILQ_INIT(&sc->twa_free); 1441 TAILQ_INIT(&sc->twa_busy); 1442 TAILQ_INIT(&sc->twa_pending); 1443 1444 sc->twa_sc_flags = 0; 1445 1446 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1447 1448 return(ENOMEM); 1449 } 1450 1451 /* Allocate memory for the AEN queue. */ 1452 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1453 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1454 /* 1455 * This should not cause us to return error. We will only be 1456 * unable to support AEN's. But then, we will have to check 1457 * time and again to see if we can support AEN's, if we 1458 * continue. So, we will just return error. 1459 */ 1460 return (ENOMEM); 1461 } 1462 /* Initialize the aen queue. */ 1463 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1464 1465 for (i = 0; i < TWA_Q_LENGTH; i++) 1466 sc->twa_aen_queue[i] = &(aen_queue[i]); 1467 1468 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1469 TWA_CONTROL_DISABLE_INTERRUPTS); 1470 1471 /* Initialize the controller. */ 1472 if ((error = twa_init_ctlr(sc))) { 1473 /* Soft reset the controller, and try one more time. */ 1474 1475 printf("%s: controller initialization failed. " 1476 "Retrying initialization\n", device_xname(sc->twa_dv)); 1477 1478 if ((error = twa_soft_reset(sc)) == 0) 1479 error = twa_init_ctlr(sc); 1480 } 1481 1482 twa_describe_controller(sc); 1483 1484 error = twa_request_bus_scan(sc); 1485 1486 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1487 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1488 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1489 TWA_CONTROL_ENABLE_INTERRUPTS); 1490 1491 return (error); 1492 } 1493 1494 void *twa_sdh; 1495 1496 static void 1497 twa_attach(device_t parent, device_t self, void *aux) 1498 { 1499 struct pci_attach_args *pa; 1500 struct twa_softc *sc; 1501 pci_chipset_tag_t pc; 1502 pcireg_t csr; 1503 pci_intr_handle_t ih; 1504 const char *intrstr; 1505 const struct sysctlnode *node; 1506 const struct twa_pci_identity *entry; 1507 int i; 1508 bool use_64bit; 1509 1510 sc = device_private(self); 1511 1512 sc->twa_dv = self; 1513 1514 pa = aux; 1515 pc = pa->pa_pc; 1516 sc->pc = pa->pa_pc; 1517 sc->tag = pa->pa_tag; 1518 1519 entry = twa_lookup(pa->pa_id); 1520 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1); 1521 1522 sc->sc_quirks = 0; 1523 1524 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1525 sc->sc_nunits = TWA_MAX_UNITS; 1526 use_64bit = false; 1527 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1528 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1529 aprint_error_dev(sc->twa_dv, "can't map i/o space\n"); 1530 return; 1531 } 1532 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1533 sc->sc_nunits = TWA_MAX_UNITS; 1534 use_64bit = true; 1535 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1536 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1537 &sc->twa_bus_ioh, NULL, NULL)) { 1538 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1539 return; 1540 } 1541 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1542 sc->sc_nunits = TWA_9650_MAX_UNITS; 1543 use_64bit = true; 1544 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1545 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1546 &sc->twa_bus_ioh, NULL, NULL)) { 1547 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1548 return; 1549 } 1550 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1551 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1552 sc->sc_nunits = TWA_9690_MAX_UNITS; 1553 use_64bit = true; 1554 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1555 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1556 &sc->twa_bus_ioh, NULL, NULL)) { 1557 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1558 return; 1559 } 1560 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1561 } else { 1562 sc->sc_nunits = 0; 1563 use_64bit = false; 1564 aprint_error_dev(sc->twa_dv, "product id 0x%02x not recognized\n", 1565 PCI_PRODUCT(pa->pa_id)); 1566 return; 1567 } 1568 1569 if (pci_dma64_available(pa) && use_64bit) { 1570 aprint_verbose_dev(self, "64-bit DMA addressing active\n"); 1571 sc->twa_dma_tag = pa->pa_dmat64; 1572 } else { 1573 sc->twa_dma_tag = pa->pa_dmat; 1574 } 1575 1576 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1577 /* Enable the device. */ 1578 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1579 1580 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1581 csr | PCI_COMMAND_MASTER_ENABLE); 1582 1583 /* Map and establish the interrupt. */ 1584 if (pci_intr_map(pa, &ih)) { 1585 aprint_error_dev(sc->twa_dv, "can't map interrupt\n"); 1586 return; 1587 } 1588 intrstr = pci_intr_string(pc, ih); 1589 1590 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1591 if (sc->twa_ih == NULL) { 1592 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n", 1593 (intrstr) ? " at " : "", 1594 (intrstr) ? intrstr : ""); 1595 return; 1596 } 1597 1598 if (intrstr != NULL) 1599 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", 1600 intrstr); 1601 1602 twa_setup(sc); 1603 1604 if (twa_sdh == NULL) 1605 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1606 1607 /* sysctl set-up for 3ware cli */ 1608 if (sysctl_createv(NULL, 0, NULL, NULL, 1609 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 1610 NULL, NULL, 0, NULL, 0, 1611 CTL_HW, CTL_EOL) != 0) { 1612 aprint_error_dev(sc->twa_dv, "could not create %s sysctl node\n", 1613 "hw"); 1614 return; 1615 } 1616 if (sysctl_createv(NULL, 0, NULL, &node, 1617 0, CTLTYPE_NODE, device_xname(sc->twa_dv), 1618 SYSCTL_DESCR("twa driver information"), 1619 NULL, 0, NULL, 0, 1620 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1621 aprint_error_dev(sc->twa_dv, "could not create %s.%s sysctl node\n", 1622 "hw", 1623 device_xname(sc->twa_dv)); 1624 return; 1625 } 1626 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1627 0, CTLTYPE_STRING, "driver_version", 1628 SYSCTL_DESCR("twa driver version"), 1629 NULL, 0, __UNCONST(&twaver), 0, 1630 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1631 != 0) { 1632 aprint_error_dev(sc->twa_dv, "could not create %s.%s.driver_version sysctl\n", 1633 "hw", 1634 device_xname(sc->twa_dv)); 1635 return; 1636 } 1637 1638 return; 1639 } 1640 1641 static void 1642 twa_shutdown(void *arg) 1643 { 1644 extern struct cfdriver twa_cd; 1645 struct twa_softc *sc; 1646 int i, rv, unit; 1647 1648 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1649 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1650 continue; 1651 1652 for (unit = 0; unit < sc->sc_nunits; unit++) 1653 if (sc->sc_units[unit].td_dev != NULL) 1654 (void) config_detach(sc->sc_units[unit].td_dev, 1655 DETACH_FORCE | DETACH_QUIET); 1656 1657 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1658 TWA_CONTROL_DISABLE_INTERRUPTS); 1659 1660 /* Let the controller know that we are going down. */ 1661 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1662 0, 0, 0, 0, 0, 1663 NULL, NULL, NULL, NULL, NULL); 1664 } 1665 } 1666 1667 void 1668 twa_register_callbacks(struct twa_softc *sc, int unit, 1669 const struct twa_callbacks *tcb) 1670 { 1671 1672 sc->sc_units[unit].td_callbacks = tcb; 1673 } 1674 1675 /* 1676 * Print autoconfiguration message for a sub-device 1677 */ 1678 static int 1679 twa_print(void *aux, const char *pnp) 1680 { 1681 struct twa_attach_args *twaa; 1682 1683 twaa = aux; 1684 1685 if (pnp !=NULL) 1686 aprint_normal("block device at %s\n", pnp); 1687 aprint_normal(" unit %d\n", twaa->twaa_unit); 1688 return (UNCONF); 1689 } 1690 1691 static void 1692 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1693 { 1694 int i; 1695 for (i = 0; i < nsegments; i++) { 1696 sgl[i].address = segs[i].ds_addr; 1697 sgl[i].length = (uint32_t)(segs[i].ds_len); 1698 } 1699 } 1700 1701 static int 1702 twa_submit_io(struct twa_request *tr) 1703 { 1704 int error; 1705 1706 if ((error = twa_start(tr))) { 1707 if (error == EBUSY) 1708 error = 0; /* request is in the pending queue */ 1709 else { 1710 tr->tr_error = error; 1711 } 1712 } 1713 return(error); 1714 } 1715 1716 /* 1717 * Function name: twa_setup_data_dmamap 1718 * Description: Callback of bus_dmamap_load for the buffer associated 1719 * with data. Updates the cmd pkt (size/sgl_entries 1720 * fields, as applicable) to reflect the number of sg 1721 * elements. 1722 * 1723 * Input: arg -- ptr to request pkt 1724 * segs -- ptr to a list of segment descriptors 1725 * nsegments--# of segments 1726 * error -- 0 if no errors encountered before callback, 1727 * non-zero if errors were encountered 1728 * Output: None 1729 * Return value: None 1730 */ 1731 static int 1732 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1733 { 1734 struct twa_request *tr = (struct twa_request *)arg; 1735 struct twa_command_packet *cmdpkt = tr->tr_command; 1736 struct twa_command_9k *cmd9k; 1737 union twa_command_7k *cmd7k; 1738 uint8_t sgl_offset; 1739 int error; 1740 1741 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1742 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1743 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1744 cmd9k->sgl_entries += nsegments - 1; 1745 } else { 1746 /* It's a 7000 command packet. */ 1747 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1748 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1749 twa_fillin_sgl((struct twa_sg *) 1750 (((uint32_t *)cmd7k) + sgl_offset), 1751 segs, nsegments); 1752 /* Modify the size field, based on sg address size. */ 1753 cmd7k->generic.size += 1754 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1755 } 1756 if (tr->tr_flags & TWA_CMD_DATA_IN) 1757 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1758 tr->tr_length, BUS_DMASYNC_PREWRITE); 1759 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1760 /* 1761 * If we're using an alignment buffer, and we're 1762 * writing data, copy the real data out. 1763 */ 1764 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1765 memcpy(tr->tr_data, tr->tr_real_data, 1766 tr->tr_real_length); 1767 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1768 tr->tr_length, BUS_DMASYNC_PREREAD); 1769 } 1770 error = twa_submit_io(tr); 1771 1772 if (error) { 1773 twa_unmap_request(tr); 1774 /* 1775 * If the caller had been returned EINPROGRESS, and he has 1776 * registered a callback for handling completion, the callback 1777 * will never get called because we were unable to submit the 1778 * request. So, free up the request right here. 1779 */ 1780 if (tr->tr_callback) 1781 twa_release_request(tr); 1782 } 1783 return (error); 1784 } 1785 1786 /* 1787 * Function name: twa_map_request 1788 * Description: Maps a cmd pkt and data associated with it, into 1789 * DMA'able memory. 1790 * 1791 * Input: tr -- ptr to request pkt 1792 * Output: None 1793 * Return value: 0 -- success 1794 * non-zero-- failure 1795 */ 1796 int 1797 twa_map_request(struct twa_request *tr) 1798 { 1799 struct twa_softc *sc = tr->tr_sc; 1800 int s, rv, rc; 1801 1802 /* If the command involves data, map that too. */ 1803 if (tr->tr_data != NULL) { 1804 1805 if (((u_long)tr->tr_data & (511)) != 0) { 1806 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1807 tr->tr_real_data = tr->tr_data; 1808 tr->tr_real_length = tr->tr_length; 1809 s = splvm(); 1810 rc = uvm_km_kmem_alloc(kmem_va_arena, 1811 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT), 1812 (vmem_addr_t *)&tr->tr_data); 1813 splx(s); 1814 1815 if (rc != 0) { 1816 tr->tr_data = tr->tr_real_data; 1817 tr->tr_length = tr->tr_real_length; 1818 return(ENOMEM); 1819 } 1820 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1821 memcpy(tr->tr_data, tr->tr_real_data, 1822 tr->tr_length); 1823 } 1824 1825 /* 1826 * Map the data buffer into bus space and build the S/G list. 1827 */ 1828 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1829 tr->tr_data, tr->tr_length, NULL, 1830 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1831 1832 if (rv != 0) { 1833 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1834 s = splvm(); 1835 uvm_km_kmem_free(kmem_va_arena, 1836 (vaddr_t)tr->tr_data, 1837 tr->tr_length); 1838 splx(s); 1839 } 1840 return (rv); 1841 } 1842 1843 if ((rv = twa_setup_data_dmamap(tr, 1844 tr->tr_dma_map->dm_segs, 1845 tr->tr_dma_map->dm_nsegs))) { 1846 1847 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1848 s = splvm(); 1849 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 1850 tr->tr_length); 1851 splx(s); 1852 tr->tr_data = tr->tr_real_data; 1853 tr->tr_length = tr->tr_real_length; 1854 } 1855 } 1856 1857 } else 1858 if ((rv = twa_submit_io(tr))) 1859 twa_unmap_request(tr); 1860 1861 return (rv); 1862 } 1863 1864 /* 1865 * Function name: twa_intr 1866 * Description: Interrupt handler. Determines the kind of interrupt, 1867 * and calls the appropriate handler. 1868 * 1869 * Input: sc -- ptr to per ctlr structure 1870 * Output: None 1871 * Return value: None 1872 */ 1873 1874 static int 1875 twa_intr(void *arg) 1876 { 1877 int caught, s, rv; 1878 struct twa_softc *sc; 1879 uint32_t status_reg; 1880 sc = (struct twa_softc *)arg; 1881 1882 caught = 0; 1883 /* Collect current interrupt status. */ 1884 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1885 if (twa_check_ctlr_state(sc, status_reg)) { 1886 caught = 1; 1887 goto bail; 1888 } 1889 /* Dispatch based on the kind of interrupt. */ 1890 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1891 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1892 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1893 caught = 1; 1894 } 1895 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1896 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1897 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1898 rv = twa_fetch_aen(sc); 1899 #ifdef DIAGNOSTIC 1900 if (rv != 0) 1901 printf("%s: unable to retrieve AEN (%d)\n", 1902 device_xname(sc->twa_dv), rv); 1903 #endif 1904 caught = 1; 1905 } 1906 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1907 /* Start any requests that might be in the pending queue. */ 1908 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1909 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1910 (void)twa_drain_pending_queue(sc); 1911 caught = 1; 1912 } 1913 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1914 s = splbio(); 1915 twa_done(sc); 1916 splx(s); 1917 caught = 1; 1918 } 1919 bail: 1920 return (caught); 1921 } 1922 1923 /* 1924 * Accept an open operation on the control device. 1925 */ 1926 static int 1927 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1928 { 1929 struct twa_softc *twa; 1930 1931 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1932 return (ENXIO); 1933 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1934 return (EBUSY); 1935 1936 twa->twa_sc_flags |= TWA_STATE_OPEN; 1937 1938 return (0); 1939 } 1940 1941 /* 1942 * Accept the last close on the control device. 1943 */ 1944 static int 1945 twaclose(dev_t dev, int flag, int mode, 1946 struct lwp *l) 1947 { 1948 struct twa_softc *twa; 1949 1950 twa = device_lookup_private(&twa_cd, minor(dev)); 1951 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1952 return (0); 1953 } 1954 1955 /* 1956 * Function name: twaioctl 1957 * Description: ioctl handler. 1958 * 1959 * Input: sc -- ptr to per ctlr structure 1960 * cmd -- ioctl cmd 1961 * buf -- ptr to buffer in kernel memory, which is 1962 * a copy of the input buffer in user-space 1963 * Output: buf -- ptr to buffer in kernel memory, which will 1964 * be copied of the output buffer in user-space 1965 * Return value: 0 -- success 1966 * non-zero-- failure 1967 */ 1968 static int 1969 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1970 struct lwp *l) 1971 { 1972 struct twa_softc *sc; 1973 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1974 struct tw_cl_event_packet event_buf; 1975 struct twa_request *tr = 0; 1976 int32_t event_index = 0; 1977 int32_t start_index; 1978 int s, error = 0; 1979 1980 sc = device_lookup_private(&twa_cd, minor(dev)); 1981 1982 switch (cmd) { 1983 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1984 { 1985 struct twa_command_packet *cmdpkt; 1986 uint32_t data_buf_size_adjusted; 1987 1988 /* Get a request packet */ 1989 tr = twa_get_request_wait(sc, 0); 1990 KASSERT(tr != NULL); 1991 /* 1992 * Make sure that the data buffer sent to firmware is a 1993 * 512 byte multiple in size. 1994 */ 1995 data_buf_size_adjusted = 1996 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1997 1998 if ((tr->tr_length = data_buf_size_adjusted)) { 1999 if ((tr->tr_data = malloc(data_buf_size_adjusted, 2000 M_DEVBUF, M_WAITOK)) == NULL) { 2001 error = ENOMEM; 2002 goto fw_passthru_done; 2003 } 2004 /* Copy the payload. */ 2005 if ((error = copyin((void *) (user_buf->pdata), 2006 (void *) (tr->tr_data), 2007 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2008 goto fw_passthru_done; 2009 } 2010 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2011 } 2012 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2013 cmdpkt = tr->tr_command; 2014 2015 /* Copy the command packet. */ 2016 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2017 sizeof(struct twa_command_packet)); 2018 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2019 tr->tr_request_id; 2020 2021 /* Send down the request, and wait for it to complete. */ 2022 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2023 if (error == ETIMEDOUT) 2024 break; /* clean-up done by twa_wait_request */ 2025 goto fw_passthru_done; 2026 } 2027 2028 /* Copy the command packet back into user space. */ 2029 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2030 sizeof(struct twa_command_packet)); 2031 2032 /* If there was a payload, copy it back too. */ 2033 if (tr->tr_length) 2034 error = copyout(tr->tr_data, user_buf->pdata, 2035 user_buf->twa_drvr_pkt.buffer_length); 2036 fw_passthru_done: 2037 /* Free resources. */ 2038 if (tr->tr_data) 2039 free(tr->tr_data, M_DEVBUF); 2040 2041 if (tr) 2042 twa_release_request(tr); 2043 break; 2044 } 2045 2046 case TW_OSL_IOCTL_SCAN_BUS: 2047 twa_request_bus_scan(sc); 2048 break; 2049 2050 case TW_CL_IOCTL_GET_FIRST_EVENT: 2051 if (sc->twa_aen_queue_wrapped) { 2052 if (sc->twa_aen_queue_overflow) { 2053 /* 2054 * The aen queue has wrapped, even before some 2055 * events have been retrieved. Let the caller 2056 * know that he missed out on some AEN's. 2057 */ 2058 user_buf->twa_drvr_pkt.status = 2059 TWA_ERROR_AEN_OVERFLOW; 2060 sc->twa_aen_queue_overflow = FALSE; 2061 } else 2062 user_buf->twa_drvr_pkt.status = 0; 2063 event_index = sc->twa_aen_head; 2064 } else { 2065 if (sc->twa_aen_head == sc->twa_aen_tail) { 2066 user_buf->twa_drvr_pkt.status = 2067 TWA_ERROR_AEN_NO_EVENTS; 2068 break; 2069 } 2070 user_buf->twa_drvr_pkt.status = 0; 2071 event_index = sc->twa_aen_tail; /* = 0 */ 2072 } 2073 if ((error = copyout(sc->twa_aen_queue[event_index], 2074 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2075 (sc->twa_aen_queue[event_index])->retrieved = 2076 TWA_AEN_RETRIEVED; 2077 break; 2078 2079 case TW_CL_IOCTL_GET_LAST_EVENT: 2080 if (sc->twa_aen_queue_wrapped) { 2081 if (sc->twa_aen_queue_overflow) { 2082 /* 2083 * The aen queue has wrapped, even before some 2084 * events have been retrieved. Let the caller 2085 * know that he missed out on some AEN's. 2086 */ 2087 user_buf->twa_drvr_pkt.status = 2088 TWA_ERROR_AEN_OVERFLOW; 2089 sc->twa_aen_queue_overflow = FALSE; 2090 } else 2091 user_buf->twa_drvr_pkt.status = 0; 2092 } else { 2093 if (sc->twa_aen_head == sc->twa_aen_tail) { 2094 user_buf->twa_drvr_pkt.status = 2095 TWA_ERROR_AEN_NO_EVENTS; 2096 break; 2097 } 2098 user_buf->twa_drvr_pkt.status = 0; 2099 } 2100 event_index = 2101 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2102 if ((error = copyout(sc->twa_aen_queue[event_index], 2103 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2104 (sc->twa_aen_queue[event_index])->retrieved = 2105 TWA_AEN_RETRIEVED; 2106 break; 2107 2108 case TW_CL_IOCTL_GET_NEXT_EVENT: 2109 user_buf->twa_drvr_pkt.status = 0; 2110 if (sc->twa_aen_queue_wrapped) { 2111 2112 if (sc->twa_aen_queue_overflow) { 2113 /* 2114 * The aen queue has wrapped, even before some 2115 * events have been retrieved. Let the caller 2116 * know that he missed out on some AEN's. 2117 */ 2118 user_buf->twa_drvr_pkt.status = 2119 TWA_ERROR_AEN_OVERFLOW; 2120 sc->twa_aen_queue_overflow = FALSE; 2121 } 2122 start_index = sc->twa_aen_head; 2123 } else { 2124 if (sc->twa_aen_head == sc->twa_aen_tail) { 2125 user_buf->twa_drvr_pkt.status = 2126 TWA_ERROR_AEN_NO_EVENTS; 2127 break; 2128 } 2129 start_index = sc->twa_aen_tail; /* = 0 */ 2130 } 2131 error = copyin(user_buf->pdata, &event_buf, 2132 sizeof(struct tw_cl_event_packet)); 2133 2134 event_index = (start_index + event_buf.sequence_id - 2135 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2136 % TWA_Q_LENGTH; 2137 2138 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2139 event_buf.sequence_id)) { 2140 if (user_buf->twa_drvr_pkt.status == 2141 TWA_ERROR_AEN_OVERFLOW) 2142 /* so we report the overflow next time */ 2143 sc->twa_aen_queue_overflow = TRUE; 2144 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2145 break; 2146 } 2147 if ((error = copyout(sc->twa_aen_queue[event_index], 2148 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2149 (sc->twa_aen_queue[event_index])->retrieved = 2150 TWA_AEN_RETRIEVED; 2151 break; 2152 2153 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2154 user_buf->twa_drvr_pkt.status = 0; 2155 if (sc->twa_aen_queue_wrapped) { 2156 if (sc->twa_aen_queue_overflow) { 2157 /* 2158 * The aen queue has wrapped, even before some 2159 * events have been retrieved. Let the caller 2160 * know that he missed out on some AEN's. 2161 */ 2162 user_buf->twa_drvr_pkt.status = 2163 TWA_ERROR_AEN_OVERFLOW; 2164 sc->twa_aen_queue_overflow = FALSE; 2165 } 2166 start_index = sc->twa_aen_head; 2167 } else { 2168 if (sc->twa_aen_head == sc->twa_aen_tail) { 2169 user_buf->twa_drvr_pkt.status = 2170 TWA_ERROR_AEN_NO_EVENTS; 2171 break; 2172 } 2173 start_index = sc->twa_aen_tail; /* = 0 */ 2174 } 2175 if ((error = copyin(user_buf->pdata, &event_buf, 2176 sizeof(struct tw_cl_event_packet))) != 0) 2177 2178 event_index = (start_index + event_buf.sequence_id - 2179 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2180 % TWA_Q_LENGTH; 2181 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2182 event_buf.sequence_id)) { 2183 if (user_buf->twa_drvr_pkt.status == 2184 TWA_ERROR_AEN_OVERFLOW) 2185 /* so we report the overflow next time */ 2186 sc->twa_aen_queue_overflow = TRUE; 2187 user_buf->twa_drvr_pkt.status = 2188 TWA_ERROR_AEN_NO_EVENTS; 2189 break; 2190 } 2191 if ((error = copyout(sc->twa_aen_queue [event_index], 2192 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2193 aprint_error_dev(sc->twa_dv, "get_previous: Could not copyout to " 2194 "event_buf. error = %x\n", 2195 error); 2196 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2197 break; 2198 2199 case TW_CL_IOCTL_GET_LOCK: 2200 { 2201 struct tw_cl_lock_packet twa_lock; 2202 2203 copyin(user_buf->pdata, &twa_lock, 2204 sizeof(struct tw_cl_lock_packet)); 2205 s = splbio(); 2206 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2207 (twa_lock.force_flag) || 2208 (time_second >= sc->twa_ioctl_lock.timeout)) { 2209 2210 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2211 sc->twa_ioctl_lock.timeout = time_second + 2212 (twa_lock.timeout_msec / 1000); 2213 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2214 user_buf->twa_drvr_pkt.status = 0; 2215 } else { 2216 twa_lock.time_remaining_msec = 2217 (sc->twa_ioctl_lock.timeout - time_second) * 2218 1000; 2219 user_buf->twa_drvr_pkt.status = 2220 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2221 } 2222 splx(s); 2223 copyout(&twa_lock, user_buf->pdata, 2224 sizeof(struct tw_cl_lock_packet)); 2225 break; 2226 } 2227 2228 case TW_CL_IOCTL_RELEASE_LOCK: 2229 s = splbio(); 2230 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2231 user_buf->twa_drvr_pkt.status = 2232 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2233 } else { 2234 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2235 user_buf->twa_drvr_pkt.status = 0; 2236 } 2237 splx(s); 2238 break; 2239 2240 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2241 { 2242 struct tw_cl_compatibility_packet comp_pkt; 2243 2244 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2245 sizeof(TWA_DRIVER_VERSION_STRING)); 2246 comp_pkt.working_srl = sc->working_srl; 2247 comp_pkt.working_branch = sc->working_branch; 2248 comp_pkt.working_build = sc->working_build; 2249 user_buf->twa_drvr_pkt.status = 0; 2250 2251 /* Copy compatibility information to user space. */ 2252 copyout(&comp_pkt, user_buf->pdata, 2253 min(sizeof(struct tw_cl_compatibility_packet), 2254 user_buf->twa_drvr_pkt.buffer_length)); 2255 break; 2256 } 2257 2258 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2259 { 2260 struct twa_unitname *tn; 2261 struct twa_drive *tdr; 2262 2263 tn = (struct twa_unitname *)data; 2264 /* XXX mutex */ 2265 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2266 return (EINVAL); 2267 tdr = &sc->sc_units[tn->tn_unit]; 2268 if (tdr->td_dev == NULL) 2269 tn->tn_name[0] = '\0'; 2270 else 2271 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2272 sizeof(tn->tn_name)); 2273 return (0); 2274 } 2275 2276 default: 2277 /* Unknown opcode. */ 2278 error = ENOTTY; 2279 } 2280 2281 return(error); 2282 } 2283 2284 const struct cdevsw twa_cdevsw = { 2285 twaopen, twaclose, noread, nowrite, twaioctl, 2286 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 2287 }; 2288 2289 /* 2290 * Function name: twa_get_param 2291 * Description: Get a firmware parameter. 2292 * 2293 * Input: sc -- ptr to per ctlr structure 2294 * table_id -- parameter table # 2295 * param_id -- index of the parameter in the table 2296 * param_size -- size of the parameter in bytes 2297 * callback -- ptr to function, if any, to be called 2298 * back on completion; NULL if no callback. 2299 * Output: None 2300 * Return value: ptr to param structure -- success 2301 * NULL -- failure 2302 */ 2303 static int 2304 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2305 size_t param_size, void (* callback)(struct twa_request *tr), 2306 struct twa_param_9k **param) 2307 { 2308 int rv = 0; 2309 struct twa_request *tr; 2310 union twa_command_7k *cmd; 2311 2312 /* Get a request packet. */ 2313 if ((tr = twa_get_request(sc, 0)) == NULL) { 2314 rv = EAGAIN; 2315 goto out; 2316 } 2317 2318 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2319 2320 /* Allocate memory to read data into. */ 2321 if ((*param = (struct twa_param_9k *) 2322 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2323 rv = ENOMEM; 2324 goto out; 2325 } 2326 2327 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2328 tr->tr_data = *param; 2329 tr->tr_length = TWA_SECTOR_SIZE; 2330 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2331 2332 /* Build the cmd pkt. */ 2333 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2334 2335 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2336 2337 cmd->param.opcode = TWA_OP_GET_PARAM; 2338 cmd->param.sgl_offset = 2; 2339 cmd->param.size = 2; 2340 cmd->param.request_id = tr->tr_request_id; 2341 cmd->param.unit = 0; 2342 cmd->param.param_count = 1; 2343 2344 /* Specify which parameter we need. */ 2345 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2346 (*param)->parameter_id = param_id; 2347 (*param)->parameter_size_bytes = param_size; 2348 2349 /* Submit the command. */ 2350 if (callback == NULL) { 2351 /* There's no call back; wait till the command completes. */ 2352 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2353 2354 if (rv != 0) 2355 goto out; 2356 2357 if ((rv = cmd->param.status) != 0) { 2358 /* twa_drain_complete_queue will have done the unmapping */ 2359 goto out; 2360 } 2361 twa_release_request(tr); 2362 return (rv); 2363 } else { 2364 /* There's a call back. Simply submit the command. */ 2365 tr->tr_callback = callback; 2366 rv = twa_map_request(tr); 2367 return (rv); 2368 } 2369 out: 2370 if (tr) 2371 twa_release_request(tr); 2372 return(rv); 2373 } 2374 2375 /* 2376 * Function name: twa_set_param 2377 * Description: Set a firmware parameter. 2378 * 2379 * Input: sc -- ptr to per ctlr structure 2380 * table_id -- parameter table # 2381 * param_id -- index of the parameter in the table 2382 * param_size -- size of the parameter in bytes 2383 * callback -- ptr to function, if any, to be called 2384 * back on completion; NULL if no callback. 2385 * Output: None 2386 * Return value: 0 -- success 2387 * non-zero-- failure 2388 */ 2389 static int 2390 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2391 void *data, void (* callback)(struct twa_request *tr)) 2392 { 2393 struct twa_request *tr; 2394 union twa_command_7k *cmd; 2395 struct twa_param_9k *param = NULL; 2396 int error = ENOMEM; 2397 2398 tr = twa_get_request(sc, 0); 2399 if (tr == NULL) 2400 return (EAGAIN); 2401 2402 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2403 2404 /* Allocate memory to send data using. */ 2405 if ((param = (struct twa_param_9k *) 2406 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2407 goto out; 2408 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2409 tr->tr_data = param; 2410 tr->tr_length = TWA_SECTOR_SIZE; 2411 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2412 2413 /* Build the cmd pkt. */ 2414 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2415 2416 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2417 2418 cmd->param.opcode = TWA_OP_SET_PARAM; 2419 cmd->param.sgl_offset = 2; 2420 cmd->param.size = 2; 2421 cmd->param.request_id = tr->tr_request_id; 2422 cmd->param.unit = 0; 2423 cmd->param.param_count = 1; 2424 2425 /* Specify which parameter we want to set. */ 2426 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2427 param->parameter_id = param_id; 2428 param->parameter_size_bytes = param_size; 2429 memcpy(param->data, data, param_size); 2430 2431 /* Submit the command. */ 2432 if (callback == NULL) { 2433 /* There's no call back; wait till the command completes. */ 2434 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2435 if (error == ETIMEDOUT) 2436 /* clean-up done by twa_immediate_request */ 2437 return(error); 2438 if (error) 2439 goto out; 2440 if ((error = cmd->param.status)) { 2441 /* 2442 * twa_drain_complete_queue will have done the 2443 * unmapping. 2444 */ 2445 goto out; 2446 } 2447 free(param, M_DEVBUF); 2448 twa_release_request(tr); 2449 return(error); 2450 } else { 2451 /* There's a call back. Simply submit the command. */ 2452 tr->tr_callback = callback; 2453 if ((error = twa_map_request(tr))) 2454 goto out; 2455 2456 return (0); 2457 } 2458 out: 2459 if (param) 2460 free(param, M_DEVBUF); 2461 if (tr) 2462 twa_release_request(tr); 2463 return(error); 2464 } 2465 2466 /* 2467 * Function name: twa_init_connection 2468 * Description: Send init_connection cmd to firmware 2469 * 2470 * Input: sc -- ptr to per ctlr structure 2471 * message_credits -- max # of requests that we might send 2472 * down simultaneously. This will be 2473 * typically set to 256 at init-time or 2474 * after a reset, and to 1 at shutdown-time 2475 * set_features -- indicates if we intend to use 64-bit 2476 * sg, also indicates if we want to do a 2477 * basic or an extended init_connection; 2478 * 2479 * Note: The following input/output parameters are valid, only in case of an 2480 * extended init_connection: 2481 * 2482 * current_fw_srl -- srl of fw we are bundled 2483 * with, if any; 0 otherwise 2484 * current_fw_arch_id -- arch_id of fw we are bundled 2485 * with, if any; 0 otherwise 2486 * current_fw_branch -- branch # of fw we are bundled 2487 * with, if any; 0 otherwise 2488 * current_fw_build -- build # of fw we are bundled 2489 * with, if any; 0 otherwise 2490 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2491 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2492 * fw_on_ctlr_branch -- branch # of fw on ctlr 2493 * fw_on_ctlr_build -- build # of fw on ctlr 2494 * init_connect_result -- result bitmap of fw response 2495 * Return value: 0 -- success 2496 * non-zero-- failure 2497 */ 2498 static int 2499 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2500 uint32_t set_features, uint16_t current_fw_srl, 2501 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2502 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2503 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2504 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2505 { 2506 struct twa_request *tr; 2507 struct twa_command_init_connect *init_connect; 2508 int error = 1; 2509 2510 /* Get a request packet. */ 2511 if ((tr = twa_get_request(sc, 0)) == NULL) 2512 goto out; 2513 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2514 /* Build the cmd pkt. */ 2515 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2516 2517 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2518 2519 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2520 init_connect->request_id = tr->tr_request_id; 2521 init_connect->message_credits = message_credits; 2522 init_connect->features = set_features; 2523 if (TWA_64BIT_ADDRESSES) 2524 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2525 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2526 /* 2527 * Fill in the extra fields needed for 2528 * an extended init_connect. 2529 */ 2530 init_connect->size = 6; 2531 init_connect->fw_srl = current_fw_srl; 2532 init_connect->fw_arch_id = current_fw_arch_id; 2533 init_connect->fw_branch = current_fw_branch; 2534 } else 2535 init_connect->size = 3; 2536 2537 /* Submit the command, and wait for it to complete. */ 2538 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2539 if (error == ETIMEDOUT) 2540 return(error); /* clean-up done by twa_immediate_request */ 2541 if (error) 2542 goto out; 2543 if ((error = init_connect->status)) { 2544 /* twa_drain_complete_queue will have done the unmapping */ 2545 goto out; 2546 } 2547 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2548 *fw_on_ctlr_srl = init_connect->fw_srl; 2549 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2550 *fw_on_ctlr_branch = init_connect->fw_branch; 2551 *fw_on_ctlr_build = init_connect->fw_build; 2552 *init_connect_result = init_connect->result; 2553 } 2554 twa_release_request(tr); 2555 return(error); 2556 2557 out: 2558 if (tr) 2559 twa_release_request(tr); 2560 return(error); 2561 } 2562 2563 static int 2564 twa_reset(struct twa_softc *sc) 2565 { 2566 int s; 2567 int error = 0; 2568 2569 /* Set the 'in reset' flag. */ 2570 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2571 2572 /* 2573 * Disable interrupts from the controller, and mask any 2574 * accidental entry into our interrupt handler. 2575 */ 2576 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2577 TWA_CONTROL_DISABLE_INTERRUPTS); 2578 2579 s = splbio(); 2580 2581 /* Soft reset the controller. */ 2582 if ((error = twa_soft_reset(sc))) 2583 goto out; 2584 2585 /* Re-establish logical connection with the controller. */ 2586 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2587 0, 0, 0, 0, 0, 2588 NULL, NULL, NULL, NULL, NULL))) { 2589 goto out; 2590 } 2591 /* 2592 * Complete all requests in the complete queue; error back all requests 2593 * in the busy queue. Any internal requests will be simply freed. 2594 * Re-submit any requests in the pending queue. 2595 */ 2596 twa_drain_busy_queue(sc); 2597 2598 out: 2599 splx(s); 2600 /* 2601 * Enable interrupts, and also clear attention and response interrupts. 2602 */ 2603 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2604 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2605 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2606 TWA_CONTROL_ENABLE_INTERRUPTS); 2607 2608 /* Clear the 'in reset' flag. */ 2609 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2610 2611 return(error); 2612 } 2613 2614 static int 2615 twa_soft_reset(struct twa_softc *sc) 2616 { 2617 uint32_t status_reg; 2618 2619 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2620 TWA_CONTROL_ISSUE_SOFT_RESET | 2621 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2622 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2623 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2624 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2625 TWA_CONTROL_DISABLE_INTERRUPTS); 2626 2627 if (twa_drain_response_queue_large(sc, 30) != 0) { 2628 aprint_error_dev(sc->twa_dv, 2629 "response queue not empty after reset.\n"); 2630 return(1); 2631 } 2632 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2633 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2634 aprint_error_dev(sc->twa_dv, "no attention interrupt after reset.\n"); 2635 return(1); 2636 } 2637 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2638 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2639 2640 if (twa_drain_response_queue(sc)) { 2641 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n"); 2642 return(1); 2643 } 2644 if (twa_drain_aen_queue(sc)) { 2645 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n"); 2646 return(1); 2647 } 2648 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2649 aprint_error_dev(sc->twa_dv, "reset not reported by controller.\n"); 2650 return(1); 2651 } 2652 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2653 if (TWA_STATUS_ERRORS(status_reg) || 2654 twa_check_ctlr_state(sc, status_reg)) { 2655 aprint_error_dev(sc->twa_dv, "controller errors detected.\n"); 2656 return(1); 2657 } 2658 return(0); 2659 } 2660 2661 static int 2662 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2663 { 2664 struct timeval t1; 2665 time_t end_time; 2666 uint32_t status_reg; 2667 2668 timeout = (timeout * 1000 * 100); 2669 2670 microtime(&t1); 2671 2672 end_time = t1.tv_usec + timeout; 2673 2674 do { 2675 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2676 /* got the required bit(s)? */ 2677 if ((status_reg & status) == status) 2678 return(0); 2679 DELAY(100000); 2680 microtime(&t1); 2681 } while (t1.tv_usec <= end_time); 2682 2683 return(1); 2684 } 2685 2686 static int 2687 twa_fetch_aen(struct twa_softc *sc) 2688 { 2689 struct twa_request *tr; 2690 int s, error = 0; 2691 2692 s = splbio(); 2693 2694 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2695 splx(s); 2696 return(EIO); 2697 } 2698 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2699 tr->tr_callback = twa_aen_callback; 2700 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2701 if (twa_request_sense(tr, 0) != 0) { 2702 if (tr->tr_data) 2703 free(tr->tr_data, M_DEVBUF); 2704 twa_release_request(tr); 2705 error = 1; 2706 } 2707 splx(s); 2708 2709 return(error); 2710 } 2711 2712 /* 2713 * Function name: twa_aen_callback 2714 * Description: Callback for requests to fetch AEN's. 2715 * 2716 * Input: tr -- ptr to completed request pkt 2717 * Output: None 2718 * Return value: None 2719 */ 2720 static void 2721 twa_aen_callback(struct twa_request *tr) 2722 { 2723 int i; 2724 int fetch_more_aens = 0; 2725 struct twa_softc *sc = tr->tr_sc; 2726 struct twa_command_header *cmd_hdr = 2727 (struct twa_command_header *)(tr->tr_data); 2728 struct twa_command_9k *cmd = 2729 &(tr->tr_command->command.cmd_pkt_9k); 2730 2731 if (! cmd->status) { 2732 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2733 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2734 if (twa_enqueue_aen(sc, cmd_hdr) 2735 != TWA_AEN_QUEUE_EMPTY) 2736 fetch_more_aens = 1; 2737 } else { 2738 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2739 for (i = 0; i < 18; i++) 2740 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2741 2742 printf(""); /* print new line */ 2743 2744 for (i = 0; i < 128; i++) 2745 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2746 } 2747 if (tr->tr_data) 2748 free(tr->tr_data, M_DEVBUF); 2749 twa_release_request(tr); 2750 2751 if (fetch_more_aens) 2752 twa_fetch_aen(sc); 2753 } 2754 2755 /* 2756 * Function name: twa_enqueue_aen 2757 * Description: Queues AEN's to be supplied to user-space tools on request. 2758 * 2759 * Input: sc -- ptr to per ctlr structure 2760 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2761 * details can be retrieved. 2762 * Output: None 2763 * Return value: None 2764 */ 2765 static uint16_t 2766 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2767 { 2768 int rv, s; 2769 struct tw_cl_event_packet *event; 2770 uint16_t aen_code; 2771 unsigned long sync_time; 2772 2773 s = splbio(); 2774 aen_code = cmd_hdr->status_block.error; 2775 2776 switch (aen_code) { 2777 case TWA_AEN_SYNC_TIME_WITH_HOST: 2778 2779 sync_time = (time_second - (3 * 86400)) % 604800; 2780 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2781 TWA_PARAM_TIME_SchedulerTime, 4, 2782 &sync_time, twa_aen_callback); 2783 #ifdef DIAGNOSTIC 2784 if (rv != 0) 2785 aprint_error_dev(sc->twa_dv, "unable to sync time with ctlr\n"); 2786 #endif 2787 break; 2788 2789 case TWA_AEN_QUEUE_EMPTY: 2790 break; 2791 2792 default: 2793 /* Queue the event. */ 2794 event = sc->twa_aen_queue[sc->twa_aen_head]; 2795 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2796 sc->twa_aen_queue_overflow = TRUE; 2797 event->severity = 2798 cmd_hdr->status_block.substatus_block.severity; 2799 event->time_stamp_sec = time_second; 2800 event->aen_code = aen_code; 2801 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2802 event->sequence_id = ++(sc->twa_current_sequence_id); 2803 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2804 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2805 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2806 event->parameter_len); 2807 2808 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2809 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2810 device_xname(sc->twa_dv), 2811 aen_code, 2812 twa_aen_severity_table[event->severity], 2813 twa_find_msg_string(twa_aen_table, aen_code), 2814 event->parameter_data); 2815 } 2816 2817 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2818 sc->twa_aen_queue_wrapped = TRUE; 2819 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2820 break; 2821 } /* switch */ 2822 splx(s); 2823 2824 return (aen_code); 2825 } 2826 2827 /* 2828 * Function name: twa_find_aen 2829 * Description: Reports whether a given AEN ever occurred. 2830 * 2831 * Input: sc -- ptr to per ctlr structure 2832 * aen_code-- AEN to look for 2833 * Output: None 2834 * Return value: 0 -- success 2835 * non-zero-- failure 2836 */ 2837 static int 2838 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2839 { 2840 uint32_t last_index; 2841 int s; 2842 int i; 2843 2844 s = splbio(); 2845 2846 if (sc->twa_aen_queue_wrapped) 2847 last_index = sc->twa_aen_head; 2848 else 2849 last_index = 0; 2850 2851 i = sc->twa_aen_head; 2852 do { 2853 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2854 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2855 splx(s); 2856 return(0); 2857 } 2858 } while (i != last_index); 2859 2860 splx(s); 2861 return(1); 2862 } 2863 2864 static inline void 2865 twa_request_init(struct twa_request *tr, int flags) 2866 { 2867 tr->tr_data = NULL; 2868 tr->tr_real_data = NULL; 2869 tr->tr_length = 0; 2870 tr->tr_real_length = 0; 2871 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2872 tr->tr_flags = flags; 2873 tr->tr_error = 0; 2874 tr->tr_callback = NULL; 2875 tr->tr_cmd_pkt_type = 0; 2876 tr->bp = 0; 2877 2878 /* 2879 * Look at the status field in the command packet to see how 2880 * it completed the last time it was used, and zero out only 2881 * the portions that might have changed. Note that we don't 2882 * care to zero out the sglist. 2883 */ 2884 if (tr->tr_command->command.cmd_pkt_9k.status) 2885 memset(tr->tr_command, 0, 2886 sizeof(struct twa_command_header) + 28); 2887 else 2888 memset(&(tr->tr_command->command), 0, 28); 2889 } 2890 2891 struct twa_request * 2892 twa_get_request_wait(struct twa_softc *sc, int flags) 2893 { 2894 struct twa_request *tr; 2895 int s; 2896 2897 KASSERT((flags & TWA_CMD_AEN) == 0); 2898 2899 s = splbio(); 2900 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2901 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2902 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2903 } 2904 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2905 2906 splx(s); 2907 2908 twa_request_init(tr, flags); 2909 2910 return(tr); 2911 } 2912 2913 struct twa_request * 2914 twa_get_request(struct twa_softc *sc, int flags) 2915 { 2916 int s; 2917 struct twa_request *tr; 2918 2919 /* Get a free request packet. */ 2920 s = splbio(); 2921 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2922 2923 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2924 tr = sc->sc_twa_request; 2925 flags |= TWA_CMD_AEN_BUSY; 2926 } else { 2927 splx(s); 2928 return (NULL); 2929 } 2930 } else { 2931 if (__predict_false((tr = 2932 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2933 splx(s); 2934 return (NULL); 2935 } 2936 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2937 } 2938 splx(s); 2939 2940 twa_request_init(tr, flags); 2941 2942 return(tr); 2943 } 2944 2945 /* 2946 * Print some information about the controller 2947 */ 2948 static void 2949 twa_describe_controller(struct twa_softc *sc) 2950 { 2951 struct twa_param_9k *p[10]; 2952 int i, rv = 0; 2953 uint32_t dsize; 2954 uint8_t ports; 2955 2956 memset(p, sizeof(struct twa_param_9k *), 10); 2957 2958 /* Get the port count. */ 2959 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2960 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2961 2962 /* get version strings */ 2963 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2964 16, NULL, &p[1]); 2965 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2966 16, NULL, &p[2]); 2967 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2968 16, NULL, &p[3]); 2969 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2970 8, NULL, &p[4]); 2971 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2972 8, NULL, &p[5]); 2973 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2974 8, NULL, &p[6]); 2975 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2976 16, NULL, &p[7]); 2977 2978 if (rv) { 2979 /* some error occurred */ 2980 aprint_error_dev(sc->twa_dv, "failed to fetch version information\n"); 2981 goto bail; 2982 } 2983 2984 ports = *(uint8_t *)(p[0]->data); 2985 2986 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2987 ports, p[1]->data, p[2]->data); 2988 2989 aprint_verbose_dev(sc->twa_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 2990 p[3]->data, p[4]->data, 2991 p[5]->data, p[6]->data); 2992 2993 for (i = 0; i < ports; i++) { 2994 2995 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 2996 continue; 2997 2998 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 2999 TWA_PARAM_DRIVEMODELINDEX, 3000 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3001 3002 if (rv != 0) { 3003 aprint_error_dev(sc->twa_dv, "unable to get drive model for port" 3004 " %d\n", i); 3005 continue; 3006 } 3007 3008 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3009 TWA_PARAM_DRIVESIZEINDEX, 3010 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3011 3012 if (rv != 0) { 3013 aprint_error_dev(sc->twa_dv, "unable to get drive size" 3014 " for port %d\n", i); 3015 free(p[8], M_DEVBUF); 3016 continue; 3017 } 3018 3019 dsize = *(uint32_t *)(p[9]->data); 3020 3021 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n", 3022 i, p[8]->data, dsize / 2048); 3023 3024 if (p[8]) 3025 free(p[8], M_DEVBUF); 3026 if (p[9]) 3027 free(p[9], M_DEVBUF); 3028 } 3029 bail: 3030 if (p[0]) 3031 free(p[0], M_DEVBUF); 3032 if (p[1]) 3033 free(p[1], M_DEVBUF); 3034 if (p[2]) 3035 free(p[2], M_DEVBUF); 3036 if (p[3]) 3037 free(p[3], M_DEVBUF); 3038 if (p[4]) 3039 free(p[4], M_DEVBUF); 3040 if (p[5]) 3041 free(p[5], M_DEVBUF); 3042 if (p[6]) 3043 free(p[6], M_DEVBUF); 3044 } 3045 3046 /* 3047 * Function name: twa_check_ctlr_state 3048 * Description: Makes sure that the fw status register reports a 3049 * proper status. 3050 * 3051 * Input: sc -- ptr to per ctlr structure 3052 * status_reg -- value in the status register 3053 * Output: None 3054 * Return value: 0 -- no errors 3055 * non-zero-- errors 3056 */ 3057 static int 3058 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3059 { 3060 int result = 0; 3061 struct timeval t1; 3062 static time_t last_warning[2] = {0, 0}; 3063 3064 /* Check if the 'micro-controller ready' bit is not set. */ 3065 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3066 TWA_STATUS_EXPECTED_BITS) { 3067 3068 microtime(&t1); 3069 3070 last_warning[0] += (5 * 1000 * 100); 3071 3072 if (t1.tv_usec > last_warning[0]) { 3073 microtime(&t1); 3074 last_warning[0] = t1.tv_usec; 3075 } 3076 result = 1; 3077 } 3078 3079 /* Check if any error bits are set. */ 3080 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3081 3082 microtime(&t1); 3083 last_warning[1] += (5 * 1000 * 100); 3084 if (t1.tv_usec > last_warning[1]) { 3085 microtime(&t1); 3086 last_warning[1] = t1.tv_usec; 3087 } 3088 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3089 aprint_error_dev(sc->twa_dv, "clearing PCI parity error " 3090 "re-seat/move/replace card.\n"); 3091 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3092 TWA_CONTROL_CLEAR_PARITY_ERROR); 3093 pci_conf_write(sc->pc, sc->tag, 3094 PCI_COMMAND_STATUS_REG, 3095 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3096 } 3097 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3098 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n"); 3099 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3100 TWA_CONTROL_CLEAR_PCI_ABORT); 3101 pci_conf_write(sc->pc, sc->tag, 3102 PCI_COMMAND_STATUS_REG, 3103 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3104 } 3105 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3106 /* 3107 * As documented by 3ware, the 9650 erroneously 3108 * flags queue errors during resets. 3109 * Just ignore them during the reset instead of 3110 * bothering the console. 3111 */ 3112 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3113 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3114 aprint_error_dev(sc->twa_dv, 3115 "clearing controller queue error\n"); 3116 } 3117 3118 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3119 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3120 } 3121 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3122 aprint_error_dev(sc->twa_dv, "micro-controller error\n"); 3123 result = 1; 3124 } 3125 } 3126 return(result); 3127 } 3128
Indexes created Tue Sep 23 07:09:52 GMT 2025