twa.c revision 1.5
1 /* $NetBSD: twa.c,v 1.5 2006/07/10 23:22:28 simonb Exp $ */ 2 /* $wasabi: twa.c,v 1.25 2006/05/01 15:16:59 simonb Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /*- 41 * Copyright (c) 2003-04 3ware, Inc. 42 * Copyright (c) 2000 Michael Smith 43 * Copyright (c) 2000 BSDi 44 * All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 68 */ 69 70 /* 71 * 3ware driver for 9000 series storage controllers. 72 * 73 * Author: Vinod Kashyap 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.5 2006/07/10 23:22:28 simonb Exp $"); 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/kernel.h> 82 #include <sys/device.h> 83 #include <sys/queue.h> 84 #include <sys/proc.h> 85 #include <sys/bswap.h> 86 #include <sys/buf.h> 87 #include <sys/bufq.h> 88 #include <sys/endian.h> 89 #include <sys/malloc.h> 90 #include <sys/conf.h> 91 #include <sys/disk.h> 92 #include <sys/syslog.h> 93 94 #include <uvm/uvm_extern.h> 95 96 #include <machine/bus.h> 97 98 #include <dev/pci/pcireg.h> 99 #include <dev/pci/pcivar.h> 100 #include <dev/pci/pcidevs.h> 101 #include <dev/pci/twareg.h> 102 #include <dev/pci/twavar.h> 103 #include <dev/pci/twaio.h> 104 105 #include <dev/scsipi/scsipi_all.h> 106 #include <dev/scsipi/scsipi_disk.h> 107 #include <dev/scsipi/scsipiconf.h> 108 #include <dev/scsipi/scsi_spc.h> 109 110 #include <dev/ldvar.h> 111 112 #include "locators.h" 113 114 #define PCI_CBIO 0x10 115 116 static int twa_fetch_aen(struct twa_softc *); 117 static void twa_aen_callback(struct twa_request *); 118 static int twa_find_aen(struct twa_softc *sc, u_int16_t); 119 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 120 struct twa_command_header *); 121 122 static void twa_attach(struct device *, struct device *, void *); 123 static void twa_shutdown(void *); 124 static int twa_init_connection(struct twa_softc *, u_int16_t, u_int32_t, 125 u_int16_t, u_int16_t, u_int16_t, u_int16_t, u_int16_t *, 126 u_int16_t *, u_int16_t *, u_int16_t *, u_int32_t *); 127 static int twa_intr(void *); 128 static int twa_match(struct device *, struct cfdata *, void *); 129 static int twa_reset(struct twa_softc *); 130 131 static int twa_print(void *, const char *); 132 static int twa_soft_reset(struct twa_softc *); 133 134 static int twa_check_ctlr_state(struct twa_softc *, u_int32_t); 135 static int twa_get_param(struct twa_softc *, int, int, size_t, 136 void (* callback)(struct twa_request *), 137 struct twa_param_9k **); 138 static int twa_set_param(struct twa_softc *, int, int, int, void *, 139 void (* callback)(struct twa_request *)); 140 static void twa_describe_controller(struct twa_softc *); 141 static int twa_wait_status(struct twa_softc *, u_int32_t, u_int32_t); 142 static int twa_done(struct twa_softc *); 143 #if 0 144 static int twa_flash_firmware(struct twa_softc *sc); 145 static int twa_hard_reset(struct twa_softc *sc); 146 #endif 147 148 extern struct cfdriver twa_cd; 149 extern uint32_t twa_fw_img_size; 150 extern uint8_t twa_fw_img[]; 151 152 CFATTACH_DECL(twa, sizeof(struct twa_softc), 153 twa_match, twa_attach, NULL, NULL); 154 155 /* AEN messages. */ 156 static const struct twa_message twa_aen_table[] = { 157 {0x0000, "AEN queue empty"}, 158 {0x0001, "Controller reset occurred"}, 159 {0x0002, "Degraded unit detected"}, 160 {0x0003, "Controller error occured"}, 161 {0x0004, "Background rebuild failed"}, 162 {0x0005, "Background rebuild done"}, 163 {0x0006, "Incomplete unit detected"}, 164 {0x0007, "Background initialize done"}, 165 {0x0008, "Unclean shutdown detected"}, 166 {0x0009, "Drive timeout detected"}, 167 {0x000A, "Drive error detected"}, 168 {0x000B, "Rebuild started"}, 169 {0x000C, "Background initialize started"}, 170 {0x000D, "Entire logical unit was deleted"}, 171 {0x000E, "Background initialize failed"}, 172 {0x000F, "SMART attribute exceeded threshold"}, 173 {0x0010, "Power supply reported AC under range"}, 174 {0x0011, "Power supply reported DC out of range"}, 175 {0x0012, "Power supply reported a malfunction"}, 176 {0x0013, "Power supply predicted malfunction"}, 177 {0x0014, "Battery charge is below threshold"}, 178 {0x0015, "Fan speed is below threshold"}, 179 {0x0016, "Temperature sensor is above threshold"}, 180 {0x0017, "Power supply was removed"}, 181 {0x0018, "Power supply was inserted"}, 182 {0x0019, "Drive was removed from a bay"}, 183 {0x001A, "Drive was inserted into a bay"}, 184 {0x001B, "Drive bay cover door was opened"}, 185 {0x001C, "Drive bay cover door was closed"}, 186 {0x001D, "Product case was opened"}, 187 {0x0020, "Prepare for shutdown (power-off)"}, 188 {0x0021, "Downgrade UDMA mode to lower speed"}, 189 {0x0022, "Upgrade UDMA mode to higher speed"}, 190 {0x0023, "Sector repair completed"}, 191 {0x0024, "Sbuf memory test failed"}, 192 {0x0025, "Error flushing cached write data to disk"}, 193 {0x0026, "Drive reported data ECC error"}, 194 {0x0027, "DCB has checksum error"}, 195 {0x0028, "DCB version is unsupported"}, 196 {0x0029, "Background verify started"}, 197 {0x002A, "Background verify failed"}, 198 {0x002B, "Background verify done"}, 199 {0x002C, "Bad sector overwritten during rebuild"}, 200 {0x002E, "Replace failed because replacement drive too small"}, 201 {0x002F, "Verify failed because array was never initialized"}, 202 {0x0030, "Unsupported ATA drive"}, 203 {0x0031, "Synchronize host/controller time"}, 204 {0x0032, "Spare capacity is inadequate for some units"}, 205 {0x0033, "Background migration started"}, 206 {0x0034, "Background migration failed"}, 207 {0x0035, "Background migration done"}, 208 {0x0036, "Verify detected and fixed data/parity mismatch"}, 209 {0x0037, "SO-DIMM incompatible"}, 210 {0x0038, "SO-DIMM not detected"}, 211 {0x0039, "Corrected Sbuf ECC error"}, 212 {0x003A, "Drive power on reset detected"}, 213 {0x003B, "Background rebuild paused"}, 214 {0x003C, "Background initialize paused"}, 215 {0x003D, "Background verify paused"}, 216 {0x003E, "Background migration paused"}, 217 {0x003F, "Corrupt flash file system detected"}, 218 {0x0040, "Flash file system repaired"}, 219 {0x0041, "Unit number assignments were lost"}, 220 {0x0042, "Error during read of primary DCB"}, 221 {0x0043, "Latent error found in backup DCB"}, 222 {0x0044, "Battery voltage is normal"}, 223 {0x0045, "Battery voltage is low"}, 224 {0x0046, "Battery voltage is high"}, 225 {0x0047, "Battery voltage is too low"}, 226 {0x0048, "Battery voltage is too high"}, 227 {0x0049, "Battery temperature is normal"}, 228 {0x004A, "Battery temperature is low"}, 229 {0x004B, "Battery temperature is high"}, 230 {0x004C, "Battery temperature is too low"}, 231 {0x004D, "Battery temperature is too high"}, 232 {0x004E, "Battery capacity test started"}, 233 {0x004F, "Cache synchronization skipped"}, 234 {0x0050, "Battery capacity test completed"}, 235 {0x0051, "Battery health check started"}, 236 {0x0052, "Battery health check completed"}, 237 {0x0053, "Need to do a capacity test"}, 238 {0x0054, "Charge termination voltage is at high level"}, 239 {0x0055, "Battery charging started"}, 240 {0x0056, "Battery charging completed"}, 241 {0x0057, "Battery charging fault"}, 242 {0x0058, "Battery capacity is below warning level"}, 243 {0x0059, "Battery capacity is below error level"}, 244 {0x005A, "Battery is present"}, 245 {0x005B, "Battery is not present"}, 246 {0x005C, "Battery is weak"}, 247 {0x005D, "Battery health check failed"}, 248 {0x005E, "Cache synchronized after power fail"}, 249 {0x005F, "Cache synchronization failed; some data lost"}, 250 {0x0060, "Bad cache meta data checksum"}, 251 {0x0061, "Bad cache meta data signature"}, 252 {0x0062, "Cache meta data restore failed"}, 253 {0x0063, "BBU not found after power fail"}, 254 {0x00FC, "Recovered/finished array membership update"}, 255 {0x00FD, "Handler lockup"}, 256 {0x00FE, "Retrying PCI transfer"}, 257 {0x00FF, "AEN queue is full"}, 258 {0xFFFFFFFF, (char *)NULL} 259 }; 260 261 /* AEN severity table. */ 262 static const char *twa_aen_severity_table[] = { 263 "None", 264 "ERROR", 265 "WARNING", 266 "INFO", 267 "DEBUG", 268 (char *)NULL 269 }; 270 271 /* Error messages. */ 272 static const struct twa_message twa_error_table[] = { 273 {0x0100, "SGL entry contains zero data"}, 274 {0x0101, "Invalid command opcode"}, 275 {0x0102, "SGL entry has unaligned address"}, 276 {0x0103, "SGL size does not match command"}, 277 {0x0104, "SGL entry has illegal length"}, 278 {0x0105, "Command packet is not aligned"}, 279 {0x0106, "Invalid request ID"}, 280 {0x0107, "Duplicate request ID"}, 281 {0x0108, "ID not locked"}, 282 {0x0109, "LBA out of range"}, 283 {0x010A, "Logical unit not supported"}, 284 {0x010B, "Parameter table does not exist"}, 285 {0x010C, "Parameter index does not exist"}, 286 {0x010D, "Invalid field in CDB"}, 287 {0x010E, "Specified port has invalid drive"}, 288 {0x010F, "Parameter item size mismatch"}, 289 {0x0110, "Failed memory allocation"}, 290 {0x0111, "Memory request too large"}, 291 {0x0112, "Out of memory segments"}, 292 {0x0113, "Invalid address to deallocate"}, 293 {0x0114, "Out of memory"}, 294 {0x0115, "Out of heap"}, 295 {0x0120, "Double degrade"}, 296 {0x0121, "Drive not degraded"}, 297 {0x0122, "Reconstruct error"}, 298 {0x0123, "Replace not accepted"}, 299 {0x0124, "Replace drive capacity too small"}, 300 {0x0125, "Sector count not allowed"}, 301 {0x0126, "No spares left"}, 302 {0x0127, "Reconstruct error"}, 303 {0x0128, "Unit is offline"}, 304 {0x0129, "Cannot update status to DCB"}, 305 {0x0130, "Invalid stripe handle"}, 306 {0x0131, "Handle that was not locked"}, 307 {0x0132, "Handle that was not empy"}, 308 {0x0133, "Handle has different owner"}, 309 {0x0140, "IPR has parent"}, 310 {0x0150, "Illegal Pbuf address alignment"}, 311 {0x0151, "Illegal Pbuf transfer length"}, 312 {0x0152, "Illegal Sbuf address alignment"}, 313 {0x0153, "Illegal Sbuf transfer length"}, 314 {0x0160, "Command packet too large"}, 315 {0x0161, "SGL exceeds maximum length"}, 316 {0x0162, "SGL has too many entries"}, 317 {0x0170, "Insufficient resources for rebuilder"}, 318 {0x0171, "Verify error (data != parity)"}, 319 {0x0180, "Requested segment not in directory of this DCB"}, 320 {0x0181, "DCB segment has unsupported version"}, 321 {0x0182, "DCB segment has checksum error"}, 322 {0x0183, "DCB support (settings) segment invalid"}, 323 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 324 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 325 {0x01A0, "Could not clear Sbuf"}, 326 {0x01C0, "Flash identify failed"}, 327 {0x01C1, "Flash out of bounds"}, 328 {0x01C2, "Flash verify error"}, 329 {0x01C3, "Flash file object not found"}, 330 {0x01C4, "Flash file already present"}, 331 {0x01C5, "Flash file system full"}, 332 {0x01C6, "Flash file not present"}, 333 {0x01C7, "Flash file size error"}, 334 {0x01C8, "Bad flash file checksum"}, 335 {0x01CA, "Corrupt flash file system detected"}, 336 {0x01D0, "Invalid field in parameter list"}, 337 {0x01D1, "Parameter list length error"}, 338 {0x01D2, "Parameter item is not changeable"}, 339 {0x01D3, "Parameter item is not saveable"}, 340 {0x0200, "UDMA CRC error"}, 341 {0x0201, "Internal CRC error"}, 342 {0x0202, "Data ECC error"}, 343 {0x0203, "ADP level 1 error"}, 344 {0x0204, "Port timeout"}, 345 {0x0205, "Drive power on reset"}, 346 {0x0206, "ADP level 2 error"}, 347 {0x0207, "Soft reset failed"}, 348 {0x0208, "Drive not ready"}, 349 {0x0209, "Unclassified port error"}, 350 {0x020A, "Drive aborted command"}, 351 {0x0210, "Internal CRC error"}, 352 {0x0211, "Host PCI bus abort"}, 353 {0x0212, "Host PCI parity error"}, 354 {0x0213, "Port handler error"}, 355 {0x0214, "Token interrupt count error"}, 356 {0x0215, "Timeout waiting for PCI transfer"}, 357 {0x0216, "Corrected buffer ECC"}, 358 {0x0217, "Uncorrected buffer ECC"}, 359 {0x0230, "Unsupported command during flash recovery"}, 360 {0x0231, "Next image buffer expected"}, 361 {0x0232, "Binary image architecture incompatible"}, 362 {0x0233, "Binary image has no signature"}, 363 {0x0234, "Binary image has bad checksum"}, 364 {0x0235, "Image downloaded overflowed buffer"}, 365 {0x0240, "I2C device not found"}, 366 {0x0241, "I2C transaction aborted"}, 367 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 368 {0x0243, "SO-DIMM unsupported"}, 369 {0x0248, "SPI transfer status error"}, 370 {0x0249, "SPI transfer timeout error"}, 371 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 372 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 373 {0x0252, "Invalid value in CreateUnit descriptor"}, 374 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 375 {0x0254, "Unable to create data channel for this unit descriptor"}, 376 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 377 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 378 {0x0257, "CreateUnit does not support this descriptor version"}, 379 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 380 {0x0259, "Too many descriptors in CreateUnit"}, 381 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 382 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 383 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 384 {0x0260, "SMART attribute exceeded threshold"}, 385 {0xFFFFFFFF, (char *)NULL} 386 }; 387 388 struct twa_pci_identity { 389 uint32_t vendor_id; 390 uint32_t product_id; 391 const char *name; 392 }; 393 394 static const struct twa_pci_identity pci_twa_products[] = { 395 { PCI_VENDOR_3WARE, 396 PCI_PRODUCT_3WARE_9000, 397 "3ware 9000 series", 398 }, 399 { PCI_VENDOR_3WARE, 400 PCI_PRODUCT_3WARE_9550, 401 "3ware 9550SX series", 402 }, 403 { 0, 404 0, 405 NULL, 406 }, 407 }; 408 409 410 static inline void 411 twa_outl(struct twa_softc *sc, int off, u_int32_t val) 412 { 413 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 414 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 415 BUS_SPACE_BARRIER_WRITE); 416 } 417 418 419 static inline u_int32_t twa_inl(struct twa_softc *sc, int off) 420 { 421 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 422 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 423 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 424 } 425 426 void 427 twa_request_wait_handler(struct twa_request *tr) 428 { 429 wakeup(tr); 430 } 431 432 433 static int 434 twa_match(struct device *parent, struct cfdata *cfdata, void *aux) 435 { 436 int i; 437 struct pci_attach_args *pa = aux; 438 const struct twa_pci_identity *entry = 0; 439 440 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE) { 441 for (i = 0; (pci_twa_products[i].product_id); i++) { 442 entry = &pci_twa_products[i]; 443 if (entry->product_id == PCI_PRODUCT(pa->pa_id)) { 444 aprint_normal("%s: (rev. 0x%02x)\n", 445 entry->name, PCI_REVISION(pa->pa_class)); 446 return (1); 447 } 448 } 449 } 450 return (0); 451 } 452 453 454 static const char * 455 twa_find_msg_string(const struct twa_message *table, u_int16_t code) 456 { 457 int i; 458 459 for (i = 0; table[i].message != NULL; i++) 460 if (table[i].code == code) 461 return(table[i].message); 462 463 return(table[i].message); 464 } 465 466 467 void 468 twa_release_request(struct twa_request *tr) 469 { 470 int s; 471 struct twa_softc *sc; 472 473 sc = tr->tr_sc; 474 475 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 476 s = splbio(); 477 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 478 splx(s); 479 if (__predict_false((tr->tr_sc->twa_sc_flags & 480 TWA_STATE_REQUEST_WAIT) != 0)) { 481 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 482 wakeup(&sc->twa_free); 483 } 484 } else 485 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 486 } 487 488 489 static void 490 twa_unmap_request(struct twa_request *tr) 491 { 492 struct twa_softc *sc = tr->tr_sc; 493 u_int8_t cmd_status; 494 495 /* If the command involved data, unmap that too. */ 496 if (tr->tr_data != NULL) { 497 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 498 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 499 else 500 cmd_status = 501 tr->tr_command->command.cmd_pkt_7k.generic.status; 502 503 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 504 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 505 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 506 /* 507 * If we are using a bounce buffer, and we are reading 508 * data, copy the real data in. 509 */ 510 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 511 if (cmd_status == 0) 512 memcpy(tr->tr_real_data, tr->tr_data, 513 tr->tr_real_length); 514 } 515 if (tr->tr_flags & TWA_CMD_DATA_IN) 516 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 517 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 518 519 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 520 } 521 522 /* Free alignment buffer if it was used. */ 523 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 524 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 525 tr->tr_length, UVM_KMF_WIRED); 526 tr->tr_data = tr->tr_real_data; 527 tr->tr_length = tr->tr_real_length; 528 } 529 } 530 531 532 /* 533 * Function name: twa_wait_request 534 * Description: Sends down a firmware cmd, and waits for the completion, 535 * but NOT in a tight loop. 536 * 537 * Input: tr -- ptr to request pkt 538 * timeout -- max # of seconds to wait before giving up 539 * Output: None 540 * Return value: 0 -- success 541 * non-zero-- failure 542 */ 543 static int 544 twa_wait_request(struct twa_request *tr, u_int32_t timeout) 545 { 546 time_t end_time; 547 struct timeval t1; 548 int s, error; 549 550 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 551 tr->tr_callback = twa_request_wait_handler; 552 tr->tr_status = TWA_CMD_BUSY; 553 554 if ((error = twa_map_request(tr))) 555 return (error); 556 557 microtime(&t1); 558 end_time = t1.tv_usec + 559 (timeout * 1000 * 100); 560 561 while (tr->tr_status != TWA_CMD_COMPLETE) { 562 if ((error = tr->tr_error)) 563 return(error); 564 if ((error = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 565 { 566 error = (tr->tr_status != TWA_CMD_COMPLETE); 567 break; 568 } 569 if (error == EWOULDBLOCK) { 570 /* 571 * We will reset the controller only if the request has 572 * already been submitted, so as to not lose the 573 * request packet. If a busy request timed out, the 574 * reset will take care of freeing resources. If a 575 * pending request timed out, we will free resources 576 * for that request, right here. So, the caller is 577 * expected to NOT cleanup when ETIMEDOUT is returned. 578 */ 579 if (tr->tr_status != TWA_CMD_PENDING && 580 tr->tr_status != TWA_CMD_COMPLETE) 581 twa_reset(tr->tr_sc); 582 else { 583 /* Request was never submitted. Clean up. */ 584 s = splbio(); 585 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 586 splx(s); 587 588 twa_unmap_request(tr); 589 if (tr->tr_data) 590 free(tr->tr_data, M_DEVBUF); 591 592 twa_release_request(tr); 593 } 594 return(ETIMEDOUT); 595 } 596 /* 597 * Either the request got completed, or we were woken up by a 598 * signal. Calculate the new timeout, in case it was the latter. 599 */ 600 microtime(&t1); 601 602 timeout = (end_time - t1.tv_usec) / (1000 * 100); 603 } 604 twa_unmap_request(tr); 605 return(error); 606 } 607 608 609 /* 610 * Function name: twa_immediate_request 611 * Description: Sends down a firmware cmd, and waits for the completion 612 * in a tight loop. 613 * 614 * Input: tr -- ptr to request pkt 615 * timeout -- max # of seconds to wait before giving up 616 * Output: None 617 * Return value: 0 -- success 618 * non-zero-- failure 619 */ 620 static int 621 twa_immediate_request(struct twa_request *tr, u_int32_t timeout) 622 { 623 struct timeval t1; 624 int s = 0, error = 0; 625 626 if ((error = twa_map_request(tr))) { 627 return(error); 628 } 629 630 timeout = (timeout * 10000 * 10); 631 632 microtime(&t1); 633 634 timeout += t1.tv_usec; 635 636 do { 637 if ((error = tr->tr_error)) 638 return(error); 639 twa_done(tr->tr_sc); 640 if ((tr->tr_status != TWA_CMD_BUSY) && 641 (tr->tr_status != TWA_CMD_PENDING)) { 642 twa_unmap_request(tr); 643 return(tr->tr_status != TWA_CMD_COMPLETE); 644 } 645 microtime(&t1); 646 } while (t1.tv_usec <= timeout); 647 648 /* 649 * We will reset the controller only if the request has 650 * already been submitted, so as to not lose the 651 * request packet. If a busy request timed out, the 652 * reset will take care of freeing resources. If a 653 * pending request timed out, we will free resources 654 * for that request, right here. So, the caller is 655 * expected to NOT cleanup when ETIMEDOUT is returned. 656 */ 657 if (tr->tr_status != TWA_CMD_PENDING) 658 twa_reset(tr->tr_sc); 659 else { 660 /* Request was never submitted. Clean up. */ 661 s = splbio(); 662 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 663 splx(s); 664 twa_unmap_request(tr); 665 if (tr->tr_data) 666 free(tr->tr_data, M_DEVBUF); 667 668 twa_release_request(tr); 669 } 670 return(ETIMEDOUT); 671 } 672 673 674 static int 675 twa_inquiry(struct twa_request *tr, int lunid) 676 { 677 int error; 678 struct twa_command_9k *tr_9k_cmd; 679 680 if (tr->tr_data == NULL) 681 return (ENOMEM); 682 683 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 684 685 tr->tr_length = TWA_SECTOR_SIZE; 686 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 687 tr->tr_flags |= TWA_CMD_DATA_IN; 688 689 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 690 691 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 692 tr_9k_cmd->unit = lunid; 693 tr_9k_cmd->request_id = tr->tr_request_id; 694 tr_9k_cmd->status = 0; 695 tr_9k_cmd->sgl_offset = 16; 696 tr_9k_cmd->sgl_entries = 1; 697 /* create the CDB here */ 698 tr_9k_cmd->cdb[0] = INQUIRY; 699 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 700 tr_9k_cmd->cdb[4] = 255; 701 702 /* XXXX setup page data no lun device 703 * it seems 9000 series does not indicate 704 * NOTPRESENT - need more investigation 705 */ 706 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 707 SID_QUAL_LU_NOTPRESENT; 708 709 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 710 711 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 712 SID_QUAL_LU_NOTPRESENT) 713 error = 1; 714 715 return (error); 716 } 717 718 static int 719 twa_print_inquiry_data(struct twa_softc *sc, 720 struct scsipi_inquiry_data *scsipi) 721 { 722 printf("%s: %s\n", sc->twa_dv.dv_xname, scsipi->vendor); 723 724 return (1); 725 } 726 727 728 static uint64_t 729 twa_read_capacity(struct twa_request *tr, int lunid) 730 { 731 int error; 732 struct twa_command_9k *tr_9k_cmd; 733 uint64_t array_size = 0LL; 734 735 if (tr->tr_data == NULL) 736 return (ENOMEM); 737 738 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 739 740 tr->tr_length = TWA_SECTOR_SIZE; 741 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 742 tr->tr_flags |= TWA_CMD_DATA_OUT; 743 744 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 745 746 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 747 tr_9k_cmd->unit = lunid; 748 tr_9k_cmd->request_id = tr->tr_request_id; 749 tr_9k_cmd->status = 0; 750 tr_9k_cmd->sgl_offset = 16; 751 tr_9k_cmd->sgl_entries = 1; 752 /* create the CDB here */ 753 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 754 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 755 756 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 757 #if BYTE_ORDER == BIG_ENDIAN 758 array_size = bswap64(_8btol(((struct scsipi_read_capacity_16_data *) 759 tr->tr_data)->addr) + 1); 760 #else 761 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 762 tr->tr_data)->addr) + 1; 763 #endif 764 return (array_size); 765 } 766 767 static int 768 twa_request_sense(struct twa_request *tr, int lunid) 769 { 770 int error = 1; 771 struct twa_command_9k *tr_9k_cmd; 772 773 if (tr->tr_data == NULL) 774 return (error); 775 776 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 777 778 tr->tr_length = TWA_SECTOR_SIZE; 779 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 780 tr->tr_flags |= TWA_CMD_DATA_OUT; 781 782 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 783 784 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 785 tr_9k_cmd->unit = lunid; 786 tr_9k_cmd->request_id = tr->tr_request_id; 787 tr_9k_cmd->status = 0; 788 tr_9k_cmd->sgl_offset = 16; 789 tr_9k_cmd->sgl_entries = 1; 790 /* create the CDB here */ 791 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 792 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 793 tr_9k_cmd->cdb[4] = 255; 794 795 /*XXX AEN notification called in interrupt context 796 * so just queue the request. Return as quickly 797 * as possible from interrupt 798 */ 799 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 800 error = twa_map_request(tr); 801 else 802 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 803 804 return (error); 805 } 806 807 808 809 static int 810 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 811 { 812 struct twa_request *tr; 813 struct twa_command_packet *tc; 814 bus_dma_segment_t seg; 815 size_t max_segs, max_xfer; 816 int i, rv, rseg, size; 817 818 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 819 M_DEVBUF, M_NOWAIT)) == NULL) 820 return(ENOMEM); 821 822 size = num_reqs * sizeof(struct twa_command_packet); 823 824 /* Allocate memory for cmd pkts. */ 825 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 826 size, PAGE_SIZE, 0, &seg, 827 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 828 aprint_error("%s: unable to allocate " 829 "command packets, rv = %d\n", 830 sc->twa_dv.dv_xname, rv); 831 return (ENOMEM); 832 } 833 834 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 835 &seg, rseg, size, (caddr_t *)&sc->twa_cmds, 836 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 837 aprint_error("%s: unable to map commands, rv = %d\n", 838 sc->twa_dv.dv_xname, rv); 839 return (1); 840 } 841 842 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 843 size, num_reqs, size, 844 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 845 aprint_error("%s: unable to create command DMA map, " 846 "rv = %d\n", sc->twa_dv.dv_xname, rv); 847 return (ENOMEM); 848 } 849 850 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 851 sc->twa_cmds, size, NULL, 852 BUS_DMA_NOWAIT)) != 0) { 853 aprint_error("%s: unable to load command DMA map, " 854 "rv = %d\n", sc->twa_dv.dv_xname, rv); 855 return (1); 856 } 857 858 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 859 aprint_error("%s: DMA map memory not aligned on %d boundary\n", 860 sc->twa_dv.dv_xname, TWA_ALIGNMENT); 861 862 return (1); 863 } 864 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 865 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 866 867 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 868 memset(sc->twa_cmd_pkt_buf, 0, 869 num_reqs * sizeof(struct twa_command_packet)); 870 871 sc->sc_twa_request = sc->twa_req_buf; 872 max_segs = twa_get_maxsegs(); 873 max_xfer = twa_get_maxxfer(max_segs); 874 875 for (i = 0; i < num_reqs; i++, tc++) { 876 tr = &(sc->twa_req_buf[i]); 877 tr->tr_command = tc; 878 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 879 (i * sizeof(struct twa_command_packet)); 880 tr->tr_request_id = i; 881 tr->tr_sc = sc; 882 883 /* 884 * Create a map for data buffers. maxsize (256 * 1024) used in 885 * bus_dma_tag_create above should suffice the bounce page needs 886 * for data buffers, since the max I/O size we support is 128KB. 887 * If we supported I/O's bigger than 256KB, we would have to 888 * create a second dma_tag, with the appropriate maxsize. 889 */ 890 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 891 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 892 &tr->tr_dma_map)) != 0) { 893 aprint_error("%s: unable to create command " 894 "DMA map, rv = %d\n", 895 sc->twa_dv.dv_xname, rv); 896 return (ENOMEM); 897 } 898 /* Insert request into the free queue. */ 899 if (i != 0) { 900 sc->twa_lookup[i] = tr; 901 twa_release_request(tr); 902 } else 903 tr->tr_flags |= TWA_CMD_AEN; 904 } 905 return(0); 906 } 907 908 909 static void 910 twa_recompute_openings(struct twa_softc *sc) 911 { 912 struct twa_drive *td; 913 int unit; 914 int openings; 915 916 if (sc->sc_nunits != 0) 917 openings = ((TWA_Q_LENGTH / 2) / sc->sc_nunits); 918 else 919 openings = 0; 920 if (openings == sc->sc_openings) 921 return; 922 sc->sc_openings = openings; 923 924 #ifdef TWA_DEBUG 925 printf("%s: %d array%s, %d openings per array\n", 926 sc->sc_twa.dv_xname, sc->sc_nunits, 927 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 928 #endif 929 for (unit = 0; unit < TWA_MAX_UNITS; unit++) { 930 td = &sc->sc_units[unit]; 931 if (td->td_dev != NULL) 932 (*td->td_callbacks->tcb_openings)(td->td_dev, 933 sc->sc_openings); 934 } 935 } 936 937 938 static int 939 twa_request_bus_scan(struct twa_softc *sc) 940 { 941 struct twa_drive *td; 942 struct twa_request *tr; 943 struct twa_attach_args twaa; 944 int locs[TWACF_NLOCS]; 945 int s, unit; 946 947 s = splbio(); 948 for (unit = 0; unit < TWA_MAX_UNITS; unit++) { 949 950 if ((tr = twa_get_request(sc, 0)) == NULL) { 951 splx(s); 952 return (EIO); 953 } 954 955 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 956 957 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 958 959 if (tr->tr_data == NULL) { 960 twa_release_request(tr); 961 splx(s); 962 return (ENOMEM); 963 } 964 td = &sc->sc_units[unit]; 965 966 if (twa_inquiry(tr, unit) == 0) { 967 968 if (td->td_dev == NULL) { 969 twa_print_inquiry_data(sc, 970 ((struct scsipi_inquiry_data *)tr->tr_data)); 971 972 sc->sc_nunits++; 973 974 sc->sc_units[unit].td_size = 975 twa_read_capacity(tr, unit); 976 977 twaa.twaa_unit = unit; 978 979 twa_recompute_openings(sc); 980 981 locs[TWACF_UNIT] = unit; 982 983 sc->sc_units[unit].td_dev = 984 config_found_sm_loc(&sc->twa_dv, "twa", locs, 985 &twaa, twa_print, config_stdsubmatch); 986 } 987 } else { 988 if (td->td_dev != NULL) { 989 990 sc->sc_nunits--; 991 992 (void) config_detach(td->td_dev, DETACH_FORCE); 993 td->td_dev = NULL; 994 td->td_size = 0; 995 996 twa_recompute_openings(sc); 997 } 998 } 999 free(tr->tr_data, M_DEVBUF); 1000 1001 twa_release_request(tr); 1002 } 1003 splx(s); 1004 1005 return (0); 1006 } 1007 1008 1009 static int 1010 twa_start(struct twa_request *tr) 1011 { 1012 struct twa_softc *sc = tr->tr_sc; 1013 u_int32_t status_reg; 1014 int s; 1015 int error; 1016 1017 s = splbio(); 1018 /* Check to see if we can post a command. */ 1019 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1020 if ((error = twa_check_ctlr_state(sc, status_reg))) 1021 goto out; 1022 1023 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1024 if (tr->tr_status != TWA_CMD_PENDING) { 1025 tr->tr_status = TWA_CMD_PENDING; 1026 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1027 tr, tr_link); 1028 } 1029 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1030 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1031 error = EBUSY; 1032 } else { 1033 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1034 (caddr_t)tr->tr_command - sc->twa_cmds, 1035 sizeof(struct twa_command_packet), 1036 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1037 1038 /* Cmd queue is not full. Post the command. */ 1039 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1040 sizeof(struct twa_command_header)); 1041 1042 /* Mark the request as currently being processed. */ 1043 tr->tr_status = TWA_CMD_BUSY; 1044 /* Move the request into the busy queue. */ 1045 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1046 } 1047 out: 1048 splx(s); 1049 return(error); 1050 } 1051 1052 1053 static int 1054 twa_drain_response_queue(struct twa_softc *sc) 1055 { 1056 union twa_response_queue rq; 1057 u_int32_t status_reg; 1058 1059 for (;;) { 1060 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1061 if (twa_check_ctlr_state(sc, status_reg)) 1062 return(1); 1063 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1064 return(0); /* no more response queue entries */ 1065 rq = (union twa_response_queue)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1066 } 1067 } 1068 1069 1070 static void 1071 twa_drain_busy_queue(struct twa_softc *sc) 1072 { 1073 struct twa_request *tr; 1074 1075 /* Walk the busy queue. */ 1076 1077 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1078 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1079 1080 twa_unmap_request(tr); 1081 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1082 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1083 /* It's an internal/ioctl request. Simply free it. */ 1084 if (tr->tr_data) 1085 free(tr->tr_data, M_DEVBUF); 1086 twa_release_request(tr); 1087 } else { 1088 /* It's a SCSI request. Complete it. */ 1089 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1090 if (tr->tr_callback) 1091 tr->tr_callback(tr); 1092 } 1093 } 1094 } 1095 1096 1097 static int 1098 twa_drain_pending_queue(struct twa_softc *sc) 1099 { 1100 struct twa_request *tr; 1101 int s, error = 0; 1102 1103 /* 1104 * Pull requests off the pending queue, and submit them. 1105 */ 1106 s = splbio(); 1107 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1108 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1109 1110 if ((error = twa_start(tr))) { 1111 if (error == EBUSY) { 1112 tr->tr_status = TWA_CMD_PENDING; 1113 1114 /* queue at the head */ 1115 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1116 tr, tr_link); 1117 error = 0; 1118 break; 1119 } else { 1120 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1121 tr->tr_error = error; 1122 tr->tr_callback(tr); 1123 error = EIO; 1124 } 1125 } 1126 } 1127 } 1128 splx(s); 1129 1130 return(error); 1131 } 1132 1133 1134 static int 1135 twa_drain_aen_queue(struct twa_softc *sc) 1136 { 1137 int error = 0; 1138 struct twa_request *tr; 1139 struct twa_command_header *cmd_hdr; 1140 struct timeval t1; 1141 u_int32_t timeout; 1142 1143 for (;;) { 1144 if ((tr = twa_get_request(sc, 0)) == NULL) { 1145 error = EIO; 1146 break; 1147 } 1148 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1149 tr->tr_callback = NULL; 1150 1151 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1152 1153 if (tr->tr_data == NULL) { 1154 error = 1; 1155 goto out; 1156 } 1157 1158 if (twa_request_sense(tr, 0) != 0) { 1159 error = 1; 1160 break; 1161 } 1162 1163 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1164 1165 microtime(&t1); 1166 1167 timeout += t1.tv_usec; 1168 1169 do { 1170 twa_done(tr->tr_sc); 1171 if (tr->tr_status != TWA_CMD_BUSY) 1172 break; 1173 microtime(&t1); 1174 } while (t1.tv_usec <= timeout); 1175 1176 if (tr->tr_status != TWA_CMD_COMPLETE) { 1177 error = ETIMEDOUT; 1178 break; 1179 } 1180 1181 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1182 break; 1183 1184 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1185 if ((cmd_hdr->status_block.error) /* aen_code */ 1186 == TWA_AEN_QUEUE_EMPTY) 1187 break; 1188 (void)twa_enqueue_aen(sc, cmd_hdr); 1189 1190 free(tr->tr_data, M_DEVBUF); 1191 twa_release_request(tr); 1192 } 1193 out: 1194 if (tr) { 1195 if (tr->tr_data) 1196 free(tr->tr_data, M_DEVBUF); 1197 1198 twa_release_request(tr); 1199 } 1200 return(error); 1201 } 1202 1203 1204 static int 1205 twa_done(struct twa_softc *sc) 1206 { 1207 union twa_response_queue rq; 1208 struct twa_request *tr; 1209 int s, error = 0; 1210 u_int32_t status_reg; 1211 1212 for (;;) { 1213 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1214 if ((error = twa_check_ctlr_state(sc, status_reg))) 1215 break; 1216 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1217 break; 1218 /* Response queue is not empty. */ 1219 rq = (union twa_response_queue)twa_inl(sc, 1220 TWA_RESPONSE_QUEUE_OFFSET); 1221 tr = sc->sc_twa_request + rq.u.response_id; 1222 1223 /* Unmap the command packet, and any associated data buffer. */ 1224 twa_unmap_request(tr); 1225 1226 s = splbio(); 1227 tr->tr_status = TWA_CMD_COMPLETE; 1228 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1229 splx(s); 1230 1231 if (tr->tr_callback) 1232 tr->tr_callback(tr); 1233 } 1234 (void)twa_drain_pending_queue(sc); 1235 1236 return(error); 1237 } 1238 1239 /* 1240 * Function name: twa_init_ctlr 1241 * Description: Establishes a logical connection with the controller. 1242 * If bundled with firmware, determines whether or not 1243 * to flash firmware, based on arch_id, fw SRL (Spec. 1244 * Revision Level), branch & build #'s. Also determines 1245 * whether or not the driver is compatible with the 1246 * firmware on the controller, before proceeding to work 1247 * with it. 1248 * 1249 * Input: sc -- ptr to per ctlr structure 1250 * Output: None 1251 * Return value: 0 -- success 1252 * non-zero-- failure 1253 */ 1254 static int 1255 twa_init_ctlr(struct twa_softc *sc) 1256 { 1257 u_int16_t fw_on_ctlr_srl = 0; 1258 u_int16_t fw_on_ctlr_arch_id = 0; 1259 u_int16_t fw_on_ctlr_branch = 0; 1260 u_int16_t fw_on_ctlr_build = 0; 1261 u_int32_t init_connect_result = 0; 1262 int error = 0; 1263 #if 0 1264 int8_t fw_flashed = FALSE; 1265 int8_t fw_flash_failed = FALSE; 1266 #endif 1267 1268 /* Wait for the controller to become ready. */ 1269 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1270 TWA_REQUEST_TIMEOUT_PERIOD)) { 1271 return(ENXIO); 1272 } 1273 /* Drain the response queue. */ 1274 if (twa_drain_response_queue(sc)) 1275 return(1); 1276 1277 /* Establish a logical connection with the controller. */ 1278 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1279 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1280 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1281 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1282 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1283 &fw_on_ctlr_build, &init_connect_result))) { 1284 return(error); 1285 } 1286 #if 0 1287 if ((init_connect_result & TWA_BUNDLED_FW_SAFE_TO_FLASH) && 1288 (init_connect_result & TWA_CTLR_FW_RECOMMENDS_FLASH)) { 1289 /* 1290 * The bundled firmware is safe to flash, and the firmware 1291 * on the controller recommends a flash. So, flash! 1292 */ 1293 printf("%s: flashing bundled firmware...\n", sc->twa_dv.dv_xname); 1294 1295 if ((error = twa_flash_firmware(sc))) { 1296 fw_flash_failed = TRUE; 1297 1298 printf("%s: unable to flash bundled firmware.\n", sc->twa_dv.dv_xname); 1299 } else { 1300 printf("%s: successfully flashed bundled firmware.\n", 1301 sc->twa_dv.dv_xname); 1302 fw_flashed = TRUE; 1303 } 1304 } 1305 if (fw_flashed) { 1306 /* The firmware was flashed. Have the new image loaded */ 1307 error = twa_hard_reset(sc); 1308 if (error == 0) 1309 error = twa_init_ctlr(sc); 1310 /* 1311 * If hard reset of controller failed, we need to return. 1312 * Otherwise, the above recursive call to twa_init_ctlr will 1313 * have completed the rest of the initialization (starting 1314 * from twa_drain_aen_queue below). Don't do it again. 1315 * Just return. 1316 */ 1317 return(error); 1318 } else { 1319 /* 1320 * Either we are not bundled with a firmware image, or 1321 * the bundled firmware is not safe to flash, 1322 * or flash failed for some reason. See if we can at 1323 * least work with the firmware on the controller in the 1324 * current mode. 1325 */ 1326 if (init_connect_result & TWA_CTLR_FW_COMPATIBLE) { 1327 /* Yes, we can. Make note of the operating mode. */ 1328 sc->working_srl = TWA_CURRENT_FW_SRL; 1329 sc->working_branch = TWA_CURRENT_FW_BRANCH; 1330 sc->working_build = TWA_CURRENT_FW_BUILD; 1331 } else { 1332 /* 1333 * No, we can't. See if we can at least work with 1334 * it in the base mode. We should never come here 1335 * if firmware has just been flashed. 1336 */ 1337 printf("%s: Driver/Firmware mismatch. Negotiating for base level.\n", 1338 sc->twa_dv.dv_xname); 1339 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1340 TWA_EXTENDED_INIT_CONNECT, TWA_BASE_FW_SRL, 1341 TWA_9000_ARCH_ID, TWA_BASE_FW_BRANCH, 1342 TWA_BASE_FW_BUILD, &fw_on_ctlr_srl, 1343 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1344 &fw_on_ctlr_build, &init_connect_result))) { 1345 printf("%s: can't initialize connection in base mode.\n", 1346 sc->twa_dv.dv_xname); 1347 return(error); 1348 } 1349 if (!(init_connect_result & TWA_CTLR_FW_COMPATIBLE)) { 1350 /* 1351 * The firmware on the controller is not even 1352 * compatible with our base mode. We cannot 1353 * work with it. Bail... 1354 */ 1355 printf("Incompatible firmware on controller\n"); 1356 #ifdef TWA_FLASH_FIRMWARE 1357 if (fw_flash_failed) 1358 printf("...and could not flash bundled firmware.\n"); 1359 else 1360 printf("...and bundled firmware not safe to flash.\n"); 1361 #endif /* TWA_FLASH_FIRMWARE */ 1362 return(1); 1363 } 1364 /* We can work with this firmware, but only in base mode. */ 1365 sc->working_srl = TWA_BASE_FW_SRL; 1366 sc->working_branch = TWA_BASE_FW_BRANCH; 1367 sc->working_build = TWA_BASE_FW_BUILD; 1368 sc->twa_operating_mode = TWA_BASE_MODE; 1369 } 1370 } 1371 #endif 1372 twa_drain_aen_queue(sc); 1373 1374 /* Set controller state to initialized. */ 1375 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1376 return(0); 1377 } 1378 1379 1380 static int 1381 twa_setup(struct twa_softc *sc) 1382 { 1383 struct tw_cl_event_packet *aen_queue; 1384 uint32_t i = 0; 1385 int error = 0; 1386 1387 /* Initialize request queues. */ 1388 TAILQ_INIT(&sc->twa_free); 1389 TAILQ_INIT(&sc->twa_busy); 1390 TAILQ_INIT(&sc->twa_pending); 1391 1392 sc->sc_nunits = 0; 1393 sc->twa_sc_flags = 0; 1394 1395 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1396 1397 return(ENOMEM); 1398 } 1399 1400 /* Allocate memory for the AEN queue. */ 1401 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH, 1402 M_DEVBUF, M_WAITOK)) == NULL) { 1403 /* 1404 * This should not cause us to return error. We will only be 1405 * unable to support AEN's. But then, we will have to check 1406 * time and again to see if we can support AEN's, if we 1407 * continue. So, we will just return error. 1408 */ 1409 return (ENOMEM); 1410 } 1411 /* Initialize the aen queue. */ 1412 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1413 1414 for (i = 0; i < TWA_Q_LENGTH; i++) 1415 sc->twa_aen_queue[i] = &(aen_queue[i]); 1416 1417 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1418 TWA_CONTROL_DISABLE_INTERRUPTS); 1419 1420 /* Initialize the controller. */ 1421 if ((error = twa_init_ctlr(sc))) { 1422 /* Soft reset the controller, and try one more time. */ 1423 1424 printf("%s: controller initialization failed. Retrying initialization\n", 1425 sc->twa_dv.dv_xname); 1426 1427 if ((error = twa_soft_reset(sc)) == 0) 1428 error = twa_init_ctlr(sc); 1429 } 1430 1431 twa_describe_controller(sc); 1432 1433 error = twa_request_bus_scan(sc); 1434 1435 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1436 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1437 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1438 TWA_CONTROL_ENABLE_INTERRUPTS); 1439 1440 return (error); 1441 } 1442 1443 void *twa_sdh; 1444 1445 static void 1446 twa_attach(struct device *parent, struct device *self, void *aux) 1447 { 1448 struct pci_attach_args *pa; 1449 struct twa_softc *sc; 1450 pci_chipset_tag_t pc; 1451 pcireg_t csr; 1452 pci_intr_handle_t ih; 1453 const char *intrstr; 1454 1455 sc = (struct twa_softc *)self; 1456 1457 pa = aux; 1458 pc = pa->pa_pc; 1459 sc->pc = pa->pa_pc; 1460 sc->tag = pa->pa_tag; 1461 sc->twa_dma_tag = pa->pa_dmat; 1462 1463 aprint_naive(": RAID controller\n"); 1464 aprint_normal(": 3ware Apache\n"); 1465 1466 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1467 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1468 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1469 aprint_error("%s: can't map i/o space\n", 1470 sc->twa_dv.dv_xname); 1471 return; 1472 } 1473 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1474 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1475 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1476 &sc->twa_bus_ioh, NULL, NULL)) { 1477 aprint_error("%s: can't map mem space\n", 1478 sc->twa_dv.dv_xname); 1479 return; 1480 } 1481 } else { 1482 aprint_error("%s: product id 0x%02x not recognized\n", 1483 sc->twa_dv.dv_xname, PCI_PRODUCT(pa->pa_id)); 1484 return; 1485 } 1486 /* Enable the device. */ 1487 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1488 1489 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1490 csr | PCI_COMMAND_MASTER_ENABLE); 1491 1492 /* Map and establish the interrupt. */ 1493 if (pci_intr_map(pa, &ih)) { 1494 aprint_error("%s: can't map interrupt\n", sc->twa_dv.dv_xname); 1495 return; 1496 } 1497 intrstr = pci_intr_string(pc, ih); 1498 1499 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1500 if (sc->twa_ih == NULL) { 1501 aprint_error("%s: can't establish interrupt%s%s\n", 1502 sc->twa_dv.dv_xname, 1503 (intrstr) ? " at " : "", 1504 (intrstr) ? intrstr : ""); 1505 return; 1506 } 1507 1508 if (intrstr != NULL) 1509 aprint_normal("%s: interrupting at %s\n", 1510 sc->twa_dv.dv_xname, intrstr); 1511 1512 twa_setup(sc); 1513 1514 if (twa_sdh == NULL) 1515 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1516 1517 return; 1518 } 1519 1520 1521 static void 1522 twa_shutdown(void *arg) 1523 { 1524 extern struct cfdriver twa_cd; 1525 struct twa_softc *sc; 1526 int i, rv, unit; 1527 1528 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1529 if ((sc = device_lookup(&twa_cd, i)) == NULL) 1530 continue; 1531 1532 for (unit = 0; unit < TWA_MAX_UNITS; unit++) 1533 if (sc->sc_units[unit].td_dev != NULL) 1534 (void) config_detach(sc->sc_units[unit].td_dev, 1535 DETACH_FORCE | DETACH_QUIET); 1536 1537 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1538 TWA_CONTROL_DISABLE_INTERRUPTS); 1539 1540 /* Let the controller know that we are going down. */ 1541 rv = twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1542 0, 0, 0, 0, 0, 1543 NULL, NULL, NULL, NULL, NULL); 1544 } 1545 } 1546 1547 1548 void 1549 twa_register_callbacks(struct twa_softc *sc, int unit, 1550 const struct twa_callbacks *tcb) 1551 { 1552 1553 sc->sc_units[unit].td_callbacks = tcb; 1554 } 1555 1556 1557 /* 1558 * Print autoconfiguration message for a sub-device 1559 */ 1560 static int 1561 twa_print(void *aux, const char *pnp) 1562 { 1563 struct twa_attach_args *twaa; 1564 1565 twaa = aux; 1566 1567 if (pnp !=NULL) 1568 aprint_normal("block device at %s\n", pnp); 1569 aprint_normal(" unit %d\n", twaa->twaa_unit); 1570 return (UNCONF); 1571 } 1572 1573 1574 static void 1575 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1576 { 1577 int i; 1578 for (i = 0; i < nsegments; i++) { 1579 sgl[i].address = segs[i].ds_addr; 1580 sgl[i].length = (u_int32_t)(segs[i].ds_len); 1581 } 1582 } 1583 1584 1585 static int 1586 twa_submit_io(struct twa_request *tr) 1587 { 1588 int error; 1589 1590 if ((error = twa_start(tr))) { 1591 if (error == EBUSY) 1592 error = 0; /* request is in the pending queue */ 1593 else { 1594 tr->tr_error = error; 1595 } 1596 } 1597 return(error); 1598 } 1599 1600 1601 /* 1602 * Function name: twa_setup_data_dmamap 1603 * Description: Callback of bus_dmamap_load for the buffer associated 1604 * with data. Updates the cmd pkt (size/sgl_entries 1605 * fields, as applicable) to reflect the number of sg 1606 * elements. 1607 * 1608 * Input: arg -- ptr to request pkt 1609 * segs -- ptr to a list of segment descriptors 1610 * nsegments--# of segments 1611 * error -- 0 if no errors encountered before callback, 1612 * non-zero if errors were encountered 1613 * Output: None 1614 * Return value: None 1615 */ 1616 static int 1617 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, 1618 int nsegments, int error) 1619 { 1620 struct twa_request *tr = (struct twa_request *)arg; 1621 struct twa_command_packet *cmdpkt = tr->tr_command; 1622 struct twa_command_9k *cmd9k; 1623 union twa_command_7k *cmd7k; 1624 u_int8_t sgl_offset; 1625 1626 if (error == EFBIG) { 1627 tr->tr_error = error; 1628 goto out; 1629 } 1630 1631 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1632 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1633 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1634 cmd9k->sgl_entries += nsegments - 1; 1635 } else { 1636 /* It's a 7000 command packet. */ 1637 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1638 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1639 twa_fillin_sgl((struct twa_sg *) 1640 (((u_int32_t *)cmd7k) + sgl_offset), 1641 segs, nsegments); 1642 /* Modify the size field, based on sg address size. */ 1643 cmd7k->generic.size += 1644 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1645 } 1646 1647 if (tr->tr_flags & TWA_CMD_DATA_IN) 1648 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1649 tr->tr_length, BUS_DMASYNC_PREREAD); 1650 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1651 /* 1652 * If we're using an alignment buffer, and we're 1653 * writing data, copy the real data out. 1654 */ 1655 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1656 memcpy(tr->tr_data, tr->tr_real_data, 1657 tr->tr_real_length); 1658 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1659 tr->tr_length, BUS_DMASYNC_PREWRITE); 1660 } 1661 error = twa_submit_io(tr); 1662 1663 out: 1664 if (error) { 1665 twa_unmap_request(tr); 1666 /* 1667 * If the caller had been returned EINPROGRESS, and he has 1668 * registered a callback for handling completion, the callback 1669 * will never get called because we were unable to submit the 1670 * request. So, free up the request right here. 1671 */ 1672 if ((tr->tr_flags & TWA_CMD_IN_PROGRESS) && (tr->tr_callback)) 1673 twa_release_request(tr); 1674 } 1675 return (error); 1676 } 1677 1678 1679 /* 1680 * Function name: twa_map_request 1681 * Description: Maps a cmd pkt and data associated with it, into 1682 * DMA'able memory. 1683 * 1684 * Input: tr -- ptr to request pkt 1685 * Output: None 1686 * Return value: 0 -- success 1687 * non-zero-- failure 1688 */ 1689 int 1690 twa_map_request(struct twa_request *tr) 1691 { 1692 struct twa_softc *sc = tr->tr_sc; 1693 int s, rv, error = 0; 1694 1695 /* If the command involves data, map that too. */ 1696 if (tr->tr_data != NULL) { 1697 1698 if (((u_long)tr->tr_data & (511)) != 0) { 1699 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1700 tr->tr_real_data = tr->tr_data; 1701 tr->tr_real_length = tr->tr_length; 1702 s = splvm(); 1703 tr->tr_data = (void *)uvm_km_alloc(kmem_map, 1704 tr->tr_length, 512, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1705 splx(s); 1706 1707 if (tr->tr_data == NULL) { 1708 tr->tr_data = tr->tr_real_data; 1709 tr->tr_length = tr->tr_real_length; 1710 return(ENOMEM); 1711 } 1712 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1713 memcpy(tr->tr_data, tr->tr_real_data, 1714 tr->tr_length); 1715 } 1716 1717 /* 1718 * Map the data buffer into bus space and build the S/G list. 1719 */ 1720 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1721 tr->tr_data, tr->tr_length, NULL, BUS_DMA_NOWAIT | 1722 BUS_DMA_STREAMING | (tr->tr_flags & TWA_CMD_DATA_OUT) ? 1723 BUS_DMA_READ : BUS_DMA_WRITE); 1724 1725 if (rv != 0) { 1726 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1727 s = splvm(); 1728 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1729 tr->tr_length, UVM_KMF_WIRED); 1730 splx(s); 1731 } 1732 return (rv); 1733 } 1734 1735 if ((rv = twa_setup_data_dmamap(tr, 1736 tr->tr_dma_map->dm_segs, 1737 tr->tr_dma_map->dm_nsegs, error))) { 1738 1739 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1740 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1741 tr->tr_length, UVM_KMF_WIRED); 1742 tr->tr_data = tr->tr_real_data; 1743 tr->tr_length = tr->tr_real_length; 1744 } 1745 } else 1746 error = tr->tr_error; 1747 1748 } else 1749 if ((rv = twa_submit_io(tr))) 1750 twa_unmap_request(tr); 1751 1752 return (rv); 1753 } 1754 1755 #if 0 1756 /* 1757 * Function name: twa_flash_firmware 1758 * Description: Flashes bundled firmware image onto controller. 1759 * 1760 * Input: sc -- ptr to per ctlr structure 1761 * Output: None 1762 * Return value: 0 -- success 1763 * non-zero-- failure 1764 */ 1765 static int 1766 twa_flash_firmware(struct twa_softc *sc) 1767 { 1768 struct twa_request *tr; 1769 struct twa_command_download_firmware *cmd; 1770 uint32_t count; 1771 uint32_t fw_img_chunk_size; 1772 uint32_t this_chunk_size = 0; 1773 uint32_t remaining_img_size = 0; 1774 int s, error = 0; 1775 int i; 1776 1777 if ((tr = twa_get_request(sc, 0)) == NULL) { 1778 /* No free request packets available. Can't proceed. */ 1779 error = EIO; 1780 goto out; 1781 } 1782 1783 count = (twa_fw_img_size / 65536); 1784 1785 count += ((twa_fw_img_size % 65536) != 0) ? 1 : 0; 1786 1787 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1788 /* Allocate sufficient memory to hold a chunk of the firmware image. */ 1789 fw_img_chunk_size = ((twa_fw_img_size / count) + 511) & ~511; 1790 1791 s = splvm(); 1792 tr->tr_data = (void *)uvm_km_alloc(kmem_map, fw_img_chunk_size, 512, 1793 UVM_KMF_WIRED); 1794 splx(s); 1795 1796 if (tr->tr_data == NULL) { 1797 error = ENOMEM; 1798 goto out; 1799 } 1800 1801 remaining_img_size = twa_fw_img_size; 1802 cmd = &(tr->tr_command->command.cmd_pkt_7k.download_fw); 1803 1804 for (i = 0; i < count; i++) { 1805 /* Build a cmd pkt for downloading firmware. */ 1806 memset(tr->tr_command, 0, sizeof(struct twa_command_packet)); 1807 1808 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 1809 1810 cmd->opcode = TWA_OP_DOWNLOAD_FIRMWARE; 1811 cmd->sgl_offset = 2;/* offset in dwords, to the beginning of sg list */ 1812 cmd->size = 2; /* this field will be updated at data map time */ 1813 cmd->request_id = tr->tr_request_id; 1814 cmd->unit = 0; 1815 cmd->status = 0; 1816 cmd->flags = 0; 1817 cmd->param = 8; /* prom image */ 1818 1819 if (i != (count - 1)) 1820 this_chunk_size = fw_img_chunk_size; 1821 else /* last chunk */ 1822 this_chunk_size = remaining_img_size; 1823 1824 remaining_img_size -= this_chunk_size; 1825 1826 memset(tr->tr_data, fw_img_chunk_size, 0); 1827 1828 memcpy(tr->tr_data, twa_fw_img + (i * fw_img_chunk_size), 1829 this_chunk_size); 1830 /* 1831 * The next line will effect only the last chunk. 1832 */ 1833 tr->tr_length = (this_chunk_size + 511) & ~511; 1834 1835 tr->tr_flags |= TWA_CMD_DATA_OUT; 1836 1837 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 1838 1839 if (error) { 1840 if (error == ETIMEDOUT) 1841 return(error); /* clean-up done by twa_immediate_request */ 1842 break; 1843 } 1844 error = cmd->status; 1845 1846 if (i != (count - 1)) { 1847 1848 /* XXX FreeBSD code doesn't check for no error condition 1849 * but based on observation, error seems to return 0 1850 */ 1851 if ((error = tr->tr_command->cmd_hdr.status_block.error) == 0) { 1852 continue; 1853 } else if ((error = tr->tr_command->cmd_hdr.status_block.error) == 1854 TWA_ERROR_MORE_DATA) { 1855 continue; 1856 } else { 1857 twa_hard_reset(sc); 1858 break; 1859 } 1860 } else /* last chunk */ 1861 if (error) { 1862 printf("%s: firmware flash request failed. error = 0x%x\n", 1863 sc->twa_dv.dv_xname, error); 1864 twa_hard_reset(sc); 1865 } 1866 } /* for */ 1867 1868 if (tr->tr_data) { 1869 s = splvm(); 1870 uvm_km_free(kmem_map, (vaddr_t)tr->tr_data, 1871 fw_img_chunk_size, UVM_KMF_WIRED); 1872 splx(s); 1873 } 1874 out: 1875 if (tr) 1876 twa_release_request(tr); 1877 return(error); 1878 } 1879 1880 /* 1881 * Function name: twa_hard_reset 1882 * Description: Hard reset the controller. 1883 * 1884 * Input: sc -- ptr to per ctlr structure 1885 * Output: None 1886 * Return value: 0 -- success 1887 * non-zero-- failure 1888 */ 1889 static int 1890 twa_hard_reset(struct twa_softc *sc) 1891 { 1892 struct twa_request *tr; 1893 struct twa_command_reset_firmware *cmd; 1894 int error; 1895 1896 if ((tr = twa_get_request(sc, 0)) == NULL) 1897 return(EIO); 1898 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1899 /* Build a cmd pkt for sending down the hard reset command. */ 1900 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 1901 1902 cmd = &(tr->tr_command->command.cmd_pkt_7k.reset_fw); 1903 cmd->opcode = TWA_OP_RESET_FIRMWARE; 1904 cmd->size = 2; /* this field will be updated at data map time */ 1905 cmd->request_id = tr->tr_request_id; 1906 cmd->unit = 0; 1907 cmd->status = 0; 1908 cmd->flags = 0; 1909 cmd->param = 0; /* don't reload FPGA logic */ 1910 1911 tr->tr_data = NULL; 1912 tr->tr_length = 0; 1913 1914 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 1915 if (error) { 1916 printf("%s: hard reset request could not " 1917 " be posted. error = 0x%x\n", sc->twa_dv.dv_xname, error); 1918 if (error == ETIMEDOUT) 1919 return(error); /* clean-up done by twa_immediate_request */ 1920 goto out; 1921 } 1922 if ((error = cmd->status)) { 1923 printf("%s: hard reset request failed. error = 0x%x\n", 1924 sc->twa_dv.dv_xname, error); 1925 } 1926 1927 out: 1928 if (tr) 1929 twa_release_request(tr); 1930 return(error); 1931 } 1932 #endif 1933 1934 /* 1935 * Function name: twa_intr 1936 * Description: Interrupt handler. Determines the kind of interrupt, 1937 * and calls the appropriate handler. 1938 * 1939 * Input: sc -- ptr to per ctlr structure 1940 * Output: None 1941 * Return value: None 1942 */ 1943 1944 static int 1945 twa_intr(void *arg) 1946 { 1947 int caught, rv; 1948 struct twa_softc *sc; 1949 u_int32_t status_reg; 1950 sc = (struct twa_softc *)arg; 1951 1952 caught = 0; 1953 /* Collect current interrupt status. */ 1954 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1955 if (twa_check_ctlr_state(sc, status_reg)) { 1956 caught = 1; 1957 goto bail; 1958 } 1959 /* Dispatch based on the kind of interrupt. */ 1960 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1961 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1962 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1963 caught = 1; 1964 } 1965 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1966 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1967 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1968 rv = twa_fetch_aen(sc); 1969 #ifdef DIAGNOSTIC 1970 if (rv != 0) 1971 printf("%s: unable to retrieve AEN (%d)\n", 1972 sc->twa_dv.dv_xname, rv); 1973 #endif 1974 caught = 1; 1975 } 1976 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1977 /* Start any requests that might be in the pending queue. */ 1978 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1979 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1980 (void)twa_drain_pending_queue(sc); 1981 caught = 1; 1982 } 1983 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1984 twa_done(sc); 1985 caught = 1; 1986 } 1987 bail: 1988 return (caught); 1989 } 1990 1991 1992 /* 1993 * Accept an open operation on the control device. 1994 */ 1995 static int 1996 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1997 { 1998 struct twa_softc *twa; 1999 2000 if ((twa = device_lookup(&twa_cd, minor(dev))) == NULL) 2001 return (ENXIO); 2002 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 2003 return (EBUSY); 2004 2005 twa->twa_sc_flags |= TWA_STATE_OPEN; 2006 2007 return (0); 2008 } 2009 2010 2011 /* 2012 * Accept the last close on the control device. 2013 */ 2014 static int 2015 twaclose(dev_t dev, int flag, int mode, struct lwp *l) 2016 { 2017 struct twa_softc *twa; 2018 2019 twa = device_lookup(&twa_cd, minor(dev)); 2020 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 2021 return (0); 2022 } 2023 2024 2025 /* 2026 * Function name: twaioctl 2027 * Description: ioctl handler. 2028 * 2029 * Input: sc -- ptr to per ctlr structure 2030 * cmd -- ioctl cmd 2031 * buf -- ptr to buffer in kernel memory, which is 2032 * a copy of the input buffer in user-space 2033 * Output: buf -- ptr to buffer in kernel memory, which will 2034 * be copied of the output buffer in user-space 2035 * Return value: 0 -- success 2036 * non-zero-- failure 2037 */ 2038 static int 2039 twaioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 2040 { 2041 struct twa_softc *sc; 2042 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 2043 struct tw_cl_event_packet event_buf; 2044 struct twa_request *tr = 0; 2045 int32_t event_index = 0; 2046 int32_t start_index; 2047 int s, error = 0; 2048 2049 sc = device_lookup(&twa_cd, minor(dev)); 2050 2051 switch (cmd) { 2052 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 2053 { 2054 struct twa_command_packet *cmdpkt; 2055 u_int32_t data_buf_size_adjusted; 2056 2057 /* Get a request packet */ 2058 tr = twa_get_request_wait(sc, 0); 2059 KASSERT(tr != NULL); 2060 /* 2061 * Make sure that the data buffer sent to firmware is a 2062 * 512 byte multiple in size. 2063 */ 2064 data_buf_size_adjusted = 2065 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 2066 2067 if ((tr->tr_length = data_buf_size_adjusted)) { 2068 if ((tr->tr_data = malloc(data_buf_size_adjusted, 2069 M_DEVBUF, M_WAITOK)) == NULL) { 2070 error = ENOMEM; 2071 goto fw_passthru_done; 2072 } 2073 /* Copy the payload. */ 2074 if ((error = copyin((void *) (user_buf->pdata), 2075 (void *) (tr->tr_data), 2076 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2077 goto fw_passthru_done; 2078 } 2079 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2080 } 2081 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2082 cmdpkt = tr->tr_command; 2083 2084 /* Copy the command packet. */ 2085 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2086 sizeof(struct twa_command_packet)); 2087 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2088 tr->tr_request_id; 2089 2090 /* Send down the request, and wait for it to complete. */ 2091 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2092 if (error == ETIMEDOUT) 2093 break; /* clean-up done by twa_wait_request */ 2094 goto fw_passthru_done; 2095 } 2096 2097 /* Copy the command packet back into user space. */ 2098 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2099 sizeof(struct twa_command_packet)); 2100 2101 /* If there was a payload, copy it back too. */ 2102 if (tr->tr_length) 2103 error = copyout(tr->tr_data, user_buf->pdata, 2104 user_buf->twa_drvr_pkt.buffer_length); 2105 fw_passthru_done: 2106 /* Free resources. */ 2107 if (tr->tr_data) 2108 free(tr->tr_data, M_DEVBUF); 2109 2110 if (tr) 2111 twa_release_request(tr); 2112 break; 2113 } 2114 2115 case TW_OSL_IOCTL_SCAN_BUS: 2116 twa_request_bus_scan(sc); 2117 break; 2118 2119 case TW_CL_IOCTL_GET_FIRST_EVENT: 2120 if (sc->twa_aen_queue_wrapped) { 2121 if (sc->twa_aen_queue_overflow) { 2122 /* 2123 * The aen queue has wrapped, even before some 2124 * events have been retrieved. Let the caller 2125 * know that he missed out on some AEN's. 2126 */ 2127 user_buf->twa_drvr_pkt.status = 2128 TWA_ERROR_AEN_OVERFLOW; 2129 sc->twa_aen_queue_overflow = FALSE; 2130 } else 2131 user_buf->twa_drvr_pkt.status = 0; 2132 event_index = sc->twa_aen_head; 2133 } else { 2134 if (sc->twa_aen_head == sc->twa_aen_tail) { 2135 user_buf->twa_drvr_pkt.status = 2136 TWA_ERROR_AEN_NO_EVENTS; 2137 break; 2138 } 2139 user_buf->twa_drvr_pkt.status = 0; 2140 event_index = sc->twa_aen_tail; /* = 0 */ 2141 } 2142 if ((error = copyout(sc->twa_aen_queue[event_index], 2143 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2144 (sc->twa_aen_queue[event_index])->retrieved = 2145 TWA_AEN_RETRIEVED; 2146 break; 2147 2148 2149 case TW_CL_IOCTL_GET_LAST_EVENT: 2150 2151 if (sc->twa_aen_queue_wrapped) { 2152 if (sc->twa_aen_queue_overflow) { 2153 /* 2154 * The aen queue has wrapped, even before some 2155 * events have been retrieved. Let the caller 2156 * know that he missed out on some AEN's. 2157 */ 2158 user_buf->twa_drvr_pkt.status = 2159 TWA_ERROR_AEN_OVERFLOW; 2160 sc->twa_aen_queue_overflow = FALSE; 2161 } else 2162 user_buf->twa_drvr_pkt.status = 0; 2163 } else { 2164 if (sc->twa_aen_head == sc->twa_aen_tail) { 2165 user_buf->twa_drvr_pkt.status = 2166 TWA_ERROR_AEN_NO_EVENTS; 2167 break; 2168 } 2169 user_buf->twa_drvr_pkt.status = 0; 2170 } 2171 event_index = (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2172 if ((error = copyout(sc->twa_aen_queue[event_index], user_buf->pdata, 2173 sizeof(struct tw_cl_event_packet))) != 0) 2174 2175 (sc->twa_aen_queue[event_index])->retrieved = 2176 TWA_AEN_RETRIEVED; 2177 break; 2178 2179 2180 case TW_CL_IOCTL_GET_NEXT_EVENT: 2181 2182 user_buf->twa_drvr_pkt.status = 0; 2183 if (sc->twa_aen_queue_wrapped) { 2184 2185 if (sc->twa_aen_queue_overflow) { 2186 /* 2187 * The aen queue has wrapped, even before some 2188 * events have been retrieved. Let the caller 2189 * know that he missed out on some AEN's. 2190 */ 2191 user_buf->twa_drvr_pkt.status = 2192 TWA_ERROR_AEN_OVERFLOW; 2193 sc->twa_aen_queue_overflow = FALSE; 2194 } 2195 start_index = sc->twa_aen_head; 2196 } else { 2197 if (sc->twa_aen_head == sc->twa_aen_tail) { 2198 user_buf->twa_drvr_pkt.status = 2199 TWA_ERROR_AEN_NO_EVENTS; 2200 break; 2201 } 2202 start_index = sc->twa_aen_tail; /* = 0 */ 2203 } 2204 error = copyin(user_buf->pdata, &event_buf, 2205 sizeof(struct tw_cl_event_packet)); 2206 2207 event_index = (start_index + event_buf.sequence_id - 2208 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2209 % TWA_Q_LENGTH; 2210 2211 if (! ((sc->twa_aen_queue[event_index])->sequence_id > 2212 event_buf.sequence_id)) { 2213 if (user_buf->twa_drvr_pkt.status == TWA_ERROR_AEN_OVERFLOW) 2214 sc->twa_aen_queue_overflow = TRUE; /* so we report the overflow next time */ 2215 user_buf->twa_drvr_pkt.status = 2216 TWA_ERROR_AEN_NO_EVENTS; 2217 break; 2218 } 2219 if ((error = copyout(sc->twa_aen_queue[event_index], user_buf->pdata, 2220 sizeof(struct tw_cl_event_packet))) != 0) 2221 2222 (sc->twa_aen_queue[event_index])->retrieved = 2223 TWA_AEN_RETRIEVED; 2224 break; 2225 2226 2227 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2228 2229 user_buf->twa_drvr_pkt.status = 0; 2230 if (sc->twa_aen_queue_wrapped) { 2231 if (sc->twa_aen_queue_overflow) { 2232 /* 2233 * The aen queue has wrapped, even before some 2234 * events have been retrieved. Let the caller 2235 * know that he missed out on some AEN's. 2236 */ 2237 user_buf->twa_drvr_pkt.status = 2238 TWA_ERROR_AEN_OVERFLOW; 2239 sc->twa_aen_queue_overflow = FALSE; 2240 } 2241 start_index = sc->twa_aen_head; 2242 } else { 2243 if (sc->twa_aen_head == sc->twa_aen_tail) { 2244 user_buf->twa_drvr_pkt.status = 2245 TWA_ERROR_AEN_NO_EVENTS; 2246 break; 2247 } 2248 start_index = sc->twa_aen_tail; /* = 0 */ 2249 } 2250 if ((error = copyin(user_buf->pdata, &event_buf, 2251 sizeof(struct tw_cl_event_packet))) != 0) 2252 2253 event_index = (start_index + event_buf.sequence_id - 2254 (sc->twa_aen_queue[start_index])->sequence_id - 1) % TWA_Q_LENGTH; 2255 if (! ((sc->twa_aen_queue[event_index])->sequence_id < 2256 event_buf.sequence_id)) { 2257 if (user_buf->twa_drvr_pkt.status == TWA_ERROR_AEN_OVERFLOW) 2258 sc->twa_aen_queue_overflow = TRUE; /* so we report the overflow next time */ 2259 user_buf->twa_drvr_pkt.status = 2260 TWA_ERROR_AEN_NO_EVENTS; 2261 break; 2262 } 2263 if ((error = copyout(sc->twa_aen_queue [event_index], user_buf->pdata, 2264 sizeof(struct tw_cl_event_packet))) != 0) 2265 aprint_error("%s: get_previous: Could not copyout to " 2266 "event_buf. error = %x\n", sc->twa_dv.dv_xname, error); 2267 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2268 break; 2269 2270 case TW_CL_IOCTL_GET_LOCK: 2271 { 2272 struct tw_cl_lock_packet twa_lock; 2273 2274 copyin(user_buf->pdata, &twa_lock, 2275 sizeof(struct tw_cl_lock_packet)); 2276 s = splbio(); 2277 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2278 (twa_lock.force_flag) || 2279 (time_second >= sc->twa_ioctl_lock.timeout)) { 2280 2281 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2282 sc->twa_ioctl_lock.timeout = time_second + 2283 (twa_lock.timeout_msec / 1000); 2284 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2285 user_buf->twa_drvr_pkt.status = 0; 2286 } else { 2287 twa_lock.time_remaining_msec = 2288 (sc->twa_ioctl_lock.timeout - time_second) * 2289 1000; 2290 user_buf->twa_drvr_pkt.status = 2291 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2292 } 2293 splx(s); 2294 copyout(&twa_lock, user_buf->pdata, 2295 sizeof(struct tw_cl_lock_packet)); 2296 break; 2297 } 2298 2299 case TW_CL_IOCTL_RELEASE_LOCK: 2300 s = splbio(); 2301 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2302 user_buf->twa_drvr_pkt.status = 2303 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2304 } else { 2305 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2306 user_buf->twa_drvr_pkt.status = 0; 2307 } 2308 splx(s); 2309 break; 2310 2311 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2312 { 2313 struct tw_cl_compatibility_packet comp_pkt; 2314 2315 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2316 sizeof(TWA_DRIVER_VERSION_STRING)); 2317 comp_pkt.working_srl = sc->working_srl; 2318 comp_pkt.working_branch = sc->working_branch; 2319 comp_pkt.working_build = sc->working_build; 2320 user_buf->twa_drvr_pkt.status = 0; 2321 2322 /* Copy compatibility information to user space. */ 2323 copyout(&comp_pkt, user_buf->pdata, 2324 min(sizeof(struct tw_cl_compatibility_packet), 2325 user_buf->twa_drvr_pkt.buffer_length)); 2326 break; 2327 } 2328 2329 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2330 { 2331 struct twa_unitname *tn; 2332 struct twa_drive *tdr; 2333 2334 tn = (struct twa_unitname *)data; 2335 /* XXX mutex */ 2336 if (tn->tn_unit < 0 || tn->tn_unit >= TWA_MAX_UNITS) 2337 return (EINVAL); 2338 tdr = &sc->sc_units[tn->tn_unit]; 2339 if (tdr->td_dev == NULL) 2340 tn->tn_name[0] = '\0'; 2341 else 2342 strlcpy(tn->tn_name, tdr->td_dev->dv_xname, 2343 sizeof(tn->tn_name)); 2344 return (0); 2345 } 2346 2347 default: 2348 /* Unknown opcode. */ 2349 error = ENOTTY; 2350 } 2351 2352 return(error); 2353 } 2354 2355 2356 const struct cdevsw twa_cdevsw = { 2357 twaopen, twaclose, noread, nowrite, twaioctl, 2358 nostop, notty, nopoll, nommap, 2359 }; 2360 2361 2362 /* 2363 * Function name: twa_get_param 2364 * Description: Get a firmware parameter. 2365 * 2366 * Input: sc -- ptr to per ctlr structure 2367 * table_id -- parameter table # 2368 * param_id -- index of the parameter in the table 2369 * param_size -- size of the parameter in bytes 2370 * callback -- ptr to function, if any, to be called 2371 * back on completion; NULL if no callback. 2372 * Output: None 2373 * Return value: ptr to param structure -- success 2374 * NULL -- failure 2375 */ 2376 static int 2377 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2378 size_t param_size, void (* callback)(struct twa_request *tr), 2379 struct twa_param_9k **param) 2380 { 2381 int rv = 0; 2382 struct twa_request *tr; 2383 union twa_command_7k *cmd; 2384 2385 /* Get a request packet. */ 2386 if ((tr = twa_get_request(sc, 0)) == NULL) { 2387 rv = EAGAIN; 2388 goto out; 2389 } 2390 2391 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2392 2393 /* Allocate memory to read data into. */ 2394 if ((*param = (struct twa_param_9k *) 2395 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2396 rv = ENOMEM; 2397 goto out; 2398 } 2399 2400 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2401 tr->tr_data = *param; 2402 tr->tr_length = TWA_SECTOR_SIZE; 2403 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2404 2405 /* Build the cmd pkt. */ 2406 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2407 2408 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2409 2410 cmd->param.opcode = TWA_OP_GET_PARAM; 2411 cmd->param.sgl_offset = 2; 2412 cmd->param.size = 2; 2413 cmd->param.request_id = tr->tr_request_id; 2414 cmd->param.unit = 0; 2415 cmd->param.param_count = 1; 2416 2417 /* Specify which parameter we need. */ 2418 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2419 (*param)->parameter_id = param_id; 2420 (*param)->parameter_size_bytes = param_size; 2421 2422 /* Submit the command. */ 2423 if (callback == NULL) { 2424 /* There's no call back; wait till the command completes. */ 2425 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2426 2427 if (rv != 0) 2428 goto out; 2429 2430 if ((rv = cmd->param.status) != 0) { 2431 /* twa_drain_complete_queue will have done the unmapping */ 2432 goto out; 2433 } 2434 twa_release_request(tr); 2435 return (rv); 2436 } else { 2437 /* There's a call back. Simply submit the command. */ 2438 tr->tr_callback = callback; 2439 rv = twa_map_request(tr); 2440 return (rv); 2441 } 2442 out: 2443 if (tr) 2444 twa_release_request(tr); 2445 return(rv); 2446 } 2447 2448 2449 /* 2450 * Function name: twa_set_param 2451 * Description: Set a firmware parameter. 2452 * 2453 * Input: sc -- ptr to per ctlr structure 2454 * table_id -- parameter table # 2455 * param_id -- index of the parameter in the table 2456 * param_size -- size of the parameter in bytes 2457 * callback -- ptr to function, if any, to be called 2458 * back on completion; NULL if no callback. 2459 * Output: None 2460 * Return value: 0 -- success 2461 * non-zero-- failure 2462 */ 2463 static int 2464 twa_set_param(struct twa_softc *sc, int table_id, 2465 int param_id, int param_size, void *data, 2466 void (* callback)(struct twa_request *tr)) 2467 { 2468 struct twa_request *tr; 2469 union twa_command_7k *cmd; 2470 struct twa_param_9k *param = NULL; 2471 int error = ENOMEM; 2472 2473 tr = twa_get_request(sc, 0); 2474 if (tr == NULL) 2475 return (EAGAIN); 2476 2477 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2478 2479 /* Allocate memory to send data using. */ 2480 if ((param = (struct twa_param_9k *) 2481 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2482 goto out; 2483 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2484 tr->tr_data = param; 2485 tr->tr_length = TWA_SECTOR_SIZE; 2486 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2487 2488 /* Build the cmd pkt. */ 2489 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2490 2491 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2492 2493 cmd->param.opcode = TWA_OP_SET_PARAM; 2494 cmd->param.sgl_offset = 2; 2495 cmd->param.size = 2; 2496 cmd->param.request_id = tr->tr_request_id; 2497 cmd->param.unit = 0; 2498 cmd->param.param_count = 1; 2499 2500 /* Specify which parameter we want to set. */ 2501 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2502 param->parameter_id = param_id; 2503 param->parameter_size_bytes = param_size; 2504 memcpy(param->data, data, param_size); 2505 2506 /* Submit the command. */ 2507 if (callback == NULL) { 2508 /* There's no call back; wait till the command completes. */ 2509 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2510 if (error == ETIMEDOUT) 2511 return(error); /* clean-up done by twa_immediate_request */ 2512 if (error) 2513 goto out; 2514 if ((error = cmd->param.status)) { 2515 goto out; /* twa_drain_complete_queue will have done the unmapping */ 2516 } 2517 free(param, M_DEVBUF); 2518 twa_release_request(tr); 2519 return(error); 2520 } else { 2521 /* There's a call back. Simply submit the command. */ 2522 tr->tr_callback = callback; 2523 if ((error = twa_map_request(tr))) 2524 goto out; 2525 2526 return (0); 2527 } 2528 out: 2529 if (param) 2530 free(param, M_DEVBUF); 2531 if (tr) 2532 twa_release_request(tr); 2533 return(error); 2534 } 2535 2536 2537 /* 2538 * Function name: twa_init_connection 2539 * Description: Send init_connection cmd to firmware 2540 * 2541 * Input: sc -- ptr to per ctlr structure 2542 * message_credits -- max # of requests that we might send 2543 * down simultaneously. This will be 2544 * typically set to 256 at init-time or 2545 * after a reset, and to 1 at shutdown-time 2546 * set_features -- indicates if we intend to use 64-bit 2547 * sg, also indicates if we want to do a 2548 * basic or an extended init_connection; 2549 * 2550 * Note: The following input/output parameters are valid, only in case of an 2551 * extended init_connection: 2552 * 2553 * current_fw_srl -- srl of fw we are bundled 2554 * with, if any; 0 otherwise 2555 * current_fw_arch_id -- arch_id of fw we are bundled 2556 * with, if any; 0 otherwise 2557 * current_fw_branch -- branch # of fw we are bundled 2558 * with, if any; 0 otherwise 2559 * current_fw_build -- build # of fw we are bundled 2560 * with, if any; 0 otherwise 2561 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2562 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2563 * fw_on_ctlr_branch -- branch # of fw on ctlr 2564 * fw_on_ctlr_build -- build # of fw on ctlr 2565 * init_connect_result -- result bitmap of fw response 2566 * Return value: 0 -- success 2567 * non-zero-- failure 2568 */ 2569 static int 2570 twa_init_connection(struct twa_softc *sc, u_int16_t message_credits, 2571 u_int32_t set_features, u_int16_t current_fw_srl, 2572 u_int16_t current_fw_arch_id, u_int16_t current_fw_branch, 2573 u_int16_t current_fw_build, u_int16_t *fw_on_ctlr_srl, 2574 u_int16_t *fw_on_ctlr_arch_id, u_int16_t *fw_on_ctlr_branch, 2575 u_int16_t *fw_on_ctlr_build, u_int32_t *init_connect_result) 2576 { 2577 struct twa_request *tr; 2578 struct twa_command_init_connect *init_connect; 2579 int error = 1; 2580 2581 /* Get a request packet. */ 2582 if ((tr = twa_get_request(sc, 0)) == NULL) 2583 goto out; 2584 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2585 /* Build the cmd pkt. */ 2586 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2587 2588 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2589 2590 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2591 init_connect->request_id = tr->tr_request_id; 2592 init_connect->message_credits = message_credits; 2593 init_connect->features = set_features; 2594 if (TWA_64BIT_ADDRESSES) { 2595 printf("64 bit addressing supported for scatter/gather list\n"); 2596 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2597 } 2598 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2599 /* 2600 * Fill in the extra fields needed for 2601 * an extended init_connect. 2602 */ 2603 init_connect->size = 6; 2604 init_connect->fw_srl = current_fw_srl; 2605 init_connect->fw_arch_id = current_fw_arch_id; 2606 init_connect->fw_branch = current_fw_branch; 2607 } else 2608 init_connect->size = 3; 2609 2610 /* Submit the command, and wait for it to complete. */ 2611 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2612 if (error == ETIMEDOUT) 2613 return(error); /* clean-up done by twa_immediate_request */ 2614 if (error) 2615 goto out; 2616 if ((error = init_connect->status)) { 2617 goto out; /* twa_drain_complete_queue will have done the unmapping */ 2618 } 2619 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2620 *fw_on_ctlr_srl = init_connect->fw_srl; 2621 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2622 *fw_on_ctlr_branch = init_connect->fw_branch; 2623 *fw_on_ctlr_build = init_connect->fw_build; 2624 *init_connect_result = init_connect->result; 2625 } 2626 twa_release_request(tr); 2627 return(error); 2628 2629 out: 2630 if (tr) 2631 twa_release_request(tr); 2632 return(error); 2633 } 2634 2635 2636 static int 2637 twa_reset(struct twa_softc *sc) 2638 { 2639 int s; 2640 int error = 0; 2641 2642 /* 2643 * Disable interrupts from the controller, and mask any 2644 * accidental entry into our interrupt handler. 2645 */ 2646 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2647 TWA_CONTROL_DISABLE_INTERRUPTS); 2648 2649 s = splbio(); 2650 2651 /* Soft reset the controller. */ 2652 if ((error = twa_soft_reset(sc))) 2653 goto out; 2654 2655 /* Re-establish logical connection with the controller. */ 2656 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2657 0, 0, 0, 0, 0, 2658 NULL, NULL, NULL, NULL, NULL))) { 2659 goto out; 2660 } 2661 /* 2662 * Complete all requests in the complete queue; error back all requests 2663 * in the busy queue. Any internal requests will be simply freed. 2664 * Re-submit any requests in the pending queue. 2665 */ 2666 twa_drain_busy_queue(sc); 2667 2668 out: 2669 splx(s); 2670 /* 2671 * Enable interrupts, and also clear attention and response interrupts. 2672 */ 2673 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2674 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2675 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2676 TWA_CONTROL_ENABLE_INTERRUPTS); 2677 return(error); 2678 } 2679 2680 2681 static int 2682 twa_soft_reset(struct twa_softc *sc) 2683 { 2684 u_int32_t status_reg; 2685 2686 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2687 TWA_CONTROL_ISSUE_SOFT_RESET | 2688 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2689 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2690 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2691 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2692 TWA_CONTROL_DISABLE_INTERRUPTS); 2693 2694 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2695 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2696 aprint_error("%s: no attention interrupt after reset.\n", 2697 sc->twa_dv.dv_xname); 2698 return(1); 2699 } 2700 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2701 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2702 2703 if (twa_drain_response_queue(sc)) { 2704 aprint_error("%s: cannot drain response queue.\n",sc->twa_dv.dv_xname); 2705 return(1); 2706 } 2707 if (twa_drain_aen_queue(sc)) { 2708 aprint_error("%s: cannot drain AEN queue.\n", sc->twa_dv.dv_xname); 2709 return(1); 2710 } 2711 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2712 aprint_error("%s: reset not reported by controller.\n", 2713 sc->twa_dv.dv_xname); 2714 return(1); 2715 } 2716 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2717 if (TWA_STATUS_ERRORS(status_reg) || 2718 twa_check_ctlr_state(sc, status_reg)) { 2719 aprint_error("%s: controller errors detected.\n", sc->twa_dv.dv_xname); 2720 return(1); 2721 } 2722 return(0); 2723 } 2724 2725 2726 static int 2727 twa_wait_status(struct twa_softc *sc, u_int32_t status, u_int32_t timeout) 2728 { 2729 struct timeval t1; 2730 time_t end_time; 2731 u_int32_t status_reg; 2732 2733 timeout = (timeout * 1000 * 100); 2734 2735 microtime(&t1); 2736 2737 end_time = t1.tv_usec + timeout; 2738 2739 do { 2740 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2741 if ((status_reg & status) == status)/* got the required bit(s)? */ 2742 return(0); 2743 DELAY(100000); 2744 microtime(&t1); 2745 } while (t1.tv_usec <= end_time); 2746 2747 return(1); 2748 } 2749 2750 2751 static int 2752 twa_fetch_aen(struct twa_softc *sc) 2753 { 2754 struct twa_request *tr; 2755 int s, error = 0; 2756 2757 s = splbio(); 2758 2759 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) 2760 return(EIO); 2761 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2762 tr->tr_callback = twa_aen_callback; 2763 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2764 if (twa_request_sense(tr, 0) != 0) { 2765 if (tr->tr_data) 2766 free(tr->tr_data, M_DEVBUF); 2767 twa_release_request(tr); 2768 error = 1; 2769 } 2770 splx(s); 2771 2772 return(error); 2773 } 2774 2775 2776 2777 /* 2778 * Function name: twa_aen_callback 2779 * Description: Callback for requests to fetch AEN's. 2780 * 2781 * Input: tr -- ptr to completed request pkt 2782 * Output: None 2783 * Return value: None 2784 */ 2785 static void 2786 twa_aen_callback(struct twa_request *tr) 2787 { 2788 int i; 2789 int fetch_more_aens = 0; 2790 struct twa_softc *sc = tr->tr_sc; 2791 struct twa_command_header *cmd_hdr = 2792 (struct twa_command_header *)(tr->tr_data); 2793 struct twa_command_9k *cmd = 2794 &(tr->tr_command->command.cmd_pkt_9k); 2795 2796 if (! cmd->status) { 2797 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2798 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2799 if (twa_enqueue_aen(sc, cmd_hdr) 2800 != TWA_AEN_QUEUE_EMPTY) 2801 fetch_more_aens = 1; 2802 } else { 2803 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2804 for (i = 0; i < 18; i++) 2805 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2806 2807 printf(""); /* print new line */ 2808 2809 for (i = 0; i < 128; i++) 2810 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2811 } 2812 if (tr->tr_data) 2813 free(tr->tr_data, M_DEVBUF); 2814 twa_release_request(tr); 2815 2816 if (fetch_more_aens) 2817 twa_fetch_aen(sc); 2818 } 2819 2820 2821 /* 2822 * Function name: twa_enqueue_aen 2823 * Description: Queues AEN's to be supplied to user-space tools on request. 2824 * 2825 * Input: sc -- ptr to per ctlr structure 2826 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2827 * details can be retrieved. 2828 * Output: None 2829 * Return value: None 2830 */ 2831 static uint16_t 2832 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2833 { 2834 int rv, s; 2835 struct tw_cl_event_packet *event; 2836 uint16_t aen_code; 2837 unsigned long sync_time; 2838 2839 s = splbio(); 2840 aen_code = cmd_hdr->status_block.error; 2841 2842 switch (aen_code) { 2843 case TWA_AEN_SYNC_TIME_WITH_HOST: 2844 2845 sync_time = (time_second - (3 * 86400)) % 604800; 2846 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2847 TWA_PARAM_TIME_SchedulerTime, 4, 2848 &sync_time, twa_aen_callback); 2849 #ifdef DIAGNOSTIC 2850 if (rv != 0) 2851 printf("%s: unable to sync time with ctlr\n", 2852 sc->twa_dv.dv_xname); 2853 #endif 2854 break; 2855 2856 case TWA_AEN_QUEUE_EMPTY: 2857 break; 2858 2859 default: 2860 /* Queue the event. */ 2861 event = sc->twa_aen_queue[sc->twa_aen_head]; 2862 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2863 sc->twa_aen_queue_overflow = TRUE; 2864 event->severity = 2865 cmd_hdr->status_block.substatus_block.severity; 2866 event->time_stamp_sec = time_second; 2867 event->aen_code = aen_code; 2868 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2869 event->sequence_id = ++(sc->twa_current_sequence_id); 2870 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2871 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2872 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2873 event->parameter_len); 2874 2875 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2876 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2877 sc->twa_dv.dv_xname, 2878 aen_code, 2879 twa_aen_severity_table[event->severity], 2880 twa_find_msg_string(twa_aen_table, aen_code), 2881 event->parameter_data); 2882 } 2883 2884 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2885 sc->twa_aen_queue_wrapped = TRUE; 2886 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2887 break; 2888 } /* switch */ 2889 splx(s); 2890 2891 return (aen_code); 2892 } 2893 2894 2895 2896 /* 2897 * Function name: twa_find_aen 2898 * Description: Reports whether a given AEN ever occurred. 2899 * 2900 * Input: sc -- ptr to per ctlr structure 2901 * aen_code-- AEN to look for 2902 * Output: None 2903 * Return value: 0 -- success 2904 * non-zero-- failure 2905 */ 2906 static int 2907 twa_find_aen(struct twa_softc *sc, u_int16_t aen_code) 2908 { 2909 u_int32_t last_index; 2910 int s; 2911 int i; 2912 2913 s = splbio(); 2914 2915 if (sc->twa_aen_queue_wrapped) 2916 last_index = sc->twa_aen_head; 2917 else 2918 last_index = 0; 2919 2920 i = sc->twa_aen_head; 2921 do { 2922 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2923 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2924 splx(s); 2925 return(0); 2926 } 2927 } while (i != last_index); 2928 2929 splx(s); 2930 return(1); 2931 } 2932 2933 static void inline 2934 twa_request_init(struct twa_request *tr, int flags) 2935 { 2936 tr->tr_data = NULL; 2937 tr->tr_real_data = NULL; 2938 tr->tr_length = 0; 2939 tr->tr_real_length = 0; 2940 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2941 tr->tr_flags = flags; 2942 tr->tr_error = 0; 2943 tr->tr_callback = NULL; 2944 tr->tr_cmd_pkt_type = 0; 2945 2946 /* 2947 * Look at the status field in the command packet to see how 2948 * it completed the last time it was used, and zero out only 2949 * the portions that might have changed. Note that we don't 2950 * care to zero out the sglist. 2951 */ 2952 if (tr->tr_command->command.cmd_pkt_9k.status) 2953 memset(tr->tr_command, 0, 2954 sizeof(struct twa_command_header) + 28); 2955 else 2956 memset(&(tr->tr_command->command), 0, 28); 2957 } 2958 2959 struct twa_request * 2960 twa_get_request_wait(struct twa_softc *sc, int flags) 2961 { 2962 struct twa_request *tr; 2963 int s; 2964 2965 KASSERT((flags & TWA_CMD_AEN) == 0); 2966 2967 s = splbio(); 2968 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2969 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2970 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2971 } 2972 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2973 2974 splx(s); 2975 2976 twa_request_init(tr, flags); 2977 2978 return(tr); 2979 } 2980 2981 2982 struct twa_request * 2983 twa_get_request(struct twa_softc *sc, int flags) 2984 { 2985 int s; 2986 struct twa_request *tr; 2987 2988 /* Get a free request packet. */ 2989 s = splbio(); 2990 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2991 2992 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2993 tr = sc->sc_twa_request; 2994 flags |= TWA_CMD_AEN_BUSY; 2995 } else { 2996 splx(s); 2997 return (NULL); 2998 } 2999 } else { 3000 if (__predict_false((tr = 3001 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 3002 splx(s); 3003 return (NULL); 3004 } 3005 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 3006 } 3007 splx(s); 3008 3009 twa_request_init(tr, flags); 3010 3011 return(tr); 3012 } 3013 3014 3015 /* 3016 * Print some information about the controller 3017 */ 3018 static void 3019 twa_describe_controller(struct twa_softc *sc) 3020 { 3021 struct twa_param_9k *p[10]; 3022 int i, rv = 0; 3023 uint32_t dsize; 3024 uint8_t ports; 3025 3026 memset(p, sizeof(struct twa_param_9k *), 10); 3027 3028 /* Get the port count. */ 3029 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 3030 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 3031 3032 /* get version strings */ 3033 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 3034 16, NULL, &p[1]); 3035 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 3036 16, NULL, &p[2]); 3037 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 3038 16, NULL, &p[3]); 3039 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 3040 8, NULL, &p[4]); 3041 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 3042 8, NULL, &p[5]); 3043 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 3044 8, NULL, &p[6]); 3045 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 3046 16, NULL, &p[7]); 3047 3048 if (rv) { 3049 /* some error occurred */ 3050 aprint_error("%s: failed to fetch version information\n", 3051 sc->twa_dv.dv_xname); 3052 goto bail; 3053 } 3054 3055 ports = *(u_int8_t *)(p[0]->data); 3056 3057 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 3058 sc->twa_dv.dv_xname, ports, 3059 p[1]->data, p[2]->data); 3060 3061 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 3062 sc->twa_dv.dv_xname, 3063 p[3]->data, p[4]->data, 3064 p[5]->data, p[6]->data); 3065 3066 for (i = 0; i < ports; i++) { 3067 3068 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 3069 continue; 3070 3071 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE, 3072 TWA_PARAM_DRIVEMODELINDEX, 3073 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3074 3075 if (rv != 0) { 3076 aprint_error("%s: unable to get drive model for port" 3077 " %d\n", sc->twa_dv.dv_xname, i); 3078 continue; 3079 } 3080 3081 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE, 3082 TWA_PARAM_DRIVESIZEINDEX, 3083 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3084 3085 if (rv != 0) { 3086 aprint_error("%s: unable to get drive size" 3087 " for port %d\n", sc->twa_dv.dv_xname, 3088 i); 3089 free(p[8], M_DEVBUF); 3090 continue; 3091 } 3092 3093 dsize = *(uint32_t *)(p[9]->data); 3094 3095 aprint_verbose("%s: port %d: %.40s %d MB\n", 3096 sc->twa_dv.dv_xname, i, p[8]->data, dsize / 2048); 3097 3098 if (p[8]) 3099 free(p[8], M_DEVBUF); 3100 if (p[9]) 3101 free(p[9], M_DEVBUF); 3102 } 3103 bail: 3104 if (p[0]) 3105 free(p[0], M_DEVBUF); 3106 if (p[1]) 3107 free(p[1], M_DEVBUF); 3108 if (p[2]) 3109 free(p[2], M_DEVBUF); 3110 if (p[3]) 3111 free(p[3], M_DEVBUF); 3112 if (p[4]) 3113 free(p[4], M_DEVBUF); 3114 if (p[5]) 3115 free(p[5], M_DEVBUF); 3116 if (p[6]) 3117 free(p[6], M_DEVBUF); 3118 } 3119 3120 3121 3122 /* 3123 * Function name: twa_check_ctlr_state 3124 * Description: Makes sure that the fw status register reports a 3125 * proper status. 3126 * 3127 * Input: sc -- ptr to per ctlr structure 3128 * status_reg -- value in the status register 3129 * Output: None 3130 * Return value: 0 -- no errors 3131 * non-zero-- errors 3132 */ 3133 static int 3134 twa_check_ctlr_state(struct twa_softc *sc, u_int32_t status_reg) 3135 { 3136 int result = 0; 3137 struct timeval t1; 3138 static time_t last_warning[2] = {0, 0}; 3139 3140 /* Check if the 'micro-controller ready' bit is not set. */ 3141 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3142 TWA_STATUS_EXPECTED_BITS) { 3143 3144 microtime(&t1); 3145 3146 last_warning[0] += (5 * 1000 * 100); 3147 3148 if (t1.tv_usec > last_warning[0]) { 3149 microtime(&t1); 3150 last_warning[0] = t1.tv_usec; 3151 } 3152 result = 1; 3153 } 3154 3155 /* Check if any error bits are set. */ 3156 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3157 3158 microtime(&t1); 3159 last_warning[1] += (5 * 1000 * 100); 3160 if (t1.tv_usec > last_warning[1]) { 3161 microtime(&t1); 3162 last_warning[1] = t1.tv_usec; 3163 } 3164 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3165 aprint_error("%s: clearing PCI parity error " 3166 "re-seat/move/replace card.\n", 3167 sc->twa_dv.dv_xname); 3168 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3169 TWA_CONTROL_CLEAR_PARITY_ERROR); 3170 pci_conf_write(sc->pc, sc->tag, 3171 PCI_COMMAND_STATUS_REG, 3172 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3173 result = 1; 3174 } 3175 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3176 aprint_error("%s: clearing PCI abort\n", 3177 sc->twa_dv.dv_xname); 3178 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3179 TWA_CONTROL_CLEAR_PCI_ABORT); 3180 pci_conf_write(sc->pc, sc->tag, 3181 PCI_COMMAND_STATUS_REG, 3182 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3183 result = 1; 3184 } 3185 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3186 aprint_error("%s: clearing controller queue error\n", 3187 sc->twa_dv.dv_xname); 3188 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3189 TWA_CONTROL_CLEAR_PCI_ABORT); 3190 result = 1; 3191 } 3192 if (status_reg & TWA_STATUS_SBUF_WRITE_ERROR) { 3193 aprint_error("%s: clearing SBUF write error\n", 3194 sc->twa_dv.dv_xname); 3195 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3196 TWA_CONTROL_CLEAR_SBUF_WRITE_ERROR); 3197 result = 1; 3198 } 3199 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3200 aprint_error("%s: micro-controller error\n", 3201 sc->twa_dv.dv_xname); 3202 result = 1; 3203 } 3204 } 3205 return(result); 3206 } 3207 3208 3209
Indexes created Wed Oct 15 16:09:53 GMT 2025