twa.c revision 1.53
1 /* $NetBSD: twa.c,v 1.53 2016/07/07 06:55:41 msaitoh Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.53 2016/07/07 06:55:41 msaitoh Exp $"); 71 72 //#define TWA_DEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/device.h> 78 #include <sys/queue.h> 79 #include <sys/proc.h> 80 #include <sys/bswap.h> 81 #include <sys/buf.h> 82 #include <sys/bufq.h> 83 #include <sys/endian.h> 84 #include <sys/malloc.h> 85 #include <sys/conf.h> 86 #include <sys/disk.h> 87 #include <sys/sysctl.h> 88 #include <sys/syslog.h> 89 90 #include <sys/bus.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 #include <dev/pci/twareg.h> 96 #include <dev/pci/twavar.h> 97 #include <dev/pci/twaio.h> 98 99 #include <dev/scsipi/scsipi_all.h> 100 #include <dev/scsipi/scsipi_disk.h> 101 #include <dev/scsipi/scsipiconf.h> 102 #include <dev/scsipi/scsi_spc.h> 103 104 #include <dev/ldvar.h> 105 106 #include "locators.h" 107 108 #define PCI_CBIO 0x10 109 110 static int twa_fetch_aen(struct twa_softc *); 111 static void twa_aen_callback(struct twa_request *); 112 static int twa_find_aen(struct twa_softc *sc, uint16_t); 113 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 114 struct twa_command_header *); 115 116 static void twa_attach(device_t, device_t, void *); 117 static void twa_shutdown(void *); 118 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 119 uint16_t, uint16_t, uint16_t, uint16_t, 120 uint16_t *, uint16_t *, uint16_t *, 121 uint16_t *, uint32_t *); 122 static int twa_intr(void *); 123 static int twa_match(device_t, cfdata_t, void *); 124 static int twa_reset(struct twa_softc *); 125 126 static int twa_print(void *, const char *); 127 static int twa_soft_reset(struct twa_softc *); 128 129 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 130 static int twa_get_param(struct twa_softc *, int, int, size_t, 131 void (* callback)(struct twa_request *), 132 struct twa_param_9k **); 133 static int twa_set_param(struct twa_softc *, int, int, int, void *, 134 void (* callback)(struct twa_request *)); 135 static void twa_describe_controller(struct twa_softc *); 136 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 137 static int twa_done(struct twa_softc *); 138 139 extern struct cfdriver twa_cd; 140 extern uint32_t twa_fw_img_size; 141 extern uint8_t twa_fw_img[]; 142 143 CFATTACH_DECL_NEW(twa, sizeof(struct twa_softc), 144 twa_match, twa_attach, NULL, NULL); 145 146 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 147 const char twaver[] = "1.50.01.002"; 148 149 /* AEN messages. */ 150 static const struct twa_message twa_aen_table[] = { 151 {0x0000, "AEN queue empty"}, 152 {0x0001, "Controller reset occurred"}, 153 {0x0002, "Degraded unit detected"}, 154 {0x0003, "Controller error occured"}, 155 {0x0004, "Background rebuild failed"}, 156 {0x0005, "Background rebuild done"}, 157 {0x0006, "Incomplete unit detected"}, 158 {0x0007, "Background initialize done"}, 159 {0x0008, "Unclean shutdown detected"}, 160 {0x0009, "Drive timeout detected"}, 161 {0x000A, "Drive error detected"}, 162 {0x000B, "Rebuild started"}, 163 {0x000C, "Background initialize started"}, 164 {0x000D, "Entire logical unit was deleted"}, 165 {0x000E, "Background initialize failed"}, 166 {0x000F, "SMART attribute exceeded threshold"}, 167 {0x0010, "Power supply reported AC under range"}, 168 {0x0011, "Power supply reported DC out of range"}, 169 {0x0012, "Power supply reported a malfunction"}, 170 {0x0013, "Power supply predicted malfunction"}, 171 {0x0014, "Battery charge is below threshold"}, 172 {0x0015, "Fan speed is below threshold"}, 173 {0x0016, "Temperature sensor is above threshold"}, 174 {0x0017, "Power supply was removed"}, 175 {0x0018, "Power supply was inserted"}, 176 {0x0019, "Drive was removed from a bay"}, 177 {0x001A, "Drive was inserted into a bay"}, 178 {0x001B, "Drive bay cover door was opened"}, 179 {0x001C, "Drive bay cover door was closed"}, 180 {0x001D, "Product case was opened"}, 181 {0x0020, "Prepare for shutdown (power-off)"}, 182 {0x0021, "Downgrade UDMA mode to lower speed"}, 183 {0x0022, "Upgrade UDMA mode to higher speed"}, 184 {0x0023, "Sector repair completed"}, 185 {0x0024, "Sbuf memory test failed"}, 186 {0x0025, "Error flushing cached write data to disk"}, 187 {0x0026, "Drive reported data ECC error"}, 188 {0x0027, "DCB has checksum error"}, 189 {0x0028, "DCB version is unsupported"}, 190 {0x0029, "Background verify started"}, 191 {0x002A, "Background verify failed"}, 192 {0x002B, "Background verify done"}, 193 {0x002C, "Bad sector overwritten during rebuild"}, 194 {0x002D, "Source drive error occurred"}, 195 {0x002E, "Replace failed because replacement drive too small"}, 196 {0x002F, "Verify failed because array was never initialized"}, 197 {0x0030, "Unsupported ATA drive"}, 198 {0x0031, "Synchronize host/controller time"}, 199 {0x0032, "Spare capacity is inadequate for some units"}, 200 {0x0033, "Background migration started"}, 201 {0x0034, "Background migration failed"}, 202 {0x0035, "Background migration done"}, 203 {0x0036, "Verify detected and fixed data/parity mismatch"}, 204 {0x0037, "SO-DIMM incompatible"}, 205 {0x0038, "SO-DIMM not detected"}, 206 {0x0039, "Corrected Sbuf ECC error"}, 207 {0x003A, "Drive power on reset detected"}, 208 {0x003B, "Background rebuild paused"}, 209 {0x003C, "Background initialize paused"}, 210 {0x003D, "Background verify paused"}, 211 {0x003E, "Background migration paused"}, 212 {0x003F, "Corrupt flash file system detected"}, 213 {0x0040, "Flash file system repaired"}, 214 {0x0041, "Unit number assignments were lost"}, 215 {0x0042, "Error during read of primary DCB"}, 216 {0x0043, "Latent error found in backup DCB"}, 217 {0x0044, "Battery voltage is normal"}, 218 {0x0045, "Battery voltage is low"}, 219 {0x0046, "Battery voltage is high"}, 220 {0x0047, "Battery voltage is too low"}, 221 {0x0048, "Battery voltage is too high"}, 222 {0x0049, "Battery temperature is normal"}, 223 {0x004A, "Battery temperature is low"}, 224 {0x004B, "Battery temperature is high"}, 225 {0x004C, "Battery temperature is too low"}, 226 {0x004D, "Battery temperature is too high"}, 227 {0x004E, "Battery capacity test started"}, 228 {0x004F, "Cache synchronization skipped"}, 229 {0x0050, "Battery capacity test completed"}, 230 {0x0051, "Battery health check started"}, 231 {0x0052, "Battery health check completed"}, 232 {0x0053, "Battery capacity test needed"}, 233 {0x0054, "Battery charge termination voltage is at high level"}, 234 {0x0055, "Battery charging started"}, 235 {0x0056, "Battery charging completed"}, 236 {0x0057, "Battery charging fault"}, 237 {0x0058, "Battery capacity is below warning level"}, 238 {0x0059, "Battery capacity is below error level"}, 239 {0x005A, "Battery is present"}, 240 {0x005B, "Battery is not present"}, 241 {0x005C, "Battery is weak"}, 242 {0x005D, "Battery health check failed"}, 243 {0x005E, "Cache synchronized after power fail"}, 244 {0x005F, "Cache synchronization failed; some data lost"}, 245 {0x0060, "Bad cache meta data checksum"}, 246 {0x0061, "Bad cache meta data signature"}, 247 {0x0062, "Cache meta data restore failed"}, 248 {0x0063, "BBU not found after power fail"}, 249 {0x00FC, "Recovered/finished array membership update"}, 250 {0x00FD, "Handler lockup"}, 251 {0x00FE, "Retrying PCI transfer"}, 252 {0x00FF, "AEN queue is full"}, 253 {0xFFFFFFFF, NULL} 254 }; 255 256 /* AEN severity table. */ 257 static const char *twa_aen_severity_table[] = { 258 "None", 259 "ERROR", 260 "WARNING", 261 "INFO", 262 "DEBUG", 263 NULL 264 }; 265 266 #if 0 267 /* Error messages. */ 268 static const struct twa_message twa_error_table[] = { 269 {0x0100, "SGL entry contains zero data"}, 270 {0x0101, "Invalid command opcode"}, 271 {0x0102, "SGL entry has unaligned address"}, 272 {0x0103, "SGL size does not match command"}, 273 {0x0104, "SGL entry has illegal length"}, 274 {0x0105, "Command packet is not aligned"}, 275 {0x0106, "Invalid request ID"}, 276 {0x0107, "Duplicate request ID"}, 277 {0x0108, "ID not locked"}, 278 {0x0109, "LBA out of range"}, 279 {0x010A, "Logical unit not supported"}, 280 {0x010B, "Parameter table does not exist"}, 281 {0x010C, "Parameter index does not exist"}, 282 {0x010D, "Invalid field in CDB"}, 283 {0x010E, "Specified port has invalid drive"}, 284 {0x010F, "Parameter item size mismatch"}, 285 {0x0110, "Failed memory allocation"}, 286 {0x0111, "Memory request too large"}, 287 {0x0112, "Out of memory segments"}, 288 {0x0113, "Invalid address to deallocate"}, 289 {0x0114, "Out of memory"}, 290 {0x0115, "Out of heap"}, 291 {0x0120, "Double degrade"}, 292 {0x0121, "Drive not degraded"}, 293 {0x0122, "Reconstruct error"}, 294 {0x0123, "Replace not accepted"}, 295 {0x0124, "Replace drive capacity too small"}, 296 {0x0125, "Sector count not allowed"}, 297 {0x0126, "No spares left"}, 298 {0x0127, "Reconstruct error"}, 299 {0x0128, "Unit is offline"}, 300 {0x0129, "Cannot update status to DCB"}, 301 {0x0130, "Invalid stripe handle"}, 302 {0x0131, "Handle that was not locked"}, 303 {0x0132, "Handle that was not empy"}, 304 {0x0133, "Handle has different owner"}, 305 {0x0140, "IPR has parent"}, 306 {0x0150, "Illegal Pbuf address alignment"}, 307 {0x0151, "Illegal Pbuf transfer length"}, 308 {0x0152, "Illegal Sbuf address alignment"}, 309 {0x0153, "Illegal Sbuf transfer length"}, 310 {0x0160, "Command packet too large"}, 311 {0x0161, "SGL exceeds maximum length"}, 312 {0x0162, "SGL has too many entries"}, 313 {0x0170, "Insufficient resources for rebuilder"}, 314 {0x0171, "Verify error (data != parity)"}, 315 {0x0180, "Requested segment not in directory of this DCB"}, 316 {0x0181, "DCB segment has unsupported version"}, 317 {0x0182, "DCB segment has checksum error"}, 318 {0x0183, "DCB support (settings) segment invalid"}, 319 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 320 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 321 {0x01A0, "Could not clear Sbuf"}, 322 {0x01C0, "Flash identify failed"}, 323 {0x01C1, "Flash out of bounds"}, 324 {0x01C2, "Flash verify error"}, 325 {0x01C3, "Flash file object not found"}, 326 {0x01C4, "Flash file already present"}, 327 {0x01C5, "Flash file system full"}, 328 {0x01C6, "Flash file not present"}, 329 {0x01C7, "Flash file size error"}, 330 {0x01C8, "Bad flash file checksum"}, 331 {0x01CA, "Corrupt flash file system detected"}, 332 {0x01D0, "Invalid field in parameter list"}, 333 {0x01D1, "Parameter list length error"}, 334 {0x01D2, "Parameter item is not changeable"}, 335 {0x01D3, "Parameter item is not saveable"}, 336 {0x0200, "UDMA CRC error"}, 337 {0x0201, "Internal CRC error"}, 338 {0x0202, "Data ECC error"}, 339 {0x0203, "ADP level 1 error"}, 340 {0x0204, "Port timeout"}, 341 {0x0205, "Drive power on reset"}, 342 {0x0206, "ADP level 2 error"}, 343 {0x0207, "Soft reset failed"}, 344 {0x0208, "Drive not ready"}, 345 {0x0209, "Unclassified port error"}, 346 {0x020A, "Drive aborted command"}, 347 {0x0210, "Internal CRC error"}, 348 {0x0211, "Host PCI bus abort"}, 349 {0x0212, "Host PCI parity error"}, 350 {0x0213, "Port handler error"}, 351 {0x0214, "Token interrupt count error"}, 352 {0x0215, "Timeout waiting for PCI transfer"}, 353 {0x0216, "Corrected buffer ECC"}, 354 {0x0217, "Uncorrected buffer ECC"}, 355 {0x0230, "Unsupported command during flash recovery"}, 356 {0x0231, "Next image buffer expected"}, 357 {0x0232, "Binary image architecture incompatible"}, 358 {0x0233, "Binary image has no signature"}, 359 {0x0234, "Binary image has bad checksum"}, 360 {0x0235, "Image downloaded overflowed buffer"}, 361 {0x0240, "I2C device not found"}, 362 {0x0241, "I2C transaction aborted"}, 363 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 364 {0x0243, "SO-DIMM unsupported"}, 365 {0x0248, "SPI transfer status error"}, 366 {0x0249, "SPI transfer timeout error"}, 367 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 368 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 369 {0x0252, "Invalid value in CreateUnit descriptor"}, 370 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 371 {0x0254, "Unable to create data channel for this unit descriptor"}, 372 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 373 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 374 {0x0257, "CreateUnit does not support this descriptor version"}, 375 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 376 {0x0259, "Too many descriptors in CreateUnit"}, 377 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 378 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 379 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 380 {0x0260, "SMART attribute exceeded threshold"}, 381 {0xFFFFFFFF, NULL} 382 }; 383 #endif 384 385 struct twa_pci_identity { 386 uint32_t vendor_id; 387 uint32_t product_id; 388 const char *name; 389 }; 390 391 static const struct twa_pci_identity twa_pci_products[] = { 392 { PCI_VENDOR_3WARE, 393 PCI_PRODUCT_3WARE_9000, 394 "3ware 9000 series", 395 }, 396 { PCI_VENDOR_3WARE, 397 PCI_PRODUCT_3WARE_9550, 398 "3ware 9550SX series", 399 }, 400 { PCI_VENDOR_3WARE, 401 PCI_PRODUCT_3WARE_9650, 402 "3ware 9650SE series", 403 }, 404 { PCI_VENDOR_3WARE, 405 PCI_PRODUCT_3WARE_9690, 406 "3ware 9690 series", 407 }, 408 { 0, 409 0, 410 NULL, 411 }, 412 }; 413 414 415 static inline void 416 twa_outl(struct twa_softc *sc, int off, uint32_t val) 417 { 418 419 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 420 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 421 BUS_SPACE_BARRIER_WRITE); 422 } 423 424 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 425 { 426 427 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 428 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 429 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 430 } 431 432 void 433 twa_request_wait_handler(struct twa_request *tr) 434 { 435 436 wakeup(tr); 437 } 438 439 static const struct twa_pci_identity * 440 twa_lookup(pcireg_t id) 441 { 442 const struct twa_pci_identity *entry; 443 int i; 444 445 for (i = 0; i < __arraycount(twa_pci_products); i++) { 446 entry = &twa_pci_products[i]; 447 if (entry->vendor_id == PCI_VENDOR(id) && 448 entry->product_id == PCI_PRODUCT(id)) { 449 return entry; 450 } 451 } 452 return NULL; 453 } 454 455 static int 456 twa_match(device_t parent, cfdata_t cfdata, void *aux) 457 { 458 struct pci_attach_args *pa = aux; 459 const struct twa_pci_identity *entry; 460 461 entry = twa_lookup(pa->pa_id); 462 if (entry != NULL) { 463 return 1; 464 } 465 return (0); 466 } 467 468 static const char * 469 twa_find_msg_string(const struct twa_message *table, uint16_t code) 470 { 471 int i; 472 473 for (i = 0; table[i].message != NULL; i++) 474 if (table[i].code == code) 475 return(table[i].message); 476 477 return(table[i].message); 478 } 479 480 void 481 twa_release_request(struct twa_request *tr) 482 { 483 int s; 484 struct twa_softc *sc; 485 486 sc = tr->tr_sc; 487 488 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 489 s = splbio(); 490 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 491 splx(s); 492 if (__predict_false((tr->tr_sc->twa_sc_flags & 493 TWA_STATE_REQUEST_WAIT) != 0)) { 494 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 495 wakeup(&sc->twa_free); 496 } 497 } else 498 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 499 } 500 501 static void 502 twa_unmap_request(struct twa_request *tr) 503 { 504 struct twa_softc *sc = tr->tr_sc; 505 uint8_t cmd_status; 506 int s; 507 508 /* If the command involved data, unmap that too. */ 509 if (tr->tr_data != NULL) { 510 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 511 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 512 else 513 cmd_status = 514 tr->tr_command->command.cmd_pkt_7k.generic.status; 515 516 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 517 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 518 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 519 /* 520 * If we are using a bounce buffer, and we are reading 521 * data, copy the real data in. 522 */ 523 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 524 if (cmd_status == 0) 525 memcpy(tr->tr_real_data, tr->tr_data, 526 tr->tr_real_length); 527 } 528 if (tr->tr_flags & TWA_CMD_DATA_IN) 529 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 530 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 531 532 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 533 } 534 535 /* Free alignment buffer if it was used. */ 536 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 537 s = splvm(); 538 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 539 tr->tr_length); 540 splx(s); 541 tr->tr_data = tr->tr_real_data; 542 tr->tr_length = tr->tr_real_length; 543 } 544 } 545 546 /* 547 * Function name: twa_wait_request 548 * Description: Sends down a firmware cmd, and waits for the completion, 549 * but NOT in a tight loop. 550 * 551 * Input: tr -- ptr to request pkt 552 * timeout -- max # of seconds to wait before giving up 553 * Output: None 554 * Return value: 0 -- success 555 * non-zero-- failure 556 */ 557 static int 558 twa_wait_request(struct twa_request *tr, uint32_t timeout) 559 { 560 time_t end_time; 561 struct timeval t1; 562 int s, rv; 563 564 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 565 tr->tr_callback = twa_request_wait_handler; 566 tr->tr_status = TWA_CMD_BUSY; 567 568 rv = twa_map_request(tr); 569 570 if (rv != 0) 571 return (rv); 572 573 microtime(&t1); 574 end_time = t1.tv_usec + 575 (timeout * 1000 * 100); 576 577 while (tr->tr_status != TWA_CMD_COMPLETE) { 578 rv = tr->tr_error; 579 if (rv != 0) 580 return(rv); 581 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 582 break; 583 584 if (rv == EWOULDBLOCK) { 585 /* 586 * We will reset the controller only if the request has 587 * already been submitted, so as to not lose the 588 * request packet. If a busy request timed out, the 589 * reset will take care of freeing resources. If a 590 * pending request timed out, we will free resources 591 * for that request, right here. So, the caller is 592 * expected to NOT cleanup when ETIMEDOUT is returned. 593 */ 594 if (tr->tr_status == TWA_CMD_BUSY) 595 twa_reset(tr->tr_sc); 596 else { 597 /* Request was never submitted. Clean up. */ 598 s = splbio(); 599 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 600 tr_link); 601 splx(s); 602 603 twa_unmap_request(tr); 604 if (tr->tr_data) 605 free(tr->tr_data, M_DEVBUF); 606 607 twa_release_request(tr); 608 } 609 return(ETIMEDOUT); 610 } 611 /* 612 * Either the request got completed, or we were woken up by a 613 * signal. Calculate the new timeout, in case it was the 614 * latter. 615 */ 616 microtime(&t1); 617 618 timeout = (end_time - t1.tv_usec) / (1000 * 100); 619 } 620 return(rv); 621 } 622 623 /* 624 * Function name: twa_immediate_request 625 * Description: Sends down a firmware cmd, and waits for the completion 626 * in a tight loop. 627 * 628 * Input: tr -- ptr to request pkt 629 * timeout -- max # of seconds to wait before giving up 630 * Output: None 631 * Return value: 0 -- success 632 * non-zero-- failure 633 */ 634 static int 635 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 636 { 637 struct timeval t1; 638 int s = 0, rv = 0; 639 640 rv = twa_map_request(tr); 641 642 if (rv != 0) 643 return(rv); 644 645 timeout = (timeout * 10000 * 10); 646 647 microtime(&t1); 648 649 timeout += t1.tv_usec; 650 651 do { 652 rv = tr->tr_error; 653 if (rv != 0) 654 return(rv); 655 s = splbio(); 656 twa_done(tr->tr_sc); 657 splx(s); 658 if (tr->tr_status == TWA_CMD_COMPLETE) 659 return(rv); 660 microtime(&t1); 661 } while (t1.tv_usec <= timeout); 662 663 /* 664 * We will reset the controller only if the request has 665 * already been submitted, so as to not lose the 666 * request packet. If a busy request timed out, the 667 * reset will take care of freeing resources. If a 668 * pending request timed out, we will free resources 669 * for that request, right here. So, the caller is 670 * expected to NOT cleanup when ETIMEDOUT is returned. 671 */ 672 rv = ETIMEDOUT; 673 674 if (tr->tr_status == TWA_CMD_BUSY) 675 twa_reset(tr->tr_sc); 676 else { 677 /* Request was never submitted. Clean up. */ 678 s = splbio(); 679 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 680 splx(s); 681 twa_unmap_request(tr); 682 if (tr->tr_data) 683 free(tr->tr_data, M_DEVBUF); 684 685 twa_release_request(tr); 686 } 687 return (rv); 688 } 689 690 static int 691 twa_inquiry(struct twa_request *tr, int lunid) 692 { 693 int error; 694 struct twa_command_9k *tr_9k_cmd; 695 696 if (tr->tr_data == NULL) 697 return (ENOMEM); 698 699 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 700 701 tr->tr_length = TWA_SECTOR_SIZE; 702 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 703 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 704 705 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 706 707 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 708 tr_9k_cmd->unit = lunid; 709 tr_9k_cmd->request_id = tr->tr_request_id; 710 tr_9k_cmd->status = 0; 711 tr_9k_cmd->sgl_offset = 16; 712 tr_9k_cmd->sgl_entries = 1; 713 /* create the CDB here */ 714 tr_9k_cmd->cdb[0] = INQUIRY; 715 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 716 tr_9k_cmd->cdb[4] = 255; 717 718 /* XXXX setup page data no lun device 719 * it seems 9000 series does not indicate 720 * NOTPRESENT - need more investigation 721 */ 722 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 723 SID_QUAL_LU_NOTPRESENT; 724 725 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 726 if (error != 0) 727 return (error); 728 729 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 730 SID_QUAL_LU_NOTPRESENT) 731 error = 1; 732 733 return (error); 734 } 735 736 static int 737 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 738 { 739 740 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor); 741 742 return (1); 743 } 744 745 746 static uint64_t 747 twa_read_capacity(struct twa_request *tr, int lunid) 748 { 749 int error; 750 struct twa_command_9k *tr_9k_cmd; 751 uint64_t array_size = 0LL; 752 753 if (tr->tr_data == NULL) 754 return (ENOMEM); 755 756 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 757 758 tr->tr_length = TWA_SECTOR_SIZE; 759 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 760 tr->tr_flags |= TWA_CMD_DATA_OUT; 761 762 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 763 764 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 765 tr_9k_cmd->unit = lunid; 766 tr_9k_cmd->request_id = tr->tr_request_id; 767 tr_9k_cmd->status = 0; 768 tr_9k_cmd->sgl_offset = 16; 769 tr_9k_cmd->sgl_entries = 1; 770 /* create the CDB here */ 771 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 772 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 773 774 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 775 776 if (error == 0) { 777 #if BYTE_ORDER == BIG_ENDIAN 778 array_size = bswap64(_8btol( 779 ((struct scsipi_read_capacity_16_data *)tr->tr_data->addr) + 1); 780 #else 781 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 782 tr->tr_data)->addr) + 1; 783 #endif 784 } 785 return (array_size); 786 } 787 788 static int 789 twa_request_sense(struct twa_request *tr, int lunid) 790 { 791 int error = 1; 792 struct twa_command_9k *tr_9k_cmd; 793 794 if (tr->tr_data == NULL) 795 return (error); 796 797 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 798 799 tr->tr_length = TWA_SECTOR_SIZE; 800 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 801 tr->tr_flags |= TWA_CMD_DATA_OUT; 802 803 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 804 805 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 806 tr_9k_cmd->unit = lunid; 807 tr_9k_cmd->request_id = tr->tr_request_id; 808 tr_9k_cmd->status = 0; 809 tr_9k_cmd->sgl_offset = 16; 810 tr_9k_cmd->sgl_entries = 1; 811 /* create the CDB here */ 812 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 813 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 814 tr_9k_cmd->cdb[4] = 255; 815 816 /*XXX AEN notification called in interrupt context 817 * so just queue the request. Return as quickly 818 * as possible from interrupt 819 */ 820 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 821 error = twa_map_request(tr); 822 else 823 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 824 825 return (error); 826 } 827 828 static int 829 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 830 { 831 struct twa_request *tr; 832 struct twa_command_packet *tc; 833 bus_dma_segment_t seg; 834 size_t max_segs, max_xfer; 835 int i, rv, rseg, size; 836 837 if ((sc->sc_units = malloc(sc->sc_nunits * 838 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 839 return(ENOMEM); 840 841 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 842 M_DEVBUF, M_NOWAIT)) == NULL) 843 return(ENOMEM); 844 845 size = num_reqs * sizeof(struct twa_command_packet); 846 847 /* Allocate memory for cmd pkts. */ 848 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 849 size, PAGE_SIZE, 0, &seg, 850 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 851 aprint_error_dev(sc->twa_dv, "unable to allocate " 852 "command packets, rv = %d\n", rv); 853 return (ENOMEM); 854 } 855 856 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 857 &seg, rseg, size, (void **)&sc->twa_cmds, 858 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 859 aprint_error_dev(sc->twa_dv, 860 "unable to map commands, rv = %d\n", rv); 861 return (1); 862 } 863 864 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 865 size, num_reqs, size, 866 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 867 aprint_error_dev(sc->twa_dv, 868 "unable to create command DMA map, " 869 "rv = %d\n", rv); 870 return (ENOMEM); 871 } 872 873 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 874 sc->twa_cmds, size, NULL, 875 BUS_DMA_NOWAIT)) != 0) { 876 aprint_error_dev(sc->twa_dv, 877 "unable to load command DMA map, rv = %d\n", rv); 878 return (1); 879 } 880 881 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 882 aprint_error_dev(sc->twa_dv, 883 "DMA map memory not aligned on %d boundary\n", 884 TWA_ALIGNMENT); 885 886 return (1); 887 } 888 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 889 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 890 891 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 892 memset(sc->twa_cmd_pkt_buf, 0, 893 num_reqs * sizeof(struct twa_command_packet)); 894 895 sc->sc_twa_request = sc->twa_req_buf; 896 max_segs = twa_get_maxsegs(); 897 max_xfer = twa_get_maxxfer(max_segs); 898 899 for (i = 0; i < num_reqs; i++, tc++) { 900 tr = &(sc->twa_req_buf[i]); 901 tr->tr_command = tc; 902 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 903 (i * sizeof(struct twa_command_packet)); 904 tr->tr_request_id = i; 905 tr->tr_sc = sc; 906 907 /* 908 * Create a map for data buffers. maxsize (256 * 1024) used in 909 * bus_dma_tag_create above should suffice the bounce page needs 910 * for data buffers, since the max I/O size we support is 128KB. 911 * If we supported I/O's bigger than 256KB, we would have to 912 * create a second dma_tag, with the appropriate maxsize. 913 */ 914 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 915 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 916 &tr->tr_dma_map)) != 0) { 917 aprint_error_dev(sc->twa_dv, 918 "unable to create command DMA map, " 919 "rv = %d\n", rv); 920 return (ENOMEM); 921 } 922 /* Insert request into the free queue. */ 923 if (i != 0) { 924 sc->twa_lookup[i] = tr; 925 twa_release_request(tr); 926 } else 927 tr->tr_flags |= TWA_CMD_AEN; 928 } 929 return(0); 930 } 931 932 static void 933 twa_recompute_openings(struct twa_softc *sc) 934 { 935 struct twa_drive *td; 936 int unit; 937 int openings; 938 uint64_t total_size; 939 940 total_size = 0; 941 for (unit = 0; unit < sc->sc_nunits; unit++) { 942 td = &sc->sc_units[unit]; 943 total_size += td->td_size; 944 } 945 946 for (unit = 0; unit < sc->sc_nunits; unit++) { 947 td = &sc->sc_units[unit]; 948 /* 949 * In theory, TWA_Q_LENGTH - 1 should be usable, but 950 * keep one additional ccb for internal commands. 951 * This makes the controller more reliable under load. 952 */ 953 if (total_size > 0) { 954 openings = (TWA_Q_LENGTH - 2) * td->td_size 955 / total_size; 956 } else 957 openings = 0; 958 959 if (openings == td->td_openings) 960 continue; 961 td->td_openings = openings; 962 963 #ifdef TWA_DEBUG 964 printf("%s: unit %d openings %d\n", 965 device_xname(sc->twa_dv), unit, openings); 966 #endif 967 if (td->td_dev != NULL) 968 (*td->td_callbacks->tcb_openings)(td->td_dev, 969 td->td_openings); 970 } 971 } 972 973 static int 974 twa_request_bus_scan(struct twa_softc *sc) 975 { 976 struct twa_drive *td; 977 struct twa_request *tr; 978 struct twa_attach_args twaa; 979 int locs[TWACF_NLOCS]; 980 int s, unit; 981 982 s = splbio(); 983 for (unit = 0; unit < sc->sc_nunits; unit++) { 984 985 if ((tr = twa_get_request(sc, 0)) == NULL) { 986 splx(s); 987 return (EIO); 988 } 989 990 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 991 992 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 993 994 if (tr->tr_data == NULL) { 995 twa_release_request(tr); 996 splx(s); 997 return (ENOMEM); 998 } 999 td = &sc->sc_units[unit]; 1000 1001 if (twa_inquiry(tr, unit) == 0) { 1002 if (td->td_dev == NULL) { 1003 twa_print_inquiry_data(sc, 1004 ((struct scsipi_inquiry_data *)tr->tr_data)); 1005 1006 sc->sc_units[unit].td_size = 1007 twa_read_capacity(tr, unit); 1008 1009 twaa.twaa_unit = unit; 1010 1011 twa_recompute_openings(sc); 1012 1013 locs[TWACF_UNIT] = unit; 1014 1015 sc->sc_units[unit].td_dev = 1016 config_found_sm_loc(sc->twa_dv, "twa", 1017 locs, &twaa, twa_print, config_stdsubmatch); 1018 } 1019 } else { 1020 if (td->td_dev != NULL) { 1021 (void) config_detach(td->td_dev, DETACH_FORCE); 1022 td->td_dev = NULL; 1023 td->td_size = 0; 1024 1025 twa_recompute_openings(sc); 1026 } 1027 } 1028 free(tr->tr_data, M_DEVBUF); 1029 1030 twa_release_request(tr); 1031 } 1032 splx(s); 1033 1034 return (0); 1035 } 1036 1037 1038 #ifdef DIAGNOSTIC 1039 static inline void 1040 twa_check_busy_q(struct twa_request *tr) 1041 { 1042 struct twa_request *rq; 1043 struct twa_softc *sc = tr->tr_sc; 1044 1045 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1046 if (tr->tr_request_id == rq->tr_request_id) { 1047 panic("cannot submit same request more than once"); 1048 } else if (tr->bp == rq->bp && tr->bp != 0) { 1049 /* XXX A check for 0 for the buf ptr is needed to 1050 * guard against ioctl requests with a buf ptr of 1051 * 0 and also aen notifications. Looking for 1052 * external cmds only. 1053 */ 1054 panic("cannot submit same buf more than once"); 1055 } else { 1056 /* Empty else statement */ 1057 } 1058 } 1059 } 1060 #endif 1061 1062 static int 1063 twa_start(struct twa_request *tr) 1064 { 1065 struct twa_softc *sc = tr->tr_sc; 1066 uint32_t status_reg; 1067 int s; 1068 int error; 1069 1070 s = splbio(); 1071 1072 /* 1073 * The 9650 and 9690 have a bug in the detection of the full queue 1074 * condition. 1075 * 1076 * If a write operation has filled the queue and is directly followed 1077 * by a status read, it sometimes doesn't return the correct result. 1078 * To work around this, the upper 32bit are written first. 1079 * This effectively serialises the hardware, but does not change 1080 * the state of the queue. 1081 */ 1082 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1083 /* Write lower 32 bits of address */ 1084 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1085 sizeof(struct twa_command_header)); 1086 } 1087 1088 /* Check to see if we can post a command. */ 1089 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1090 if ((error = twa_check_ctlr_state(sc, status_reg))) 1091 goto out; 1092 1093 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1094 if (tr->tr_status != TWA_CMD_PENDING) { 1095 tr->tr_status = TWA_CMD_PENDING; 1096 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1097 tr, tr_link); 1098 } 1099 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1100 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1101 error = EBUSY; 1102 } else { 1103 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1104 (char *)tr->tr_command - (char *)sc->twa_cmds, 1105 sizeof(struct twa_command_packet), 1106 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1107 1108 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1109 /* 1110 * Cmd queue is not full. Post the command 1111 * by writing upper 32 bits of address. 1112 */ 1113 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1114 sizeof(struct twa_command_header)); 1115 } else { 1116 /* Cmd queue is not full. Post the command. */ 1117 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1118 sizeof(struct twa_command_header)); 1119 } 1120 1121 /* Mark the request as currently being processed. */ 1122 tr->tr_status = TWA_CMD_BUSY; 1123 1124 #ifdef DIAGNOSTIC 1125 twa_check_busy_q(tr); 1126 #endif 1127 1128 /* Move the request into the busy queue. */ 1129 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1130 } 1131 out: 1132 splx(s); 1133 return(error); 1134 } 1135 1136 static int 1137 twa_drain_response_queue(struct twa_softc *sc) 1138 { 1139 uint32_t status_reg; 1140 1141 for (;;) { 1142 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1143 if (twa_check_ctlr_state(sc, status_reg)) 1144 return(1); 1145 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1146 return(0); /* no more response queue entries */ 1147 (void)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1148 } 1149 } 1150 1151 /* 1152 * twa_drain_response_queue_large: 1153 * 1154 * specific to the 9550 and 9650 controller to remove requests. 1155 * 1156 * Removes all requests from "large" response queue on the 9550 controller. 1157 * This procedure is called as part of the 9550 controller reset sequence. 1158 */ 1159 static int 1160 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1161 { 1162 uint32_t start_time = 0, end_time; 1163 uint32_t response = 0; 1164 1165 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1166 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1167 start_time = 0; 1168 end_time = (timeout * TWA_MICROSECOND); 1169 1170 while ((response & 1171 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1172 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1173 if (start_time >= end_time) 1174 return (1); 1175 DELAY(1); 1176 start_time++; 1177 } 1178 /* P-chip delay */ 1179 DELAY(500000); 1180 } 1181 return (0); 1182 } 1183 1184 static void 1185 twa_drain_busy_queue(struct twa_softc *sc) 1186 { 1187 struct twa_request *tr; 1188 1189 /* Walk the busy queue. */ 1190 1191 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1192 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1193 1194 twa_unmap_request(tr); 1195 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1196 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1197 /* It's an internal/ioctl request. Simply free it. */ 1198 if (tr->tr_data) 1199 free(tr->tr_data, M_DEVBUF); 1200 twa_release_request(tr); 1201 } else { 1202 /* It's a SCSI request. Complete it. */ 1203 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1204 if (tr->tr_callback) 1205 tr->tr_callback(tr); 1206 } 1207 } 1208 } 1209 1210 static int 1211 twa_drain_pending_queue(struct twa_softc *sc) 1212 { 1213 struct twa_request *tr; 1214 int s, error = 0; 1215 1216 /* 1217 * Pull requests off the pending queue, and submit them. 1218 */ 1219 s = splbio(); 1220 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1221 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1222 1223 if ((error = twa_start(tr))) { 1224 if (error == EBUSY) { 1225 tr->tr_status = TWA_CMD_PENDING; 1226 1227 /* queue at the head */ 1228 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1229 tr, tr_link); 1230 error = 0; 1231 break; 1232 } else { 1233 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1234 tr->tr_error = error; 1235 tr->tr_callback(tr); 1236 error = EIO; 1237 } 1238 } 1239 } 1240 } 1241 splx(s); 1242 1243 return(error); 1244 } 1245 1246 static int 1247 twa_drain_aen_queue(struct twa_softc *sc) 1248 { 1249 int s, error = 0; 1250 struct twa_request *tr; 1251 struct twa_command_header *cmd_hdr; 1252 struct timeval t1; 1253 uint32_t timeout; 1254 1255 for (;;) { 1256 if ((tr = twa_get_request(sc, 0)) == NULL) { 1257 error = EIO; 1258 break; 1259 } 1260 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1261 tr->tr_callback = NULL; 1262 1263 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1264 1265 if (tr->tr_data == NULL) { 1266 error = 1; 1267 goto out; 1268 } 1269 1270 if (twa_request_sense(tr, 0) != 0) { 1271 error = 1; 1272 break; 1273 } 1274 1275 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1276 1277 microtime(&t1); 1278 1279 timeout += t1.tv_usec; 1280 1281 do { 1282 s = splbio(); 1283 twa_done(tr->tr_sc); 1284 splx(s); 1285 if (tr->tr_status != TWA_CMD_BUSY) 1286 break; 1287 microtime(&t1); 1288 } while (t1.tv_usec <= timeout); 1289 1290 if (tr->tr_status != TWA_CMD_COMPLETE) { 1291 error = ETIMEDOUT; 1292 break; 1293 } 1294 1295 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1296 break; 1297 1298 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1299 if ((cmd_hdr->status_block.error) /* aen_code */ 1300 == TWA_AEN_QUEUE_EMPTY) 1301 break; 1302 (void)twa_enqueue_aen(sc, cmd_hdr); 1303 1304 free(tr->tr_data, M_DEVBUF); 1305 twa_release_request(tr); 1306 } 1307 out: 1308 if (tr) { 1309 if (tr->tr_data) 1310 free(tr->tr_data, M_DEVBUF); 1311 1312 twa_release_request(tr); 1313 } 1314 return(error); 1315 } 1316 1317 1318 #if 0 1319 static void 1320 twa_check_response_q(struct twa_request *tr, int clear) 1321 { 1322 int j; 1323 static int i = 0; 1324 static struct twa_request *req = 0; 1325 static struct buf *hist[255]; 1326 1327 1328 if (clear) { 1329 i = 0; 1330 for (j = 0; j < 255; j++) 1331 hist[j] = 0; 1332 return; 1333 } 1334 1335 if (req == 0) 1336 req = tr; 1337 1338 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1339 /* XXX this is bogus ! req can't be anything else but tr ! */ 1340 if (req->tr_request_id == tr->tr_request_id) 1341 panic("req id: %d on controller queue twice", 1342 tr->tr_request_id); 1343 1344 for (j = 0; j < i; j++) 1345 if (tr->bp == hist[j]) 1346 panic("req id: %d buf found twice", 1347 tr->tr_request_id); 1348 } 1349 req = tr; 1350 1351 hist[i++] = req->bp; 1352 } 1353 #endif 1354 1355 static int 1356 twa_done(struct twa_softc *sc) 1357 { 1358 union twa_response_queue rq; 1359 struct twa_request *tr; 1360 int rv = 0; 1361 uint32_t status_reg; 1362 1363 for (;;) { 1364 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1365 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1366 break; 1367 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1368 break; 1369 /* Response queue is not empty. */ 1370 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1371 tr = sc->sc_twa_request + rq.u.response_id; 1372 #if 0 1373 twa_check_response_q(tr, 0); 1374 #endif 1375 /* Unmap the command packet, and any associated data buffer. */ 1376 twa_unmap_request(tr); 1377 1378 tr->tr_status = TWA_CMD_COMPLETE; 1379 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1380 1381 if (tr->tr_callback) 1382 tr->tr_callback(tr); 1383 } 1384 (void)twa_drain_pending_queue(sc); 1385 1386 #if 0 1387 twa_check_response_q(NULL, 1); 1388 #endif 1389 return(rv); 1390 } 1391 1392 /* 1393 * Function name: twa_init_ctlr 1394 * Description: Establishes a logical connection with the controller. 1395 * If bundled with firmware, determines whether or not 1396 * the driver is compatible with the firmware on the 1397 * controller, before proceeding to work with it. 1398 * 1399 * Input: sc -- ptr to per ctlr structure 1400 * Output: None 1401 * Return value: 0 -- success 1402 * non-zero-- failure 1403 */ 1404 static int 1405 twa_init_ctlr(struct twa_softc *sc) 1406 { 1407 uint16_t fw_on_ctlr_srl = 0; 1408 uint16_t fw_on_ctlr_arch_id = 0; 1409 uint16_t fw_on_ctlr_branch = 0; 1410 uint16_t fw_on_ctlr_build = 0; 1411 uint32_t init_connect_result = 0; 1412 int error = 0; 1413 1414 /* Wait for the controller to become ready. */ 1415 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1416 TWA_REQUEST_TIMEOUT_PERIOD)) { 1417 return(ENXIO); 1418 } 1419 /* Drain the response queue. */ 1420 if (twa_drain_response_queue(sc)) 1421 return(1); 1422 1423 /* Establish a logical connection with the controller. */ 1424 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1425 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1426 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1427 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1428 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1429 &fw_on_ctlr_build, &init_connect_result))) { 1430 return(error); 1431 } 1432 twa_drain_aen_queue(sc); 1433 1434 /* Set controller state to initialized. */ 1435 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1436 return(0); 1437 } 1438 1439 static int 1440 twa_setup(struct twa_softc *sc) 1441 { 1442 struct tw_cl_event_packet *aen_queue; 1443 uint32_t i = 0; 1444 int error = 0; 1445 1446 /* Initialize request queues. */ 1447 TAILQ_INIT(&sc->twa_free); 1448 TAILQ_INIT(&sc->twa_busy); 1449 TAILQ_INIT(&sc->twa_pending); 1450 1451 sc->twa_sc_flags = 0; 1452 1453 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1454 1455 return(ENOMEM); 1456 } 1457 1458 /* Allocate memory for the AEN queue. */ 1459 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1460 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1461 /* 1462 * This should not cause us to return error. We will only be 1463 * unable to support AEN's. But then, we will have to check 1464 * time and again to see if we can support AEN's, if we 1465 * continue. So, we will just return error. 1466 */ 1467 return (ENOMEM); 1468 } 1469 /* Initialize the aen queue. */ 1470 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1471 1472 for (i = 0; i < TWA_Q_LENGTH; i++) 1473 sc->twa_aen_queue[i] = &(aen_queue[i]); 1474 1475 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1476 TWA_CONTROL_DISABLE_INTERRUPTS); 1477 1478 /* Initialize the controller. */ 1479 if ((error = twa_init_ctlr(sc))) { 1480 /* Soft reset the controller, and try one more time. */ 1481 1482 printf("%s: controller initialization failed. " 1483 "Retrying initialization\n", device_xname(sc->twa_dv)); 1484 1485 if ((error = twa_soft_reset(sc)) == 0) 1486 error = twa_init_ctlr(sc); 1487 } 1488 1489 twa_describe_controller(sc); 1490 1491 error = twa_request_bus_scan(sc); 1492 1493 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1494 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1495 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1496 TWA_CONTROL_ENABLE_INTERRUPTS); 1497 1498 return (error); 1499 } 1500 1501 void *twa_sdh; 1502 1503 static void 1504 twa_attach(device_t parent, device_t self, void *aux) 1505 { 1506 struct pci_attach_args *pa; 1507 struct twa_softc *sc; 1508 pci_chipset_tag_t pc; 1509 pcireg_t csr; 1510 pci_intr_handle_t ih; 1511 const char *intrstr; 1512 const struct sysctlnode *node; 1513 const struct twa_pci_identity *entry; 1514 int i; 1515 bool use_64bit; 1516 char intrbuf[PCI_INTRSTR_LEN]; 1517 1518 sc = device_private(self); 1519 1520 sc->twa_dv = self; 1521 1522 pa = aux; 1523 pc = pa->pa_pc; 1524 sc->pc = pa->pa_pc; 1525 sc->tag = pa->pa_tag; 1526 1527 entry = twa_lookup(pa->pa_id); 1528 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1); 1529 1530 sc->sc_quirks = 0; 1531 1532 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1533 sc->sc_nunits = TWA_MAX_UNITS; 1534 use_64bit = false; 1535 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1536 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1537 aprint_error_dev(sc->twa_dv, "can't map i/o space\n"); 1538 return; 1539 } 1540 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1541 sc->sc_nunits = TWA_MAX_UNITS; 1542 use_64bit = true; 1543 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1544 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1545 &sc->twa_bus_ioh, NULL, NULL)) { 1546 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1547 return; 1548 } 1549 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1550 sc->sc_nunits = TWA_9650_MAX_UNITS; 1551 use_64bit = true; 1552 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1553 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1554 &sc->twa_bus_ioh, NULL, NULL)) { 1555 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1556 return; 1557 } 1558 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1559 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1560 sc->sc_nunits = TWA_9690_MAX_UNITS; 1561 use_64bit = true; 1562 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1563 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1564 &sc->twa_bus_ioh, NULL, NULL)) { 1565 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1566 return; 1567 } 1568 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1569 } else { 1570 sc->sc_nunits = 0; 1571 use_64bit = false; 1572 aprint_error_dev(sc->twa_dv, 1573 "product id 0x%02x not recognized\n", 1574 PCI_PRODUCT(pa->pa_id)); 1575 return; 1576 } 1577 1578 if (pci_dma64_available(pa) && use_64bit) { 1579 aprint_verbose_dev(self, "64-bit DMA addressing active\n"); 1580 sc->twa_dma_tag = pa->pa_dmat64; 1581 } else { 1582 sc->twa_dma_tag = pa->pa_dmat; 1583 } 1584 1585 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1586 /* Enable the device. */ 1587 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1588 1589 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1590 csr | PCI_COMMAND_MASTER_ENABLE); 1591 1592 /* Map and establish the interrupt. */ 1593 if (pci_intr_map(pa, &ih)) { 1594 aprint_error_dev(sc->twa_dv, "can't map interrupt\n"); 1595 return; 1596 } 1597 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 1598 1599 sc->twa_ih = pci_intr_establish(pc, ih, IPL_BIO, twa_intr, sc); 1600 if (sc->twa_ih == NULL) { 1601 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n", 1602 (intrstr) ? " at " : "", 1603 (intrstr) ? intrstr : ""); 1604 return; 1605 } 1606 1607 if (intrstr != NULL) 1608 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", intrstr); 1609 1610 twa_setup(sc); 1611 1612 if (twa_sdh == NULL) 1613 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1614 1615 /* sysctl set-up for 3ware cli */ 1616 if (sysctl_createv(NULL, 0, NULL, &node, 1617 0, CTLTYPE_NODE, device_xname(sc->twa_dv), 1618 SYSCTL_DESCR("twa driver information"), 1619 NULL, 0, NULL, 0, 1620 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1621 aprint_error_dev(sc->twa_dv, 1622 "could not create %s.%s sysctl node\n", 1623 "hw", device_xname(sc->twa_dv)); 1624 return; 1625 } 1626 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1627 0, CTLTYPE_STRING, "driver_version", 1628 SYSCTL_DESCR("twa driver version"), 1629 NULL, 0, __UNCONST(&twaver), 0, 1630 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1631 != 0) { 1632 aprint_error_dev(sc->twa_dv, 1633 "could not create %s.%s.driver_version sysctl\n", 1634 "hw", device_xname(sc->twa_dv)); 1635 return; 1636 } 1637 1638 return; 1639 } 1640 1641 static void 1642 twa_shutdown(void *arg) 1643 { 1644 extern struct cfdriver twa_cd; 1645 struct twa_softc *sc; 1646 int i, unit; 1647 1648 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1649 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1650 continue; 1651 1652 for (unit = 0; unit < sc->sc_nunits; unit++) 1653 if (sc->sc_units[unit].td_dev != NULL) 1654 (void) config_detach(sc->sc_units[unit].td_dev, 1655 DETACH_FORCE | DETACH_QUIET); 1656 1657 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1658 TWA_CONTROL_DISABLE_INTERRUPTS); 1659 1660 /* Let the controller know that we are going down. */ 1661 (void)twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1662 0, 0, 0, 0, 0, 1663 NULL, NULL, NULL, NULL, NULL); 1664 } 1665 } 1666 1667 void 1668 twa_register_callbacks(struct twa_softc *sc, int unit, 1669 const struct twa_callbacks *tcb) 1670 { 1671 1672 sc->sc_units[unit].td_callbacks = tcb; 1673 } 1674 1675 /* 1676 * Print autoconfiguration message for a sub-device 1677 */ 1678 static int 1679 twa_print(void *aux, const char *pnp) 1680 { 1681 struct twa_attach_args *twaa; 1682 1683 twaa = aux; 1684 1685 if (pnp !=NULL) 1686 aprint_normal("block device at %s\n", pnp); 1687 aprint_normal(" unit %d\n", twaa->twaa_unit); 1688 return (UNCONF); 1689 } 1690 1691 static void 1692 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1693 { 1694 int i; 1695 for (i = 0; i < nsegments; i++) { 1696 sgl[i].address = segs[i].ds_addr; 1697 sgl[i].length = (uint32_t)(segs[i].ds_len); 1698 } 1699 } 1700 1701 static int 1702 twa_submit_io(struct twa_request *tr) 1703 { 1704 int error; 1705 1706 if ((error = twa_start(tr))) { 1707 if (error == EBUSY) 1708 error = 0; /* request is in the pending queue */ 1709 else { 1710 tr->tr_error = error; 1711 } 1712 } 1713 return(error); 1714 } 1715 1716 /* 1717 * Function name: twa_setup_data_dmamap 1718 * Description: Callback of bus_dmamap_load for the buffer associated 1719 * with data. Updates the cmd pkt (size/sgl_entries 1720 * fields, as applicable) to reflect the number of sg 1721 * elements. 1722 * 1723 * Input: arg -- ptr to request pkt 1724 * segs -- ptr to a list of segment descriptors 1725 * nsegments--# of segments 1726 * error -- 0 if no errors encountered before callback, 1727 * non-zero if errors were encountered 1728 * Output: None 1729 * Return value: None 1730 */ 1731 static int 1732 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1733 { 1734 struct twa_request *tr = (struct twa_request *)arg; 1735 struct twa_command_packet *cmdpkt = tr->tr_command; 1736 struct twa_command_9k *cmd9k; 1737 union twa_command_7k *cmd7k; 1738 uint8_t sgl_offset; 1739 int error; 1740 1741 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1742 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1743 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1744 cmd9k->sgl_entries += nsegments - 1; 1745 } else { 1746 /* It's a 7000 command packet. */ 1747 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1748 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1749 twa_fillin_sgl((struct twa_sg *) 1750 (((uint32_t *)cmd7k) + sgl_offset), 1751 segs, nsegments); 1752 /* Modify the size field, based on sg address size. */ 1753 cmd7k->generic.size += 1754 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1755 } 1756 if (tr->tr_flags & TWA_CMD_DATA_IN) 1757 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1758 tr->tr_length, BUS_DMASYNC_PREWRITE); 1759 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1760 /* 1761 * If we're using an alignment buffer, and we're 1762 * writing data, copy the real data out. 1763 */ 1764 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1765 memcpy(tr->tr_data, tr->tr_real_data, 1766 tr->tr_real_length); 1767 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1768 tr->tr_length, BUS_DMASYNC_PREREAD); 1769 } 1770 error = twa_submit_io(tr); 1771 1772 if (error) { 1773 twa_unmap_request(tr); 1774 /* 1775 * If the caller had been returned EINPROGRESS, and he has 1776 * registered a callback for handling completion, the callback 1777 * will never get called because we were unable to submit the 1778 * request. So, free up the request right here. 1779 */ 1780 if (tr->tr_callback) 1781 twa_release_request(tr); 1782 } 1783 return (error); 1784 } 1785 1786 /* 1787 * Function name: twa_map_request 1788 * Description: Maps a cmd pkt and data associated with it, into 1789 * DMA'able memory. 1790 * 1791 * Input: tr -- ptr to request pkt 1792 * Output: None 1793 * Return value: 0 -- success 1794 * non-zero-- failure 1795 */ 1796 int 1797 twa_map_request(struct twa_request *tr) 1798 { 1799 struct twa_softc *sc = tr->tr_sc; 1800 int s, rv, rc; 1801 1802 /* If the command involves data, map that too. */ 1803 if (tr->tr_data != NULL) { 1804 1805 if (((u_long)tr->tr_data & (511)) != 0) { 1806 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1807 tr->tr_real_data = tr->tr_data; 1808 tr->tr_real_length = tr->tr_length; 1809 s = splvm(); 1810 rc = uvm_km_kmem_alloc(kmem_va_arena, 1811 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT), 1812 (vmem_addr_t *)&tr->tr_data); 1813 splx(s); 1814 1815 if (rc != 0) { 1816 tr->tr_data = tr->tr_real_data; 1817 tr->tr_length = tr->tr_real_length; 1818 return(ENOMEM); 1819 } 1820 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1821 memcpy(tr->tr_data, tr->tr_real_data, 1822 tr->tr_length); 1823 } 1824 1825 /* 1826 * Map the data buffer into bus space and build the S/G list. 1827 */ 1828 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1829 tr->tr_data, tr->tr_length, NULL, 1830 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1831 1832 if (rv != 0) { 1833 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1834 s = splvm(); 1835 uvm_km_kmem_free(kmem_va_arena, 1836 (vaddr_t)tr->tr_data, tr->tr_length); 1837 splx(s); 1838 } 1839 return (rv); 1840 } 1841 1842 if ((rv = twa_setup_data_dmamap(tr, 1843 tr->tr_dma_map->dm_segs, 1844 tr->tr_dma_map->dm_nsegs))) { 1845 1846 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1847 s = splvm(); 1848 uvm_km_kmem_free(kmem_va_arena, 1849 (vaddr_t)tr->tr_data, tr->tr_length); 1850 splx(s); 1851 tr->tr_data = tr->tr_real_data; 1852 tr->tr_length = tr->tr_real_length; 1853 } 1854 } 1855 1856 } else 1857 if ((rv = twa_submit_io(tr))) 1858 twa_unmap_request(tr); 1859 1860 return (rv); 1861 } 1862 1863 /* 1864 * Function name: twa_intr 1865 * Description: Interrupt handler. Determines the kind of interrupt, 1866 * and calls the appropriate handler. 1867 * 1868 * Input: sc -- ptr to per ctlr structure 1869 * Output: None 1870 * Return value: None 1871 */ 1872 1873 static int 1874 twa_intr(void *arg) 1875 { 1876 int caught, s, rv __diagused; 1877 struct twa_softc *sc; 1878 uint32_t status_reg; 1879 sc = (struct twa_softc *)arg; 1880 1881 caught = 0; 1882 /* Collect current interrupt status. */ 1883 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1884 if (twa_check_ctlr_state(sc, status_reg)) { 1885 caught = 1; 1886 goto bail; 1887 } 1888 /* Dispatch based on the kind of interrupt. */ 1889 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1890 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1891 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1892 caught = 1; 1893 } 1894 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1895 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1896 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1897 rv = twa_fetch_aen(sc); 1898 #ifdef DIAGNOSTIC 1899 if (rv != 0) 1900 printf("%s: unable to retrieve AEN (%d)\n", 1901 device_xname(sc->twa_dv), rv); 1902 #endif 1903 caught = 1; 1904 } 1905 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1906 /* Start any requests that might be in the pending queue. */ 1907 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1908 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1909 (void)twa_drain_pending_queue(sc); 1910 caught = 1; 1911 } 1912 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1913 s = splbio(); 1914 twa_done(sc); 1915 splx(s); 1916 caught = 1; 1917 } 1918 bail: 1919 return (caught); 1920 } 1921 1922 /* 1923 * Accept an open operation on the control device. 1924 */ 1925 static int 1926 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1927 { 1928 struct twa_softc *twa; 1929 1930 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1931 return (ENXIO); 1932 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1933 return (EBUSY); 1934 1935 twa->twa_sc_flags |= TWA_STATE_OPEN; 1936 1937 return (0); 1938 } 1939 1940 /* 1941 * Accept the last close on the control device. 1942 */ 1943 static int 1944 twaclose(dev_t dev, int flag, int mode, 1945 struct lwp *l) 1946 { 1947 struct twa_softc *twa; 1948 1949 twa = device_lookup_private(&twa_cd, minor(dev)); 1950 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1951 return (0); 1952 } 1953 1954 /* 1955 * Function name: twaioctl 1956 * Description: ioctl handler. 1957 * 1958 * Input: sc -- ptr to per ctlr structure 1959 * cmd -- ioctl cmd 1960 * buf -- ptr to buffer in kernel memory, which is 1961 * a copy of the input buffer in user-space 1962 * Output: buf -- ptr to buffer in kernel memory, which will 1963 * be copied of the output buffer in user-space 1964 * Return value: 0 -- success 1965 * non-zero-- failure 1966 */ 1967 static int 1968 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1969 struct lwp *l) 1970 { 1971 struct twa_softc *sc; 1972 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1973 struct tw_cl_event_packet event_buf; 1974 struct twa_request *tr = 0; 1975 int32_t event_index = 0; 1976 int32_t start_index; 1977 int s, error = 0; 1978 1979 sc = device_lookup_private(&twa_cd, minor(dev)); 1980 1981 switch (cmd) { 1982 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1983 { 1984 struct twa_command_packet *cmdpkt; 1985 uint32_t data_buf_size_adjusted; 1986 1987 /* Get a request packet */ 1988 tr = twa_get_request_wait(sc, 0); 1989 KASSERT(tr != NULL); 1990 /* 1991 * Make sure that the data buffer sent to firmware is a 1992 * 512 byte multiple in size. 1993 */ 1994 data_buf_size_adjusted = 1995 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1996 1997 if ((tr->tr_length = data_buf_size_adjusted)) { 1998 if ((tr->tr_data = malloc(data_buf_size_adjusted, 1999 M_DEVBUF, M_WAITOK)) == NULL) { 2000 error = ENOMEM; 2001 goto fw_passthru_done; 2002 } 2003 /* Copy the payload. */ 2004 if ((error = copyin((void *) (user_buf->pdata), 2005 (void *) (tr->tr_data), 2006 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2007 goto fw_passthru_done; 2008 } 2009 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2010 } 2011 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2012 cmdpkt = tr->tr_command; 2013 2014 /* Copy the command packet. */ 2015 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2016 sizeof(struct twa_command_packet)); 2017 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2018 tr->tr_request_id; 2019 2020 /* Send down the request, and wait for it to complete. */ 2021 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2022 if (error == ETIMEDOUT) 2023 break; /* clean-up done by twa_wait_request */ 2024 goto fw_passthru_done; 2025 } 2026 2027 /* Copy the command packet back into user space. */ 2028 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2029 sizeof(struct twa_command_packet)); 2030 2031 /* If there was a payload, copy it back too. */ 2032 if (tr->tr_length) 2033 error = copyout(tr->tr_data, user_buf->pdata, 2034 user_buf->twa_drvr_pkt.buffer_length); 2035 fw_passthru_done: 2036 /* Free resources. */ 2037 if (tr->tr_data) 2038 free(tr->tr_data, M_DEVBUF); 2039 2040 if (tr) 2041 twa_release_request(tr); 2042 break; 2043 } 2044 2045 case TW_OSL_IOCTL_SCAN_BUS: 2046 twa_request_bus_scan(sc); 2047 break; 2048 2049 case TW_CL_IOCTL_GET_FIRST_EVENT: 2050 if (sc->twa_aen_queue_wrapped) { 2051 if (sc->twa_aen_queue_overflow) { 2052 /* 2053 * The aen queue has wrapped, even before some 2054 * events have been retrieved. Let the caller 2055 * know that he missed out on some AEN's. 2056 */ 2057 user_buf->twa_drvr_pkt.status = 2058 TWA_ERROR_AEN_OVERFLOW; 2059 sc->twa_aen_queue_overflow = FALSE; 2060 } else 2061 user_buf->twa_drvr_pkt.status = 0; 2062 event_index = sc->twa_aen_head; 2063 } else { 2064 if (sc->twa_aen_head == sc->twa_aen_tail) { 2065 user_buf->twa_drvr_pkt.status = 2066 TWA_ERROR_AEN_NO_EVENTS; 2067 break; 2068 } 2069 user_buf->twa_drvr_pkt.status = 0; 2070 event_index = sc->twa_aen_tail; /* = 0 */ 2071 } 2072 if ((error = copyout(sc->twa_aen_queue[event_index], 2073 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2074 (sc->twa_aen_queue[event_index])->retrieved = 2075 TWA_AEN_RETRIEVED; 2076 break; 2077 2078 case TW_CL_IOCTL_GET_LAST_EVENT: 2079 if (sc->twa_aen_queue_wrapped) { 2080 if (sc->twa_aen_queue_overflow) { 2081 /* 2082 * The aen queue has wrapped, even before some 2083 * events have been retrieved. Let the caller 2084 * know that he missed out on some AEN's. 2085 */ 2086 user_buf->twa_drvr_pkt.status = 2087 TWA_ERROR_AEN_OVERFLOW; 2088 sc->twa_aen_queue_overflow = FALSE; 2089 } else 2090 user_buf->twa_drvr_pkt.status = 0; 2091 } else { 2092 if (sc->twa_aen_head == sc->twa_aen_tail) { 2093 user_buf->twa_drvr_pkt.status = 2094 TWA_ERROR_AEN_NO_EVENTS; 2095 break; 2096 } 2097 user_buf->twa_drvr_pkt.status = 0; 2098 } 2099 event_index = 2100 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2101 if ((error = copyout(sc->twa_aen_queue[event_index], 2102 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2103 (sc->twa_aen_queue[event_index])->retrieved = 2104 TWA_AEN_RETRIEVED; 2105 break; 2106 2107 case TW_CL_IOCTL_GET_NEXT_EVENT: 2108 user_buf->twa_drvr_pkt.status = 0; 2109 if (sc->twa_aen_queue_wrapped) { 2110 2111 if (sc->twa_aen_queue_overflow) { 2112 /* 2113 * The aen queue has wrapped, even before some 2114 * events have been retrieved. Let the caller 2115 * know that he missed out on some AEN's. 2116 */ 2117 user_buf->twa_drvr_pkt.status = 2118 TWA_ERROR_AEN_OVERFLOW; 2119 sc->twa_aen_queue_overflow = FALSE; 2120 } 2121 start_index = sc->twa_aen_head; 2122 } else { 2123 if (sc->twa_aen_head == sc->twa_aen_tail) { 2124 user_buf->twa_drvr_pkt.status = 2125 TWA_ERROR_AEN_NO_EVENTS; 2126 break; 2127 } 2128 start_index = sc->twa_aen_tail; /* = 0 */ 2129 } 2130 error = copyin(user_buf->pdata, &event_buf, 2131 sizeof(struct tw_cl_event_packet)); 2132 2133 event_index = (start_index + event_buf.sequence_id - 2134 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2135 % TWA_Q_LENGTH; 2136 2137 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2138 event_buf.sequence_id)) { 2139 if (user_buf->twa_drvr_pkt.status == 2140 TWA_ERROR_AEN_OVERFLOW) 2141 /* so we report the overflow next time */ 2142 sc->twa_aen_queue_overflow = TRUE; 2143 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2144 break; 2145 } 2146 if ((error = copyout(sc->twa_aen_queue[event_index], 2147 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2148 (sc->twa_aen_queue[event_index])->retrieved = 2149 TWA_AEN_RETRIEVED; 2150 break; 2151 2152 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2153 user_buf->twa_drvr_pkt.status = 0; 2154 if (sc->twa_aen_queue_wrapped) { 2155 if (sc->twa_aen_queue_overflow) { 2156 /* 2157 * The aen queue has wrapped, even before some 2158 * events have been retrieved. Let the caller 2159 * know that he missed out on some AEN's. 2160 */ 2161 user_buf->twa_drvr_pkt.status = 2162 TWA_ERROR_AEN_OVERFLOW; 2163 sc->twa_aen_queue_overflow = FALSE; 2164 } 2165 start_index = sc->twa_aen_head; 2166 } else { 2167 if (sc->twa_aen_head == sc->twa_aen_tail) { 2168 user_buf->twa_drvr_pkt.status = 2169 TWA_ERROR_AEN_NO_EVENTS; 2170 break; 2171 } 2172 start_index = sc->twa_aen_tail; /* = 0 */ 2173 } 2174 if ((error = copyin(user_buf->pdata, &event_buf, 2175 sizeof(struct tw_cl_event_packet))) != 0) 2176 2177 event_index = (start_index + event_buf.sequence_id - 2178 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2179 % TWA_Q_LENGTH; 2180 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2181 event_buf.sequence_id)) { 2182 if (user_buf->twa_drvr_pkt.status == 2183 TWA_ERROR_AEN_OVERFLOW) 2184 /* so we report the overflow next time */ 2185 sc->twa_aen_queue_overflow = TRUE; 2186 user_buf->twa_drvr_pkt.status = 2187 TWA_ERROR_AEN_NO_EVENTS; 2188 break; 2189 } 2190 if ((error = copyout(sc->twa_aen_queue [event_index], 2191 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2192 aprint_error_dev(sc->twa_dv, "get_previous: Could not " 2193 "copyout to event_buf. error = %x\n", error); 2194 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2195 break; 2196 2197 case TW_CL_IOCTL_GET_LOCK: 2198 { 2199 struct tw_cl_lock_packet twa_lock; 2200 2201 copyin(user_buf->pdata, &twa_lock, 2202 sizeof(struct tw_cl_lock_packet)); 2203 s = splbio(); 2204 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2205 (twa_lock.force_flag) || 2206 (time_second >= sc->twa_ioctl_lock.timeout)) { 2207 2208 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2209 sc->twa_ioctl_lock.timeout = time_second + 2210 (twa_lock.timeout_msec / 1000); 2211 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2212 user_buf->twa_drvr_pkt.status = 0; 2213 } else { 2214 twa_lock.time_remaining_msec = 2215 (sc->twa_ioctl_lock.timeout - time_second) * 2216 1000; 2217 user_buf->twa_drvr_pkt.status = 2218 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2219 } 2220 splx(s); 2221 copyout(&twa_lock, user_buf->pdata, 2222 sizeof(struct tw_cl_lock_packet)); 2223 break; 2224 } 2225 2226 case TW_CL_IOCTL_RELEASE_LOCK: 2227 s = splbio(); 2228 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2229 user_buf->twa_drvr_pkt.status = 2230 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2231 } else { 2232 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2233 user_buf->twa_drvr_pkt.status = 0; 2234 } 2235 splx(s); 2236 break; 2237 2238 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2239 { 2240 struct tw_cl_compatibility_packet comp_pkt; 2241 2242 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2243 sizeof(TWA_DRIVER_VERSION_STRING)); 2244 comp_pkt.working_srl = sc->working_srl; 2245 comp_pkt.working_branch = sc->working_branch; 2246 comp_pkt.working_build = sc->working_build; 2247 user_buf->twa_drvr_pkt.status = 0; 2248 2249 /* Copy compatibility information to user space. */ 2250 copyout(&comp_pkt, user_buf->pdata, 2251 min(sizeof(struct tw_cl_compatibility_packet), 2252 user_buf->twa_drvr_pkt.buffer_length)); 2253 break; 2254 } 2255 2256 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2257 { 2258 struct twa_unitname *tn; 2259 struct twa_drive *tdr; 2260 2261 tn = (struct twa_unitname *)data; 2262 /* XXX mutex */ 2263 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2264 return (EINVAL); 2265 tdr = &sc->sc_units[tn->tn_unit]; 2266 if (tdr->td_dev == NULL) 2267 tn->tn_name[0] = '\0'; 2268 else 2269 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2270 sizeof(tn->tn_name)); 2271 return (0); 2272 } 2273 2274 default: 2275 /* Unknown opcode. */ 2276 error = ENOTTY; 2277 } 2278 2279 return(error); 2280 } 2281 2282 const struct cdevsw twa_cdevsw = { 2283 .d_open = twaopen, 2284 .d_close = twaclose, 2285 .d_read = noread, 2286 .d_write = nowrite, 2287 .d_ioctl = twaioctl, 2288 .d_stop = nostop, 2289 .d_tty = notty, 2290 .d_poll = nopoll, 2291 .d_mmap = nommap, 2292 .d_kqfilter = nokqfilter, 2293 .d_discard = nodiscard, 2294 .d_flag = D_OTHER 2295 }; 2296 2297 /* 2298 * Function name: twa_get_param 2299 * Description: Get a firmware parameter. 2300 * 2301 * Input: sc -- ptr to per ctlr structure 2302 * table_id -- parameter table # 2303 * param_id -- index of the parameter in the table 2304 * param_size -- size of the parameter in bytes 2305 * callback -- ptr to function, if any, to be called 2306 * back on completion; NULL if no callback. 2307 * Output: None 2308 * Return value: ptr to param structure -- success 2309 * NULL -- failure 2310 */ 2311 static int 2312 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2313 size_t param_size, void (* callback)(struct twa_request *tr), 2314 struct twa_param_9k **param) 2315 { 2316 int rv = 0; 2317 struct twa_request *tr; 2318 union twa_command_7k *cmd; 2319 2320 /* Get a request packet. */ 2321 if ((tr = twa_get_request(sc, 0)) == NULL) { 2322 rv = EAGAIN; 2323 goto out; 2324 } 2325 2326 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2327 2328 /* Allocate memory to read data into. */ 2329 if ((*param = (struct twa_param_9k *) 2330 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2331 rv = ENOMEM; 2332 goto out; 2333 } 2334 2335 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2336 tr->tr_data = *param; 2337 tr->tr_length = TWA_SECTOR_SIZE; 2338 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2339 2340 /* Build the cmd pkt. */ 2341 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2342 2343 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2344 2345 cmd->param.opcode = TWA_OP_GET_PARAM; 2346 cmd->param.sgl_offset = 2; 2347 cmd->param.size = 2; 2348 cmd->param.request_id = tr->tr_request_id; 2349 cmd->param.unit = 0; 2350 cmd->param.param_count = 1; 2351 2352 /* Specify which parameter we need. */ 2353 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2354 (*param)->parameter_id = param_id; 2355 (*param)->parameter_size_bytes = param_size; 2356 2357 /* Submit the command. */ 2358 if (callback == NULL) { 2359 /* There's no call back; wait till the command completes. */ 2360 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2361 2362 if (rv != 0) 2363 goto out; 2364 2365 if ((rv = cmd->param.status) != 0) { 2366 /* twa_drain_complete_queue will have done the unmapping */ 2367 goto out; 2368 } 2369 twa_release_request(tr); 2370 return (rv); 2371 } else { 2372 /* There's a call back. Simply submit the command. */ 2373 tr->tr_callback = callback; 2374 rv = twa_map_request(tr); 2375 return (rv); 2376 } 2377 out: 2378 if (tr) 2379 twa_release_request(tr); 2380 return(rv); 2381 } 2382 2383 /* 2384 * Function name: twa_set_param 2385 * Description: Set a firmware parameter. 2386 * 2387 * Input: sc -- ptr to per ctlr structure 2388 * table_id -- parameter table # 2389 * param_id -- index of the parameter in the table 2390 * param_size -- size of the parameter in bytes 2391 * callback -- ptr to function, if any, to be called 2392 * back on completion; NULL if no callback. 2393 * Output: None 2394 * Return value: 0 -- success 2395 * non-zero-- failure 2396 */ 2397 static int 2398 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2399 void *data, void (* callback)(struct twa_request *tr)) 2400 { 2401 struct twa_request *tr; 2402 union twa_command_7k *cmd; 2403 struct twa_param_9k *param = NULL; 2404 int error = ENOMEM; 2405 2406 tr = twa_get_request(sc, 0); 2407 if (tr == NULL) 2408 return (EAGAIN); 2409 2410 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2411 2412 /* Allocate memory to send data using. */ 2413 if ((param = (struct twa_param_9k *) 2414 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2415 goto out; 2416 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2417 tr->tr_data = param; 2418 tr->tr_length = TWA_SECTOR_SIZE; 2419 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2420 2421 /* Build the cmd pkt. */ 2422 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2423 2424 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2425 2426 cmd->param.opcode = TWA_OP_SET_PARAM; 2427 cmd->param.sgl_offset = 2; 2428 cmd->param.size = 2; 2429 cmd->param.request_id = tr->tr_request_id; 2430 cmd->param.unit = 0; 2431 cmd->param.param_count = 1; 2432 2433 /* Specify which parameter we want to set. */ 2434 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2435 param->parameter_id = param_id; 2436 param->parameter_size_bytes = param_size; 2437 memcpy(param->data, data, param_size); 2438 2439 /* Submit the command. */ 2440 if (callback == NULL) { 2441 /* There's no call back; wait till the command completes. */ 2442 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2443 if (error == ETIMEDOUT) 2444 /* clean-up done by twa_immediate_request */ 2445 return(error); 2446 if (error) 2447 goto out; 2448 if ((error = cmd->param.status)) { 2449 /* 2450 * twa_drain_complete_queue will have done the 2451 * unmapping. 2452 */ 2453 goto out; 2454 } 2455 free(param, M_DEVBUF); 2456 twa_release_request(tr); 2457 return(error); 2458 } else { 2459 /* There's a call back. Simply submit the command. */ 2460 tr->tr_callback = callback; 2461 if ((error = twa_map_request(tr))) 2462 goto out; 2463 2464 return (0); 2465 } 2466 out: 2467 if (param) 2468 free(param, M_DEVBUF); 2469 if (tr) 2470 twa_release_request(tr); 2471 return(error); 2472 } 2473 2474 /* 2475 * Function name: twa_init_connection 2476 * Description: Send init_connection cmd to firmware 2477 * 2478 * Input: sc -- ptr to per ctlr structure 2479 * message_credits -- max # of requests that we might send 2480 * down simultaneously. This will be 2481 * typically set to 256 at init-time or 2482 * after a reset, and to 1 at shutdown-time 2483 * set_features -- indicates if we intend to use 64-bit 2484 * sg, also indicates if we want to do a 2485 * basic or an extended init_connection; 2486 * 2487 * Note: The following input/output parameters are valid, only in case of an 2488 * extended init_connection: 2489 * 2490 * current_fw_srl -- srl of fw we are bundled 2491 * with, if any; 0 otherwise 2492 * current_fw_arch_id -- arch_id of fw we are bundled 2493 * with, if any; 0 otherwise 2494 * current_fw_branch -- branch # of fw we are bundled 2495 * with, if any; 0 otherwise 2496 * current_fw_build -- build # of fw we are bundled 2497 * with, if any; 0 otherwise 2498 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2499 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2500 * fw_on_ctlr_branch -- branch # of fw on ctlr 2501 * fw_on_ctlr_build -- build # of fw on ctlr 2502 * init_connect_result -- result bitmap of fw response 2503 * Return value: 0 -- success 2504 * non-zero-- failure 2505 */ 2506 static int 2507 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2508 uint32_t set_features, uint16_t current_fw_srl, 2509 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2510 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2511 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2512 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2513 { 2514 struct twa_request *tr; 2515 struct twa_command_init_connect *init_connect; 2516 int error = 1; 2517 2518 /* Get a request packet. */ 2519 if ((tr = twa_get_request(sc, 0)) == NULL) 2520 goto out; 2521 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2522 /* Build the cmd pkt. */ 2523 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2524 2525 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2526 2527 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2528 init_connect->request_id = tr->tr_request_id; 2529 init_connect->message_credits = message_credits; 2530 init_connect->features = set_features; 2531 if (TWA_64BIT_ADDRESSES) 2532 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2533 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2534 /* 2535 * Fill in the extra fields needed for 2536 * an extended init_connect. 2537 */ 2538 init_connect->size = 6; 2539 init_connect->fw_srl = current_fw_srl; 2540 init_connect->fw_arch_id = current_fw_arch_id; 2541 init_connect->fw_branch = current_fw_branch; 2542 } else 2543 init_connect->size = 3; 2544 2545 /* Submit the command, and wait for it to complete. */ 2546 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2547 if (error == ETIMEDOUT) 2548 return(error); /* clean-up done by twa_immediate_request */ 2549 if (error) 2550 goto out; 2551 if ((error = init_connect->status)) { 2552 /* twa_drain_complete_queue will have done the unmapping */ 2553 goto out; 2554 } 2555 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2556 *fw_on_ctlr_srl = init_connect->fw_srl; 2557 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2558 *fw_on_ctlr_branch = init_connect->fw_branch; 2559 *fw_on_ctlr_build = init_connect->fw_build; 2560 *init_connect_result = init_connect->result; 2561 } 2562 twa_release_request(tr); 2563 return(error); 2564 2565 out: 2566 if (tr) 2567 twa_release_request(tr); 2568 return(error); 2569 } 2570 2571 static int 2572 twa_reset(struct twa_softc *sc) 2573 { 2574 int s; 2575 int error = 0; 2576 2577 /* Set the 'in reset' flag. */ 2578 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2579 2580 /* 2581 * Disable interrupts from the controller, and mask any 2582 * accidental entry into our interrupt handler. 2583 */ 2584 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2585 TWA_CONTROL_DISABLE_INTERRUPTS); 2586 2587 s = splbio(); 2588 2589 /* Soft reset the controller. */ 2590 if ((error = twa_soft_reset(sc))) 2591 goto out; 2592 2593 /* Re-establish logical connection with the controller. */ 2594 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2595 0, 0, 0, 0, 0, 2596 NULL, NULL, NULL, NULL, NULL))) { 2597 goto out; 2598 } 2599 /* 2600 * Complete all requests in the complete queue; error back all requests 2601 * in the busy queue. Any internal requests will be simply freed. 2602 * Re-submit any requests in the pending queue. 2603 */ 2604 twa_drain_busy_queue(sc); 2605 2606 out: 2607 splx(s); 2608 /* 2609 * Enable interrupts, and also clear attention and response interrupts. 2610 */ 2611 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2612 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2613 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2614 TWA_CONTROL_ENABLE_INTERRUPTS); 2615 2616 /* Clear the 'in reset' flag. */ 2617 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2618 2619 return(error); 2620 } 2621 2622 static int 2623 twa_soft_reset(struct twa_softc *sc) 2624 { 2625 uint32_t status_reg; 2626 2627 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2628 TWA_CONTROL_ISSUE_SOFT_RESET | 2629 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2630 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2631 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2632 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2633 TWA_CONTROL_DISABLE_INTERRUPTS); 2634 2635 if (twa_drain_response_queue_large(sc, 30) != 0) { 2636 aprint_error_dev(sc->twa_dv, 2637 "response queue not empty after reset.\n"); 2638 return(1); 2639 } 2640 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2641 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2642 aprint_error_dev(sc->twa_dv, 2643 "no attention interrupt after reset.\n"); 2644 return(1); 2645 } 2646 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2647 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2648 2649 if (twa_drain_response_queue(sc)) { 2650 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n"); 2651 return(1); 2652 } 2653 if (twa_drain_aen_queue(sc)) { 2654 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n"); 2655 return(1); 2656 } 2657 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2658 aprint_error_dev(sc->twa_dv, 2659 "reset not reported by controller.\n"); 2660 return(1); 2661 } 2662 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2663 if (TWA_STATUS_ERRORS(status_reg) || 2664 twa_check_ctlr_state(sc, status_reg)) { 2665 aprint_error_dev(sc->twa_dv, "controller errors detected.\n"); 2666 return(1); 2667 } 2668 return(0); 2669 } 2670 2671 static int 2672 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2673 { 2674 struct timeval t1; 2675 time_t end_time; 2676 uint32_t status_reg; 2677 2678 timeout = (timeout * 1000 * 100); 2679 2680 microtime(&t1); 2681 2682 end_time = t1.tv_usec + timeout; 2683 2684 do { 2685 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2686 /* got the required bit(s)? */ 2687 if ((status_reg & status) == status) 2688 return(0); 2689 DELAY(100000); 2690 microtime(&t1); 2691 } while (t1.tv_usec <= end_time); 2692 2693 return(1); 2694 } 2695 2696 static int 2697 twa_fetch_aen(struct twa_softc *sc) 2698 { 2699 struct twa_request *tr; 2700 int s, error = 0; 2701 2702 s = splbio(); 2703 2704 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2705 splx(s); 2706 return(EIO); 2707 } 2708 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2709 tr->tr_callback = twa_aen_callback; 2710 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2711 if (twa_request_sense(tr, 0) != 0) { 2712 if (tr->tr_data) 2713 free(tr->tr_data, M_DEVBUF); 2714 twa_release_request(tr); 2715 error = 1; 2716 } 2717 splx(s); 2718 2719 return(error); 2720 } 2721 2722 /* 2723 * Function name: twa_aen_callback 2724 * Description: Callback for requests to fetch AEN's. 2725 * 2726 * Input: tr -- ptr to completed request pkt 2727 * Output: None 2728 * Return value: None 2729 */ 2730 static void 2731 twa_aen_callback(struct twa_request *tr) 2732 { 2733 int i; 2734 int fetch_more_aens = 0; 2735 struct twa_softc *sc = tr->tr_sc; 2736 struct twa_command_header *cmd_hdr = 2737 (struct twa_command_header *)(tr->tr_data); 2738 struct twa_command_9k *cmd = 2739 &(tr->tr_command->command.cmd_pkt_9k); 2740 2741 if (! cmd->status) { 2742 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2743 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2744 if (twa_enqueue_aen(sc, cmd_hdr) 2745 != TWA_AEN_QUEUE_EMPTY) 2746 fetch_more_aens = 1; 2747 } else { 2748 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2749 for (i = 0; i < 18; i++) 2750 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2751 2752 printf(""); /* print new line */ 2753 2754 for (i = 0; i < 128; i++) 2755 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2756 } 2757 if (tr->tr_data) 2758 free(tr->tr_data, M_DEVBUF); 2759 twa_release_request(tr); 2760 2761 if (fetch_more_aens) 2762 twa_fetch_aen(sc); 2763 } 2764 2765 /* 2766 * Function name: twa_enqueue_aen 2767 * Description: Queues AEN's to be supplied to user-space tools on request. 2768 * 2769 * Input: sc -- ptr to per ctlr structure 2770 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2771 * details can be retrieved. 2772 * Output: None 2773 * Return value: None 2774 */ 2775 static uint16_t 2776 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2777 { 2778 int rv __diagused, s; 2779 struct tw_cl_event_packet *event; 2780 uint16_t aen_code; 2781 unsigned long sync_time; 2782 2783 s = splbio(); 2784 aen_code = cmd_hdr->status_block.error; 2785 2786 switch (aen_code) { 2787 case TWA_AEN_SYNC_TIME_WITH_HOST: 2788 2789 sync_time = (time_second - (3 * 86400)) % 604800; 2790 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2791 TWA_PARAM_TIME_SchedulerTime, 4, 2792 &sync_time, twa_aen_callback); 2793 #ifdef DIAGNOSTIC 2794 if (rv != 0) 2795 aprint_error_dev(sc->twa_dv, 2796 "unable to sync time with ctlr\n"); 2797 #endif 2798 break; 2799 2800 case TWA_AEN_QUEUE_EMPTY: 2801 break; 2802 2803 default: 2804 /* Queue the event. */ 2805 event = sc->twa_aen_queue[sc->twa_aen_head]; 2806 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2807 sc->twa_aen_queue_overflow = TRUE; 2808 event->severity = 2809 cmd_hdr->status_block.substatus_block.severity; 2810 event->time_stamp_sec = time_second; 2811 event->aen_code = aen_code; 2812 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2813 event->sequence_id = ++(sc->twa_current_sequence_id); 2814 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2815 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2816 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2817 event->parameter_len); 2818 2819 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2820 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2821 device_xname(sc->twa_dv), 2822 aen_code, 2823 twa_aen_severity_table[event->severity], 2824 twa_find_msg_string(twa_aen_table, aen_code), 2825 event->parameter_data); 2826 } 2827 2828 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2829 sc->twa_aen_queue_wrapped = TRUE; 2830 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2831 break; 2832 } /* switch */ 2833 splx(s); 2834 2835 return (aen_code); 2836 } 2837 2838 /* 2839 * Function name: twa_find_aen 2840 * Description: Reports whether a given AEN ever occurred. 2841 * 2842 * Input: sc -- ptr to per ctlr structure 2843 * aen_code-- AEN to look for 2844 * Output: None 2845 * Return value: 0 -- success 2846 * non-zero-- failure 2847 */ 2848 static int 2849 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2850 { 2851 uint32_t last_index; 2852 int s; 2853 int i; 2854 2855 s = splbio(); 2856 2857 if (sc->twa_aen_queue_wrapped) 2858 last_index = sc->twa_aen_head; 2859 else 2860 last_index = 0; 2861 2862 i = sc->twa_aen_head; 2863 do { 2864 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2865 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2866 splx(s); 2867 return(0); 2868 } 2869 } while (i != last_index); 2870 2871 splx(s); 2872 return(1); 2873 } 2874 2875 static inline void 2876 twa_request_init(struct twa_request *tr, int flags) 2877 { 2878 tr->tr_data = NULL; 2879 tr->tr_real_data = NULL; 2880 tr->tr_length = 0; 2881 tr->tr_real_length = 0; 2882 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2883 tr->tr_flags = flags; 2884 tr->tr_error = 0; 2885 tr->tr_callback = NULL; 2886 tr->tr_cmd_pkt_type = 0; 2887 tr->bp = 0; 2888 2889 /* 2890 * Look at the status field in the command packet to see how 2891 * it completed the last time it was used, and zero out only 2892 * the portions that might have changed. Note that we don't 2893 * care to zero out the sglist. 2894 */ 2895 if (tr->tr_command->command.cmd_pkt_9k.status) 2896 memset(tr->tr_command, 0, 2897 sizeof(struct twa_command_header) + 28); 2898 else 2899 memset(&(tr->tr_command->command), 0, 28); 2900 } 2901 2902 struct twa_request * 2903 twa_get_request_wait(struct twa_softc *sc, int flags) 2904 { 2905 struct twa_request *tr; 2906 int s; 2907 2908 KASSERT((flags & TWA_CMD_AEN) == 0); 2909 2910 s = splbio(); 2911 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2912 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2913 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2914 } 2915 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2916 2917 splx(s); 2918 2919 twa_request_init(tr, flags); 2920 2921 return(tr); 2922 } 2923 2924 struct twa_request * 2925 twa_get_request(struct twa_softc *sc, int flags) 2926 { 2927 int s; 2928 struct twa_request *tr; 2929 2930 /* Get a free request packet. */ 2931 s = splbio(); 2932 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2933 2934 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2935 tr = sc->sc_twa_request; 2936 flags |= TWA_CMD_AEN_BUSY; 2937 } else { 2938 splx(s); 2939 return (NULL); 2940 } 2941 } else { 2942 if (__predict_false((tr = 2943 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2944 splx(s); 2945 return (NULL); 2946 } 2947 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2948 } 2949 splx(s); 2950 2951 twa_request_init(tr, flags); 2952 2953 return(tr); 2954 } 2955 2956 /* 2957 * Print some information about the controller 2958 */ 2959 static void 2960 twa_describe_controller(struct twa_softc *sc) 2961 { 2962 struct twa_param_9k *p[10]; 2963 int i, rv = 0; 2964 uint32_t dsize; 2965 uint8_t ports; 2966 2967 memset(p, 0, sizeof(p)); 2968 2969 /* Get the port count. */ 2970 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2971 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2972 2973 /* get version strings */ 2974 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2975 16, NULL, &p[1]); 2976 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2977 16, NULL, &p[2]); 2978 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2979 16, NULL, &p[3]); 2980 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2981 8, NULL, &p[4]); 2982 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2983 8, NULL, &p[5]); 2984 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2985 8, NULL, &p[6]); 2986 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2987 16, NULL, &p[7]); 2988 2989 if (rv) { 2990 /* some error occurred */ 2991 aprint_error_dev(sc->twa_dv, 2992 "failed to fetch version information\n"); 2993 goto bail; 2994 } 2995 2996 ports = *(uint8_t *)(p[0]->data); 2997 2998 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 2999 ports, p[1]->data, p[2]->data); 3000 3001 aprint_verbose_dev(sc->twa_dv, 3002 "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 3003 p[3]->data, p[4]->data, 3004 p[5]->data, p[6]->data); 3005 3006 for (i = 0; i < ports; i++) { 3007 3008 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 3009 continue; 3010 3011 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3012 TWA_PARAM_DRIVEMODELINDEX, 3013 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3014 3015 if (rv != 0) { 3016 aprint_error_dev(sc->twa_dv, 3017 "unable to get drive model for port %d\n", i); 3018 continue; 3019 } 3020 3021 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3022 TWA_PARAM_DRIVESIZEINDEX, 3023 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3024 3025 if (rv != 0) { 3026 aprint_error_dev(sc->twa_dv, "unable to get drive size" 3027 " for port %d\n", i); 3028 free(p[8], M_DEVBUF); 3029 continue; 3030 } 3031 3032 dsize = *(uint32_t *)(p[9]->data); 3033 3034 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n", 3035 i, p[8]->data, dsize / 2048); 3036 3037 if (p[8]) 3038 free(p[8], M_DEVBUF); 3039 if (p[9]) 3040 free(p[9], M_DEVBUF); 3041 } 3042 bail: 3043 if (p[0]) 3044 free(p[0], M_DEVBUF); 3045 if (p[1]) 3046 free(p[1], M_DEVBUF); 3047 if (p[2]) 3048 free(p[2], M_DEVBUF); 3049 if (p[3]) 3050 free(p[3], M_DEVBUF); 3051 if (p[4]) 3052 free(p[4], M_DEVBUF); 3053 if (p[5]) 3054 free(p[5], M_DEVBUF); 3055 if (p[6]) 3056 free(p[6], M_DEVBUF); 3057 } 3058 3059 /* 3060 * Function name: twa_check_ctlr_state 3061 * Description: Makes sure that the fw status register reports a 3062 * proper status. 3063 * 3064 * Input: sc -- ptr to per ctlr structure 3065 * status_reg -- value in the status register 3066 * Output: None 3067 * Return value: 0 -- no errors 3068 * non-zero-- errors 3069 */ 3070 static int 3071 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3072 { 3073 int result = 0; 3074 struct timeval t1; 3075 static time_t last_warning[2] = {0, 0}; 3076 3077 /* Check if the 'micro-controller ready' bit is not set. */ 3078 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3079 TWA_STATUS_EXPECTED_BITS) { 3080 3081 microtime(&t1); 3082 3083 last_warning[0] += (5 * 1000 * 100); 3084 3085 if (t1.tv_usec > last_warning[0]) { 3086 microtime(&t1); 3087 last_warning[0] = t1.tv_usec; 3088 } 3089 result = 1; 3090 } 3091 3092 /* Check if any error bits are set. */ 3093 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3094 3095 microtime(&t1); 3096 last_warning[1] += (5 * 1000 * 100); 3097 if (t1.tv_usec > last_warning[1]) { 3098 microtime(&t1); 3099 last_warning[1] = t1.tv_usec; 3100 } 3101 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3102 aprint_error_dev(sc->twa_dv, "clearing PCI parity " 3103 "error re-seat/move/replace card.\n"); 3104 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3105 TWA_CONTROL_CLEAR_PARITY_ERROR); 3106 pci_conf_write(sc->pc, sc->tag, 3107 PCI_COMMAND_STATUS_REG, 3108 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3109 } 3110 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3111 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n"); 3112 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3113 TWA_CONTROL_CLEAR_PCI_ABORT); 3114 pci_conf_write(sc->pc, sc->tag, 3115 PCI_COMMAND_STATUS_REG, 3116 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3117 } 3118 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3119 /* 3120 * As documented by 3ware, the 9650 erroneously 3121 * flags queue errors during resets. 3122 * Just ignore them during the reset instead of 3123 * bothering the console. 3124 */ 3125 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3126 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3127 aprint_error_dev(sc->twa_dv, 3128 "clearing controller queue error\n"); 3129 } 3130 3131 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3132 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3133 } 3134 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3135 aprint_error_dev(sc->twa_dv, 3136 "micro-controller error\n"); 3137 result = 1; 3138 } 3139 } 3140 return(result); 3141 } 3142
Indexes created Wed Sep 24 15:09:51 GMT 2025