twa.c revision 1.57
1 /* $NetBSD: twa.c,v 1.57 2018/12/09 11:14:02 jdolecek Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.57 2018/12/09 11:14:02 jdolecek Exp $"); 71 72 //#define TWA_DEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/device.h> 78 #include <sys/queue.h> 79 #include <sys/proc.h> 80 #include <sys/bswap.h> 81 #include <sys/buf.h> 82 #include <sys/bufq.h> 83 #include <sys/endian.h> 84 #include <sys/malloc.h> 85 #include <sys/conf.h> 86 #include <sys/disk.h> 87 #include <sys/sysctl.h> 88 #include <sys/syslog.h> 89 #include <sys/module.h> 90 #include <sys/bus.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 #include <dev/pci/twareg.h> 96 #include <dev/pci/twavar.h> 97 #include <dev/pci/twaio.h> 98 99 #include <dev/scsipi/scsipi_all.h> 100 #include <dev/scsipi/scsipi_disk.h> 101 #include <dev/scsipi/scsipiconf.h> 102 #include <dev/scsipi/scsi_spc.h> 103 104 #include <dev/ldvar.h> 105 106 #include "locators.h" 107 #include "ioconf.h" 108 109 #define PCI_CBIO 0x10 110 111 static int twa_fetch_aen(struct twa_softc *); 112 static void twa_aen_callback(struct twa_request *); 113 static int twa_find_aen(struct twa_softc *sc, uint16_t); 114 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 115 struct twa_command_header *); 116 117 static void twa_attach(device_t, device_t, void *); 118 static int twa_request_bus_scan(device_t, const char *, const int *); 119 static void twa_shutdown(void *); 120 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 121 uint16_t, uint16_t, uint16_t, uint16_t, 122 uint16_t *, uint16_t *, uint16_t *, 123 uint16_t *, uint32_t *); 124 static int twa_intr(void *); 125 static int twa_match(device_t, cfdata_t, void *); 126 static int twa_reset(struct twa_softc *); 127 128 static int twa_print(void *, const char *); 129 static int twa_soft_reset(struct twa_softc *); 130 131 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 132 static int twa_get_param(struct twa_softc *, int, int, size_t, 133 void (* callback)(struct twa_request *), 134 struct twa_param_9k **); 135 static int twa_set_param(struct twa_softc *, int, int, int, void *, 136 void (* callback)(struct twa_request *)); 137 static void twa_describe_controller(struct twa_softc *); 138 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 139 static int twa_done(struct twa_softc *); 140 141 extern struct cfdriver twa_cd; 142 extern uint32_t twa_fw_img_size; 143 extern uint8_t twa_fw_img[]; 144 145 CFATTACH_DECL3_NEW(twa, sizeof(struct twa_softc), 146 twa_match, twa_attach, NULL, NULL, twa_request_bus_scan, NULL, 0); 147 148 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 149 const char twaver[] = "1.50.01.002"; 150 151 /* AEN messages. */ 152 static const struct twa_message twa_aen_table[] = { 153 {0x0000, "AEN queue empty"}, 154 {0x0001, "Controller reset occurred"}, 155 {0x0002, "Degraded unit detected"}, 156 {0x0003, "Controller error occured"}, 157 {0x0004, "Background rebuild failed"}, 158 {0x0005, "Background rebuild done"}, 159 {0x0006, "Incomplete unit detected"}, 160 {0x0007, "Background initialize done"}, 161 {0x0008, "Unclean shutdown detected"}, 162 {0x0009, "Drive timeout detected"}, 163 {0x000A, "Drive error detected"}, 164 {0x000B, "Rebuild started"}, 165 {0x000C, "Background initialize started"}, 166 {0x000D, "Entire logical unit was deleted"}, 167 {0x000E, "Background initialize failed"}, 168 {0x000F, "SMART attribute exceeded threshold"}, 169 {0x0010, "Power supply reported AC under range"}, 170 {0x0011, "Power supply reported DC out of range"}, 171 {0x0012, "Power supply reported a malfunction"}, 172 {0x0013, "Power supply predicted malfunction"}, 173 {0x0014, "Battery charge is below threshold"}, 174 {0x0015, "Fan speed is below threshold"}, 175 {0x0016, "Temperature sensor is above threshold"}, 176 {0x0017, "Power supply was removed"}, 177 {0x0018, "Power supply was inserted"}, 178 {0x0019, "Drive was removed from a bay"}, 179 {0x001A, "Drive was inserted into a bay"}, 180 {0x001B, "Drive bay cover door was opened"}, 181 {0x001C, "Drive bay cover door was closed"}, 182 {0x001D, "Product case was opened"}, 183 {0x0020, "Prepare for shutdown (power-off)"}, 184 {0x0021, "Downgrade UDMA mode to lower speed"}, 185 {0x0022, "Upgrade UDMA mode to higher speed"}, 186 {0x0023, "Sector repair completed"}, 187 {0x0024, "Sbuf memory test failed"}, 188 {0x0025, "Error flushing cached write data to disk"}, 189 {0x0026, "Drive reported data ECC error"}, 190 {0x0027, "DCB has checksum error"}, 191 {0x0028, "DCB version is unsupported"}, 192 {0x0029, "Background verify started"}, 193 {0x002A, "Background verify failed"}, 194 {0x002B, "Background verify done"}, 195 {0x002C, "Bad sector overwritten during rebuild"}, 196 {0x002D, "Source drive error occurred"}, 197 {0x002E, "Replace failed because replacement drive too small"}, 198 {0x002F, "Verify failed because array was never initialized"}, 199 {0x0030, "Unsupported ATA drive"}, 200 {0x0031, "Synchronize host/controller time"}, 201 {0x0032, "Spare capacity is inadequate for some units"}, 202 {0x0033, "Background migration started"}, 203 {0x0034, "Background migration failed"}, 204 {0x0035, "Background migration done"}, 205 {0x0036, "Verify detected and fixed data/parity mismatch"}, 206 {0x0037, "SO-DIMM incompatible"}, 207 {0x0038, "SO-DIMM not detected"}, 208 {0x0039, "Corrected Sbuf ECC error"}, 209 {0x003A, "Drive power on reset detected"}, 210 {0x003B, "Background rebuild paused"}, 211 {0x003C, "Background initialize paused"}, 212 {0x003D, "Background verify paused"}, 213 {0x003E, "Background migration paused"}, 214 {0x003F, "Corrupt flash file system detected"}, 215 {0x0040, "Flash file system repaired"}, 216 {0x0041, "Unit number assignments were lost"}, 217 {0x0042, "Error during read of primary DCB"}, 218 {0x0043, "Latent error found in backup DCB"}, 219 {0x0044, "Battery voltage is normal"}, 220 {0x0045, "Battery voltage is low"}, 221 {0x0046, "Battery voltage is high"}, 222 {0x0047, "Battery voltage is too low"}, 223 {0x0048, "Battery voltage is too high"}, 224 {0x0049, "Battery temperature is normal"}, 225 {0x004A, "Battery temperature is low"}, 226 {0x004B, "Battery temperature is high"}, 227 {0x004C, "Battery temperature is too low"}, 228 {0x004D, "Battery temperature is too high"}, 229 {0x004E, "Battery capacity test started"}, 230 {0x004F, "Cache synchronization skipped"}, 231 {0x0050, "Battery capacity test completed"}, 232 {0x0051, "Battery health check started"}, 233 {0x0052, "Battery health check completed"}, 234 {0x0053, "Battery capacity test needed"}, 235 {0x0054, "Battery charge termination voltage is at high level"}, 236 {0x0055, "Battery charging started"}, 237 {0x0056, "Battery charging completed"}, 238 {0x0057, "Battery charging fault"}, 239 {0x0058, "Battery capacity is below warning level"}, 240 {0x0059, "Battery capacity is below error level"}, 241 {0x005A, "Battery is present"}, 242 {0x005B, "Battery is not present"}, 243 {0x005C, "Battery is weak"}, 244 {0x005D, "Battery health check failed"}, 245 {0x005E, "Cache synchronized after power fail"}, 246 {0x005F, "Cache synchronization failed; some data lost"}, 247 {0x0060, "Bad cache meta data checksum"}, 248 {0x0061, "Bad cache meta data signature"}, 249 {0x0062, "Cache meta data restore failed"}, 250 {0x0063, "BBU not found after power fail"}, 251 {0x00FC, "Recovered/finished array membership update"}, 252 {0x00FD, "Handler lockup"}, 253 {0x00FE, "Retrying PCI transfer"}, 254 {0x00FF, "AEN queue is full"}, 255 {0xFFFFFFFF, NULL} 256 }; 257 258 /* AEN severity table. */ 259 static const char *twa_aen_severity_table[] = { 260 "None", 261 "ERROR", 262 "WARNING", 263 "INFO", 264 "DEBUG", 265 NULL 266 }; 267 268 #if 0 269 /* Error messages. */ 270 static const struct twa_message twa_error_table[] = { 271 {0x0100, "SGL entry contains zero data"}, 272 {0x0101, "Invalid command opcode"}, 273 {0x0102, "SGL entry has unaligned address"}, 274 {0x0103, "SGL size does not match command"}, 275 {0x0104, "SGL entry has illegal length"}, 276 {0x0105, "Command packet is not aligned"}, 277 {0x0106, "Invalid request ID"}, 278 {0x0107, "Duplicate request ID"}, 279 {0x0108, "ID not locked"}, 280 {0x0109, "LBA out of range"}, 281 {0x010A, "Logical unit not supported"}, 282 {0x010B, "Parameter table does not exist"}, 283 {0x010C, "Parameter index does not exist"}, 284 {0x010D, "Invalid field in CDB"}, 285 {0x010E, "Specified port has invalid drive"}, 286 {0x010F, "Parameter item size mismatch"}, 287 {0x0110, "Failed memory allocation"}, 288 {0x0111, "Memory request too large"}, 289 {0x0112, "Out of memory segments"}, 290 {0x0113, "Invalid address to deallocate"}, 291 {0x0114, "Out of memory"}, 292 {0x0115, "Out of heap"}, 293 {0x0120, "Double degrade"}, 294 {0x0121, "Drive not degraded"}, 295 {0x0122, "Reconstruct error"}, 296 {0x0123, "Replace not accepted"}, 297 {0x0124, "Replace drive capacity too small"}, 298 {0x0125, "Sector count not allowed"}, 299 {0x0126, "No spares left"}, 300 {0x0127, "Reconstruct error"}, 301 {0x0128, "Unit is offline"}, 302 {0x0129, "Cannot update status to DCB"}, 303 {0x0130, "Invalid stripe handle"}, 304 {0x0131, "Handle that was not locked"}, 305 {0x0132, "Handle that was not empy"}, 306 {0x0133, "Handle has different owner"}, 307 {0x0140, "IPR has parent"}, 308 {0x0150, "Illegal Pbuf address alignment"}, 309 {0x0151, "Illegal Pbuf transfer length"}, 310 {0x0152, "Illegal Sbuf address alignment"}, 311 {0x0153, "Illegal Sbuf transfer length"}, 312 {0x0160, "Command packet too large"}, 313 {0x0161, "SGL exceeds maximum length"}, 314 {0x0162, "SGL has too many entries"}, 315 {0x0170, "Insufficient resources for rebuilder"}, 316 {0x0171, "Verify error (data != parity)"}, 317 {0x0180, "Requested segment not in directory of this DCB"}, 318 {0x0181, "DCB segment has unsupported version"}, 319 {0x0182, "DCB segment has checksum error"}, 320 {0x0183, "DCB support (settings) segment invalid"}, 321 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 322 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 323 {0x01A0, "Could not clear Sbuf"}, 324 {0x01C0, "Flash identify failed"}, 325 {0x01C1, "Flash out of bounds"}, 326 {0x01C2, "Flash verify error"}, 327 {0x01C3, "Flash file object not found"}, 328 {0x01C4, "Flash file already present"}, 329 {0x01C5, "Flash file system full"}, 330 {0x01C6, "Flash file not present"}, 331 {0x01C7, "Flash file size error"}, 332 {0x01C8, "Bad flash file checksum"}, 333 {0x01CA, "Corrupt flash file system detected"}, 334 {0x01D0, "Invalid field in parameter list"}, 335 {0x01D1, "Parameter list length error"}, 336 {0x01D2, "Parameter item is not changeable"}, 337 {0x01D3, "Parameter item is not saveable"}, 338 {0x0200, "UDMA CRC error"}, 339 {0x0201, "Internal CRC error"}, 340 {0x0202, "Data ECC error"}, 341 {0x0203, "ADP level 1 error"}, 342 {0x0204, "Port timeout"}, 343 {0x0205, "Drive power on reset"}, 344 {0x0206, "ADP level 2 error"}, 345 {0x0207, "Soft reset failed"}, 346 {0x0208, "Drive not ready"}, 347 {0x0209, "Unclassified port error"}, 348 {0x020A, "Drive aborted command"}, 349 {0x0210, "Internal CRC error"}, 350 {0x0211, "Host PCI bus abort"}, 351 {0x0212, "Host PCI parity error"}, 352 {0x0213, "Port handler error"}, 353 {0x0214, "Token interrupt count error"}, 354 {0x0215, "Timeout waiting for PCI transfer"}, 355 {0x0216, "Corrected buffer ECC"}, 356 {0x0217, "Uncorrected buffer ECC"}, 357 {0x0230, "Unsupported command during flash recovery"}, 358 {0x0231, "Next image buffer expected"}, 359 {0x0232, "Binary image architecture incompatible"}, 360 {0x0233, "Binary image has no signature"}, 361 {0x0234, "Binary image has bad checksum"}, 362 {0x0235, "Image downloaded overflowed buffer"}, 363 {0x0240, "I2C device not found"}, 364 {0x0241, "I2C transaction aborted"}, 365 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 366 {0x0243, "SO-DIMM unsupported"}, 367 {0x0248, "SPI transfer status error"}, 368 {0x0249, "SPI transfer timeout error"}, 369 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 370 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 371 {0x0252, "Invalid value in CreateUnit descriptor"}, 372 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 373 {0x0254, "Unable to create data channel for this unit descriptor"}, 374 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 375 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 376 {0x0257, "CreateUnit does not support this descriptor version"}, 377 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 378 {0x0259, "Too many descriptors in CreateUnit"}, 379 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 380 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 381 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 382 {0x0260, "SMART attribute exceeded threshold"}, 383 {0xFFFFFFFF, NULL} 384 }; 385 #endif 386 387 struct twa_pci_identity { 388 uint32_t vendor_id; 389 uint32_t product_id; 390 const char *name; 391 }; 392 393 static const struct twa_pci_identity twa_pci_products[] = { 394 { PCI_VENDOR_3WARE, 395 PCI_PRODUCT_3WARE_9000, 396 "3ware 9000 series", 397 }, 398 { PCI_VENDOR_3WARE, 399 PCI_PRODUCT_3WARE_9550, 400 "3ware 9550SX series", 401 }, 402 { PCI_VENDOR_3WARE, 403 PCI_PRODUCT_3WARE_9650, 404 "3ware 9650SE series", 405 }, 406 { PCI_VENDOR_3WARE, 407 PCI_PRODUCT_3WARE_9690, 408 "3ware 9690 series", 409 }, 410 { 0, 411 0, 412 NULL, 413 }, 414 }; 415 416 417 static inline void 418 twa_outl(struct twa_softc *sc, int off, uint32_t val) 419 { 420 421 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 422 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 423 BUS_SPACE_BARRIER_WRITE); 424 } 425 426 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 427 { 428 429 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 430 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 431 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 432 } 433 434 void 435 twa_request_wait_handler(struct twa_request *tr) 436 { 437 438 wakeup(tr); 439 } 440 441 static const struct twa_pci_identity * 442 twa_lookup(pcireg_t id) 443 { 444 const struct twa_pci_identity *entry; 445 int i; 446 447 for (i = 0; i < __arraycount(twa_pci_products); i++) { 448 entry = &twa_pci_products[i]; 449 if (entry->vendor_id == PCI_VENDOR(id) && 450 entry->product_id == PCI_PRODUCT(id)) { 451 return entry; 452 } 453 } 454 return NULL; 455 } 456 457 static int 458 twa_match(device_t parent, cfdata_t cfdata, void *aux) 459 { 460 struct pci_attach_args *pa = aux; 461 const struct twa_pci_identity *entry; 462 463 entry = twa_lookup(pa->pa_id); 464 if (entry != NULL) { 465 return 1; 466 } 467 return (0); 468 } 469 470 static const char * 471 twa_find_msg_string(const struct twa_message *table, uint16_t code) 472 { 473 int i; 474 475 for (i = 0; table[i].message != NULL; i++) 476 if (table[i].code == code) 477 return(table[i].message); 478 479 return(table[i].message); 480 } 481 482 void 483 twa_release_request(struct twa_request *tr) 484 { 485 int s; 486 struct twa_softc *sc; 487 488 sc = tr->tr_sc; 489 490 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 491 s = splbio(); 492 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 493 splx(s); 494 if (__predict_false((tr->tr_sc->twa_sc_flags & 495 TWA_STATE_REQUEST_WAIT) != 0)) { 496 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 497 wakeup(&sc->twa_free); 498 } 499 } else 500 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 501 } 502 503 static void 504 twa_unmap_request(struct twa_request *tr) 505 { 506 struct twa_softc *sc = tr->tr_sc; 507 uint8_t cmd_status; 508 int s; 509 510 /* If the command involved data, unmap that too. */ 511 if (tr->tr_data != NULL) { 512 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 513 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 514 else 515 cmd_status = 516 tr->tr_command->command.cmd_pkt_7k.generic.status; 517 518 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 519 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 520 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 521 /* 522 * If we are using a bounce buffer, and we are reading 523 * data, copy the real data in. 524 */ 525 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 526 if (cmd_status == 0) 527 memcpy(tr->tr_real_data, tr->tr_data, 528 tr->tr_real_length); 529 } 530 if (tr->tr_flags & TWA_CMD_DATA_IN) 531 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 532 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 533 534 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 535 } 536 537 /* Free alignment buffer if it was used. */ 538 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 539 s = splvm(); 540 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 541 tr->tr_length); 542 splx(s); 543 tr->tr_data = tr->tr_real_data; 544 tr->tr_length = tr->tr_real_length; 545 } 546 } 547 548 /* 549 * Function name: twa_wait_request 550 * Description: Sends down a firmware cmd, and waits for the completion, 551 * but NOT in a tight loop. 552 * 553 * Input: tr -- ptr to request pkt 554 * timeout -- max # of seconds to wait before giving up 555 * Output: None 556 * Return value: 0 -- success 557 * non-zero-- failure 558 */ 559 static int 560 twa_wait_request(struct twa_request *tr, uint32_t timeout) 561 { 562 time_t end_time; 563 struct timeval t1; 564 int s, rv; 565 566 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 567 tr->tr_callback = twa_request_wait_handler; 568 tr->tr_status = TWA_CMD_BUSY; 569 570 rv = twa_map_request(tr); 571 572 if (rv != 0) 573 return (rv); 574 575 microtime(&t1); 576 end_time = t1.tv_usec + 577 (timeout * 1000 * 100); 578 579 while (tr->tr_status != TWA_CMD_COMPLETE) { 580 rv = tr->tr_error; 581 if (rv != 0) 582 return(rv); 583 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 584 break; 585 586 if (rv == EWOULDBLOCK) { 587 /* 588 * We will reset the controller only if the request has 589 * already been submitted, so as to not lose the 590 * request packet. If a busy request timed out, the 591 * reset will take care of freeing resources. If a 592 * pending request timed out, we will free resources 593 * for that request, right here. So, the caller is 594 * expected to NOT cleanup when ETIMEDOUT is returned. 595 */ 596 if (tr->tr_status == TWA_CMD_BUSY) 597 twa_reset(tr->tr_sc); 598 else { 599 /* Request was never submitted. Clean up. */ 600 s = splbio(); 601 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 602 tr_link); 603 splx(s); 604 605 twa_unmap_request(tr); 606 if (tr->tr_data) 607 free(tr->tr_data, M_DEVBUF); 608 609 twa_release_request(tr); 610 } 611 return(ETIMEDOUT); 612 } 613 /* 614 * Either the request got completed, or we were woken up by a 615 * signal. Calculate the new timeout, in case it was the 616 * latter. 617 */ 618 microtime(&t1); 619 620 timeout = (end_time - t1.tv_usec) / (1000 * 100); 621 } 622 return(rv); 623 } 624 625 /* 626 * Function name: twa_immediate_request 627 * Description: Sends down a firmware cmd, and waits for the completion 628 * in a tight loop. 629 * 630 * Input: tr -- ptr to request pkt 631 * timeout -- max # of seconds to wait before giving up 632 * Output: None 633 * Return value: 0 -- success 634 * non-zero-- failure 635 */ 636 static int 637 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 638 { 639 struct timeval t1; 640 int s = 0, rv = 0; 641 642 rv = twa_map_request(tr); 643 644 if (rv != 0) 645 return(rv); 646 647 timeout = (timeout * 10000 * 10); 648 649 microtime(&t1); 650 651 timeout += t1.tv_usec; 652 653 do { 654 rv = tr->tr_error; 655 if (rv != 0) 656 return(rv); 657 s = splbio(); 658 twa_done(tr->tr_sc); 659 splx(s); 660 if (tr->tr_status == TWA_CMD_COMPLETE) 661 return(rv); 662 microtime(&t1); 663 } while (t1.tv_usec <= timeout); 664 665 /* 666 * We will reset the controller only if the request has 667 * already been submitted, so as to not lose the 668 * request packet. If a busy request timed out, the 669 * reset will take care of freeing resources. If a 670 * pending request timed out, we will free resources 671 * for that request, right here. So, the caller is 672 * expected to NOT cleanup when ETIMEDOUT is returned. 673 */ 674 rv = ETIMEDOUT; 675 676 if (tr->tr_status == TWA_CMD_BUSY) 677 twa_reset(tr->tr_sc); 678 else { 679 /* Request was never submitted. Clean up. */ 680 s = splbio(); 681 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 682 splx(s); 683 twa_unmap_request(tr); 684 if (tr->tr_data) 685 free(tr->tr_data, M_DEVBUF); 686 687 twa_release_request(tr); 688 } 689 return (rv); 690 } 691 692 static int 693 twa_inquiry(struct twa_request *tr, int lunid) 694 { 695 int error; 696 struct twa_command_9k *tr_9k_cmd; 697 698 if (tr->tr_data == NULL) 699 return (ENOMEM); 700 701 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 702 703 tr->tr_length = TWA_SECTOR_SIZE; 704 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 705 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 706 707 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 708 709 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 710 tr_9k_cmd->unit = lunid; 711 tr_9k_cmd->request_id = tr->tr_request_id; 712 tr_9k_cmd->status = 0; 713 tr_9k_cmd->sgl_offset = 16; 714 tr_9k_cmd->sgl_entries = 1; 715 /* create the CDB here */ 716 tr_9k_cmd->cdb[0] = INQUIRY; 717 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 718 tr_9k_cmd->cdb[4] = 255; 719 720 /* XXXX setup page data no lun device 721 * it seems 9000 series does not indicate 722 * NOTPRESENT - need more investigation 723 */ 724 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 725 SID_QUAL_LU_NOTPRESENT; 726 727 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 728 if (error != 0) 729 return (error); 730 731 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 732 SID_QUAL_LU_NOTPRESENT) 733 error = 1; 734 735 return (error); 736 } 737 738 static int 739 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 740 { 741 742 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor); 743 744 return (1); 745 } 746 747 748 static uint64_t 749 twa_read_capacity(struct twa_request *tr, int lunid) 750 { 751 int error; 752 struct twa_command_9k *tr_9k_cmd; 753 uint64_t array_size = 0LL; 754 755 if (tr->tr_data == NULL) 756 return (ENOMEM); 757 758 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 759 760 tr->tr_length = TWA_SECTOR_SIZE; 761 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 762 tr->tr_flags |= TWA_CMD_DATA_OUT; 763 764 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 765 766 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 767 tr_9k_cmd->unit = lunid; 768 tr_9k_cmd->request_id = tr->tr_request_id; 769 tr_9k_cmd->status = 0; 770 tr_9k_cmd->sgl_offset = 16; 771 tr_9k_cmd->sgl_entries = 1; 772 /* create the CDB here */ 773 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 774 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 775 776 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 777 778 if (error == 0) { 779 #if BYTE_ORDER == BIG_ENDIAN 780 array_size = bswap64(_8btol( 781 ((struct scsipi_read_capacity_16_data *)tr->tr_data)->addr) + 1); 782 #else 783 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 784 tr->tr_data)->addr) + 1; 785 #endif 786 } 787 return (array_size); 788 } 789 790 static int 791 twa_request_sense(struct twa_request *tr, int lunid) 792 { 793 int error = 1; 794 struct twa_command_9k *tr_9k_cmd; 795 796 if (tr->tr_data == NULL) 797 return (error); 798 799 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 800 801 tr->tr_length = TWA_SECTOR_SIZE; 802 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 803 tr->tr_flags |= TWA_CMD_DATA_OUT; 804 805 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 806 807 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 808 tr_9k_cmd->unit = lunid; 809 tr_9k_cmd->request_id = tr->tr_request_id; 810 tr_9k_cmd->status = 0; 811 tr_9k_cmd->sgl_offset = 16; 812 tr_9k_cmd->sgl_entries = 1; 813 /* create the CDB here */ 814 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 815 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 816 tr_9k_cmd->cdb[4] = 255; 817 818 /*XXX AEN notification called in interrupt context 819 * so just queue the request. Return as quickly 820 * as possible from interrupt 821 */ 822 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 823 error = twa_map_request(tr); 824 else 825 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 826 827 return (error); 828 } 829 830 static int 831 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 832 { 833 struct twa_request *tr; 834 struct twa_command_packet *tc; 835 bus_dma_segment_t seg; 836 size_t max_segs, max_xfer; 837 int i, rv, rseg, size; 838 839 if ((sc->sc_units = malloc(sc->sc_nunits * 840 sizeof(struct twa_drive), M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) 841 return(ENOMEM); 842 843 if ((sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 844 M_DEVBUF, M_NOWAIT)) == NULL) 845 return(ENOMEM); 846 847 size = num_reqs * sizeof(struct twa_command_packet); 848 849 /* Allocate memory for cmd pkts. */ 850 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 851 size, PAGE_SIZE, 0, &seg, 852 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 853 aprint_error_dev(sc->twa_dv, "unable to allocate " 854 "command packets, rv = %d\n", rv); 855 return (ENOMEM); 856 } 857 858 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 859 &seg, rseg, size, (void **)&sc->twa_cmds, 860 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 861 aprint_error_dev(sc->twa_dv, 862 "unable to map commands, rv = %d\n", rv); 863 return (1); 864 } 865 866 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 867 size, num_reqs, size, 868 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 869 aprint_error_dev(sc->twa_dv, 870 "unable to create command DMA map, " 871 "rv = %d\n", rv); 872 return (ENOMEM); 873 } 874 875 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 876 sc->twa_cmds, size, NULL, 877 BUS_DMA_NOWAIT)) != 0) { 878 aprint_error_dev(sc->twa_dv, 879 "unable to load command DMA map, rv = %d\n", rv); 880 return (1); 881 } 882 883 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 884 aprint_error_dev(sc->twa_dv, 885 "DMA map memory not aligned on %d boundary\n", 886 TWA_ALIGNMENT); 887 888 return (1); 889 } 890 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 891 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 892 893 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 894 memset(sc->twa_cmd_pkt_buf, 0, 895 num_reqs * sizeof(struct twa_command_packet)); 896 897 sc->sc_twa_request = sc->twa_req_buf; 898 max_segs = twa_get_maxsegs(); 899 max_xfer = twa_get_maxxfer(max_segs); 900 901 for (i = 0; i < num_reqs; i++, tc++) { 902 tr = &(sc->twa_req_buf[i]); 903 tr->tr_command = tc; 904 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 905 (i * sizeof(struct twa_command_packet)); 906 tr->tr_request_id = i; 907 tr->tr_sc = sc; 908 909 /* 910 * Create a map for data buffers. maxsize (256 * 1024) used in 911 * bus_dma_tag_create above should suffice the bounce page needs 912 * for data buffers, since the max I/O size we support is 128KB. 913 * If we supported I/O's bigger than 256KB, we would have to 914 * create a second dma_tag, with the appropriate maxsize. 915 */ 916 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 917 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 918 &tr->tr_dma_map)) != 0) { 919 aprint_error_dev(sc->twa_dv, 920 "unable to create command DMA map, " 921 "rv = %d\n", rv); 922 return (ENOMEM); 923 } 924 /* Insert request into the free queue. */ 925 if (i != 0) { 926 sc->twa_lookup[i] = tr; 927 twa_release_request(tr); 928 } else 929 tr->tr_flags |= TWA_CMD_AEN; 930 } 931 return(0); 932 } 933 934 static void 935 twa_recompute_openings(struct twa_softc *sc) 936 { 937 struct twa_drive *td; 938 int unit; 939 int openings; 940 uint64_t total_size; 941 942 total_size = 0; 943 for (unit = 0; unit < sc->sc_nunits; unit++) { 944 td = &sc->sc_units[unit]; 945 total_size += td->td_size; 946 } 947 948 for (unit = 0; unit < sc->sc_nunits; unit++) { 949 td = &sc->sc_units[unit]; 950 /* 951 * In theory, TWA_Q_LENGTH - 1 should be usable, but 952 * keep one additional ccb for internal commands. 953 * This makes the controller more reliable under load. 954 */ 955 if (total_size > 0) { 956 openings = (TWA_Q_LENGTH - 2) * td->td_size 957 / total_size; 958 } else 959 openings = 0; 960 961 if (openings == td->td_openings) 962 continue; 963 td->td_openings = openings; 964 965 #ifdef TWA_DEBUG 966 printf("%s: unit %d openings %d\n", 967 device_xname(sc->twa_dv), unit, openings); 968 #endif 969 if (td->td_dev != NULL) 970 (*td->td_callbacks->tcb_openings)(td->td_dev, 971 td->td_openings); 972 } 973 } 974 975 /* ARGSUSED */ 976 static int 977 twa_request_bus_scan(device_t self, const char *attr, const int *flags) 978 { 979 struct twa_softc *sc = device_private(self); 980 struct twa_drive *td; 981 struct twa_request *tr; 982 struct twa_attach_args twaa; 983 int locs[TWACF_NLOCS]; 984 int s, unit; 985 986 s = splbio(); 987 for (unit = 0; unit < sc->sc_nunits; unit++) { 988 989 if ((tr = twa_get_request(sc, 0)) == NULL) { 990 splx(s); 991 return (EIO); 992 } 993 994 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 995 996 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 997 998 if (tr->tr_data == NULL) { 999 twa_release_request(tr); 1000 splx(s); 1001 return (ENOMEM); 1002 } 1003 td = &sc->sc_units[unit]; 1004 1005 if (twa_inquiry(tr, unit) == 0) { 1006 if (td->td_dev == NULL) { 1007 twa_print_inquiry_data(sc, 1008 ((struct scsipi_inquiry_data *)tr->tr_data)); 1009 1010 sc->sc_units[unit].td_size = 1011 twa_read_capacity(tr, unit); 1012 1013 twaa.twaa_unit = unit; 1014 1015 twa_recompute_openings(sc); 1016 1017 locs[TWACF_UNIT] = unit; 1018 1019 sc->sc_units[unit].td_dev = 1020 config_found_sm_loc(sc->twa_dv, attr, 1021 locs, &twaa, twa_print, config_stdsubmatch); 1022 } 1023 } else { 1024 if (td->td_dev != NULL) { 1025 (void) config_detach(td->td_dev, DETACH_FORCE); 1026 td->td_dev = NULL; 1027 td->td_size = 0; 1028 1029 twa_recompute_openings(sc); 1030 } 1031 } 1032 free(tr->tr_data, M_DEVBUF); 1033 1034 twa_release_request(tr); 1035 } 1036 splx(s); 1037 1038 return (0); 1039 } 1040 1041 1042 #ifdef DIAGNOSTIC 1043 static inline void 1044 twa_check_busy_q(struct twa_request *tr) 1045 { 1046 struct twa_request *rq; 1047 struct twa_softc *sc = tr->tr_sc; 1048 1049 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1050 if (tr->tr_request_id == rq->tr_request_id) { 1051 panic("cannot submit same request more than once"); 1052 } else if (tr->bp == rq->bp && tr->bp != 0) { 1053 /* XXX A check for 0 for the buf ptr is needed to 1054 * guard against ioctl requests with a buf ptr of 1055 * 0 and also aen notifications. Looking for 1056 * external cmds only. 1057 */ 1058 panic("cannot submit same buf more than once"); 1059 } else { 1060 /* Empty else statement */ 1061 } 1062 } 1063 } 1064 #endif 1065 1066 static int 1067 twa_start(struct twa_request *tr) 1068 { 1069 struct twa_softc *sc = tr->tr_sc; 1070 uint32_t status_reg; 1071 int s; 1072 int error; 1073 1074 s = splbio(); 1075 1076 /* 1077 * The 9650 and 9690 have a bug in the detection of the full queue 1078 * condition. 1079 * 1080 * If a write operation has filled the queue and is directly followed 1081 * by a status read, it sometimes doesn't return the correct result. 1082 * To work around this, the upper 32bit are written first. 1083 * This effectively serialises the hardware, but does not change 1084 * the state of the queue. 1085 */ 1086 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1087 /* Write lower 32 bits of address */ 1088 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1089 sizeof(struct twa_command_header)); 1090 } 1091 1092 /* Check to see if we can post a command. */ 1093 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1094 if ((error = twa_check_ctlr_state(sc, status_reg))) 1095 goto out; 1096 1097 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1098 if (tr->tr_status != TWA_CMD_PENDING) { 1099 tr->tr_status = TWA_CMD_PENDING; 1100 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1101 tr, tr_link); 1102 } 1103 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1104 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1105 error = EBUSY; 1106 } else { 1107 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1108 (char *)tr->tr_command - (char *)sc->twa_cmds, 1109 sizeof(struct twa_command_packet), 1110 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1111 1112 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1113 /* 1114 * Cmd queue is not full. Post the command 1115 * by writing upper 32 bits of address. 1116 */ 1117 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1118 sizeof(struct twa_command_header)); 1119 } else { 1120 /* Cmd queue is not full. Post the command. */ 1121 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1122 sizeof(struct twa_command_header)); 1123 } 1124 1125 /* Mark the request as currently being processed. */ 1126 tr->tr_status = TWA_CMD_BUSY; 1127 1128 #ifdef DIAGNOSTIC 1129 twa_check_busy_q(tr); 1130 #endif 1131 1132 /* Move the request into the busy queue. */ 1133 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1134 } 1135 out: 1136 splx(s); 1137 return(error); 1138 } 1139 1140 static int 1141 twa_drain_response_queue(struct twa_softc *sc) 1142 { 1143 uint32_t status_reg; 1144 1145 for (;;) { 1146 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1147 if (twa_check_ctlr_state(sc, status_reg)) 1148 return(1); 1149 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1150 return(0); /* no more response queue entries */ 1151 (void)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1152 } 1153 } 1154 1155 /* 1156 * twa_drain_response_queue_large: 1157 * 1158 * specific to the 9550 and 9650 controller to remove requests. 1159 * 1160 * Removes all requests from "large" response queue on the 9550 controller. 1161 * This procedure is called as part of the 9550 controller reset sequence. 1162 */ 1163 static int 1164 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1165 { 1166 uint32_t start_time = 0, end_time; 1167 uint32_t response = 0; 1168 1169 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1170 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1171 start_time = 0; 1172 end_time = (timeout * TWA_MICROSECOND); 1173 1174 while ((response & 1175 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1176 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1177 if (start_time >= end_time) 1178 return (1); 1179 DELAY(1); 1180 start_time++; 1181 } 1182 /* P-chip delay */ 1183 DELAY(500000); 1184 } 1185 return (0); 1186 } 1187 1188 static void 1189 twa_drain_busy_queue(struct twa_softc *sc) 1190 { 1191 struct twa_request *tr; 1192 1193 /* Walk the busy queue. */ 1194 1195 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1196 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1197 1198 twa_unmap_request(tr); 1199 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1200 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1201 /* It's an internal/ioctl request. Simply free it. */ 1202 if (tr->tr_data) 1203 free(tr->tr_data, M_DEVBUF); 1204 twa_release_request(tr); 1205 } else { 1206 /* It's a SCSI request. Complete it. */ 1207 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1208 if (tr->tr_callback) 1209 tr->tr_callback(tr); 1210 } 1211 } 1212 } 1213 1214 static int 1215 twa_drain_pending_queue(struct twa_softc *sc) 1216 { 1217 struct twa_request *tr; 1218 int s, error = 0; 1219 1220 /* 1221 * Pull requests off the pending queue, and submit them. 1222 */ 1223 s = splbio(); 1224 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1225 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1226 1227 if ((error = twa_start(tr))) { 1228 if (error == EBUSY) { 1229 tr->tr_status = TWA_CMD_PENDING; 1230 1231 /* queue at the head */ 1232 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1233 tr, tr_link); 1234 error = 0; 1235 break; 1236 } else { 1237 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1238 tr->tr_error = error; 1239 tr->tr_callback(tr); 1240 error = EIO; 1241 } 1242 } 1243 } 1244 } 1245 splx(s); 1246 1247 return(error); 1248 } 1249 1250 static int 1251 twa_drain_aen_queue(struct twa_softc *sc) 1252 { 1253 int s, error = 0; 1254 struct twa_request *tr; 1255 struct twa_command_header *cmd_hdr; 1256 struct timeval t1; 1257 uint32_t timeout; 1258 1259 for (;;) { 1260 if ((tr = twa_get_request(sc, 0)) == NULL) { 1261 error = EIO; 1262 break; 1263 } 1264 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1265 tr->tr_callback = NULL; 1266 1267 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1268 1269 if (tr->tr_data == NULL) { 1270 error = 1; 1271 goto out; 1272 } 1273 1274 if (twa_request_sense(tr, 0) != 0) { 1275 error = 1; 1276 break; 1277 } 1278 1279 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1280 1281 microtime(&t1); 1282 1283 timeout += t1.tv_usec; 1284 1285 do { 1286 s = splbio(); 1287 twa_done(tr->tr_sc); 1288 splx(s); 1289 if (tr->tr_status != TWA_CMD_BUSY) 1290 break; 1291 microtime(&t1); 1292 } while (t1.tv_usec <= timeout); 1293 1294 if (tr->tr_status != TWA_CMD_COMPLETE) { 1295 error = ETIMEDOUT; 1296 break; 1297 } 1298 1299 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1300 break; 1301 1302 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1303 if ((cmd_hdr->status_block.error) /* aen_code */ 1304 == TWA_AEN_QUEUE_EMPTY) 1305 break; 1306 (void)twa_enqueue_aen(sc, cmd_hdr); 1307 1308 free(tr->tr_data, M_DEVBUF); 1309 twa_release_request(tr); 1310 } 1311 out: 1312 if (tr) { 1313 if (tr->tr_data) 1314 free(tr->tr_data, M_DEVBUF); 1315 1316 twa_release_request(tr); 1317 } 1318 return(error); 1319 } 1320 1321 1322 #if 0 1323 static void 1324 twa_check_response_q(struct twa_request *tr, int clear) 1325 { 1326 int j; 1327 static int i = 0; 1328 static struct twa_request *req = 0; 1329 static struct buf *hist[255]; 1330 1331 1332 if (clear) { 1333 i = 0; 1334 for (j = 0; j < 255; j++) 1335 hist[j] = 0; 1336 return; 1337 } 1338 1339 if (req == 0) 1340 req = tr; 1341 1342 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1343 /* XXX this is bogus ! req can't be anything else but tr ! */ 1344 if (req->tr_request_id == tr->tr_request_id) 1345 panic("req id: %d on controller queue twice", 1346 tr->tr_request_id); 1347 1348 for (j = 0; j < i; j++) 1349 if (tr->bp == hist[j]) 1350 panic("req id: %d buf found twice", 1351 tr->tr_request_id); 1352 } 1353 req = tr; 1354 1355 hist[i++] = req->bp; 1356 } 1357 #endif 1358 1359 static int 1360 twa_done(struct twa_softc *sc) 1361 { 1362 union twa_response_queue rq; 1363 struct twa_request *tr; 1364 int rv = 0; 1365 uint32_t status_reg; 1366 1367 for (;;) { 1368 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1369 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1370 break; 1371 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1372 break; 1373 /* Response queue is not empty. */ 1374 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1375 tr = sc->sc_twa_request + rq.u.response_id; 1376 #if 0 1377 twa_check_response_q(tr, 0); 1378 #endif 1379 /* Unmap the command packet, and any associated data buffer. */ 1380 twa_unmap_request(tr); 1381 1382 tr->tr_status = TWA_CMD_COMPLETE; 1383 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1384 1385 if (tr->tr_callback) 1386 tr->tr_callback(tr); 1387 } 1388 (void)twa_drain_pending_queue(sc); 1389 1390 #if 0 1391 twa_check_response_q(NULL, 1); 1392 #endif 1393 return(rv); 1394 } 1395 1396 /* 1397 * Function name: twa_init_ctlr 1398 * Description: Establishes a logical connection with the controller. 1399 * If bundled with firmware, determines whether or not 1400 * the driver is compatible with the firmware on the 1401 * controller, before proceeding to work with it. 1402 * 1403 * Input: sc -- ptr to per ctlr structure 1404 * Output: None 1405 * Return value: 0 -- success 1406 * non-zero-- failure 1407 */ 1408 static int 1409 twa_init_ctlr(struct twa_softc *sc) 1410 { 1411 uint16_t fw_on_ctlr_srl = 0; 1412 uint16_t fw_on_ctlr_arch_id = 0; 1413 uint16_t fw_on_ctlr_branch = 0; 1414 uint16_t fw_on_ctlr_build = 0; 1415 uint32_t init_connect_result = 0; 1416 int error = 0; 1417 1418 /* Wait for the controller to become ready. */ 1419 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1420 TWA_REQUEST_TIMEOUT_PERIOD)) { 1421 return(ENXIO); 1422 } 1423 /* Drain the response queue. */ 1424 if (twa_drain_response_queue(sc)) 1425 return(1); 1426 1427 /* Establish a logical connection with the controller. */ 1428 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1429 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1430 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1431 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1432 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1433 &fw_on_ctlr_build, &init_connect_result))) { 1434 return(error); 1435 } 1436 twa_drain_aen_queue(sc); 1437 1438 /* Set controller state to initialized. */ 1439 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1440 return(0); 1441 } 1442 1443 static int 1444 twa_setup(device_t self) 1445 { 1446 struct twa_softc *sc; 1447 struct tw_cl_event_packet *aen_queue; 1448 uint32_t i = 0; 1449 int error = 0; 1450 1451 sc = device_private(self); 1452 1453 /* Initialize request queues. */ 1454 TAILQ_INIT(&sc->twa_free); 1455 TAILQ_INIT(&sc->twa_busy); 1456 TAILQ_INIT(&sc->twa_pending); 1457 1458 sc->twa_sc_flags = 0; 1459 1460 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1461 1462 return(ENOMEM); 1463 } 1464 1465 /* Allocate memory for the AEN queue. */ 1466 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1467 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1468 /* 1469 * This should not cause us to return error. We will only be 1470 * unable to support AEN's. But then, we will have to check 1471 * time and again to see if we can support AEN's, if we 1472 * continue. So, we will just return error. 1473 */ 1474 return (ENOMEM); 1475 } 1476 /* Initialize the aen queue. */ 1477 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1478 1479 for (i = 0; i < TWA_Q_LENGTH; i++) 1480 sc->twa_aen_queue[i] = &(aen_queue[i]); 1481 1482 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1483 TWA_CONTROL_DISABLE_INTERRUPTS); 1484 1485 /* Initialize the controller. */ 1486 if ((error = twa_init_ctlr(sc))) { 1487 /* Soft reset the controller, and try one more time. */ 1488 1489 printf("%s: controller initialization failed. " 1490 "Retrying initialization\n", device_xname(sc->twa_dv)); 1491 1492 if ((error = twa_soft_reset(sc)) == 0) 1493 error = twa_init_ctlr(sc); 1494 } 1495 1496 twa_describe_controller(sc); 1497 1498 error = twa_request_bus_scan(self, "twa", 0); 1499 1500 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1501 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1502 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1503 TWA_CONTROL_ENABLE_INTERRUPTS); 1504 1505 return (error); 1506 } 1507 1508 void *twa_sdh; 1509 1510 static void 1511 twa_attach(device_t parent, device_t self, void *aux) 1512 { 1513 struct pci_attach_args *pa; 1514 struct twa_softc *sc; 1515 pci_chipset_tag_t pc; 1516 pcireg_t csr; 1517 pci_intr_handle_t ih; 1518 const char *intrstr; 1519 const struct sysctlnode *node; 1520 const struct twa_pci_identity *entry; 1521 int i; 1522 bool use_64bit; 1523 char intrbuf[PCI_INTRSTR_LEN]; 1524 1525 sc = device_private(self); 1526 1527 sc->twa_dv = self; 1528 1529 pa = aux; 1530 pc = pa->pa_pc; 1531 sc->pc = pa->pa_pc; 1532 sc->tag = pa->pa_tag; 1533 1534 entry = twa_lookup(pa->pa_id); 1535 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1); 1536 1537 sc->sc_quirks = 0; 1538 1539 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1540 sc->sc_nunits = TWA_MAX_UNITS; 1541 use_64bit = false; 1542 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1543 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1544 aprint_error_dev(sc->twa_dv, "can't map i/o space\n"); 1545 return; 1546 } 1547 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1548 sc->sc_nunits = TWA_MAX_UNITS; 1549 use_64bit = true; 1550 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1551 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1552 &sc->twa_bus_ioh, NULL, NULL)) { 1553 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1554 return; 1555 } 1556 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1557 sc->sc_nunits = TWA_9650_MAX_UNITS; 1558 use_64bit = true; 1559 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1560 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1561 &sc->twa_bus_ioh, NULL, NULL)) { 1562 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1563 return; 1564 } 1565 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1566 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1567 sc->sc_nunits = TWA_9690_MAX_UNITS; 1568 use_64bit = true; 1569 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1570 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1571 &sc->twa_bus_ioh, NULL, NULL)) { 1572 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1573 return; 1574 } 1575 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1576 } else { 1577 sc->sc_nunits = 0; 1578 use_64bit = false; 1579 aprint_error_dev(sc->twa_dv, 1580 "product id 0x%02x not recognized\n", 1581 PCI_PRODUCT(pa->pa_id)); 1582 return; 1583 } 1584 1585 if (pci_dma64_available(pa) && use_64bit) { 1586 aprint_verbose_dev(self, "64-bit DMA addressing active\n"); 1587 sc->twa_dma_tag = pa->pa_dmat64; 1588 } else { 1589 sc->twa_dma_tag = pa->pa_dmat; 1590 } 1591 1592 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1593 /* Enable the device. */ 1594 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1595 1596 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1597 csr | PCI_COMMAND_MASTER_ENABLE); 1598 1599 /* Map and establish the interrupt. */ 1600 if (pci_intr_map(pa, &ih)) { 1601 aprint_error_dev(sc->twa_dv, "can't map interrupt\n"); 1602 return; 1603 } 1604 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 1605 1606 sc->twa_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, twa_intr, sc, 1607 device_xname(self)); 1608 if (sc->twa_ih == NULL) { 1609 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n", 1610 (intrstr) ? " at " : "", 1611 (intrstr) ? intrstr : ""); 1612 return; 1613 } 1614 1615 if (intrstr != NULL) 1616 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", intrstr); 1617 1618 twa_setup(self); 1619 1620 if (twa_sdh == NULL) 1621 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1622 1623 /* sysctl set-up for 3ware cli */ 1624 if (sysctl_createv(NULL, 0, NULL, &node, 1625 0, CTLTYPE_NODE, device_xname(sc->twa_dv), 1626 SYSCTL_DESCR("twa driver information"), 1627 NULL, 0, NULL, 0, 1628 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1629 aprint_error_dev(sc->twa_dv, 1630 "could not create %s.%s sysctl node\n", 1631 "hw", device_xname(sc->twa_dv)); 1632 return; 1633 } 1634 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1635 0, CTLTYPE_STRING, "driver_version", 1636 SYSCTL_DESCR("twa driver version"), 1637 NULL, 0, __UNCONST(&twaver), 0, 1638 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1639 != 0) { 1640 aprint_error_dev(sc->twa_dv, 1641 "could not create %s.%s.driver_version sysctl\n", 1642 "hw", device_xname(sc->twa_dv)); 1643 return; 1644 } 1645 1646 return; 1647 } 1648 1649 static void 1650 twa_shutdown(void *arg) 1651 { 1652 extern struct cfdriver twa_cd; 1653 struct twa_softc *sc; 1654 int i, unit; 1655 1656 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1657 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1658 continue; 1659 1660 for (unit = 0; unit < sc->sc_nunits; unit++) 1661 if (sc->sc_units[unit].td_dev != NULL) 1662 (void) config_detach(sc->sc_units[unit].td_dev, 1663 DETACH_FORCE | DETACH_QUIET); 1664 1665 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1666 TWA_CONTROL_DISABLE_INTERRUPTS); 1667 1668 /* Let the controller know that we are going down. */ 1669 (void)twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1670 0, 0, 0, 0, 0, 1671 NULL, NULL, NULL, NULL, NULL); 1672 } 1673 } 1674 1675 void 1676 twa_register_callbacks(struct twa_softc *sc, int unit, 1677 const struct twa_callbacks *tcb) 1678 { 1679 1680 sc->sc_units[unit].td_callbacks = tcb; 1681 } 1682 1683 /* 1684 * Print autoconfiguration message for a sub-device 1685 */ 1686 static int 1687 twa_print(void *aux, const char *pnp) 1688 { 1689 struct twa_attach_args *twaa; 1690 1691 twaa = aux; 1692 1693 if (pnp !=NULL) 1694 aprint_normal("block device at %s\n", pnp); 1695 aprint_normal(" unit %d\n", twaa->twaa_unit); 1696 return (UNCONF); 1697 } 1698 1699 static void 1700 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1701 { 1702 int i; 1703 for (i = 0; i < nsegments; i++) { 1704 sgl[i].address = segs[i].ds_addr; 1705 sgl[i].length = (uint32_t)(segs[i].ds_len); 1706 } 1707 } 1708 1709 static int 1710 twa_submit_io(struct twa_request *tr) 1711 { 1712 int error; 1713 1714 if ((error = twa_start(tr))) { 1715 if (error == EBUSY) 1716 error = 0; /* request is in the pending queue */ 1717 else { 1718 tr->tr_error = error; 1719 } 1720 } 1721 return(error); 1722 } 1723 1724 /* 1725 * Function name: twa_setup_data_dmamap 1726 * Description: Callback of bus_dmamap_load for the buffer associated 1727 * with data. Updates the cmd pkt (size/sgl_entries 1728 * fields, as applicable) to reflect the number of sg 1729 * elements. 1730 * 1731 * Input: arg -- ptr to request pkt 1732 * segs -- ptr to a list of segment descriptors 1733 * nsegments--# of segments 1734 * error -- 0 if no errors encountered before callback, 1735 * non-zero if errors were encountered 1736 * Output: None 1737 * Return value: None 1738 */ 1739 static int 1740 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1741 { 1742 struct twa_request *tr = (struct twa_request *)arg; 1743 struct twa_command_packet *cmdpkt = tr->tr_command; 1744 struct twa_command_9k *cmd9k; 1745 union twa_command_7k *cmd7k; 1746 uint8_t sgl_offset; 1747 int error; 1748 1749 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1750 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1751 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1752 cmd9k->sgl_entries += nsegments - 1; 1753 } else { 1754 /* It's a 7000 command packet. */ 1755 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1756 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1757 twa_fillin_sgl((struct twa_sg *) 1758 (((uint32_t *)cmd7k) + sgl_offset), 1759 segs, nsegments); 1760 /* Modify the size field, based on sg address size. */ 1761 cmd7k->generic.size += 1762 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1763 } 1764 if (tr->tr_flags & TWA_CMD_DATA_IN) 1765 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1766 tr->tr_length, BUS_DMASYNC_PREWRITE); 1767 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1768 /* 1769 * If we're using an alignment buffer, and we're 1770 * writing data, copy the real data out. 1771 */ 1772 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1773 memcpy(tr->tr_data, tr->tr_real_data, 1774 tr->tr_real_length); 1775 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1776 tr->tr_length, BUS_DMASYNC_PREREAD); 1777 } 1778 error = twa_submit_io(tr); 1779 1780 if (error) { 1781 twa_unmap_request(tr); 1782 /* 1783 * If the caller had been returned EINPROGRESS, and he has 1784 * registered a callback for handling completion, the callback 1785 * will never get called because we were unable to submit the 1786 * request. So, free up the request right here. 1787 */ 1788 if (tr->tr_callback) 1789 twa_release_request(tr); 1790 } 1791 return (error); 1792 } 1793 1794 /* 1795 * Function name: twa_map_request 1796 * Description: Maps a cmd pkt and data associated with it, into 1797 * DMA'able memory. 1798 * 1799 * Input: tr -- ptr to request pkt 1800 * Output: None 1801 * Return value: 0 -- success 1802 * non-zero-- failure 1803 */ 1804 int 1805 twa_map_request(struct twa_request *tr) 1806 { 1807 struct twa_softc *sc = tr->tr_sc; 1808 int s, rv, rc; 1809 1810 /* If the command involves data, map that too. */ 1811 if (tr->tr_data != NULL) { 1812 1813 if (((u_long)tr->tr_data & (511)) != 0) { 1814 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1815 tr->tr_real_data = tr->tr_data; 1816 tr->tr_real_length = tr->tr_length; 1817 s = splvm(); 1818 rc = uvm_km_kmem_alloc(kmem_va_arena, 1819 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT), 1820 (vmem_addr_t *)&tr->tr_data); 1821 splx(s); 1822 1823 if (rc != 0) { 1824 tr->tr_data = tr->tr_real_data; 1825 tr->tr_length = tr->tr_real_length; 1826 return(ENOMEM); 1827 } 1828 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1829 memcpy(tr->tr_data, tr->tr_real_data, 1830 tr->tr_length); 1831 } 1832 1833 /* 1834 * Map the data buffer into bus space and build the S/G list. 1835 */ 1836 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1837 tr->tr_data, tr->tr_length, NULL, 1838 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1839 1840 if (rv != 0) { 1841 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1842 s = splvm(); 1843 uvm_km_kmem_free(kmem_va_arena, 1844 (vaddr_t)tr->tr_data, tr->tr_length); 1845 splx(s); 1846 } 1847 return (rv); 1848 } 1849 1850 if ((rv = twa_setup_data_dmamap(tr, 1851 tr->tr_dma_map->dm_segs, 1852 tr->tr_dma_map->dm_nsegs))) { 1853 1854 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1855 s = splvm(); 1856 uvm_km_kmem_free(kmem_va_arena, 1857 (vaddr_t)tr->tr_data, tr->tr_length); 1858 splx(s); 1859 tr->tr_data = tr->tr_real_data; 1860 tr->tr_length = tr->tr_real_length; 1861 } 1862 } 1863 1864 } else 1865 if ((rv = twa_submit_io(tr))) 1866 twa_unmap_request(tr); 1867 1868 return (rv); 1869 } 1870 1871 /* 1872 * Function name: twa_intr 1873 * Description: Interrupt handler. Determines the kind of interrupt, 1874 * and calls the appropriate handler. 1875 * 1876 * Input: sc -- ptr to per ctlr structure 1877 * Output: None 1878 * Return value: None 1879 */ 1880 1881 static int 1882 twa_intr(void *arg) 1883 { 1884 int caught, s, rv __diagused; 1885 struct twa_softc *sc; 1886 uint32_t status_reg; 1887 sc = (struct twa_softc *)arg; 1888 1889 caught = 0; 1890 /* Collect current interrupt status. */ 1891 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1892 if (twa_check_ctlr_state(sc, status_reg)) { 1893 caught = 1; 1894 goto bail; 1895 } 1896 /* Dispatch based on the kind of interrupt. */ 1897 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1898 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1899 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1900 caught = 1; 1901 } 1902 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1903 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1904 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1905 rv = twa_fetch_aen(sc); 1906 #ifdef DIAGNOSTIC 1907 if (rv != 0) 1908 printf("%s: unable to retrieve AEN (%d)\n", 1909 device_xname(sc->twa_dv), rv); 1910 #endif 1911 caught = 1; 1912 } 1913 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1914 /* Start any requests that might be in the pending queue. */ 1915 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1916 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1917 (void)twa_drain_pending_queue(sc); 1918 caught = 1; 1919 } 1920 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1921 s = splbio(); 1922 twa_done(sc); 1923 splx(s); 1924 caught = 1; 1925 } 1926 bail: 1927 return (caught); 1928 } 1929 1930 /* 1931 * Accept an open operation on the control device. 1932 */ 1933 static int 1934 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1935 { 1936 struct twa_softc *twa; 1937 1938 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1939 return (ENXIO); 1940 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1941 return (EBUSY); 1942 1943 twa->twa_sc_flags |= TWA_STATE_OPEN; 1944 1945 return (0); 1946 } 1947 1948 /* 1949 * Accept the last close on the control device. 1950 */ 1951 static int 1952 twaclose(dev_t dev, int flag, int mode, 1953 struct lwp *l) 1954 { 1955 struct twa_softc *twa; 1956 1957 twa = device_lookup_private(&twa_cd, minor(dev)); 1958 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1959 return (0); 1960 } 1961 1962 /* 1963 * Function name: twaioctl 1964 * Description: ioctl handler. 1965 * 1966 * Input: sc -- ptr to per ctlr structure 1967 * cmd -- ioctl cmd 1968 * buf -- ptr to buffer in kernel memory, which is 1969 * a copy of the input buffer in user-space 1970 * Output: buf -- ptr to buffer in kernel memory, which will 1971 * be copied of the output buffer in user-space 1972 * Return value: 0 -- success 1973 * non-zero-- failure 1974 */ 1975 static int 1976 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1977 struct lwp *l) 1978 { 1979 struct twa_softc *sc; 1980 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1981 struct tw_cl_event_packet event_buf; 1982 struct twa_request *tr = 0; 1983 int32_t event_index = 0; 1984 int32_t start_index; 1985 int s, error = 0; 1986 1987 sc = device_lookup_private(&twa_cd, minor(dev)); 1988 1989 switch (cmd) { 1990 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1991 { 1992 struct twa_command_packet *cmdpkt; 1993 uint32_t data_buf_size_adjusted; 1994 1995 /* Get a request packet */ 1996 tr = twa_get_request_wait(sc, 0); 1997 KASSERT(tr != NULL); 1998 /* 1999 * Make sure that the data buffer sent to firmware is a 2000 * 512 byte multiple in size. 2001 */ 2002 data_buf_size_adjusted = 2003 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 2004 2005 if ((tr->tr_length = data_buf_size_adjusted)) { 2006 if ((tr->tr_data = malloc(data_buf_size_adjusted, 2007 M_DEVBUF, M_WAITOK)) == NULL) { 2008 error = ENOMEM; 2009 goto fw_passthru_done; 2010 } 2011 /* Copy the payload. */ 2012 if ((error = copyin((void *) (user_buf->pdata), 2013 (void *) (tr->tr_data), 2014 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2015 goto fw_passthru_done; 2016 } 2017 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2018 } 2019 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2020 cmdpkt = tr->tr_command; 2021 2022 /* Copy the command packet. */ 2023 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2024 sizeof(struct twa_command_packet)); 2025 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2026 tr->tr_request_id; 2027 2028 /* Send down the request, and wait for it to complete. */ 2029 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2030 if (error == ETIMEDOUT) 2031 break; /* clean-up done by twa_wait_request */ 2032 goto fw_passthru_done; 2033 } 2034 2035 /* Copy the command packet back into user space. */ 2036 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2037 sizeof(struct twa_command_packet)); 2038 2039 /* If there was a payload, copy it back too. */ 2040 if (tr->tr_length) 2041 error = copyout(tr->tr_data, user_buf->pdata, 2042 user_buf->twa_drvr_pkt.buffer_length); 2043 fw_passthru_done: 2044 /* Free resources. */ 2045 if (tr->tr_data) 2046 free(tr->tr_data, M_DEVBUF); 2047 2048 if (tr) 2049 twa_release_request(tr); 2050 break; 2051 } 2052 2053 case TW_OSL_IOCTL_SCAN_BUS: 2054 twa_request_bus_scan(sc->twa_dv, "twa", 0); 2055 break; 2056 2057 case TW_CL_IOCTL_GET_FIRST_EVENT: 2058 if (sc->twa_aen_queue_wrapped) { 2059 if (sc->twa_aen_queue_overflow) { 2060 /* 2061 * The aen queue has wrapped, even before some 2062 * events have been retrieved. Let the caller 2063 * know that he missed out on some AEN's. 2064 */ 2065 user_buf->twa_drvr_pkt.status = 2066 TWA_ERROR_AEN_OVERFLOW; 2067 sc->twa_aen_queue_overflow = FALSE; 2068 } else 2069 user_buf->twa_drvr_pkt.status = 0; 2070 event_index = sc->twa_aen_head; 2071 } else { 2072 if (sc->twa_aen_head == sc->twa_aen_tail) { 2073 user_buf->twa_drvr_pkt.status = 2074 TWA_ERROR_AEN_NO_EVENTS; 2075 break; 2076 } 2077 user_buf->twa_drvr_pkt.status = 0; 2078 event_index = sc->twa_aen_tail; /* = 0 */ 2079 } 2080 if ((error = copyout(sc->twa_aen_queue[event_index], 2081 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2082 (sc->twa_aen_queue[event_index])->retrieved = 2083 TWA_AEN_RETRIEVED; 2084 break; 2085 2086 case TW_CL_IOCTL_GET_LAST_EVENT: 2087 if (sc->twa_aen_queue_wrapped) { 2088 if (sc->twa_aen_queue_overflow) { 2089 /* 2090 * The aen queue has wrapped, even before some 2091 * events have been retrieved. Let the caller 2092 * know that he missed out on some AEN's. 2093 */ 2094 user_buf->twa_drvr_pkt.status = 2095 TWA_ERROR_AEN_OVERFLOW; 2096 sc->twa_aen_queue_overflow = FALSE; 2097 } else 2098 user_buf->twa_drvr_pkt.status = 0; 2099 } else { 2100 if (sc->twa_aen_head == sc->twa_aen_tail) { 2101 user_buf->twa_drvr_pkt.status = 2102 TWA_ERROR_AEN_NO_EVENTS; 2103 break; 2104 } 2105 user_buf->twa_drvr_pkt.status = 0; 2106 } 2107 event_index = 2108 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2109 if ((error = copyout(sc->twa_aen_queue[event_index], 2110 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2111 (sc->twa_aen_queue[event_index])->retrieved = 2112 TWA_AEN_RETRIEVED; 2113 break; 2114 2115 case TW_CL_IOCTL_GET_NEXT_EVENT: 2116 user_buf->twa_drvr_pkt.status = 0; 2117 if (sc->twa_aen_queue_wrapped) { 2118 2119 if (sc->twa_aen_queue_overflow) { 2120 /* 2121 * The aen queue has wrapped, even before some 2122 * events have been retrieved. Let the caller 2123 * know that he missed out on some AEN's. 2124 */ 2125 user_buf->twa_drvr_pkt.status = 2126 TWA_ERROR_AEN_OVERFLOW; 2127 sc->twa_aen_queue_overflow = FALSE; 2128 } 2129 start_index = sc->twa_aen_head; 2130 } else { 2131 if (sc->twa_aen_head == sc->twa_aen_tail) { 2132 user_buf->twa_drvr_pkt.status = 2133 TWA_ERROR_AEN_NO_EVENTS; 2134 break; 2135 } 2136 start_index = sc->twa_aen_tail; /* = 0 */ 2137 } 2138 error = copyin(user_buf->pdata, &event_buf, 2139 sizeof(struct tw_cl_event_packet)); 2140 2141 event_index = (start_index + event_buf.sequence_id - 2142 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2143 % TWA_Q_LENGTH; 2144 2145 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2146 event_buf.sequence_id)) { 2147 if (user_buf->twa_drvr_pkt.status == 2148 TWA_ERROR_AEN_OVERFLOW) 2149 /* so we report the overflow next time */ 2150 sc->twa_aen_queue_overflow = TRUE; 2151 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2152 break; 2153 } 2154 if ((error = copyout(sc->twa_aen_queue[event_index], 2155 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2156 (sc->twa_aen_queue[event_index])->retrieved = 2157 TWA_AEN_RETRIEVED; 2158 break; 2159 2160 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2161 user_buf->twa_drvr_pkt.status = 0; 2162 if (sc->twa_aen_queue_wrapped) { 2163 if (sc->twa_aen_queue_overflow) { 2164 /* 2165 * The aen queue has wrapped, even before some 2166 * events have been retrieved. Let the caller 2167 * know that he missed out on some AEN's. 2168 */ 2169 user_buf->twa_drvr_pkt.status = 2170 TWA_ERROR_AEN_OVERFLOW; 2171 sc->twa_aen_queue_overflow = FALSE; 2172 } 2173 start_index = sc->twa_aen_head; 2174 } else { 2175 if (sc->twa_aen_head == sc->twa_aen_tail) { 2176 user_buf->twa_drvr_pkt.status = 2177 TWA_ERROR_AEN_NO_EVENTS; 2178 break; 2179 } 2180 start_index = sc->twa_aen_tail; /* = 0 */ 2181 } 2182 if ((error = copyin(user_buf->pdata, &event_buf, 2183 sizeof(struct tw_cl_event_packet))) != 0) 2184 2185 event_index = (start_index + event_buf.sequence_id - 2186 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2187 % TWA_Q_LENGTH; 2188 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2189 event_buf.sequence_id)) { 2190 if (user_buf->twa_drvr_pkt.status == 2191 TWA_ERROR_AEN_OVERFLOW) 2192 /* so we report the overflow next time */ 2193 sc->twa_aen_queue_overflow = TRUE; 2194 user_buf->twa_drvr_pkt.status = 2195 TWA_ERROR_AEN_NO_EVENTS; 2196 break; 2197 } 2198 if ((error = copyout(sc->twa_aen_queue [event_index], 2199 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2200 aprint_error_dev(sc->twa_dv, "get_previous: Could not " 2201 "copyout to event_buf. error = %x\n", error); 2202 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2203 break; 2204 2205 case TW_CL_IOCTL_GET_LOCK: 2206 { 2207 struct tw_cl_lock_packet twa_lock; 2208 2209 copyin(user_buf->pdata, &twa_lock, 2210 sizeof(struct tw_cl_lock_packet)); 2211 s = splbio(); 2212 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2213 (twa_lock.force_flag) || 2214 (time_second >= sc->twa_ioctl_lock.timeout)) { 2215 2216 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2217 sc->twa_ioctl_lock.timeout = time_second + 2218 (twa_lock.timeout_msec / 1000); 2219 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2220 user_buf->twa_drvr_pkt.status = 0; 2221 } else { 2222 twa_lock.time_remaining_msec = 2223 (sc->twa_ioctl_lock.timeout - time_second) * 2224 1000; 2225 user_buf->twa_drvr_pkt.status = 2226 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2227 } 2228 splx(s); 2229 copyout(&twa_lock, user_buf->pdata, 2230 sizeof(struct tw_cl_lock_packet)); 2231 break; 2232 } 2233 2234 case TW_CL_IOCTL_RELEASE_LOCK: 2235 s = splbio(); 2236 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2237 user_buf->twa_drvr_pkt.status = 2238 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2239 } else { 2240 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2241 user_buf->twa_drvr_pkt.status = 0; 2242 } 2243 splx(s); 2244 break; 2245 2246 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2247 { 2248 struct tw_cl_compatibility_packet comp_pkt; 2249 2250 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2251 sizeof(TWA_DRIVER_VERSION_STRING)); 2252 comp_pkt.working_srl = sc->working_srl; 2253 comp_pkt.working_branch = sc->working_branch; 2254 comp_pkt.working_build = sc->working_build; 2255 user_buf->twa_drvr_pkt.status = 0; 2256 2257 /* Copy compatibility information to user space. */ 2258 copyout(&comp_pkt, user_buf->pdata, 2259 uimin(sizeof(struct tw_cl_compatibility_packet), 2260 user_buf->twa_drvr_pkt.buffer_length)); 2261 break; 2262 } 2263 2264 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2265 { 2266 struct twa_unitname *tn; 2267 struct twa_drive *tdr; 2268 2269 tn = (struct twa_unitname *)data; 2270 /* XXX mutex */ 2271 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2272 return (EINVAL); 2273 tdr = &sc->sc_units[tn->tn_unit]; 2274 if (tdr->td_dev == NULL) 2275 tn->tn_name[0] = '\0'; 2276 else 2277 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2278 sizeof(tn->tn_name)); 2279 return (0); 2280 } 2281 2282 default: 2283 /* Unknown opcode. */ 2284 error = ENOTTY; 2285 } 2286 2287 return(error); 2288 } 2289 2290 const struct cdevsw twa_cdevsw = { 2291 .d_open = twaopen, 2292 .d_close = twaclose, 2293 .d_read = noread, 2294 .d_write = nowrite, 2295 .d_ioctl = twaioctl, 2296 .d_stop = nostop, 2297 .d_tty = notty, 2298 .d_poll = nopoll, 2299 .d_mmap = nommap, 2300 .d_kqfilter = nokqfilter, 2301 .d_discard = nodiscard, 2302 .d_flag = D_OTHER 2303 }; 2304 2305 /* 2306 * Function name: twa_get_param 2307 * Description: Get a firmware parameter. 2308 * 2309 * Input: sc -- ptr to per ctlr structure 2310 * table_id -- parameter table # 2311 * param_id -- index of the parameter in the table 2312 * param_size -- size of the parameter in bytes 2313 * callback -- ptr to function, if any, to be called 2314 * back on completion; NULL if no callback. 2315 * Output: None 2316 * Return value: ptr to param structure -- success 2317 * NULL -- failure 2318 */ 2319 static int 2320 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2321 size_t param_size, void (* callback)(struct twa_request *tr), 2322 struct twa_param_9k **param) 2323 { 2324 int rv = 0; 2325 struct twa_request *tr; 2326 union twa_command_7k *cmd; 2327 2328 /* Get a request packet. */ 2329 if ((tr = twa_get_request(sc, 0)) == NULL) { 2330 rv = EAGAIN; 2331 goto out; 2332 } 2333 2334 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2335 2336 /* Allocate memory to read data into. */ 2337 if ((*param = (struct twa_param_9k *) 2338 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2339 rv = ENOMEM; 2340 goto out; 2341 } 2342 2343 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2344 tr->tr_data = *param; 2345 tr->tr_length = TWA_SECTOR_SIZE; 2346 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2347 2348 /* Build the cmd pkt. */ 2349 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2350 2351 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2352 2353 cmd->param.opcode = TWA_OP_GET_PARAM; 2354 cmd->param.sgl_offset = 2; 2355 cmd->param.size = 2; 2356 cmd->param.request_id = tr->tr_request_id; 2357 cmd->param.unit = 0; 2358 cmd->param.param_count = 1; 2359 2360 /* Specify which parameter we need. */ 2361 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2362 (*param)->parameter_id = param_id; 2363 (*param)->parameter_size_bytes = param_size; 2364 2365 /* Submit the command. */ 2366 if (callback == NULL) { 2367 /* There's no call back; wait till the command completes. */ 2368 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2369 2370 if (rv != 0) 2371 goto out; 2372 2373 if ((rv = cmd->param.status) != 0) { 2374 /* twa_drain_complete_queue will have done the unmapping */ 2375 goto out; 2376 } 2377 twa_release_request(tr); 2378 return (rv); 2379 } else { 2380 /* There's a call back. Simply submit the command. */ 2381 tr->tr_callback = callback; 2382 rv = twa_map_request(tr); 2383 return (rv); 2384 } 2385 out: 2386 if (tr) 2387 twa_release_request(tr); 2388 return(rv); 2389 } 2390 2391 /* 2392 * Function name: twa_set_param 2393 * Description: Set a firmware parameter. 2394 * 2395 * Input: sc -- ptr to per ctlr structure 2396 * table_id -- parameter table # 2397 * param_id -- index of the parameter in the table 2398 * param_size -- size of the parameter in bytes 2399 * callback -- ptr to function, if any, to be called 2400 * back on completion; NULL if no callback. 2401 * Output: None 2402 * Return value: 0 -- success 2403 * non-zero-- failure 2404 */ 2405 static int 2406 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2407 void *data, void (* callback)(struct twa_request *tr)) 2408 { 2409 struct twa_request *tr; 2410 union twa_command_7k *cmd; 2411 struct twa_param_9k *param = NULL; 2412 int error = ENOMEM; 2413 2414 tr = twa_get_request(sc, 0); 2415 if (tr == NULL) 2416 return (EAGAIN); 2417 2418 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2419 2420 /* Allocate memory to send data using. */ 2421 if ((param = (struct twa_param_9k *) 2422 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2423 goto out; 2424 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2425 tr->tr_data = param; 2426 tr->tr_length = TWA_SECTOR_SIZE; 2427 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2428 2429 /* Build the cmd pkt. */ 2430 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2431 2432 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2433 2434 cmd->param.opcode = TWA_OP_SET_PARAM; 2435 cmd->param.sgl_offset = 2; 2436 cmd->param.size = 2; 2437 cmd->param.request_id = tr->tr_request_id; 2438 cmd->param.unit = 0; 2439 cmd->param.param_count = 1; 2440 2441 /* Specify which parameter we want to set. */ 2442 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2443 param->parameter_id = param_id; 2444 param->parameter_size_bytes = param_size; 2445 memcpy(param->data, data, param_size); 2446 2447 /* Submit the command. */ 2448 if (callback == NULL) { 2449 /* There's no call back; wait till the command completes. */ 2450 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2451 if (error == ETIMEDOUT) 2452 /* clean-up done by twa_immediate_request */ 2453 return(error); 2454 if (error) 2455 goto out; 2456 if ((error = cmd->param.status)) { 2457 /* 2458 * twa_drain_complete_queue will have done the 2459 * unmapping. 2460 */ 2461 goto out; 2462 } 2463 free(param, M_DEVBUF); 2464 twa_release_request(tr); 2465 return(error); 2466 } else { 2467 /* There's a call back. Simply submit the command. */ 2468 tr->tr_callback = callback; 2469 if ((error = twa_map_request(tr))) 2470 goto out; 2471 2472 return (0); 2473 } 2474 out: 2475 if (param) 2476 free(param, M_DEVBUF); 2477 if (tr) 2478 twa_release_request(tr); 2479 return(error); 2480 } 2481 2482 /* 2483 * Function name: twa_init_connection 2484 * Description: Send init_connection cmd to firmware 2485 * 2486 * Input: sc -- ptr to per ctlr structure 2487 * message_credits -- max # of requests that we might send 2488 * down simultaneously. This will be 2489 * typically set to 256 at init-time or 2490 * after a reset, and to 1 at shutdown-time 2491 * set_features -- indicates if we intend to use 64-bit 2492 * sg, also indicates if we want to do a 2493 * basic or an extended init_connection; 2494 * 2495 * Note: The following input/output parameters are valid, only in case of an 2496 * extended init_connection: 2497 * 2498 * current_fw_srl -- srl of fw we are bundled 2499 * with, if any; 0 otherwise 2500 * current_fw_arch_id -- arch_id of fw we are bundled 2501 * with, if any; 0 otherwise 2502 * current_fw_branch -- branch # of fw we are bundled 2503 * with, if any; 0 otherwise 2504 * current_fw_build -- build # of fw we are bundled 2505 * with, if any; 0 otherwise 2506 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2507 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2508 * fw_on_ctlr_branch -- branch # of fw on ctlr 2509 * fw_on_ctlr_build -- build # of fw on ctlr 2510 * init_connect_result -- result bitmap of fw response 2511 * Return value: 0 -- success 2512 * non-zero-- failure 2513 */ 2514 static int 2515 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2516 uint32_t set_features, uint16_t current_fw_srl, 2517 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2518 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2519 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2520 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2521 { 2522 struct twa_request *tr; 2523 struct twa_command_init_connect *init_connect; 2524 int error = 1; 2525 2526 /* Get a request packet. */ 2527 if ((tr = twa_get_request(sc, 0)) == NULL) 2528 goto out; 2529 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2530 /* Build the cmd pkt. */ 2531 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2532 2533 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2534 2535 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2536 init_connect->request_id = tr->tr_request_id; 2537 init_connect->message_credits = message_credits; 2538 init_connect->features = set_features; 2539 if (TWA_64BIT_ADDRESSES) 2540 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2541 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2542 /* 2543 * Fill in the extra fields needed for 2544 * an extended init_connect. 2545 */ 2546 init_connect->size = 6; 2547 init_connect->fw_srl = current_fw_srl; 2548 init_connect->fw_arch_id = current_fw_arch_id; 2549 init_connect->fw_branch = current_fw_branch; 2550 } else 2551 init_connect->size = 3; 2552 2553 /* Submit the command, and wait for it to complete. */ 2554 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2555 if (error == ETIMEDOUT) 2556 return(error); /* clean-up done by twa_immediate_request */ 2557 if (error) 2558 goto out; 2559 if ((error = init_connect->status)) { 2560 /* twa_drain_complete_queue will have done the unmapping */ 2561 goto out; 2562 } 2563 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2564 *fw_on_ctlr_srl = init_connect->fw_srl; 2565 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2566 *fw_on_ctlr_branch = init_connect->fw_branch; 2567 *fw_on_ctlr_build = init_connect->fw_build; 2568 *init_connect_result = init_connect->result; 2569 } 2570 twa_release_request(tr); 2571 return(error); 2572 2573 out: 2574 if (tr) 2575 twa_release_request(tr); 2576 return(error); 2577 } 2578 2579 static int 2580 twa_reset(struct twa_softc *sc) 2581 { 2582 int s; 2583 int error = 0; 2584 2585 /* Set the 'in reset' flag. */ 2586 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2587 2588 /* 2589 * Disable interrupts from the controller, and mask any 2590 * accidental entry into our interrupt handler. 2591 */ 2592 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2593 TWA_CONTROL_DISABLE_INTERRUPTS); 2594 2595 s = splbio(); 2596 2597 /* Soft reset the controller. */ 2598 if ((error = twa_soft_reset(sc))) 2599 goto out; 2600 2601 /* Re-establish logical connection with the controller. */ 2602 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2603 0, 0, 0, 0, 0, 2604 NULL, NULL, NULL, NULL, NULL))) { 2605 goto out; 2606 } 2607 /* 2608 * Complete all requests in the complete queue; error back all requests 2609 * in the busy queue. Any internal requests will be simply freed. 2610 * Re-submit any requests in the pending queue. 2611 */ 2612 twa_drain_busy_queue(sc); 2613 2614 out: 2615 splx(s); 2616 /* 2617 * Enable interrupts, and also clear attention and response interrupts. 2618 */ 2619 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2620 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2621 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2622 TWA_CONTROL_ENABLE_INTERRUPTS); 2623 2624 /* Clear the 'in reset' flag. */ 2625 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2626 2627 return(error); 2628 } 2629 2630 static int 2631 twa_soft_reset(struct twa_softc *sc) 2632 { 2633 uint32_t status_reg; 2634 2635 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2636 TWA_CONTROL_ISSUE_SOFT_RESET | 2637 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2638 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2639 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2640 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2641 TWA_CONTROL_DISABLE_INTERRUPTS); 2642 2643 if (twa_drain_response_queue_large(sc, 30) != 0) { 2644 aprint_error_dev(sc->twa_dv, 2645 "response queue not empty after reset.\n"); 2646 return(1); 2647 } 2648 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2649 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2650 aprint_error_dev(sc->twa_dv, 2651 "no attention interrupt after reset.\n"); 2652 return(1); 2653 } 2654 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2655 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2656 2657 if (twa_drain_response_queue(sc)) { 2658 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n"); 2659 return(1); 2660 } 2661 if (twa_drain_aen_queue(sc)) { 2662 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n"); 2663 return(1); 2664 } 2665 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2666 aprint_error_dev(sc->twa_dv, 2667 "reset not reported by controller.\n"); 2668 return(1); 2669 } 2670 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2671 if (TWA_STATUS_ERRORS(status_reg) || 2672 twa_check_ctlr_state(sc, status_reg)) { 2673 aprint_error_dev(sc->twa_dv, "controller errors detected.\n"); 2674 return(1); 2675 } 2676 return(0); 2677 } 2678 2679 static int 2680 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2681 { 2682 struct timeval t1; 2683 time_t end_time; 2684 uint32_t status_reg; 2685 2686 timeout = (timeout * 1000 * 100); 2687 2688 microtime(&t1); 2689 2690 end_time = t1.tv_usec + timeout; 2691 2692 do { 2693 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2694 /* got the required bit(s)? */ 2695 if ((status_reg & status) == status) 2696 return(0); 2697 DELAY(100000); 2698 microtime(&t1); 2699 } while (t1.tv_usec <= end_time); 2700 2701 return(1); 2702 } 2703 2704 static int 2705 twa_fetch_aen(struct twa_softc *sc) 2706 { 2707 struct twa_request *tr; 2708 int s, error = 0; 2709 2710 s = splbio(); 2711 2712 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2713 splx(s); 2714 return(EIO); 2715 } 2716 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2717 tr->tr_callback = twa_aen_callback; 2718 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2719 if (twa_request_sense(tr, 0) != 0) { 2720 if (tr->tr_data) 2721 free(tr->tr_data, M_DEVBUF); 2722 twa_release_request(tr); 2723 error = 1; 2724 } 2725 splx(s); 2726 2727 return(error); 2728 } 2729 2730 /* 2731 * Function name: twa_aen_callback 2732 * Description: Callback for requests to fetch AEN's. 2733 * 2734 * Input: tr -- ptr to completed request pkt 2735 * Output: None 2736 * Return value: None 2737 */ 2738 static void 2739 twa_aen_callback(struct twa_request *tr) 2740 { 2741 int i; 2742 int fetch_more_aens = 0; 2743 struct twa_softc *sc = tr->tr_sc; 2744 struct twa_command_header *cmd_hdr = 2745 (struct twa_command_header *)(tr->tr_data); 2746 struct twa_command_9k *cmd = 2747 &(tr->tr_command->command.cmd_pkt_9k); 2748 2749 if (! cmd->status) { 2750 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2751 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2752 if (twa_enqueue_aen(sc, cmd_hdr) 2753 != TWA_AEN_QUEUE_EMPTY) 2754 fetch_more_aens = 1; 2755 } else { 2756 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2757 for (i = 0; i < 18; i++) 2758 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2759 printf("\n"); /* print new line */ 2760 2761 for (i = 0; i < 128; i++) 2762 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2763 printf("\n"); /* print new line */ 2764 } 2765 if (tr->tr_data) 2766 free(tr->tr_data, M_DEVBUF); 2767 twa_release_request(tr); 2768 2769 if (fetch_more_aens) 2770 twa_fetch_aen(sc); 2771 } 2772 2773 /* 2774 * Function name: twa_enqueue_aen 2775 * Description: Queues AEN's to be supplied to user-space tools on request. 2776 * 2777 * Input: sc -- ptr to per ctlr structure 2778 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2779 * details can be retrieved. 2780 * Output: None 2781 * Return value: None 2782 */ 2783 static uint16_t 2784 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2785 { 2786 int rv __diagused, s; 2787 struct tw_cl_event_packet *event; 2788 uint16_t aen_code; 2789 unsigned long sync_time; 2790 2791 s = splbio(); 2792 aen_code = cmd_hdr->status_block.error; 2793 2794 switch (aen_code) { 2795 case TWA_AEN_SYNC_TIME_WITH_HOST: 2796 2797 sync_time = (time_second - (3 * 86400)) % 604800; 2798 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2799 TWA_PARAM_TIME_SchedulerTime, 4, 2800 &sync_time, twa_aen_callback); 2801 #ifdef DIAGNOSTIC 2802 if (rv != 0) 2803 aprint_error_dev(sc->twa_dv, 2804 "unable to sync time with ctlr\n"); 2805 #endif 2806 break; 2807 2808 case TWA_AEN_QUEUE_EMPTY: 2809 break; 2810 2811 default: 2812 /* Queue the event. */ 2813 event = sc->twa_aen_queue[sc->twa_aen_head]; 2814 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2815 sc->twa_aen_queue_overflow = TRUE; 2816 event->severity = 2817 cmd_hdr->status_block.substatus_block.severity; 2818 event->time_stamp_sec = time_second; 2819 event->aen_code = aen_code; 2820 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2821 event->sequence_id = ++(sc->twa_current_sequence_id); 2822 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2823 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2824 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2825 event->parameter_len); 2826 2827 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2828 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2829 device_xname(sc->twa_dv), 2830 aen_code, 2831 twa_aen_severity_table[event->severity], 2832 twa_find_msg_string(twa_aen_table, aen_code), 2833 event->parameter_data); 2834 } 2835 2836 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2837 sc->twa_aen_queue_wrapped = TRUE; 2838 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2839 break; 2840 } /* switch */ 2841 splx(s); 2842 2843 return (aen_code); 2844 } 2845 2846 /* 2847 * Function name: twa_find_aen 2848 * Description: Reports whether a given AEN ever occurred. 2849 * 2850 * Input: sc -- ptr to per ctlr structure 2851 * aen_code-- AEN to look for 2852 * Output: None 2853 * Return value: 0 -- success 2854 * non-zero-- failure 2855 */ 2856 static int 2857 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2858 { 2859 uint32_t last_index; 2860 int s; 2861 int i; 2862 2863 s = splbio(); 2864 2865 if (sc->twa_aen_queue_wrapped) 2866 last_index = sc->twa_aen_head; 2867 else 2868 last_index = 0; 2869 2870 i = sc->twa_aen_head; 2871 do { 2872 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2873 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2874 splx(s); 2875 return(0); 2876 } 2877 } while (i != last_index); 2878 2879 splx(s); 2880 return(1); 2881 } 2882 2883 static inline void 2884 twa_request_init(struct twa_request *tr, int flags) 2885 { 2886 tr->tr_data = NULL; 2887 tr->tr_real_data = NULL; 2888 tr->tr_length = 0; 2889 tr->tr_real_length = 0; 2890 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2891 tr->tr_flags = flags; 2892 tr->tr_error = 0; 2893 tr->tr_callback = NULL; 2894 tr->tr_cmd_pkt_type = 0; 2895 tr->bp = 0; 2896 2897 /* 2898 * Look at the status field in the command packet to see how 2899 * it completed the last time it was used, and zero out only 2900 * the portions that might have changed. Note that we don't 2901 * care to zero out the sglist. 2902 */ 2903 if (tr->tr_command->command.cmd_pkt_9k.status) 2904 memset(tr->tr_command, 0, 2905 sizeof(struct twa_command_header) + 28); 2906 else 2907 memset(&(tr->tr_command->command), 0, 28); 2908 } 2909 2910 struct twa_request * 2911 twa_get_request_wait(struct twa_softc *sc, int flags) 2912 { 2913 struct twa_request *tr; 2914 int s; 2915 2916 KASSERT((flags & TWA_CMD_AEN) == 0); 2917 2918 s = splbio(); 2919 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2920 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2921 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2922 } 2923 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2924 2925 splx(s); 2926 2927 twa_request_init(tr, flags); 2928 2929 return(tr); 2930 } 2931 2932 struct twa_request * 2933 twa_get_request(struct twa_softc *sc, int flags) 2934 { 2935 int s; 2936 struct twa_request *tr; 2937 2938 /* Get a free request packet. */ 2939 s = splbio(); 2940 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2941 2942 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2943 tr = sc->sc_twa_request; 2944 flags |= TWA_CMD_AEN_BUSY; 2945 } else { 2946 splx(s); 2947 return (NULL); 2948 } 2949 } else { 2950 if (__predict_false((tr = 2951 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2952 splx(s); 2953 return (NULL); 2954 } 2955 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2956 } 2957 splx(s); 2958 2959 twa_request_init(tr, flags); 2960 2961 return(tr); 2962 } 2963 2964 /* 2965 * Print some information about the controller 2966 */ 2967 static void 2968 twa_describe_controller(struct twa_softc *sc) 2969 { 2970 struct twa_param_9k *p[10]; 2971 int i, rv = 0; 2972 uint32_t dsize; 2973 uint8_t ports; 2974 2975 memset(p, 0, sizeof(p)); 2976 2977 /* Get the port count. */ 2978 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2979 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2980 2981 /* get version strings */ 2982 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2983 16, NULL, &p[1]); 2984 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2985 16, NULL, &p[2]); 2986 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2987 16, NULL, &p[3]); 2988 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2989 8, NULL, &p[4]); 2990 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2991 8, NULL, &p[5]); 2992 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2993 8, NULL, &p[6]); 2994 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2995 16, NULL, &p[7]); 2996 2997 if (rv) { 2998 /* some error occurred */ 2999 aprint_error_dev(sc->twa_dv, 3000 "failed to fetch version information\n"); 3001 goto bail; 3002 } 3003 3004 ports = *(uint8_t *)(p[0]->data); 3005 3006 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 3007 ports, p[1]->data, p[2]->data); 3008 3009 aprint_verbose_dev(sc->twa_dv, 3010 "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 3011 p[3]->data, p[4]->data, 3012 p[5]->data, p[6]->data); 3013 3014 for (i = 0; i < ports; i++) { 3015 3016 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 3017 continue; 3018 3019 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3020 TWA_PARAM_DRIVEMODELINDEX, 3021 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3022 3023 if (rv != 0) { 3024 aprint_error_dev(sc->twa_dv, 3025 "unable to get drive model for port %d\n", i); 3026 continue; 3027 } 3028 3029 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3030 TWA_PARAM_DRIVESIZEINDEX, 3031 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3032 3033 if (rv != 0) { 3034 aprint_error_dev(sc->twa_dv, "unable to get drive size" 3035 " for port %d\n", i); 3036 free(p[8], M_DEVBUF); 3037 continue; 3038 } 3039 3040 dsize = *(uint32_t *)(p[9]->data); 3041 3042 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n", 3043 i, p[8]->data, dsize / 2048); 3044 3045 if (p[8]) 3046 free(p[8], M_DEVBUF); 3047 if (p[9]) 3048 free(p[9], M_DEVBUF); 3049 } 3050 bail: 3051 if (p[0]) 3052 free(p[0], M_DEVBUF); 3053 if (p[1]) 3054 free(p[1], M_DEVBUF); 3055 if (p[2]) 3056 free(p[2], M_DEVBUF); 3057 if (p[3]) 3058 free(p[3], M_DEVBUF); 3059 if (p[4]) 3060 free(p[4], M_DEVBUF); 3061 if (p[5]) 3062 free(p[5], M_DEVBUF); 3063 if (p[6]) 3064 free(p[6], M_DEVBUF); 3065 } 3066 3067 /* 3068 * Function name: twa_check_ctlr_state 3069 * Description: Makes sure that the fw status register reports a 3070 * proper status. 3071 * 3072 * Input: sc -- ptr to per ctlr structure 3073 * status_reg -- value in the status register 3074 * Output: None 3075 * Return value: 0 -- no errors 3076 * non-zero-- errors 3077 */ 3078 static int 3079 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3080 { 3081 int result = 0; 3082 struct timeval t1; 3083 static time_t last_warning[2] = {0, 0}; 3084 3085 /* Check if the 'micro-controller ready' bit is not set. */ 3086 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3087 TWA_STATUS_EXPECTED_BITS) { 3088 3089 microtime(&t1); 3090 3091 last_warning[0] += (5 * 1000 * 100); 3092 3093 if (t1.tv_usec > last_warning[0]) { 3094 microtime(&t1); 3095 last_warning[0] = t1.tv_usec; 3096 } 3097 result = 1; 3098 } 3099 3100 /* Check if any error bits are set. */ 3101 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3102 3103 microtime(&t1); 3104 last_warning[1] += (5 * 1000 * 100); 3105 if (t1.tv_usec > last_warning[1]) { 3106 microtime(&t1); 3107 last_warning[1] = t1.tv_usec; 3108 } 3109 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3110 aprint_error_dev(sc->twa_dv, "clearing PCI parity " 3111 "error re-seat/move/replace card.\n"); 3112 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3113 TWA_CONTROL_CLEAR_PARITY_ERROR); 3114 pci_conf_write(sc->pc, sc->tag, 3115 PCI_COMMAND_STATUS_REG, 3116 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3117 } 3118 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3119 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n"); 3120 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3121 TWA_CONTROL_CLEAR_PCI_ABORT); 3122 pci_conf_write(sc->pc, sc->tag, 3123 PCI_COMMAND_STATUS_REG, 3124 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3125 } 3126 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3127 /* 3128 * As documented by 3ware, the 9650 erroneously 3129 * flags queue errors during resets. 3130 * Just ignore them during the reset instead of 3131 * bothering the console. 3132 */ 3133 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3134 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3135 aprint_error_dev(sc->twa_dv, 3136 "clearing controller queue error\n"); 3137 } 3138 3139 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3140 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3141 } 3142 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3143 aprint_error_dev(sc->twa_dv, 3144 "micro-controller error\n"); 3145 result = 1; 3146 } 3147 } 3148 return(result); 3149 } 3150 3151 MODULE(MODULE_CLASS_DRIVER, twa, "pci"); 3152 3153 #ifdef _MODULE 3154 #include "ioconf.c" 3155 #endif 3156 3157 static int 3158 twa_modcmd(modcmd_t cmd, void *opaque) 3159 { 3160 int error = 0; 3161 3162 #ifdef _MODULE 3163 switch (cmd) { 3164 case MODULE_CMD_INIT: 3165 error = config_init_component(cfdriver_ioconf_twa, 3166 cfattach_ioconf_twa, cfdata_ioconf_twa); 3167 break; 3168 case MODULE_CMD_FINI: 3169 error = config_fini_component(cfdriver_ioconf_twa, 3170 cfattach_ioconf_twa, cfdata_ioconf_twa); 3171 break; 3172 default: 3173 error = ENOTTY; 3174 break; 3175 } 3176 #endif 3177 3178 return error; 3179 } 3180
Indexes created Tue Sep 23 14:10:03 GMT 2025