twa.c revision 1.59
1 /* $NetBSD: twa.c,v 1.59 2021/04/24 23:36:57 thorpej Exp $ */ 2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */ 3 4 /*- 5 * Copyright (c) 2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jordan Rhody of Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /*- 34 * Copyright (c) 2003-04 3ware, Inc. 35 * Copyright (c) 2000 Michael Smith 36 * Copyright (c) 2000 BSDi 37 * All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $ 61 */ 62 63 /* 64 * 3ware driver for 9000 series storage controllers. 65 * 66 * Author: Vinod Kashyap 67 */ 68 69 #include <sys/cdefs.h> 70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.59 2021/04/24 23:36:57 thorpej Exp $"); 71 72 //#define TWA_DEBUG 73 74 #include <sys/param.h> 75 #include <sys/systm.h> 76 #include <sys/kernel.h> 77 #include <sys/device.h> 78 #include <sys/queue.h> 79 #include <sys/proc.h> 80 #include <sys/bswap.h> 81 #include <sys/buf.h> 82 #include <sys/bufq.h> 83 #include <sys/endian.h> 84 #include <sys/malloc.h> 85 #include <sys/conf.h> 86 #include <sys/disk.h> 87 #include <sys/sysctl.h> 88 #include <sys/syslog.h> 89 #include <sys/module.h> 90 #include <sys/bus.h> 91 92 #include <dev/pci/pcireg.h> 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcidevs.h> 95 #include <dev/pci/twareg.h> 96 #include <dev/pci/twavar.h> 97 #include <dev/pci/twaio.h> 98 99 #include <dev/scsipi/scsipi_all.h> 100 #include <dev/scsipi/scsipi_disk.h> 101 #include <dev/scsipi/scsipiconf.h> 102 #include <dev/scsipi/scsi_spc.h> 103 104 #include <dev/ldvar.h> 105 106 #include "locators.h" 107 #include "ioconf.h" 108 109 #define PCI_CBIO 0x10 110 111 static int twa_fetch_aen(struct twa_softc *); 112 static void twa_aen_callback(struct twa_request *); 113 static int twa_find_aen(struct twa_softc *sc, uint16_t); 114 static uint16_t twa_enqueue_aen(struct twa_softc *sc, 115 struct twa_command_header *); 116 117 static void twa_attach(device_t, device_t, void *); 118 static int twa_request_bus_scan(device_t, const char *, const int *); 119 static void twa_shutdown(void *); 120 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t, 121 uint16_t, uint16_t, uint16_t, uint16_t, 122 uint16_t *, uint16_t *, uint16_t *, 123 uint16_t *, uint32_t *); 124 static int twa_intr(void *); 125 static int twa_match(device_t, cfdata_t, void *); 126 static int twa_reset(struct twa_softc *); 127 128 static int twa_print(void *, const char *); 129 static int twa_soft_reset(struct twa_softc *); 130 131 static int twa_check_ctlr_state(struct twa_softc *, uint32_t); 132 static int twa_get_param(struct twa_softc *, int, int, size_t, 133 void (* callback)(struct twa_request *), 134 struct twa_param_9k **); 135 static int twa_set_param(struct twa_softc *, int, int, int, void *, 136 void (* callback)(struct twa_request *)); 137 static void twa_describe_controller(struct twa_softc *); 138 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t); 139 static int twa_done(struct twa_softc *); 140 141 extern struct cfdriver twa_cd; 142 extern uint32_t twa_fw_img_size; 143 extern uint8_t twa_fw_img[]; 144 145 CFATTACH_DECL3_NEW(twa, sizeof(struct twa_softc), 146 twa_match, twa_attach, NULL, NULL, twa_request_bus_scan, NULL, 0); 147 148 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 149 const char twaver[] = "1.50.01.002"; 150 151 /* AEN messages. */ 152 static const struct twa_message twa_aen_table[] = { 153 {0x0000, "AEN queue empty"}, 154 {0x0001, "Controller reset occurred"}, 155 {0x0002, "Degraded unit detected"}, 156 {0x0003, "Controller error occured"}, 157 {0x0004, "Background rebuild failed"}, 158 {0x0005, "Background rebuild done"}, 159 {0x0006, "Incomplete unit detected"}, 160 {0x0007, "Background initialize done"}, 161 {0x0008, "Unclean shutdown detected"}, 162 {0x0009, "Drive timeout detected"}, 163 {0x000A, "Drive error detected"}, 164 {0x000B, "Rebuild started"}, 165 {0x000C, "Background initialize started"}, 166 {0x000D, "Entire logical unit was deleted"}, 167 {0x000E, "Background initialize failed"}, 168 {0x000F, "SMART attribute exceeded threshold"}, 169 {0x0010, "Power supply reported AC under range"}, 170 {0x0011, "Power supply reported DC out of range"}, 171 {0x0012, "Power supply reported a malfunction"}, 172 {0x0013, "Power supply predicted malfunction"}, 173 {0x0014, "Battery charge is below threshold"}, 174 {0x0015, "Fan speed is below threshold"}, 175 {0x0016, "Temperature sensor is above threshold"}, 176 {0x0017, "Power supply was removed"}, 177 {0x0018, "Power supply was inserted"}, 178 {0x0019, "Drive was removed from a bay"}, 179 {0x001A, "Drive was inserted into a bay"}, 180 {0x001B, "Drive bay cover door was opened"}, 181 {0x001C, "Drive bay cover door was closed"}, 182 {0x001D, "Product case was opened"}, 183 {0x0020, "Prepare for shutdown (power-off)"}, 184 {0x0021, "Downgrade UDMA mode to lower speed"}, 185 {0x0022, "Upgrade UDMA mode to higher speed"}, 186 {0x0023, "Sector repair completed"}, 187 {0x0024, "Sbuf memory test failed"}, 188 {0x0025, "Error flushing cached write data to disk"}, 189 {0x0026, "Drive reported data ECC error"}, 190 {0x0027, "DCB has checksum error"}, 191 {0x0028, "DCB version is unsupported"}, 192 {0x0029, "Background verify started"}, 193 {0x002A, "Background verify failed"}, 194 {0x002B, "Background verify done"}, 195 {0x002C, "Bad sector overwritten during rebuild"}, 196 {0x002D, "Source drive error occurred"}, 197 {0x002E, "Replace failed because replacement drive too small"}, 198 {0x002F, "Verify failed because array was never initialized"}, 199 {0x0030, "Unsupported ATA drive"}, 200 {0x0031, "Synchronize host/controller time"}, 201 {0x0032, "Spare capacity is inadequate for some units"}, 202 {0x0033, "Background migration started"}, 203 {0x0034, "Background migration failed"}, 204 {0x0035, "Background migration done"}, 205 {0x0036, "Verify detected and fixed data/parity mismatch"}, 206 {0x0037, "SO-DIMM incompatible"}, 207 {0x0038, "SO-DIMM not detected"}, 208 {0x0039, "Corrected Sbuf ECC error"}, 209 {0x003A, "Drive power on reset detected"}, 210 {0x003B, "Background rebuild paused"}, 211 {0x003C, "Background initialize paused"}, 212 {0x003D, "Background verify paused"}, 213 {0x003E, "Background migration paused"}, 214 {0x003F, "Corrupt flash file system detected"}, 215 {0x0040, "Flash file system repaired"}, 216 {0x0041, "Unit number assignments were lost"}, 217 {0x0042, "Error during read of primary DCB"}, 218 {0x0043, "Latent error found in backup DCB"}, 219 {0x0044, "Battery voltage is normal"}, 220 {0x0045, "Battery voltage is low"}, 221 {0x0046, "Battery voltage is high"}, 222 {0x0047, "Battery voltage is too low"}, 223 {0x0048, "Battery voltage is too high"}, 224 {0x0049, "Battery temperature is normal"}, 225 {0x004A, "Battery temperature is low"}, 226 {0x004B, "Battery temperature is high"}, 227 {0x004C, "Battery temperature is too low"}, 228 {0x004D, "Battery temperature is too high"}, 229 {0x004E, "Battery capacity test started"}, 230 {0x004F, "Cache synchronization skipped"}, 231 {0x0050, "Battery capacity test completed"}, 232 {0x0051, "Battery health check started"}, 233 {0x0052, "Battery health check completed"}, 234 {0x0053, "Battery capacity test needed"}, 235 {0x0054, "Battery charge termination voltage is at high level"}, 236 {0x0055, "Battery charging started"}, 237 {0x0056, "Battery charging completed"}, 238 {0x0057, "Battery charging fault"}, 239 {0x0058, "Battery capacity is below warning level"}, 240 {0x0059, "Battery capacity is below error level"}, 241 {0x005A, "Battery is present"}, 242 {0x005B, "Battery is not present"}, 243 {0x005C, "Battery is weak"}, 244 {0x005D, "Battery health check failed"}, 245 {0x005E, "Cache synchronized after power fail"}, 246 {0x005F, "Cache synchronization failed; some data lost"}, 247 {0x0060, "Bad cache meta data checksum"}, 248 {0x0061, "Bad cache meta data signature"}, 249 {0x0062, "Cache meta data restore failed"}, 250 {0x0063, "BBU not found after power fail"}, 251 {0x00FC, "Recovered/finished array membership update"}, 252 {0x00FD, "Handler lockup"}, 253 {0x00FE, "Retrying PCI transfer"}, 254 {0x00FF, "AEN queue is full"}, 255 {0xFFFFFFFF, NULL} 256 }; 257 258 /* AEN severity table. */ 259 static const char *twa_aen_severity_table[] = { 260 "None", 261 "ERROR", 262 "WARNING", 263 "INFO", 264 "DEBUG", 265 NULL 266 }; 267 268 #if 0 269 /* Error messages. */ 270 static const struct twa_message twa_error_table[] = { 271 {0x0100, "SGL entry contains zero data"}, 272 {0x0101, "Invalid command opcode"}, 273 {0x0102, "SGL entry has unaligned address"}, 274 {0x0103, "SGL size does not match command"}, 275 {0x0104, "SGL entry has illegal length"}, 276 {0x0105, "Command packet is not aligned"}, 277 {0x0106, "Invalid request ID"}, 278 {0x0107, "Duplicate request ID"}, 279 {0x0108, "ID not locked"}, 280 {0x0109, "LBA out of range"}, 281 {0x010A, "Logical unit not supported"}, 282 {0x010B, "Parameter table does not exist"}, 283 {0x010C, "Parameter index does not exist"}, 284 {0x010D, "Invalid field in CDB"}, 285 {0x010E, "Specified port has invalid drive"}, 286 {0x010F, "Parameter item size mismatch"}, 287 {0x0110, "Failed memory allocation"}, 288 {0x0111, "Memory request too large"}, 289 {0x0112, "Out of memory segments"}, 290 {0x0113, "Invalid address to deallocate"}, 291 {0x0114, "Out of memory"}, 292 {0x0115, "Out of heap"}, 293 {0x0120, "Double degrade"}, 294 {0x0121, "Drive not degraded"}, 295 {0x0122, "Reconstruct error"}, 296 {0x0123, "Replace not accepted"}, 297 {0x0124, "Replace drive capacity too small"}, 298 {0x0125, "Sector count not allowed"}, 299 {0x0126, "No spares left"}, 300 {0x0127, "Reconstruct error"}, 301 {0x0128, "Unit is offline"}, 302 {0x0129, "Cannot update status to DCB"}, 303 {0x0130, "Invalid stripe handle"}, 304 {0x0131, "Handle that was not locked"}, 305 {0x0132, "Handle that was not empy"}, 306 {0x0133, "Handle has different owner"}, 307 {0x0140, "IPR has parent"}, 308 {0x0150, "Illegal Pbuf address alignment"}, 309 {0x0151, "Illegal Pbuf transfer length"}, 310 {0x0152, "Illegal Sbuf address alignment"}, 311 {0x0153, "Illegal Sbuf transfer length"}, 312 {0x0160, "Command packet too large"}, 313 {0x0161, "SGL exceeds maximum length"}, 314 {0x0162, "SGL has too many entries"}, 315 {0x0170, "Insufficient resources for rebuilder"}, 316 {0x0171, "Verify error (data != parity)"}, 317 {0x0180, "Requested segment not in directory of this DCB"}, 318 {0x0181, "DCB segment has unsupported version"}, 319 {0x0182, "DCB segment has checksum error"}, 320 {0x0183, "DCB support (settings) segment invalid"}, 321 {0x0184, "DCB UDB (unit descriptor block) segment invalid"}, 322 {0x0185, "DCB GUID (globally unique identifier) segment invalid"}, 323 {0x01A0, "Could not clear Sbuf"}, 324 {0x01C0, "Flash identify failed"}, 325 {0x01C1, "Flash out of bounds"}, 326 {0x01C2, "Flash verify error"}, 327 {0x01C3, "Flash file object not found"}, 328 {0x01C4, "Flash file already present"}, 329 {0x01C5, "Flash file system full"}, 330 {0x01C6, "Flash file not present"}, 331 {0x01C7, "Flash file size error"}, 332 {0x01C8, "Bad flash file checksum"}, 333 {0x01CA, "Corrupt flash file system detected"}, 334 {0x01D0, "Invalid field in parameter list"}, 335 {0x01D1, "Parameter list length error"}, 336 {0x01D2, "Parameter item is not changeable"}, 337 {0x01D3, "Parameter item is not saveable"}, 338 {0x0200, "UDMA CRC error"}, 339 {0x0201, "Internal CRC error"}, 340 {0x0202, "Data ECC error"}, 341 {0x0203, "ADP level 1 error"}, 342 {0x0204, "Port timeout"}, 343 {0x0205, "Drive power on reset"}, 344 {0x0206, "ADP level 2 error"}, 345 {0x0207, "Soft reset failed"}, 346 {0x0208, "Drive not ready"}, 347 {0x0209, "Unclassified port error"}, 348 {0x020A, "Drive aborted command"}, 349 {0x0210, "Internal CRC error"}, 350 {0x0211, "Host PCI bus abort"}, 351 {0x0212, "Host PCI parity error"}, 352 {0x0213, "Port handler error"}, 353 {0x0214, "Token interrupt count error"}, 354 {0x0215, "Timeout waiting for PCI transfer"}, 355 {0x0216, "Corrected buffer ECC"}, 356 {0x0217, "Uncorrected buffer ECC"}, 357 {0x0230, "Unsupported command during flash recovery"}, 358 {0x0231, "Next image buffer expected"}, 359 {0x0232, "Binary image architecture incompatible"}, 360 {0x0233, "Binary image has no signature"}, 361 {0x0234, "Binary image has bad checksum"}, 362 {0x0235, "Image downloaded overflowed buffer"}, 363 {0x0240, "I2C device not found"}, 364 {0x0241, "I2C transaction aborted"}, 365 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"}, 366 {0x0243, "SO-DIMM unsupported"}, 367 {0x0248, "SPI transfer status error"}, 368 {0x0249, "SPI transfer timeout error"}, 369 {0x0250, "Invalid unit descriptor size in CreateUnit"}, 370 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"}, 371 {0x0252, "Invalid value in CreateUnit descriptor"}, 372 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"}, 373 {0x0254, "Unable to create data channel for this unit descriptor"}, 374 {0x0255, "CreateUnit descriptor specifies a drive already in use"}, 375 {0x0256, "Unable to write configuration to all disks during CreateUnit"}, 376 {0x0257, "CreateUnit does not support this descriptor version"}, 377 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"}, 378 {0x0259, "Too many descriptors in CreateUnit"}, 379 {0x025A, "Invalid configuration specified in CreateUnit descriptor"}, 380 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"}, 381 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"}, 382 {0x0260, "SMART attribute exceeded threshold"}, 383 {0xFFFFFFFF, NULL} 384 }; 385 #endif 386 387 struct twa_pci_identity { 388 uint32_t vendor_id; 389 uint32_t product_id; 390 const char *name; 391 }; 392 393 static const struct twa_pci_identity twa_pci_products[] = { 394 { PCI_VENDOR_3WARE, 395 PCI_PRODUCT_3WARE_9000, 396 "3ware 9000 series", 397 }, 398 { PCI_VENDOR_3WARE, 399 PCI_PRODUCT_3WARE_9550, 400 "3ware 9550SX series", 401 }, 402 { PCI_VENDOR_3WARE, 403 PCI_PRODUCT_3WARE_9650, 404 "3ware 9650SE series", 405 }, 406 { PCI_VENDOR_3WARE, 407 PCI_PRODUCT_3WARE_9690, 408 "3ware 9690 series", 409 }, 410 { 0, 411 0, 412 NULL, 413 }, 414 }; 415 416 417 static inline void 418 twa_outl(struct twa_softc *sc, int off, uint32_t val) 419 { 420 421 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val); 422 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 423 BUS_SPACE_BARRIER_WRITE); 424 } 425 426 static inline uint32_t twa_inl(struct twa_softc *sc, int off) 427 { 428 429 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4, 430 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 431 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off)); 432 } 433 434 void 435 twa_request_wait_handler(struct twa_request *tr) 436 { 437 438 wakeup(tr); 439 } 440 441 static const struct twa_pci_identity * 442 twa_lookup(pcireg_t id) 443 { 444 const struct twa_pci_identity *entry; 445 int i; 446 447 for (i = 0; i < __arraycount(twa_pci_products); i++) { 448 entry = &twa_pci_products[i]; 449 if (entry->vendor_id == PCI_VENDOR(id) && 450 entry->product_id == PCI_PRODUCT(id)) { 451 return entry; 452 } 453 } 454 return NULL; 455 } 456 457 static int 458 twa_match(device_t parent, cfdata_t cfdata, void *aux) 459 { 460 struct pci_attach_args *pa = aux; 461 const struct twa_pci_identity *entry; 462 463 entry = twa_lookup(pa->pa_id); 464 if (entry != NULL) { 465 return 1; 466 } 467 return (0); 468 } 469 470 static const char * 471 twa_find_msg_string(const struct twa_message *table, uint16_t code) 472 { 473 int i; 474 475 for (i = 0; table[i].message != NULL; i++) 476 if (table[i].code == code) 477 return(table[i].message); 478 479 return(table[i].message); 480 } 481 482 void 483 twa_release_request(struct twa_request *tr) 484 { 485 int s; 486 struct twa_softc *sc; 487 488 sc = tr->tr_sc; 489 490 if ((tr->tr_flags & TWA_CMD_AEN) == 0) { 491 s = splbio(); 492 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link); 493 splx(s); 494 if (__predict_false((tr->tr_sc->twa_sc_flags & 495 TWA_STATE_REQUEST_WAIT) != 0)) { 496 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT; 497 wakeup(&sc->twa_free); 498 } 499 } else 500 tr->tr_flags &= ~TWA_CMD_AEN_BUSY; 501 } 502 503 static void 504 twa_unmap_request(struct twa_request *tr) 505 { 506 struct twa_softc *sc = tr->tr_sc; 507 uint8_t cmd_status; 508 int s; 509 510 /* If the command involved data, unmap that too. */ 511 if (tr->tr_data != NULL) { 512 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) 513 cmd_status = tr->tr_command->command.cmd_pkt_9k.status; 514 else 515 cmd_status = 516 tr->tr_command->command.cmd_pkt_7k.generic.status; 517 518 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 519 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 520 0, tr->tr_length, BUS_DMASYNC_POSTREAD); 521 /* 522 * If we are using a bounce buffer, and we are reading 523 * data, copy the real data in. 524 */ 525 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 526 if (cmd_status == 0) 527 memcpy(tr->tr_real_data, tr->tr_data, 528 tr->tr_real_length); 529 } 530 if (tr->tr_flags & TWA_CMD_DATA_IN) 531 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 532 0, tr->tr_length, BUS_DMASYNC_POSTWRITE); 533 534 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map); 535 } 536 537 /* Free alignment buffer if it was used. */ 538 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 539 s = splvm(); 540 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data, 541 tr->tr_length); 542 splx(s); 543 tr->tr_data = tr->tr_real_data; 544 tr->tr_length = tr->tr_real_length; 545 } 546 } 547 548 /* 549 * Function name: twa_wait_request 550 * Description: Sends down a firmware cmd, and waits for the completion, 551 * but NOT in a tight loop. 552 * 553 * Input: tr -- ptr to request pkt 554 * timeout -- max # of seconds to wait before giving up 555 * Output: None 556 * Return value: 0 -- success 557 * non-zero-- failure 558 */ 559 static int 560 twa_wait_request(struct twa_request *tr, uint32_t timeout) 561 { 562 time_t end_time; 563 struct timeval t1; 564 int s, rv; 565 566 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST; 567 tr->tr_callback = twa_request_wait_handler; 568 tr->tr_status = TWA_CMD_BUSY; 569 570 rv = twa_map_request(tr); 571 572 if (rv != 0) 573 return (rv); 574 575 microtime(&t1); 576 end_time = t1.tv_usec + 577 (timeout * 1000 * 100); 578 579 while (tr->tr_status != TWA_CMD_COMPLETE) { 580 rv = tr->tr_error; 581 if (rv != 0) 582 return(rv); 583 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0) 584 break; 585 586 if (rv == EWOULDBLOCK) { 587 /* 588 * We will reset the controller only if the request has 589 * already been submitted, so as to not lose the 590 * request packet. If a busy request timed out, the 591 * reset will take care of freeing resources. If a 592 * pending request timed out, we will free resources 593 * for that request, right here. So, the caller is 594 * expected to NOT cleanup when ETIMEDOUT is returned. 595 */ 596 if (tr->tr_status == TWA_CMD_BUSY) 597 twa_reset(tr->tr_sc); 598 else { 599 /* Request was never submitted. Clean up. */ 600 s = splbio(); 601 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, 602 tr_link); 603 splx(s); 604 605 twa_unmap_request(tr); 606 if (tr->tr_data) 607 free(tr->tr_data, M_DEVBUF); 608 609 twa_release_request(tr); 610 } 611 return(ETIMEDOUT); 612 } 613 /* 614 * Either the request got completed, or we were woken up by a 615 * signal. Calculate the new timeout, in case it was the 616 * latter. 617 */ 618 microtime(&t1); 619 620 timeout = (end_time - t1.tv_usec) / (1000 * 100); 621 } 622 return(rv); 623 } 624 625 /* 626 * Function name: twa_immediate_request 627 * Description: Sends down a firmware cmd, and waits for the completion 628 * in a tight loop. 629 * 630 * Input: tr -- ptr to request pkt 631 * timeout -- max # of seconds to wait before giving up 632 * Output: None 633 * Return value: 0 -- success 634 * non-zero-- failure 635 */ 636 static int 637 twa_immediate_request(struct twa_request *tr, uint32_t timeout) 638 { 639 struct timeval t1; 640 int s = 0, rv = 0; 641 642 rv = twa_map_request(tr); 643 644 if (rv != 0) 645 return(rv); 646 647 timeout = (timeout * 10000 * 10); 648 649 microtime(&t1); 650 651 timeout += t1.tv_usec; 652 653 do { 654 rv = tr->tr_error; 655 if (rv != 0) 656 return(rv); 657 s = splbio(); 658 twa_done(tr->tr_sc); 659 splx(s); 660 if (tr->tr_status == TWA_CMD_COMPLETE) 661 return(rv); 662 microtime(&t1); 663 } while (t1.tv_usec <= timeout); 664 665 /* 666 * We will reset the controller only if the request has 667 * already been submitted, so as to not lose the 668 * request packet. If a busy request timed out, the 669 * reset will take care of freeing resources. If a 670 * pending request timed out, we will free resources 671 * for that request, right here. So, the caller is 672 * expected to NOT cleanup when ETIMEDOUT is returned. 673 */ 674 rv = ETIMEDOUT; 675 676 if (tr->tr_status == TWA_CMD_BUSY) 677 twa_reset(tr->tr_sc); 678 else { 679 /* Request was never submitted. Clean up. */ 680 s = splbio(); 681 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link); 682 splx(s); 683 twa_unmap_request(tr); 684 if (tr->tr_data) 685 free(tr->tr_data, M_DEVBUF); 686 687 twa_release_request(tr); 688 } 689 return (rv); 690 } 691 692 static int 693 twa_inquiry(struct twa_request *tr, int lunid) 694 { 695 int error; 696 struct twa_command_9k *tr_9k_cmd; 697 698 if (tr->tr_data == NULL) 699 return (ENOMEM); 700 701 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 702 703 tr->tr_length = TWA_SECTOR_SIZE; 704 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 705 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 706 707 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 708 709 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 710 tr_9k_cmd->unit = lunid; 711 tr_9k_cmd->request_id = tr->tr_request_id; 712 tr_9k_cmd->status = 0; 713 tr_9k_cmd->sgl_offset = 16; 714 tr_9k_cmd->sgl_entries = 1; 715 /* create the CDB here */ 716 tr_9k_cmd->cdb[0] = INQUIRY; 717 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 718 tr_9k_cmd->cdb[4] = 255; 719 720 /* XXXX setup page data no lun device 721 * it seems 9000 series does not indicate 722 * NOTPRESENT - need more investigation 723 */ 724 ((struct scsipi_inquiry_data *)tr->tr_data)->device = 725 SID_QUAL_LU_NOTPRESENT; 726 727 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 728 if (error != 0) 729 return (error); 730 731 if (((struct scsipi_inquiry_data *)tr->tr_data)->device == 732 SID_QUAL_LU_NOTPRESENT) 733 error = 1; 734 735 return (error); 736 } 737 738 static int 739 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi) 740 { 741 742 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor); 743 744 return (1); 745 } 746 747 748 static uint64_t 749 twa_read_capacity(struct twa_request *tr, int lunid) 750 { 751 int error; 752 struct twa_command_9k *tr_9k_cmd; 753 uint64_t array_size = 0LL; 754 755 if (tr->tr_data == NULL) 756 return (ENOMEM); 757 758 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 759 760 tr->tr_length = TWA_SECTOR_SIZE; 761 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 762 tr->tr_flags |= TWA_CMD_DATA_OUT; 763 764 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 765 766 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 767 tr_9k_cmd->unit = lunid; 768 tr_9k_cmd->request_id = tr->tr_request_id; 769 tr_9k_cmd->status = 0; 770 tr_9k_cmd->sgl_offset = 16; 771 tr_9k_cmd->sgl_entries = 1; 772 /* create the CDB here */ 773 tr_9k_cmd->cdb[0] = READ_CAPACITY_16; 774 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION; 775 776 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 777 778 if (error == 0) { 779 #if BYTE_ORDER == BIG_ENDIAN 780 array_size = bswap64(_8btol( 781 ((struct scsipi_read_capacity_16_data *)tr->tr_data)->addr) + 1); 782 #else 783 array_size = _8btol(((struct scsipi_read_capacity_16_data *) 784 tr->tr_data)->addr) + 1; 785 #endif 786 } 787 return (array_size); 788 } 789 790 static int 791 twa_request_sense(struct twa_request *tr, int lunid) 792 { 793 int error = 1; 794 struct twa_command_9k *tr_9k_cmd; 795 796 if (tr->tr_data == NULL) 797 return (error); 798 799 memset(tr->tr_data, 0, TWA_SECTOR_SIZE); 800 801 tr->tr_length = TWA_SECTOR_SIZE; 802 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K; 803 tr->tr_flags |= TWA_CMD_DATA_OUT; 804 805 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k; 806 807 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND; 808 tr_9k_cmd->unit = lunid; 809 tr_9k_cmd->request_id = tr->tr_request_id; 810 tr_9k_cmd->status = 0; 811 tr_9k_cmd->sgl_offset = 16; 812 tr_9k_cmd->sgl_entries = 1; 813 /* create the CDB here */ 814 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE; 815 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e); 816 tr_9k_cmd->cdb[4] = 255; 817 818 /*XXX AEN notification called in interrupt context 819 * so just queue the request. Return as quickly 820 * as possible from interrupt 821 */ 822 if ((tr->tr_flags & TWA_CMD_AEN) != 0) 823 error = twa_map_request(tr); 824 else 825 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 826 827 return (error); 828 } 829 830 static int 831 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs) 832 { 833 struct twa_request *tr; 834 struct twa_command_packet *tc; 835 bus_dma_segment_t seg; 836 size_t max_segs, max_xfer; 837 int i, rv, rseg, size; 838 839 sc->sc_units = malloc(sc->sc_nunits * 840 sizeof(struct twa_drive), M_DEVBUF, M_WAITOK | M_ZERO); 841 sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request), 842 M_DEVBUF, M_WAITOK); 843 844 size = num_reqs * sizeof(struct twa_command_packet); 845 846 /* Allocate memory for cmd pkts. */ 847 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag, 848 size, PAGE_SIZE, 0, &seg, 849 1, &rseg, BUS_DMA_NOWAIT)) != 0){ 850 aprint_error_dev(sc->twa_dv, "unable to allocate " 851 "command packets, rv = %d\n", rv); 852 return (ENOMEM); 853 } 854 855 if ((rv = bus_dmamem_map(sc->twa_dma_tag, 856 &seg, rseg, size, (void **)&sc->twa_cmds, 857 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 858 aprint_error_dev(sc->twa_dv, 859 "unable to map commands, rv = %d\n", rv); 860 return (1); 861 } 862 863 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 864 size, num_reqs, size, 865 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) { 866 aprint_error_dev(sc->twa_dv, 867 "unable to create command DMA map, " 868 "rv = %d\n", rv); 869 return (ENOMEM); 870 } 871 872 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map, 873 sc->twa_cmds, size, NULL, 874 BUS_DMA_NOWAIT)) != 0) { 875 aprint_error_dev(sc->twa_dv, 876 "unable to load command DMA map, rv = %d\n", rv); 877 return (1); 878 } 879 880 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) { 881 aprint_error_dev(sc->twa_dv, 882 "DMA map memory not aligned on %d boundary\n", 883 TWA_ALIGNMENT); 884 885 return (1); 886 } 887 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds; 888 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr; 889 890 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request)); 891 memset(sc->twa_cmd_pkt_buf, 0, 892 num_reqs * sizeof(struct twa_command_packet)); 893 894 sc->sc_twa_request = sc->twa_req_buf; 895 max_segs = twa_get_maxsegs(); 896 max_xfer = twa_get_maxxfer(max_segs); 897 898 for (i = 0; i < num_reqs; i++, tc++) { 899 tr = &(sc->twa_req_buf[i]); 900 tr->tr_command = tc; 901 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys + 902 (i * sizeof(struct twa_command_packet)); 903 tr->tr_request_id = i; 904 tr->tr_sc = sc; 905 906 /* 907 * Create a map for data buffers. maxsize (256 * 1024) used in 908 * bus_dma_tag_create above should suffice the bounce page needs 909 * for data buffers, since the max I/O size we support is 128KB. 910 * If we supported I/O's bigger than 256KB, we would have to 911 * create a second dma_tag, with the appropriate maxsize. 912 */ 913 if ((rv = bus_dmamap_create(sc->twa_dma_tag, 914 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT, 915 &tr->tr_dma_map)) != 0) { 916 aprint_error_dev(sc->twa_dv, 917 "unable to create command DMA map, " 918 "rv = %d\n", rv); 919 return (ENOMEM); 920 } 921 /* Insert request into the free queue. */ 922 if (i != 0) { 923 sc->twa_lookup[i] = tr; 924 twa_release_request(tr); 925 } else 926 tr->tr_flags |= TWA_CMD_AEN; 927 } 928 return(0); 929 } 930 931 static void 932 twa_recompute_openings(struct twa_softc *sc) 933 { 934 struct twa_drive *td; 935 int unit; 936 int openings; 937 uint64_t total_size; 938 939 total_size = 0; 940 for (unit = 0; unit < sc->sc_nunits; unit++) { 941 td = &sc->sc_units[unit]; 942 total_size += td->td_size; 943 } 944 945 for (unit = 0; unit < sc->sc_nunits; unit++) { 946 td = &sc->sc_units[unit]; 947 /* 948 * In theory, TWA_Q_LENGTH - 1 should be usable, but 949 * keep one additional ccb for internal commands. 950 * This makes the controller more reliable under load. 951 */ 952 if (total_size > 0) { 953 openings = (TWA_Q_LENGTH - 2) * td->td_size 954 / total_size; 955 } else 956 openings = 0; 957 958 if (openings == td->td_openings) 959 continue; 960 td->td_openings = openings; 961 962 #ifdef TWA_DEBUG 963 printf("%s: unit %d openings %d\n", 964 device_xname(sc->twa_dv), unit, openings); 965 #endif 966 if (td->td_dev != NULL) 967 (*td->td_callbacks->tcb_openings)(td->td_dev, 968 td->td_openings); 969 } 970 } 971 972 /* ARGSUSED */ 973 static int 974 twa_request_bus_scan(device_t self, const char *attr, const int *flags) 975 { 976 struct twa_softc *sc = device_private(self); 977 struct twa_drive *td; 978 struct twa_request *tr; 979 struct twa_attach_args twaa; 980 int locs[TWACF_NLOCS]; 981 int s, unit; 982 983 s = splbio(); 984 for (unit = 0; unit < sc->sc_nunits; unit++) { 985 986 if ((tr = twa_get_request(sc, 0)) == NULL) { 987 splx(s); 988 return (EIO); 989 } 990 991 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 992 993 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 994 995 td = &sc->sc_units[unit]; 996 997 if (twa_inquiry(tr, unit) == 0) { 998 if (td->td_dev == NULL) { 999 twa_print_inquiry_data(sc, 1000 ((struct scsipi_inquiry_data *)tr->tr_data)); 1001 1002 sc->sc_units[unit].td_size = 1003 twa_read_capacity(tr, unit); 1004 1005 twaa.twaa_unit = unit; 1006 1007 twa_recompute_openings(sc); 1008 1009 locs[TWACF_UNIT] = unit; 1010 1011 sc->sc_units[unit].td_dev = 1012 config_found(sc->twa_dv, &twaa, twa_print, 1013 CFARG_SUBMATCH, config_stdsubmatch, 1014 CFARG_IATTR, attr, 1015 CFARG_LOCATORS, locs, 1016 CFARG_EOL); 1017 } 1018 } else { 1019 if (td->td_dev != NULL) { 1020 (void) config_detach(td->td_dev, DETACH_FORCE); 1021 td->td_dev = NULL; 1022 td->td_size = 0; 1023 1024 twa_recompute_openings(sc); 1025 } 1026 } 1027 free(tr->tr_data, M_DEVBUF); 1028 1029 twa_release_request(tr); 1030 } 1031 splx(s); 1032 1033 return (0); 1034 } 1035 1036 1037 #ifdef DIAGNOSTIC 1038 static inline void 1039 twa_check_busy_q(struct twa_request *tr) 1040 { 1041 struct twa_request *rq; 1042 struct twa_softc *sc = tr->tr_sc; 1043 1044 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) { 1045 if (tr->tr_request_id == rq->tr_request_id) { 1046 panic("cannot submit same request more than once"); 1047 } else if (tr->bp == rq->bp && tr->bp != 0) { 1048 /* XXX A check for 0 for the buf ptr is needed to 1049 * guard against ioctl requests with a buf ptr of 1050 * 0 and also aen notifications. Looking for 1051 * external cmds only. 1052 */ 1053 panic("cannot submit same buf more than once"); 1054 } else { 1055 /* Empty else statement */ 1056 } 1057 } 1058 } 1059 #endif 1060 1061 static int 1062 twa_start(struct twa_request *tr) 1063 { 1064 struct twa_softc *sc = tr->tr_sc; 1065 uint32_t status_reg; 1066 int s; 1067 int error; 1068 1069 s = splbio(); 1070 1071 /* 1072 * The 9650 and 9690 have a bug in the detection of the full queue 1073 * condition. 1074 * 1075 * If a write operation has filled the queue and is directly followed 1076 * by a status read, it sometimes doesn't return the correct result. 1077 * To work around this, the upper 32bit are written first. 1078 * This effectively serialises the hardware, but does not change 1079 * the state of the queue. 1080 */ 1081 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1082 /* Write lower 32 bits of address */ 1083 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys + 1084 sizeof(struct twa_command_header)); 1085 } 1086 1087 /* Check to see if we can post a command. */ 1088 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1089 if ((error = twa_check_ctlr_state(sc, status_reg))) 1090 goto out; 1091 1092 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) { 1093 if (tr->tr_status != TWA_CMD_PENDING) { 1094 tr->tr_status = TWA_CMD_PENDING; 1095 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending, 1096 tr, tr_link); 1097 } 1098 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1099 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT); 1100 error = EBUSY; 1101 } else { 1102 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map, 1103 (char *)tr->tr_command - (char *)sc->twa_cmds, 1104 sizeof(struct twa_command_packet), 1105 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1106 1107 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) { 1108 /* 1109 * Cmd queue is not full. Post the command 1110 * by writing upper 32 bits of address. 1111 */ 1112 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys + 1113 sizeof(struct twa_command_header)); 1114 } else { 1115 /* Cmd queue is not full. Post the command. */ 1116 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys + 1117 sizeof(struct twa_command_header)); 1118 } 1119 1120 /* Mark the request as currently being processed. */ 1121 tr->tr_status = TWA_CMD_BUSY; 1122 1123 #ifdef DIAGNOSTIC 1124 twa_check_busy_q(tr); 1125 #endif 1126 1127 /* Move the request into the busy queue. */ 1128 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link); 1129 } 1130 out: 1131 splx(s); 1132 return(error); 1133 } 1134 1135 static int 1136 twa_drain_response_queue(struct twa_softc *sc) 1137 { 1138 uint32_t status_reg; 1139 1140 for (;;) { 1141 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1142 if (twa_check_ctlr_state(sc, status_reg)) 1143 return(1); 1144 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1145 return(0); /* no more response queue entries */ 1146 (void)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1147 } 1148 } 1149 1150 /* 1151 * twa_drain_response_queue_large: 1152 * 1153 * specific to the 9550 and 9650 controller to remove requests. 1154 * 1155 * Removes all requests from "large" response queue on the 9550 controller. 1156 * This procedure is called as part of the 9550 controller reset sequence. 1157 */ 1158 static int 1159 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout) 1160 { 1161 uint32_t start_time = 0, end_time; 1162 uint32_t response = 0; 1163 1164 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 || 1165 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) { 1166 start_time = 0; 1167 end_time = (timeout * TWA_MICROSECOND); 1168 1169 while ((response & 1170 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) { 1171 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET); 1172 if (start_time >= end_time) 1173 return (1); 1174 DELAY(1); 1175 start_time++; 1176 } 1177 /* P-chip delay */ 1178 DELAY(500000); 1179 } 1180 return (0); 1181 } 1182 1183 static void 1184 twa_drain_busy_queue(struct twa_softc *sc) 1185 { 1186 struct twa_request *tr; 1187 1188 /* Walk the busy queue. */ 1189 1190 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) { 1191 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link); 1192 1193 twa_unmap_request(tr); 1194 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) || 1195 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) { 1196 /* It's an internal/ioctl request. Simply free it. */ 1197 if (tr->tr_data) 1198 free(tr->tr_data, M_DEVBUF); 1199 twa_release_request(tr); 1200 } else { 1201 /* It's a SCSI request. Complete it. */ 1202 tr->tr_command->command.cmd_pkt_9k.status = EIO; 1203 if (tr->tr_callback) 1204 tr->tr_callback(tr); 1205 } 1206 } 1207 } 1208 1209 static int 1210 twa_drain_pending_queue(struct twa_softc *sc) 1211 { 1212 struct twa_request *tr; 1213 int s, error = 0; 1214 1215 /* 1216 * Pull requests off the pending queue, and submit them. 1217 */ 1218 s = splbio(); 1219 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) { 1220 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link); 1221 1222 if ((error = twa_start(tr))) { 1223 if (error == EBUSY) { 1224 tr->tr_status = TWA_CMD_PENDING; 1225 1226 /* queue at the head */ 1227 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending, 1228 tr, tr_link); 1229 error = 0; 1230 break; 1231 } else { 1232 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) { 1233 tr->tr_error = error; 1234 tr->tr_callback(tr); 1235 error = EIO; 1236 } 1237 } 1238 } 1239 } 1240 splx(s); 1241 1242 return(error); 1243 } 1244 1245 static int 1246 twa_drain_aen_queue(struct twa_softc *sc) 1247 { 1248 int s, error = 0; 1249 struct twa_request *tr; 1250 struct twa_command_header *cmd_hdr; 1251 struct timeval t1; 1252 uint32_t timeout; 1253 1254 for (;;) { 1255 if ((tr = twa_get_request(sc, 0)) == NULL) { 1256 error = EIO; 1257 break; 1258 } 1259 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 1260 tr->tr_callback = NULL; 1261 1262 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1263 1264 if (tr->tr_data == NULL) { 1265 error = 1; 1266 goto out; 1267 } 1268 1269 if (twa_request_sense(tr, 0) != 0) { 1270 error = 1; 1271 break; 1272 } 1273 1274 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD); 1275 1276 microtime(&t1); 1277 1278 timeout += t1.tv_usec; 1279 1280 do { 1281 s = splbio(); 1282 twa_done(tr->tr_sc); 1283 splx(s); 1284 if (tr->tr_status != TWA_CMD_BUSY) 1285 break; 1286 microtime(&t1); 1287 } while (t1.tv_usec <= timeout); 1288 1289 if (tr->tr_status != TWA_CMD_COMPLETE) { 1290 error = ETIMEDOUT; 1291 break; 1292 } 1293 1294 if ((error = tr->tr_command->command.cmd_pkt_9k.status)) 1295 break; 1296 1297 cmd_hdr = (struct twa_command_header *)(tr->tr_data); 1298 if ((cmd_hdr->status_block.error) /* aen_code */ 1299 == TWA_AEN_QUEUE_EMPTY) 1300 break; 1301 (void)twa_enqueue_aen(sc, cmd_hdr); 1302 1303 free(tr->tr_data, M_DEVBUF); 1304 twa_release_request(tr); 1305 } 1306 out: 1307 if (tr) { 1308 if (tr->tr_data) 1309 free(tr->tr_data, M_DEVBUF); 1310 1311 twa_release_request(tr); 1312 } 1313 return(error); 1314 } 1315 1316 1317 #if 0 1318 static void 1319 twa_check_response_q(struct twa_request *tr, int clear) 1320 { 1321 int j; 1322 static int i = 0; 1323 static struct twa_request *req = 0; 1324 static struct buf *hist[255]; 1325 1326 1327 if (clear) { 1328 i = 0; 1329 for (j = 0; j < 255; j++) 1330 hist[j] = 0; 1331 return; 1332 } 1333 1334 if (req == 0) 1335 req = tr; 1336 1337 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) { 1338 /* XXX this is bogus ! req can't be anything else but tr ! */ 1339 if (req->tr_request_id == tr->tr_request_id) 1340 panic("req id: %d on controller queue twice", 1341 tr->tr_request_id); 1342 1343 for (j = 0; j < i; j++) 1344 if (tr->bp == hist[j]) 1345 panic("req id: %d buf found twice", 1346 tr->tr_request_id); 1347 } 1348 req = tr; 1349 1350 hist[i++] = req->bp; 1351 } 1352 #endif 1353 1354 static int 1355 twa_done(struct twa_softc *sc) 1356 { 1357 union twa_response_queue rq; 1358 struct twa_request *tr; 1359 int rv = 0; 1360 uint32_t status_reg; 1361 1362 for (;;) { 1363 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1364 if ((rv = twa_check_ctlr_state(sc, status_reg))) 1365 break; 1366 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY) 1367 break; 1368 /* Response queue is not empty. */ 1369 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET); 1370 tr = sc->sc_twa_request + rq.u.response_id; 1371 #if 0 1372 twa_check_response_q(tr, 0); 1373 #endif 1374 /* Unmap the command packet, and any associated data buffer. */ 1375 twa_unmap_request(tr); 1376 1377 tr->tr_status = TWA_CMD_COMPLETE; 1378 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link); 1379 1380 if (tr->tr_callback) 1381 tr->tr_callback(tr); 1382 } 1383 (void)twa_drain_pending_queue(sc); 1384 1385 #if 0 1386 twa_check_response_q(NULL, 1); 1387 #endif 1388 return(rv); 1389 } 1390 1391 /* 1392 * Function name: twa_init_ctlr 1393 * Description: Establishes a logical connection with the controller. 1394 * If bundled with firmware, determines whether or not 1395 * the driver is compatible with the firmware on the 1396 * controller, before proceeding to work with it. 1397 * 1398 * Input: sc -- ptr to per ctlr structure 1399 * Output: None 1400 * Return value: 0 -- success 1401 * non-zero-- failure 1402 */ 1403 static int 1404 twa_init_ctlr(struct twa_softc *sc) 1405 { 1406 uint16_t fw_on_ctlr_srl = 0; 1407 uint16_t fw_on_ctlr_arch_id = 0; 1408 uint16_t fw_on_ctlr_branch = 0; 1409 uint16_t fw_on_ctlr_build = 0; 1410 uint32_t init_connect_result = 0; 1411 int error = 0; 1412 1413 /* Wait for the controller to become ready. */ 1414 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY, 1415 TWA_REQUEST_TIMEOUT_PERIOD)) { 1416 return(ENXIO); 1417 } 1418 /* Drain the response queue. */ 1419 if (twa_drain_response_queue(sc)) 1420 return(1); 1421 1422 /* Establish a logical connection with the controller. */ 1423 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 1424 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL, 1425 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH, 1426 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl, 1427 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch, 1428 &fw_on_ctlr_build, &init_connect_result))) { 1429 return(error); 1430 } 1431 twa_drain_aen_queue(sc); 1432 1433 /* Set controller state to initialized. */ 1434 sc->twa_state &= ~TWA_STATE_SHUTDOWN; 1435 return(0); 1436 } 1437 1438 static int 1439 twa_setup(device_t self) 1440 { 1441 struct twa_softc *sc; 1442 struct tw_cl_event_packet *aen_queue; 1443 uint32_t i = 0; 1444 int error = 0; 1445 1446 sc = device_private(self); 1447 1448 /* Initialize request queues. */ 1449 TAILQ_INIT(&sc->twa_free); 1450 TAILQ_INIT(&sc->twa_busy); 1451 TAILQ_INIT(&sc->twa_pending); 1452 1453 sc->twa_sc_flags = 0; 1454 1455 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) { 1456 1457 return(ENOMEM); 1458 } 1459 1460 /* Allocate memory for the AEN queue. */ 1461 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) * 1462 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) { 1463 /* 1464 * This should not cause us to return error. We will only be 1465 * unable to support AEN's. But then, we will have to check 1466 * time and again to see if we can support AEN's, if we 1467 * continue. So, we will just return error. 1468 */ 1469 return (ENOMEM); 1470 } 1471 /* Initialize the aen queue. */ 1472 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH); 1473 1474 for (i = 0; i < TWA_Q_LENGTH; i++) 1475 sc->twa_aen_queue[i] = &(aen_queue[i]); 1476 1477 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1478 TWA_CONTROL_DISABLE_INTERRUPTS); 1479 1480 /* Initialize the controller. */ 1481 if ((error = twa_init_ctlr(sc))) { 1482 /* Soft reset the controller, and try one more time. */ 1483 1484 printf("%s: controller initialization failed. " 1485 "Retrying initialization\n", device_xname(sc->twa_dv)); 1486 1487 if ((error = twa_soft_reset(sc)) == 0) 1488 error = twa_init_ctlr(sc); 1489 } 1490 1491 twa_describe_controller(sc); 1492 1493 error = twa_request_bus_scan(self, NULL, NULL); 1494 1495 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1496 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 1497 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 1498 TWA_CONTROL_ENABLE_INTERRUPTS); 1499 1500 return (error); 1501 } 1502 1503 void *twa_sdh; 1504 1505 static void 1506 twa_attach(device_t parent, device_t self, void *aux) 1507 { 1508 struct pci_attach_args *pa; 1509 struct twa_softc *sc; 1510 pci_chipset_tag_t pc; 1511 pcireg_t csr; 1512 pci_intr_handle_t ih; 1513 const char *intrstr; 1514 const struct sysctlnode *node; 1515 const struct twa_pci_identity *entry; 1516 int i; 1517 bool use_64bit; 1518 char intrbuf[PCI_INTRSTR_LEN]; 1519 1520 sc = device_private(self); 1521 1522 sc->twa_dv = self; 1523 1524 pa = aux; 1525 pc = pa->pa_pc; 1526 sc->pc = pa->pa_pc; 1527 sc->tag = pa->pa_tag; 1528 1529 entry = twa_lookup(pa->pa_id); 1530 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1); 1531 1532 sc->sc_quirks = 0; 1533 1534 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) { 1535 sc->sc_nunits = TWA_MAX_UNITS; 1536 use_64bit = false; 1537 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 1538 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) { 1539 aprint_error_dev(sc->twa_dv, "can't map i/o space\n"); 1540 return; 1541 } 1542 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) { 1543 sc->sc_nunits = TWA_MAX_UNITS; 1544 use_64bit = true; 1545 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1546 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1547 &sc->twa_bus_ioh, NULL, NULL)) { 1548 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1549 return; 1550 } 1551 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) { 1552 sc->sc_nunits = TWA_9650_MAX_UNITS; 1553 use_64bit = true; 1554 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1555 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1556 &sc->twa_bus_ioh, NULL, NULL)) { 1557 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1558 return; 1559 } 1560 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1561 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) { 1562 sc->sc_nunits = TWA_9690_MAX_UNITS; 1563 use_64bit = true; 1564 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08, 1565 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot, 1566 &sc->twa_bus_ioh, NULL, NULL)) { 1567 aprint_error_dev(sc->twa_dv, "can't map mem space\n"); 1568 return; 1569 } 1570 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG; 1571 } else { 1572 sc->sc_nunits = 0; 1573 use_64bit = false; 1574 aprint_error_dev(sc->twa_dv, 1575 "product id 0x%02x not recognized\n", 1576 PCI_PRODUCT(pa->pa_id)); 1577 return; 1578 } 1579 1580 if (pci_dma64_available(pa) && use_64bit) { 1581 aprint_verbose_dev(self, "64-bit DMA addressing active\n"); 1582 sc->twa_dma_tag = pa->pa_dmat64; 1583 } else { 1584 sc->twa_dma_tag = pa->pa_dmat; 1585 } 1586 1587 sc->sc_product_id = PCI_PRODUCT(pa->pa_id); 1588 /* Enable the device. */ 1589 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 1590 1591 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 1592 csr | PCI_COMMAND_MASTER_ENABLE); 1593 1594 /* Map and establish the interrupt. */ 1595 if (pci_intr_map(pa, &ih)) { 1596 aprint_error_dev(sc->twa_dv, "can't map interrupt\n"); 1597 return; 1598 } 1599 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 1600 1601 sc->twa_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, twa_intr, sc, 1602 device_xname(self)); 1603 if (sc->twa_ih == NULL) { 1604 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n", 1605 (intrstr) ? " at " : "", 1606 (intrstr) ? intrstr : ""); 1607 return; 1608 } 1609 1610 if (intrstr != NULL) 1611 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", intrstr); 1612 1613 twa_setup(self); 1614 1615 if (twa_sdh == NULL) 1616 twa_sdh = shutdownhook_establish(twa_shutdown, NULL); 1617 1618 /* sysctl set-up for 3ware cli */ 1619 if (sysctl_createv(NULL, 0, NULL, &node, 1620 0, CTLTYPE_NODE, device_xname(sc->twa_dv), 1621 SYSCTL_DESCR("twa driver information"), 1622 NULL, 0, NULL, 0, 1623 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 1624 aprint_error_dev(sc->twa_dv, 1625 "could not create %s.%s sysctl node\n", 1626 "hw", device_xname(sc->twa_dv)); 1627 return; 1628 } 1629 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 1630 0, CTLTYPE_STRING, "driver_version", 1631 SYSCTL_DESCR("twa driver version"), 1632 NULL, 0, __UNCONST(&twaver), 0, 1633 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 1634 != 0) { 1635 aprint_error_dev(sc->twa_dv, 1636 "could not create %s.%s.driver_version sysctl\n", 1637 "hw", device_xname(sc->twa_dv)); 1638 return; 1639 } 1640 1641 return; 1642 } 1643 1644 static void 1645 twa_shutdown(void *arg) 1646 { 1647 extern struct cfdriver twa_cd; 1648 struct twa_softc *sc; 1649 int i, unit; 1650 1651 for (i = 0; i < twa_cd.cd_ndevs; i++) { 1652 if ((sc = device_lookup_private(&twa_cd, i)) == NULL) 1653 continue; 1654 1655 for (unit = 0; unit < sc->sc_nunits; unit++) 1656 if (sc->sc_units[unit].td_dev != NULL) 1657 (void) config_detach(sc->sc_units[unit].td_dev, 1658 DETACH_FORCE | DETACH_QUIET); 1659 1660 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1661 TWA_CONTROL_DISABLE_INTERRUPTS); 1662 1663 /* Let the controller know that we are going down. */ 1664 (void)twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS, 1665 0, 0, 0, 0, 0, 1666 NULL, NULL, NULL, NULL, NULL); 1667 } 1668 } 1669 1670 void 1671 twa_register_callbacks(struct twa_softc *sc, int unit, 1672 const struct twa_callbacks *tcb) 1673 { 1674 1675 sc->sc_units[unit].td_callbacks = tcb; 1676 } 1677 1678 /* 1679 * Print autoconfiguration message for a sub-device 1680 */ 1681 static int 1682 twa_print(void *aux, const char *pnp) 1683 { 1684 struct twa_attach_args *twaa; 1685 1686 twaa = aux; 1687 1688 if (pnp !=NULL) 1689 aprint_normal("block device at %s\n", pnp); 1690 aprint_normal(" unit %d\n", twaa->twaa_unit); 1691 return (UNCONF); 1692 } 1693 1694 static void 1695 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments) 1696 { 1697 int i; 1698 for (i = 0; i < nsegments; i++) { 1699 sgl[i].address = segs[i].ds_addr; 1700 sgl[i].length = (uint32_t)(segs[i].ds_len); 1701 } 1702 } 1703 1704 static int 1705 twa_submit_io(struct twa_request *tr) 1706 { 1707 int error; 1708 1709 if ((error = twa_start(tr))) { 1710 if (error == EBUSY) 1711 error = 0; /* request is in the pending queue */ 1712 else { 1713 tr->tr_error = error; 1714 } 1715 } 1716 return(error); 1717 } 1718 1719 /* 1720 * Function name: twa_setup_data_dmamap 1721 * Description: Callback of bus_dmamap_load for the buffer associated 1722 * with data. Updates the cmd pkt (size/sgl_entries 1723 * fields, as applicable) to reflect the number of sg 1724 * elements. 1725 * 1726 * Input: arg -- ptr to request pkt 1727 * segs -- ptr to a list of segment descriptors 1728 * nsegments--# of segments 1729 * error -- 0 if no errors encountered before callback, 1730 * non-zero if errors were encountered 1731 * Output: None 1732 * Return value: None 1733 */ 1734 static int 1735 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments) 1736 { 1737 struct twa_request *tr = (struct twa_request *)arg; 1738 struct twa_command_packet *cmdpkt = tr->tr_command; 1739 struct twa_command_9k *cmd9k; 1740 union twa_command_7k *cmd7k; 1741 uint8_t sgl_offset; 1742 int error; 1743 1744 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) { 1745 cmd9k = &(cmdpkt->command.cmd_pkt_9k); 1746 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments); 1747 cmd9k->sgl_entries += nsegments - 1; 1748 } else { 1749 /* It's a 7000 command packet. */ 1750 cmd7k = &(cmdpkt->command.cmd_pkt_7k); 1751 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset)) 1752 twa_fillin_sgl((struct twa_sg *) 1753 (((uint32_t *)cmd7k) + sgl_offset), 1754 segs, nsegments); 1755 /* Modify the size field, based on sg address size. */ 1756 cmd7k->generic.size += 1757 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments); 1758 } 1759 if (tr->tr_flags & TWA_CMD_DATA_IN) 1760 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1761 tr->tr_length, BUS_DMASYNC_PREWRITE); 1762 if (tr->tr_flags & TWA_CMD_DATA_OUT) { 1763 /* 1764 * If we're using an alignment buffer, and we're 1765 * writing data, copy the real data out. 1766 */ 1767 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) 1768 memcpy(tr->tr_data, tr->tr_real_data, 1769 tr->tr_real_length); 1770 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0, 1771 tr->tr_length, BUS_DMASYNC_PREREAD); 1772 } 1773 error = twa_submit_io(tr); 1774 1775 if (error) { 1776 twa_unmap_request(tr); 1777 /* 1778 * If the caller had been returned EINPROGRESS, and he has 1779 * registered a callback for handling completion, the callback 1780 * will never get called because we were unable to submit the 1781 * request. So, free up the request right here. 1782 */ 1783 if (tr->tr_callback) 1784 twa_release_request(tr); 1785 } 1786 return (error); 1787 } 1788 1789 /* 1790 * Function name: twa_map_request 1791 * Description: Maps a cmd pkt and data associated with it, into 1792 * DMA'able memory. 1793 * 1794 * Input: tr -- ptr to request pkt 1795 * Output: None 1796 * Return value: 0 -- success 1797 * non-zero-- failure 1798 */ 1799 int 1800 twa_map_request(struct twa_request *tr) 1801 { 1802 struct twa_softc *sc = tr->tr_sc; 1803 int s, rv, rc; 1804 1805 /* If the command involves data, map that too. */ 1806 if (tr->tr_data != NULL) { 1807 1808 if (((u_long)tr->tr_data & (511)) != 0) { 1809 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED; 1810 tr->tr_real_data = tr->tr_data; 1811 tr->tr_real_length = tr->tr_length; 1812 s = splvm(); 1813 rc = uvm_km_kmem_alloc(kmem_va_arena, 1814 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT), 1815 (vmem_addr_t *)&tr->tr_data); 1816 splx(s); 1817 1818 if (rc != 0) { 1819 tr->tr_data = tr->tr_real_data; 1820 tr->tr_length = tr->tr_real_length; 1821 return(ENOMEM); 1822 } 1823 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0) 1824 memcpy(tr->tr_data, tr->tr_real_data, 1825 tr->tr_length); 1826 } 1827 1828 /* 1829 * Map the data buffer into bus space and build the S/G list. 1830 */ 1831 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map, 1832 tr->tr_data, tr->tr_length, NULL, 1833 BUS_DMA_NOWAIT | BUS_DMA_STREAMING); 1834 1835 if (rv != 0) { 1836 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) { 1837 s = splvm(); 1838 uvm_km_kmem_free(kmem_va_arena, 1839 (vaddr_t)tr->tr_data, tr->tr_length); 1840 splx(s); 1841 } 1842 return (rv); 1843 } 1844 1845 if ((rv = twa_setup_data_dmamap(tr, 1846 tr->tr_dma_map->dm_segs, 1847 tr->tr_dma_map->dm_nsegs))) { 1848 1849 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) { 1850 s = splvm(); 1851 uvm_km_kmem_free(kmem_va_arena, 1852 (vaddr_t)tr->tr_data, tr->tr_length); 1853 splx(s); 1854 tr->tr_data = tr->tr_real_data; 1855 tr->tr_length = tr->tr_real_length; 1856 } 1857 } 1858 1859 } else 1860 if ((rv = twa_submit_io(tr))) 1861 twa_unmap_request(tr); 1862 1863 return (rv); 1864 } 1865 1866 /* 1867 * Function name: twa_intr 1868 * Description: Interrupt handler. Determines the kind of interrupt, 1869 * and calls the appropriate handler. 1870 * 1871 * Input: sc -- ptr to per ctlr structure 1872 * Output: None 1873 * Return value: None 1874 */ 1875 1876 static int 1877 twa_intr(void *arg) 1878 { 1879 int caught, s, rv __diagused; 1880 struct twa_softc *sc; 1881 uint32_t status_reg; 1882 sc = (struct twa_softc *)arg; 1883 1884 caught = 0; 1885 /* Collect current interrupt status. */ 1886 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 1887 if (twa_check_ctlr_state(sc, status_reg)) { 1888 caught = 1; 1889 goto bail; 1890 } 1891 /* Dispatch based on the kind of interrupt. */ 1892 if (status_reg & TWA_STATUS_HOST_INTERRUPT) { 1893 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1894 TWA_CONTROL_CLEAR_HOST_INTERRUPT); 1895 caught = 1; 1896 } 1897 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) { 1898 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1899 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 1900 rv = twa_fetch_aen(sc); 1901 #ifdef DIAGNOSTIC 1902 if (rv != 0) 1903 printf("%s: unable to retrieve AEN (%d)\n", 1904 device_xname(sc->twa_dv), rv); 1905 #endif 1906 caught = 1; 1907 } 1908 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) { 1909 /* Start any requests that might be in the pending queue. */ 1910 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 1911 TWA_CONTROL_MASK_COMMAND_INTERRUPT); 1912 (void)twa_drain_pending_queue(sc); 1913 caught = 1; 1914 } 1915 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) { 1916 s = splbio(); 1917 twa_done(sc); 1918 splx(s); 1919 caught = 1; 1920 } 1921 bail: 1922 return (caught); 1923 } 1924 1925 /* 1926 * Accept an open operation on the control device. 1927 */ 1928 static int 1929 twaopen(dev_t dev, int flag, int mode, struct lwp *l) 1930 { 1931 struct twa_softc *twa; 1932 1933 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL) 1934 return (ENXIO); 1935 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0) 1936 return (EBUSY); 1937 1938 twa->twa_sc_flags |= TWA_STATE_OPEN; 1939 1940 return (0); 1941 } 1942 1943 /* 1944 * Accept the last close on the control device. 1945 */ 1946 static int 1947 twaclose(dev_t dev, int flag, int mode, 1948 struct lwp *l) 1949 { 1950 struct twa_softc *twa; 1951 1952 twa = device_lookup_private(&twa_cd, minor(dev)); 1953 twa->twa_sc_flags &= ~TWA_STATE_OPEN; 1954 return (0); 1955 } 1956 1957 /* 1958 * Function name: twaioctl 1959 * Description: ioctl handler. 1960 * 1961 * Input: sc -- ptr to per ctlr structure 1962 * cmd -- ioctl cmd 1963 * buf -- ptr to buffer in kernel memory, which is 1964 * a copy of the input buffer in user-space 1965 * Output: buf -- ptr to buffer in kernel memory, which will 1966 * be copied of the output buffer in user-space 1967 * Return value: 0 -- success 1968 * non-zero-- failure 1969 */ 1970 static int 1971 twaioctl(dev_t dev, u_long cmd, void *data, int flag, 1972 struct lwp *l) 1973 { 1974 struct twa_softc *sc; 1975 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data; 1976 struct tw_cl_event_packet event_buf; 1977 struct twa_request *tr = 0; 1978 int32_t event_index = 0; 1979 int32_t start_index; 1980 int s, error = 0; 1981 1982 sc = device_lookup_private(&twa_cd, minor(dev)); 1983 1984 switch (cmd) { 1985 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH: 1986 { 1987 struct twa_command_packet *cmdpkt; 1988 uint32_t data_buf_size_adjusted; 1989 1990 /* Get a request packet */ 1991 tr = twa_get_request_wait(sc, 0); 1992 KASSERT(tr != NULL); 1993 /* 1994 * Make sure that the data buffer sent to firmware is a 1995 * 512 byte multiple in size. 1996 */ 1997 data_buf_size_adjusted = 1998 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511; 1999 2000 if ((tr->tr_length = data_buf_size_adjusted)) { 2001 if ((tr->tr_data = malloc(data_buf_size_adjusted, 2002 M_DEVBUF, M_WAITOK)) == NULL) { 2003 error = ENOMEM; 2004 goto fw_passthru_done; 2005 } 2006 /* Copy the payload. */ 2007 if ((error = copyin((void *) (user_buf->pdata), 2008 (void *) (tr->tr_data), 2009 user_buf->twa_drvr_pkt.buffer_length)) != 0) { 2010 goto fw_passthru_done; 2011 } 2012 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2013 } 2014 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL; 2015 cmdpkt = tr->tr_command; 2016 2017 /* Copy the command packet. */ 2018 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt), 2019 sizeof(struct twa_command_packet)); 2020 cmdpkt->command.cmd_pkt_7k.generic.request_id = 2021 tr->tr_request_id; 2022 2023 /* Send down the request, and wait for it to complete. */ 2024 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) { 2025 if (error == ETIMEDOUT) 2026 break; /* clean-up done by twa_wait_request */ 2027 goto fw_passthru_done; 2028 } 2029 2030 /* Copy the command packet back into user space. */ 2031 memcpy(&user_buf->twa_cmd_pkt, cmdpkt, 2032 sizeof(struct twa_command_packet)); 2033 2034 /* If there was a payload, copy it back too. */ 2035 if (tr->tr_length) 2036 error = copyout(tr->tr_data, user_buf->pdata, 2037 user_buf->twa_drvr_pkt.buffer_length); 2038 fw_passthru_done: 2039 /* Free resources. */ 2040 if (tr->tr_data) 2041 free(tr->tr_data, M_DEVBUF); 2042 2043 if (tr) 2044 twa_release_request(tr); 2045 break; 2046 } 2047 2048 case TW_OSL_IOCTL_SCAN_BUS: 2049 twa_request_bus_scan(sc->twa_dv, "twa", 0); 2050 break; 2051 2052 case TW_CL_IOCTL_GET_FIRST_EVENT: 2053 if (sc->twa_aen_queue_wrapped) { 2054 if (sc->twa_aen_queue_overflow) { 2055 /* 2056 * The aen queue has wrapped, even before some 2057 * events have been retrieved. Let the caller 2058 * know that he missed out on some AEN's. 2059 */ 2060 user_buf->twa_drvr_pkt.status = 2061 TWA_ERROR_AEN_OVERFLOW; 2062 sc->twa_aen_queue_overflow = FALSE; 2063 } else 2064 user_buf->twa_drvr_pkt.status = 0; 2065 event_index = sc->twa_aen_head; 2066 } else { 2067 if (sc->twa_aen_head == sc->twa_aen_tail) { 2068 user_buf->twa_drvr_pkt.status = 2069 TWA_ERROR_AEN_NO_EVENTS; 2070 break; 2071 } 2072 user_buf->twa_drvr_pkt.status = 0; 2073 event_index = sc->twa_aen_tail; /* = 0 */ 2074 } 2075 if ((error = copyout(sc->twa_aen_queue[event_index], 2076 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2077 (sc->twa_aen_queue[event_index])->retrieved = 2078 TWA_AEN_RETRIEVED; 2079 break; 2080 2081 case TW_CL_IOCTL_GET_LAST_EVENT: 2082 if (sc->twa_aen_queue_wrapped) { 2083 if (sc->twa_aen_queue_overflow) { 2084 /* 2085 * The aen queue has wrapped, even before some 2086 * events have been retrieved. Let the caller 2087 * know that he missed out on some AEN's. 2088 */ 2089 user_buf->twa_drvr_pkt.status = 2090 TWA_ERROR_AEN_OVERFLOW; 2091 sc->twa_aen_queue_overflow = FALSE; 2092 } else 2093 user_buf->twa_drvr_pkt.status = 0; 2094 } else { 2095 if (sc->twa_aen_head == sc->twa_aen_tail) { 2096 user_buf->twa_drvr_pkt.status = 2097 TWA_ERROR_AEN_NO_EVENTS; 2098 break; 2099 } 2100 user_buf->twa_drvr_pkt.status = 0; 2101 } 2102 event_index = 2103 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH; 2104 if ((error = copyout(sc->twa_aen_queue[event_index], 2105 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2106 (sc->twa_aen_queue[event_index])->retrieved = 2107 TWA_AEN_RETRIEVED; 2108 break; 2109 2110 case TW_CL_IOCTL_GET_NEXT_EVENT: 2111 user_buf->twa_drvr_pkt.status = 0; 2112 if (sc->twa_aen_queue_wrapped) { 2113 2114 if (sc->twa_aen_queue_overflow) { 2115 /* 2116 * The aen queue has wrapped, even before some 2117 * events have been retrieved. Let the caller 2118 * know that he missed out on some AEN's. 2119 */ 2120 user_buf->twa_drvr_pkt.status = 2121 TWA_ERROR_AEN_OVERFLOW; 2122 sc->twa_aen_queue_overflow = FALSE; 2123 } 2124 start_index = sc->twa_aen_head; 2125 } else { 2126 if (sc->twa_aen_head == sc->twa_aen_tail) { 2127 user_buf->twa_drvr_pkt.status = 2128 TWA_ERROR_AEN_NO_EVENTS; 2129 break; 2130 } 2131 start_index = sc->twa_aen_tail; /* = 0 */ 2132 } 2133 error = copyin(user_buf->pdata, &event_buf, 2134 sizeof(struct tw_cl_event_packet)); 2135 2136 event_index = (start_index + event_buf.sequence_id - 2137 (sc->twa_aen_queue[start_index])->sequence_id + 1) 2138 % TWA_Q_LENGTH; 2139 2140 if (!((sc->twa_aen_queue[event_index])->sequence_id > 2141 event_buf.sequence_id)) { 2142 if (user_buf->twa_drvr_pkt.status == 2143 TWA_ERROR_AEN_OVERFLOW) 2144 /* so we report the overflow next time */ 2145 sc->twa_aen_queue_overflow = TRUE; 2146 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS; 2147 break; 2148 } 2149 if ((error = copyout(sc->twa_aen_queue[event_index], 2150 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2151 (sc->twa_aen_queue[event_index])->retrieved = 2152 TWA_AEN_RETRIEVED; 2153 break; 2154 2155 case TW_CL_IOCTL_GET_PREVIOUS_EVENT: 2156 user_buf->twa_drvr_pkt.status = 0; 2157 if (sc->twa_aen_queue_wrapped) { 2158 if (sc->twa_aen_queue_overflow) { 2159 /* 2160 * The aen queue has wrapped, even before some 2161 * events have been retrieved. Let the caller 2162 * know that he missed out on some AEN's. 2163 */ 2164 user_buf->twa_drvr_pkt.status = 2165 TWA_ERROR_AEN_OVERFLOW; 2166 sc->twa_aen_queue_overflow = FALSE; 2167 } 2168 start_index = sc->twa_aen_head; 2169 } else { 2170 if (sc->twa_aen_head == sc->twa_aen_tail) { 2171 user_buf->twa_drvr_pkt.status = 2172 TWA_ERROR_AEN_NO_EVENTS; 2173 break; 2174 } 2175 start_index = sc->twa_aen_tail; /* = 0 */ 2176 } 2177 if ((error = copyin(user_buf->pdata, &event_buf, 2178 sizeof(struct tw_cl_event_packet))) != 0) 2179 2180 event_index = (start_index + event_buf.sequence_id - 2181 (sc->twa_aen_queue[start_index])->sequence_id - 1) 2182 % TWA_Q_LENGTH; 2183 if (!((sc->twa_aen_queue[event_index])->sequence_id < 2184 event_buf.sequence_id)) { 2185 if (user_buf->twa_drvr_pkt.status == 2186 TWA_ERROR_AEN_OVERFLOW) 2187 /* so we report the overflow next time */ 2188 sc->twa_aen_queue_overflow = TRUE; 2189 user_buf->twa_drvr_pkt.status = 2190 TWA_ERROR_AEN_NO_EVENTS; 2191 break; 2192 } 2193 if ((error = copyout(sc->twa_aen_queue [event_index], 2194 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0) 2195 aprint_error_dev(sc->twa_dv, "get_previous: Could not " 2196 "copyout to event_buf. error = %x\n", error); 2197 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED; 2198 break; 2199 2200 case TW_CL_IOCTL_GET_LOCK: 2201 { 2202 struct tw_cl_lock_packet twa_lock; 2203 2204 copyin(user_buf->pdata, &twa_lock, 2205 sizeof(struct tw_cl_lock_packet)); 2206 s = splbio(); 2207 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) || 2208 (twa_lock.force_flag) || 2209 (time_second >= sc->twa_ioctl_lock.timeout)) { 2210 2211 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD; 2212 sc->twa_ioctl_lock.timeout = time_second + 2213 (twa_lock.timeout_msec / 1000); 2214 twa_lock.time_remaining_msec = twa_lock.timeout_msec; 2215 user_buf->twa_drvr_pkt.status = 0; 2216 } else { 2217 twa_lock.time_remaining_msec = 2218 (sc->twa_ioctl_lock.timeout - time_second) * 2219 1000; 2220 user_buf->twa_drvr_pkt.status = 2221 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD; 2222 } 2223 splx(s); 2224 copyout(&twa_lock, user_buf->pdata, 2225 sizeof(struct tw_cl_lock_packet)); 2226 break; 2227 } 2228 2229 case TW_CL_IOCTL_RELEASE_LOCK: 2230 s = splbio(); 2231 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) { 2232 user_buf->twa_drvr_pkt.status = 2233 TWA_ERROR_IOCTL_LOCK_NOT_HELD; 2234 } else { 2235 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE; 2236 user_buf->twa_drvr_pkt.status = 0; 2237 } 2238 splx(s); 2239 break; 2240 2241 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO: 2242 { 2243 struct tw_cl_compatibility_packet comp_pkt; 2244 2245 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING, 2246 sizeof(TWA_DRIVER_VERSION_STRING)); 2247 comp_pkt.working_srl = sc->working_srl; 2248 comp_pkt.working_branch = sc->working_branch; 2249 comp_pkt.working_build = sc->working_build; 2250 user_buf->twa_drvr_pkt.status = 0; 2251 2252 /* Copy compatibility information to user space. */ 2253 copyout(&comp_pkt, user_buf->pdata, 2254 uimin(sizeof(struct tw_cl_compatibility_packet), 2255 user_buf->twa_drvr_pkt.buffer_length)); 2256 break; 2257 } 2258 2259 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */ 2260 { 2261 struct twa_unitname *tn; 2262 struct twa_drive *tdr; 2263 2264 tn = (struct twa_unitname *)data; 2265 /* XXX mutex */ 2266 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits) 2267 return (EINVAL); 2268 tdr = &sc->sc_units[tn->tn_unit]; 2269 if (tdr->td_dev == NULL) 2270 tn->tn_name[0] = '\0'; 2271 else 2272 strlcpy(tn->tn_name, device_xname(tdr->td_dev), 2273 sizeof(tn->tn_name)); 2274 return (0); 2275 } 2276 2277 default: 2278 /* Unknown opcode. */ 2279 error = ENOTTY; 2280 } 2281 2282 return(error); 2283 } 2284 2285 const struct cdevsw twa_cdevsw = { 2286 .d_open = twaopen, 2287 .d_close = twaclose, 2288 .d_read = noread, 2289 .d_write = nowrite, 2290 .d_ioctl = twaioctl, 2291 .d_stop = nostop, 2292 .d_tty = notty, 2293 .d_poll = nopoll, 2294 .d_mmap = nommap, 2295 .d_kqfilter = nokqfilter, 2296 .d_discard = nodiscard, 2297 .d_flag = D_OTHER 2298 }; 2299 2300 /* 2301 * Function name: twa_get_param 2302 * Description: Get a firmware parameter. 2303 * 2304 * Input: sc -- ptr to per ctlr structure 2305 * table_id -- parameter table # 2306 * param_id -- index of the parameter in the table 2307 * param_size -- size of the parameter in bytes 2308 * callback -- ptr to function, if any, to be called 2309 * back on completion; NULL if no callback. 2310 * Output: None 2311 * Return value: ptr to param structure -- success 2312 * NULL -- failure 2313 */ 2314 static int 2315 twa_get_param(struct twa_softc *sc, int table_id, int param_id, 2316 size_t param_size, void (* callback)(struct twa_request *tr), 2317 struct twa_param_9k **param) 2318 { 2319 int rv = 0; 2320 struct twa_request *tr; 2321 union twa_command_7k *cmd; 2322 2323 /* Get a request packet. */ 2324 if ((tr = twa_get_request(sc, 0)) == NULL) { 2325 rv = EAGAIN; 2326 goto out; 2327 } 2328 2329 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2330 2331 /* Allocate memory to read data into. */ 2332 if ((*param = (struct twa_param_9k *) 2333 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) { 2334 rv = ENOMEM; 2335 goto out; 2336 } 2337 2338 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2339 tr->tr_data = *param; 2340 tr->tr_length = TWA_SECTOR_SIZE; 2341 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2342 2343 /* Build the cmd pkt. */ 2344 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2345 2346 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2347 2348 cmd->param.opcode = TWA_OP_GET_PARAM; 2349 cmd->param.sgl_offset = 2; 2350 cmd->param.size = 2; 2351 cmd->param.request_id = tr->tr_request_id; 2352 cmd->param.unit = 0; 2353 cmd->param.param_count = 1; 2354 2355 /* Specify which parameter we need. */ 2356 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2357 (*param)->parameter_id = param_id; 2358 (*param)->parameter_size_bytes = param_size; 2359 2360 /* Submit the command. */ 2361 if (callback == NULL) { 2362 /* There's no call back; wait till the command completes. */ 2363 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2364 2365 if (rv != 0) 2366 goto out; 2367 2368 if ((rv = cmd->param.status) != 0) { 2369 /* twa_drain_complete_queue will have done the unmapping */ 2370 goto out; 2371 } 2372 twa_release_request(tr); 2373 return (rv); 2374 } else { 2375 /* There's a call back. Simply submit the command. */ 2376 tr->tr_callback = callback; 2377 rv = twa_map_request(tr); 2378 return (rv); 2379 } 2380 out: 2381 if (tr) 2382 twa_release_request(tr); 2383 return(rv); 2384 } 2385 2386 /* 2387 * Function name: twa_set_param 2388 * Description: Set a firmware parameter. 2389 * 2390 * Input: sc -- ptr to per ctlr structure 2391 * table_id -- parameter table # 2392 * param_id -- index of the parameter in the table 2393 * param_size -- size of the parameter in bytes 2394 * callback -- ptr to function, if any, to be called 2395 * back on completion; NULL if no callback. 2396 * Output: None 2397 * Return value: 0 -- success 2398 * non-zero-- failure 2399 */ 2400 static int 2401 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size, 2402 void *data, void (* callback)(struct twa_request *tr)) 2403 { 2404 struct twa_request *tr; 2405 union twa_command_7k *cmd; 2406 struct twa_param_9k *param = NULL; 2407 int error = ENOMEM; 2408 2409 tr = twa_get_request(sc, 0); 2410 if (tr == NULL) 2411 return (EAGAIN); 2412 2413 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2414 2415 /* Allocate memory to send data using. */ 2416 if ((param = (struct twa_param_9k *) 2417 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) 2418 goto out; 2419 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size); 2420 tr->tr_data = param; 2421 tr->tr_length = TWA_SECTOR_SIZE; 2422 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT; 2423 2424 /* Build the cmd pkt. */ 2425 cmd = &(tr->tr_command->command.cmd_pkt_7k); 2426 2427 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2428 2429 cmd->param.opcode = TWA_OP_SET_PARAM; 2430 cmd->param.sgl_offset = 2; 2431 cmd->param.size = 2; 2432 cmd->param.request_id = tr->tr_request_id; 2433 cmd->param.unit = 0; 2434 cmd->param.param_count = 1; 2435 2436 /* Specify which parameter we want to set. */ 2437 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR; 2438 param->parameter_id = param_id; 2439 param->parameter_size_bytes = param_size; 2440 memcpy(param->data, data, param_size); 2441 2442 /* Submit the command. */ 2443 if (callback == NULL) { 2444 /* There's no call back; wait till the command completes. */ 2445 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2446 if (error == ETIMEDOUT) 2447 /* clean-up done by twa_immediate_request */ 2448 return(error); 2449 if (error) 2450 goto out; 2451 if ((error = cmd->param.status)) { 2452 /* 2453 * twa_drain_complete_queue will have done the 2454 * unmapping. 2455 */ 2456 goto out; 2457 } 2458 free(param, M_DEVBUF); 2459 twa_release_request(tr); 2460 return(error); 2461 } else { 2462 /* There's a call back. Simply submit the command. */ 2463 tr->tr_callback = callback; 2464 if ((error = twa_map_request(tr))) 2465 goto out; 2466 2467 return (0); 2468 } 2469 out: 2470 if (param) 2471 free(param, M_DEVBUF); 2472 if (tr) 2473 twa_release_request(tr); 2474 return(error); 2475 } 2476 2477 /* 2478 * Function name: twa_init_connection 2479 * Description: Send init_connection cmd to firmware 2480 * 2481 * Input: sc -- ptr to per ctlr structure 2482 * message_credits -- max # of requests that we might send 2483 * down simultaneously. This will be 2484 * typically set to 256 at init-time or 2485 * after a reset, and to 1 at shutdown-time 2486 * set_features -- indicates if we intend to use 64-bit 2487 * sg, also indicates if we want to do a 2488 * basic or an extended init_connection; 2489 * 2490 * Note: The following input/output parameters are valid, only in case of an 2491 * extended init_connection: 2492 * 2493 * current_fw_srl -- srl of fw we are bundled 2494 * with, if any; 0 otherwise 2495 * current_fw_arch_id -- arch_id of fw we are bundled 2496 * with, if any; 0 otherwise 2497 * current_fw_branch -- branch # of fw we are bundled 2498 * with, if any; 0 otherwise 2499 * current_fw_build -- build # of fw we are bundled 2500 * with, if any; 0 otherwise 2501 * Output: fw_on_ctlr_srl -- srl of fw on ctlr 2502 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr 2503 * fw_on_ctlr_branch -- branch # of fw on ctlr 2504 * fw_on_ctlr_build -- build # of fw on ctlr 2505 * init_connect_result -- result bitmap of fw response 2506 * Return value: 0 -- success 2507 * non-zero-- failure 2508 */ 2509 static int 2510 twa_init_connection(struct twa_softc *sc, uint16_t message_credits, 2511 uint32_t set_features, uint16_t current_fw_srl, 2512 uint16_t current_fw_arch_id, uint16_t current_fw_branch, 2513 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl, 2514 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch, 2515 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result) 2516 { 2517 struct twa_request *tr; 2518 struct twa_command_init_connect *init_connect; 2519 int error = 1; 2520 2521 /* Get a request packet. */ 2522 if ((tr = twa_get_request(sc, 0)) == NULL) 2523 goto out; 2524 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2525 /* Build the cmd pkt. */ 2526 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect); 2527 2528 tr->tr_command->cmd_hdr.header_desc.size_header = 128; 2529 2530 init_connect->opcode = TWA_OP_INIT_CONNECTION; 2531 init_connect->request_id = tr->tr_request_id; 2532 init_connect->message_credits = message_credits; 2533 init_connect->features = set_features; 2534 if (TWA_64BIT_ADDRESSES) 2535 init_connect->features |= TWA_64BIT_SG_ADDRESSES; 2536 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2537 /* 2538 * Fill in the extra fields needed for 2539 * an extended init_connect. 2540 */ 2541 init_connect->size = 6; 2542 init_connect->fw_srl = current_fw_srl; 2543 init_connect->fw_arch_id = current_fw_arch_id; 2544 init_connect->fw_branch = current_fw_branch; 2545 } else 2546 init_connect->size = 3; 2547 2548 /* Submit the command, and wait for it to complete. */ 2549 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD); 2550 if (error == ETIMEDOUT) 2551 return(error); /* clean-up done by twa_immediate_request */ 2552 if (error) 2553 goto out; 2554 if ((error = init_connect->status)) { 2555 /* twa_drain_complete_queue will have done the unmapping */ 2556 goto out; 2557 } 2558 if (set_features & TWA_EXTENDED_INIT_CONNECT) { 2559 *fw_on_ctlr_srl = init_connect->fw_srl; 2560 *fw_on_ctlr_arch_id = init_connect->fw_arch_id; 2561 *fw_on_ctlr_branch = init_connect->fw_branch; 2562 *fw_on_ctlr_build = init_connect->fw_build; 2563 *init_connect_result = init_connect->result; 2564 } 2565 twa_release_request(tr); 2566 return(error); 2567 2568 out: 2569 if (tr) 2570 twa_release_request(tr); 2571 return(error); 2572 } 2573 2574 static int 2575 twa_reset(struct twa_softc *sc) 2576 { 2577 int s; 2578 int error = 0; 2579 2580 /* Set the 'in reset' flag. */ 2581 sc->twa_sc_flags |= TWA_STATE_IN_RESET; 2582 2583 /* 2584 * Disable interrupts from the controller, and mask any 2585 * accidental entry into our interrupt handler. 2586 */ 2587 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2588 TWA_CONTROL_DISABLE_INTERRUPTS); 2589 2590 s = splbio(); 2591 2592 /* Soft reset the controller. */ 2593 if ((error = twa_soft_reset(sc))) 2594 goto out; 2595 2596 /* Re-establish logical connection with the controller. */ 2597 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS, 2598 0, 0, 0, 0, 0, 2599 NULL, NULL, NULL, NULL, NULL))) { 2600 goto out; 2601 } 2602 /* 2603 * Complete all requests in the complete queue; error back all requests 2604 * in the busy queue. Any internal requests will be simply freed. 2605 * Re-submit any requests in the pending queue. 2606 */ 2607 twa_drain_busy_queue(sc); 2608 2609 out: 2610 splx(s); 2611 /* 2612 * Enable interrupts, and also clear attention and response interrupts. 2613 */ 2614 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2615 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2616 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT | 2617 TWA_CONTROL_ENABLE_INTERRUPTS); 2618 2619 /* Clear the 'in reset' flag. */ 2620 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET; 2621 2622 return(error); 2623 } 2624 2625 static int 2626 twa_soft_reset(struct twa_softc *sc) 2627 { 2628 uint32_t status_reg; 2629 2630 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2631 TWA_CONTROL_ISSUE_SOFT_RESET | 2632 TWA_CONTROL_CLEAR_HOST_INTERRUPT | 2633 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT | 2634 TWA_CONTROL_MASK_COMMAND_INTERRUPT | 2635 TWA_CONTROL_MASK_RESPONSE_INTERRUPT | 2636 TWA_CONTROL_DISABLE_INTERRUPTS); 2637 2638 if (twa_drain_response_queue_large(sc, 30) != 0) { 2639 aprint_error_dev(sc->twa_dv, 2640 "response queue not empty after reset.\n"); 2641 return(1); 2642 } 2643 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY | 2644 TWA_STATUS_ATTENTION_INTERRUPT, 30)) { 2645 aprint_error_dev(sc->twa_dv, 2646 "no attention interrupt after reset.\n"); 2647 return(1); 2648 } 2649 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 2650 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT); 2651 2652 if (twa_drain_response_queue(sc)) { 2653 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n"); 2654 return(1); 2655 } 2656 if (twa_drain_aen_queue(sc)) { 2657 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n"); 2658 return(1); 2659 } 2660 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) { 2661 aprint_error_dev(sc->twa_dv, 2662 "reset not reported by controller.\n"); 2663 return(1); 2664 } 2665 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2666 if (TWA_STATUS_ERRORS(status_reg) || 2667 twa_check_ctlr_state(sc, status_reg)) { 2668 aprint_error_dev(sc->twa_dv, "controller errors detected.\n"); 2669 return(1); 2670 } 2671 return(0); 2672 } 2673 2674 static int 2675 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout) 2676 { 2677 struct timeval t1; 2678 time_t end_time; 2679 uint32_t status_reg; 2680 2681 timeout = (timeout * 1000 * 100); 2682 2683 microtime(&t1); 2684 2685 end_time = t1.tv_usec + timeout; 2686 2687 do { 2688 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET); 2689 /* got the required bit(s)? */ 2690 if ((status_reg & status) == status) 2691 return(0); 2692 DELAY(100000); 2693 microtime(&t1); 2694 } while (t1.tv_usec <= end_time); 2695 2696 return(1); 2697 } 2698 2699 static int 2700 twa_fetch_aen(struct twa_softc *sc) 2701 { 2702 struct twa_request *tr; 2703 int s, error = 0; 2704 2705 s = splbio(); 2706 2707 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) { 2708 splx(s); 2709 return(EIO); 2710 } 2711 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL; 2712 tr->tr_callback = twa_aen_callback; 2713 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 2714 if (twa_request_sense(tr, 0) != 0) { 2715 if (tr->tr_data) 2716 free(tr->tr_data, M_DEVBUF); 2717 twa_release_request(tr); 2718 error = 1; 2719 } 2720 splx(s); 2721 2722 return(error); 2723 } 2724 2725 /* 2726 * Function name: twa_aen_callback 2727 * Description: Callback for requests to fetch AEN's. 2728 * 2729 * Input: tr -- ptr to completed request pkt 2730 * Output: None 2731 * Return value: None 2732 */ 2733 static void 2734 twa_aen_callback(struct twa_request *tr) 2735 { 2736 int i; 2737 int fetch_more_aens = 0; 2738 struct twa_softc *sc = tr->tr_sc; 2739 struct twa_command_header *cmd_hdr = 2740 (struct twa_command_header *)(tr->tr_data); 2741 struct twa_command_9k *cmd = 2742 &(tr->tr_command->command.cmd_pkt_9k); 2743 2744 if (! cmd->status) { 2745 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) && 2746 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */)) 2747 if (twa_enqueue_aen(sc, cmd_hdr) 2748 != TWA_AEN_QUEUE_EMPTY) 2749 fetch_more_aens = 1; 2750 } else { 2751 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2752 for (i = 0; i < 18; i++) 2753 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]); 2754 printf("\n"); /* print new line */ 2755 2756 for (i = 0; i < 128; i++) 2757 printf("%x\t", ((int8_t *)(tr->tr_data))[i]); 2758 printf("\n"); /* print new line */ 2759 } 2760 if (tr->tr_data) 2761 free(tr->tr_data, M_DEVBUF); 2762 twa_release_request(tr); 2763 2764 if (fetch_more_aens) 2765 twa_fetch_aen(sc); 2766 } 2767 2768 /* 2769 * Function name: twa_enqueue_aen 2770 * Description: Queues AEN's to be supplied to user-space tools on request. 2771 * 2772 * Input: sc -- ptr to per ctlr structure 2773 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN 2774 * details can be retrieved. 2775 * Output: None 2776 * Return value: None 2777 */ 2778 static uint16_t 2779 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr) 2780 { 2781 int rv __diagused, s; 2782 struct tw_cl_event_packet *event; 2783 uint16_t aen_code; 2784 unsigned long sync_time; 2785 2786 s = splbio(); 2787 aen_code = cmd_hdr->status_block.error; 2788 2789 switch (aen_code) { 2790 case TWA_AEN_SYNC_TIME_WITH_HOST: 2791 2792 sync_time = (time_second - (3 * 86400)) % 604800; 2793 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE, 2794 TWA_PARAM_TIME_SchedulerTime, 4, 2795 &sync_time, twa_aen_callback); 2796 #ifdef DIAGNOSTIC 2797 if (rv != 0) 2798 aprint_error_dev(sc->twa_dv, 2799 "unable to sync time with ctlr\n"); 2800 #endif 2801 break; 2802 2803 case TWA_AEN_QUEUE_EMPTY: 2804 break; 2805 2806 default: 2807 /* Queue the event. */ 2808 event = sc->twa_aen_queue[sc->twa_aen_head]; 2809 if (event->retrieved == TWA_AEN_NOT_RETRIEVED) 2810 sc->twa_aen_queue_overflow = TRUE; 2811 event->severity = 2812 cmd_hdr->status_block.substatus_block.severity; 2813 event->time_stamp_sec = time_second; 2814 event->aen_code = aen_code; 2815 event->retrieved = TWA_AEN_NOT_RETRIEVED; 2816 event->sequence_id = ++(sc->twa_current_sequence_id); 2817 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0'; 2818 event->parameter_len = strlen(cmd_hdr->err_specific_desc); 2819 memcpy(event->parameter_data, cmd_hdr->err_specific_desc, 2820 event->parameter_len); 2821 2822 if (event->severity < TWA_AEN_SEVERITY_DEBUG) { 2823 printf("%s: AEN 0x%04X: %s: %s: %s\n", 2824 device_xname(sc->twa_dv), 2825 aen_code, 2826 twa_aen_severity_table[event->severity], 2827 twa_find_msg_string(twa_aen_table, aen_code), 2828 event->parameter_data); 2829 } 2830 2831 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH) 2832 sc->twa_aen_queue_wrapped = TRUE; 2833 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH; 2834 break; 2835 } /* switch */ 2836 splx(s); 2837 2838 return (aen_code); 2839 } 2840 2841 /* 2842 * Function name: twa_find_aen 2843 * Description: Reports whether a given AEN ever occurred. 2844 * 2845 * Input: sc -- ptr to per ctlr structure 2846 * aen_code-- AEN to look for 2847 * Output: None 2848 * Return value: 0 -- success 2849 * non-zero-- failure 2850 */ 2851 static int 2852 twa_find_aen(struct twa_softc *sc, uint16_t aen_code) 2853 { 2854 uint32_t last_index; 2855 int s; 2856 int i; 2857 2858 s = splbio(); 2859 2860 if (sc->twa_aen_queue_wrapped) 2861 last_index = sc->twa_aen_head; 2862 else 2863 last_index = 0; 2864 2865 i = sc->twa_aen_head; 2866 do { 2867 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH; 2868 if ((sc->twa_aen_queue[i])->aen_code == aen_code) { 2869 splx(s); 2870 return(0); 2871 } 2872 } while (i != last_index); 2873 2874 splx(s); 2875 return(1); 2876 } 2877 2878 static inline void 2879 twa_request_init(struct twa_request *tr, int flags) 2880 { 2881 tr->tr_data = NULL; 2882 tr->tr_real_data = NULL; 2883 tr->tr_length = 0; 2884 tr->tr_real_length = 0; 2885 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */ 2886 tr->tr_flags = flags; 2887 tr->tr_error = 0; 2888 tr->tr_callback = NULL; 2889 tr->tr_cmd_pkt_type = 0; 2890 tr->bp = 0; 2891 2892 /* 2893 * Look at the status field in the command packet to see how 2894 * it completed the last time it was used, and zero out only 2895 * the portions that might have changed. Note that we don't 2896 * care to zero out the sglist. 2897 */ 2898 if (tr->tr_command->command.cmd_pkt_9k.status) 2899 memset(tr->tr_command, 0, 2900 sizeof(struct twa_command_header) + 28); 2901 else 2902 memset(&(tr->tr_command->command), 0, 28); 2903 } 2904 2905 struct twa_request * 2906 twa_get_request_wait(struct twa_softc *sc, int flags) 2907 { 2908 struct twa_request *tr; 2909 int s; 2910 2911 KASSERT((flags & TWA_CMD_AEN) == 0); 2912 2913 s = splbio(); 2914 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) { 2915 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT; 2916 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz); 2917 } 2918 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2919 2920 splx(s); 2921 2922 twa_request_init(tr, flags); 2923 2924 return(tr); 2925 } 2926 2927 struct twa_request * 2928 twa_get_request(struct twa_softc *sc, int flags) 2929 { 2930 int s; 2931 struct twa_request *tr; 2932 2933 /* Get a free request packet. */ 2934 s = splbio(); 2935 if (__predict_false((flags & TWA_CMD_AEN) != 0)) { 2936 2937 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) { 2938 tr = sc->sc_twa_request; 2939 flags |= TWA_CMD_AEN_BUSY; 2940 } else { 2941 splx(s); 2942 return (NULL); 2943 } 2944 } else { 2945 if (__predict_false((tr = 2946 TAILQ_FIRST(&sc->twa_free)) == NULL)) { 2947 splx(s); 2948 return (NULL); 2949 } 2950 TAILQ_REMOVE(&sc->twa_free, tr, tr_link); 2951 } 2952 splx(s); 2953 2954 twa_request_init(tr, flags); 2955 2956 return(tr); 2957 } 2958 2959 /* 2960 * Print some information about the controller 2961 */ 2962 static void 2963 twa_describe_controller(struct twa_softc *sc) 2964 { 2965 struct twa_param_9k *p[10]; 2966 int i, rv = 0; 2967 uint32_t dsize; 2968 uint8_t ports; 2969 2970 memset(p, 0, sizeof(p)); 2971 2972 /* Get the port count. */ 2973 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER, 2974 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]); 2975 2976 /* get version strings */ 2977 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW, 2978 16, NULL, &p[1]); 2979 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS, 2980 16, NULL, &p[2]); 2981 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon, 2982 16, NULL, &p[3]); 2983 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA, 2984 8, NULL, &p[4]); 2985 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA, 2986 8, NULL, &p[5]); 2987 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI, 2988 8, NULL, &p[6]); 2989 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS, 2990 16, NULL, &p[7]); 2991 2992 if (rv) { 2993 /* some error occurred */ 2994 aprint_error_dev(sc->twa_dv, 2995 "failed to fetch version information\n"); 2996 goto bail; 2997 } 2998 2999 ports = *(uint8_t *)(p[0]->data); 3000 3001 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 3002 ports, p[1]->data, p[2]->data); 3003 3004 aprint_verbose_dev(sc->twa_dv, 3005 "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 3006 p[3]->data, p[4]->data, 3007 p[5]->data, p[6]->data); 3008 3009 for (i = 0; i < ports; i++) { 3010 3011 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0) 3012 continue; 3013 3014 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3015 TWA_PARAM_DRIVEMODELINDEX, 3016 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]); 3017 3018 if (rv != 0) { 3019 aprint_error_dev(sc->twa_dv, 3020 "unable to get drive model for port %d\n", i); 3021 continue; 3022 } 3023 3024 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i, 3025 TWA_PARAM_DRIVESIZEINDEX, 3026 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]); 3027 3028 if (rv != 0) { 3029 aprint_error_dev(sc->twa_dv, "unable to get drive size" 3030 " for port %d\n", i); 3031 free(p[8], M_DEVBUF); 3032 continue; 3033 } 3034 3035 dsize = *(uint32_t *)(p[9]->data); 3036 3037 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n", 3038 i, p[8]->data, dsize / 2048); 3039 3040 if (p[8]) 3041 free(p[8], M_DEVBUF); 3042 if (p[9]) 3043 free(p[9], M_DEVBUF); 3044 } 3045 bail: 3046 if (p[0]) 3047 free(p[0], M_DEVBUF); 3048 if (p[1]) 3049 free(p[1], M_DEVBUF); 3050 if (p[2]) 3051 free(p[2], M_DEVBUF); 3052 if (p[3]) 3053 free(p[3], M_DEVBUF); 3054 if (p[4]) 3055 free(p[4], M_DEVBUF); 3056 if (p[5]) 3057 free(p[5], M_DEVBUF); 3058 if (p[6]) 3059 free(p[6], M_DEVBUF); 3060 } 3061 3062 /* 3063 * Function name: twa_check_ctlr_state 3064 * Description: Makes sure that the fw status register reports a 3065 * proper status. 3066 * 3067 * Input: sc -- ptr to per ctlr structure 3068 * status_reg -- value in the status register 3069 * Output: None 3070 * Return value: 0 -- no errors 3071 * non-zero-- errors 3072 */ 3073 static int 3074 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg) 3075 { 3076 int result = 0; 3077 struct timeval t1; 3078 static time_t last_warning[2] = {0, 0}; 3079 3080 /* Check if the 'micro-controller ready' bit is not set. */ 3081 if ((status_reg & TWA_STATUS_EXPECTED_BITS) != 3082 TWA_STATUS_EXPECTED_BITS) { 3083 3084 microtime(&t1); 3085 3086 last_warning[0] += (5 * 1000 * 100); 3087 3088 if (t1.tv_usec > last_warning[0]) { 3089 microtime(&t1); 3090 last_warning[0] = t1.tv_usec; 3091 } 3092 result = 1; 3093 } 3094 3095 /* Check if any error bits are set. */ 3096 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) { 3097 3098 microtime(&t1); 3099 last_warning[1] += (5 * 1000 * 100); 3100 if (t1.tv_usec > last_warning[1]) { 3101 microtime(&t1); 3102 last_warning[1] = t1.tv_usec; 3103 } 3104 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) { 3105 aprint_error_dev(sc->twa_dv, "clearing PCI parity " 3106 "error re-seat/move/replace card.\n"); 3107 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3108 TWA_CONTROL_CLEAR_PARITY_ERROR); 3109 pci_conf_write(sc->pc, sc->tag, 3110 PCI_COMMAND_STATUS_REG, 3111 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR); 3112 } 3113 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) { 3114 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n"); 3115 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3116 TWA_CONTROL_CLEAR_PCI_ABORT); 3117 pci_conf_write(sc->pc, sc->tag, 3118 PCI_COMMAND_STATUS_REG, 3119 TWA_PCI_CONFIG_CLEAR_PCI_ABORT); 3120 } 3121 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) { 3122 /* 3123 * As documented by 3ware, the 9650 erroneously 3124 * flags queue errors during resets. 3125 * Just ignore them during the reset instead of 3126 * bothering the console. 3127 */ 3128 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) || 3129 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) { 3130 aprint_error_dev(sc->twa_dv, 3131 "clearing controller queue error\n"); 3132 } 3133 3134 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET, 3135 TWA_CONTROL_CLEAR_QUEUE_ERROR); 3136 } 3137 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) { 3138 aprint_error_dev(sc->twa_dv, 3139 "micro-controller error\n"); 3140 result = 1; 3141 } 3142 } 3143 return(result); 3144 } 3145 3146 MODULE(MODULE_CLASS_DRIVER, twa, "pci"); 3147 3148 #ifdef _MODULE 3149 #include "ioconf.c" 3150 #endif 3151 3152 static int 3153 twa_modcmd(modcmd_t cmd, void *opaque) 3154 { 3155 int error = 0; 3156 3157 #ifdef _MODULE 3158 switch (cmd) { 3159 case MODULE_CMD_INIT: 3160 error = config_init_component(cfdriver_ioconf_twa, 3161 cfattach_ioconf_twa, cfdata_ioconf_twa); 3162 break; 3163 case MODULE_CMD_FINI: 3164 error = config_fini_component(cfdriver_ioconf_twa, 3165 cfattach_ioconf_twa, cfdata_ioconf_twa); 3166 break; 3167 default: 3168 error = ENOTTY; 3169 break; 3170 } 3171 #endif 3172 3173 return error; 3174 } 3175
Indexes created Fri Sep 26 08:10:20 GMT 2025