twe.c revision 1.60
1 /* $NetBSD: twe.c,v 1.60 2004/09/23 01:16:34 heas Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.60 2004/09/23 01:16:34 heas Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/syslog.h> 87 88 #include <uvm/uvm_extern.h> 89 90 #include <machine/bswap.h> 91 #include <machine/bus.h> 92 93 #include <dev/pci/pcireg.h> 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/twereg.h> 97 #include <dev/pci/twevar.h> 98 #include <dev/pci/tweio.h> 99 100 #include "locators.h" 101 102 #define PCI_CBIO 0x10 103 104 static int twe_aen_get(struct twe_softc *, uint16_t *); 105 static void twe_aen_handler(struct twe_ccb *, int); 106 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 107 static uint16_t twe_aen_dequeue(struct twe_softc *); 108 109 static void twe_attach(struct device *, struct device *, void *); 110 static int twe_init_connection(struct twe_softc *); 111 static int twe_intr(void *); 112 static int twe_match(struct device *, struct cfdata *, void *); 113 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 114 static void twe_poll(struct twe_softc *); 115 static int twe_print(void *, const char *); 116 static int twe_reset(struct twe_softc *); 117 static int twe_submatch(struct device *, struct cfdata *, 118 const locdesc_t *, void *); 119 static int twe_status_check(struct twe_softc *, u_int); 120 static int twe_status_wait(struct twe_softc *, u_int, int); 121 static void twe_describe_controller(struct twe_softc *); 122 123 static int twe_add_unit(struct twe_softc *, int); 124 static int twe_del_unit(struct twe_softc *, int); 125 126 static inline u_int32_t twe_inl(struct twe_softc *, int); 127 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 128 129 dev_type_open(tweopen); 130 dev_type_close(tweclose); 131 dev_type_ioctl(tweioctl); 132 133 const struct cdevsw twe_cdevsw = { 134 tweopen, tweclose, noread, nowrite, tweioctl, 135 nostop, notty, nopoll, nommap, 136 }; 137 138 extern struct cfdriver twe_cd; 139 140 CFATTACH_DECL(twe, sizeof(struct twe_softc), 141 twe_match, twe_attach, NULL, NULL); 142 143 /* 144 * Tables to convert numeric codes to strings. 145 */ 146 const struct twe_code_table twe_table_status[] = { 147 { 0x00, "successful completion" }, 148 149 /* info */ 150 { 0x42, "command in progress" }, 151 { 0x6c, "retrying interface CRC error from UDMA command" }, 152 153 /* warning */ 154 { 0x81, "redundant/inconsequential request ignored" }, 155 { 0x8e, "failed to write zeroes to LBA 0" }, 156 { 0x8f, "failed to profile TwinStor zones" }, 157 158 /* fatal */ 159 { 0xc1, "aborted due to system command or reconfiguration" }, 160 { 0xc4, "aborted" }, 161 { 0xc5, "access error" }, 162 { 0xc6, "access violation" }, 163 { 0xc7, "device failure" }, /* high byte may be port # */ 164 { 0xc8, "controller error" }, 165 { 0xc9, "timed out" }, 166 { 0xcb, "invalid unit number" }, 167 { 0xcf, "unit not available" }, 168 { 0xd2, "undefined opcode" }, 169 { 0xdb, "request incompatible with unit" }, 170 { 0xdc, "invalid request" }, 171 { 0xff, "firmware error, reset requested" }, 172 173 { 0, NULL } 174 }; 175 176 const struct twe_code_table twe_table_unitstate[] = { 177 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 178 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 179 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 180 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 181 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 182 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 183 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 184 185 { 0, NULL } 186 }; 187 188 const struct twe_code_table twe_table_unittype[] = { 189 /* array descriptor configuration */ 190 { TWE_AD_CONFIG_RAID0, "RAID0" }, 191 { TWE_AD_CONFIG_RAID1, "RAID1" }, 192 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 193 { TWE_AD_CONFIG_RAID5, "RAID5" }, 194 { TWE_AD_CONFIG_RAID10, "RAID10" }, 195 196 { 0, NULL } 197 }; 198 199 const struct twe_code_table twe_table_stripedepth[] = { 200 { TWE_AD_STRIPE_4k, "4K" }, 201 { TWE_AD_STRIPE_8k, "8K" }, 202 { TWE_AD_STRIPE_16k, "16K" }, 203 { TWE_AD_STRIPE_32k, "32K" }, 204 { TWE_AD_STRIPE_64k, "64K" }, 205 206 { 0, NULL } 207 }; 208 209 /* 210 * Asynchronous event notification messages are qualified: 211 * a - not unit/port specific 212 * u - unit specific 213 * p - port specific 214 * 215 * They are further qualified with a severity: 216 * E - LOG_EMERG 217 * a - LOG_ALERT 218 * c - LOG_CRIT 219 * e - LOG_ERR 220 * w - LOG_WARNING 221 * n - LOG_NOTICE 222 * i - LOG_INFO 223 * d - LOG_DEBUG 224 * blank - just use printf 225 */ 226 const struct twe_code_table twe_table_aen[] = { 227 { 0x00, "a queue empty" }, 228 { 0x01, "a soft reset" }, 229 { 0x02, "uc degraded mode" }, 230 { 0x03, "aa controller error" }, 231 { 0x04, "uE rebuild fail" }, 232 { 0x05, "un rebuild done" }, 233 { 0x06, "ue incomplete unit" }, 234 { 0x07, "un initialization done" }, 235 { 0x08, "uw unclean shutdown detected" }, 236 { 0x09, "pe drive timeout" }, 237 { 0x0a, "pc drive error" }, 238 { 0x0b, "un rebuild started" }, 239 { 0x0c, "un initialization started" }, 240 { 0x0d, "ui logical unit deleted" }, 241 { 0x0f, "pc SMART threshold exceeded" }, 242 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 243 { 0x21, "pe ATA UDMA downgrade" }, 244 { 0x22, "pi ATA UDMA upgrade" }, 245 { 0x23, "pw sector repair occurred" }, 246 { 0x24, "aa SBUF integrity check failure" }, 247 { 0x25, "pa lost cached write" }, 248 { 0x26, "pa drive ECC error detected" }, 249 { 0x27, "pe DCB checksum error" }, 250 { 0x28, "pn DCB unsupported version" }, 251 { 0x29, "ui verify started" }, 252 { 0x2a, "ua verify failed" }, 253 { 0x2b, "ui verify complete" }, 254 { 0x2c, "pw overwrote bad sector during rebuild" }, 255 { 0x2d, "pa encountered bad sector during rebuild" }, 256 { 0x2e, "pe replacement drive too small" }, 257 { 0x2f, "ue array not previously initialized" }, 258 { 0x30, "p drive not supported" }, 259 { 0xff, "a aen queue full" }, 260 261 { 0, NULL }, 262 }; 263 264 const char * 265 twe_describe_code(const struct twe_code_table *table, uint32_t code) 266 { 267 268 for (; table->string != NULL; table++) { 269 if (table->code == code) 270 return (table->string); 271 } 272 return (NULL); 273 } 274 275 static inline u_int32_t 276 twe_inl(struct twe_softc *sc, int off) 277 { 278 279 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 280 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 281 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 282 } 283 284 static inline void 285 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 286 { 287 288 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 289 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 290 BUS_SPACE_BARRIER_WRITE); 291 } 292 293 /* 294 * Match a supported board. 295 */ 296 static int 297 twe_match(struct device *parent, struct cfdata *cfdata, void *aux) 298 { 299 struct pci_attach_args *pa; 300 301 pa = aux; 302 303 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 304 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 305 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 306 } 307 308 /* 309 * Attach a supported board. 310 * 311 * XXX This doesn't fail gracefully. 312 */ 313 static void 314 twe_attach(struct device *parent, struct device *self, void *aux) 315 { 316 struct pci_attach_args *pa; 317 struct twe_softc *sc; 318 pci_chipset_tag_t pc; 319 pci_intr_handle_t ih; 320 pcireg_t csr; 321 const char *intrstr; 322 int s, size, i, rv, rseg; 323 size_t max_segs, max_xfer; 324 bus_dma_segment_t seg; 325 struct twe_cmd *tc; 326 struct twe_ccb *ccb; 327 328 sc = (struct twe_softc *)self; 329 pa = aux; 330 pc = pa->pa_pc; 331 sc->sc_dmat = pa->pa_dmat; 332 SIMPLEQ_INIT(&sc->sc_ccb_queue); 333 SLIST_INIT(&sc->sc_ccb_freelist); 334 335 aprint_naive(": RAID controller\n"); 336 aprint_normal(": 3ware Escalade\n"); 337 338 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 339 if (ccb == NULL) { 340 aprint_error("%s: unable to allocate memory for ccbs\n", 341 sc->sc_dv.dv_xname); 342 return; 343 } 344 345 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 346 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 347 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 348 return; 349 } 350 351 /* Enable the device. */ 352 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 353 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 354 csr | PCI_COMMAND_MASTER_ENABLE); 355 356 /* Map and establish the interrupt. */ 357 if (pci_intr_map(pa, &ih)) { 358 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 359 return; 360 } 361 362 intrstr = pci_intr_string(pc, ih); 363 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 364 if (sc->sc_ih == NULL) { 365 aprint_error("%s: can't establish interrupt%s%s\n", 366 sc->sc_dv.dv_xname, 367 (intrstr) ? " at " : "", 368 (intrstr) ? intrstr : ""); 369 return; 370 } 371 372 if (intrstr != NULL) 373 aprint_normal("%s: interrupting at %s\n", 374 sc->sc_dv.dv_xname, intrstr); 375 376 /* 377 * Allocate and initialise the command blocks and CCBs. 378 */ 379 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 380 381 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 382 &rseg, BUS_DMA_NOWAIT)) != 0) { 383 aprint_error("%s: unable to allocate commands, rv = %d\n", 384 sc->sc_dv.dv_xname, rv); 385 return; 386 } 387 388 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 389 (caddr_t *)&sc->sc_cmds, 390 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 391 aprint_error("%s: unable to map commands, rv = %d\n", 392 sc->sc_dv.dv_xname, rv); 393 return; 394 } 395 396 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 397 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 398 aprint_error("%s: unable to create command DMA map, rv = %d\n", 399 sc->sc_dv.dv_xname, rv); 400 return; 401 } 402 403 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 404 size, NULL, BUS_DMA_NOWAIT)) != 0) { 405 aprint_error("%s: unable to load command DMA map, rv = %d\n", 406 sc->sc_dv.dv_xname, rv); 407 return; 408 } 409 410 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 411 memset(sc->sc_cmds, 0, size); 412 413 sc->sc_ccbs = ccb; 414 tc = (struct twe_cmd *)sc->sc_cmds; 415 max_segs = twe_get_maxsegs(); 416 max_xfer = twe_get_maxxfer(max_segs); 417 418 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 419 ccb->ccb_cmd = tc; 420 ccb->ccb_cmdid = i; 421 ccb->ccb_flags = 0; 422 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 423 max_segs, PAGE_SIZE, 0, 424 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 425 &ccb->ccb_dmamap_xfer); 426 if (rv != 0) { 427 aprint_error("%s: can't create dmamap, rv = %d\n", 428 sc->sc_dv.dv_xname, rv); 429 return; 430 } 431 432 /* Save the first CCB for AEN retrieval. */ 433 if (i != 0) 434 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 435 ccb_chain.slist); 436 } 437 438 /* Wait for the controller to become ready. */ 439 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 440 aprint_error("%s: microcontroller not ready\n", 441 sc->sc_dv.dv_xname); 442 return; 443 } 444 445 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 446 447 /* Reset the controller. */ 448 s = splbio(); 449 rv = twe_reset(sc); 450 splx(s); 451 if (rv) { 452 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 453 return; 454 } 455 456 /* Initialise connection with controller. */ 457 twe_init_connection(sc); 458 459 twe_describe_controller(sc); 460 461 /* Find and attach RAID array units. */ 462 sc->sc_nunits = 0; 463 for (i = 0; i < TWE_MAX_UNITS; i++) 464 (void) twe_add_unit(sc, i); 465 466 /* ...and finally, enable interrupts. */ 467 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 468 TWE_CTL_UNMASK_RESP_INTR | 469 TWE_CTL_ENABLE_INTRS); 470 } 471 472 void 473 twe_register_callbacks(struct twe_softc *sc, int unit, 474 const struct twe_callbacks *tcb) 475 { 476 477 sc->sc_units[unit].td_callbacks = tcb; 478 } 479 480 static void 481 twe_recompute_openings(struct twe_softc *sc) 482 { 483 struct twe_drive *td; 484 int unit, openings; 485 486 if (sc->sc_nunits != 0) 487 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 488 else 489 openings = 0; 490 if (openings == sc->sc_openings) 491 return; 492 sc->sc_openings = openings; 493 494 #ifdef TWE_DEBUG 495 printf("%s: %d array%s, %d openings per array\n", 496 sc->sc_dv.dv_xname, sc->sc_nunits, 497 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 498 #endif 499 500 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 501 td = &sc->sc_units[unit]; 502 if (td->td_dev != NULL) 503 (*td->td_callbacks->tcb_openings)(td->td_dev, 504 sc->sc_openings); 505 } 506 } 507 508 static int 509 twe_add_unit(struct twe_softc *sc, int unit) 510 { 511 struct twe_param *dtp, *atp; 512 struct twe_array_descriptor *ad; 513 struct twe_drive *td; 514 struct twe_attach_args twea; 515 uint32_t newsize; 516 int rv; 517 uint16_t dsize; 518 uint8_t newtype, newstripe; 519 int help[2]; 520 locdesc_t *ldesc = (void *)help; /* XXX */ 521 522 if (unit < 0 || unit >= TWE_MAX_UNITS) 523 return (EINVAL); 524 525 /* Find attached units. */ 526 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 527 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 528 if (rv != 0) { 529 aprint_error("%s: error %d fetching unit summary\n", 530 sc->sc_dv.dv_xname, rv); 531 return (rv); 532 } 533 534 /* For each detected unit, collect size and store in an array. */ 535 td = &sc->sc_units[unit]; 536 537 /* Unit present? */ 538 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 539 /* 540 * XXX Should we check to see if a device has been 541 * XXX attached at this index and detach it if it 542 * XXX has? ("rescan" semantics) 543 */ 544 rv = 0; 545 goto out; 546 } 547 548 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 549 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 550 if (rv != 0) { 551 aprint_error("%s: error %d fetching descriptor size " 552 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 553 goto out; 554 } 555 556 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 557 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 558 if (rv != 0) { 559 aprint_error("%s: error %d fetching array descriptor " 560 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 561 goto out; 562 } 563 564 ad = (struct twe_array_descriptor *)atp->tp_data; 565 newtype = ad->configuration; 566 newstripe = ad->stripe_size; 567 free(atp, M_DEVBUF); 568 569 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 570 TWE_PARAM_UNITINFO_Capacity, &newsize); 571 if (rv != 0) { 572 aprint_error( 573 "%s: error %d fetching capacity for unit %d\n", 574 sc->sc_dv.dv_xname, rv, unit); 575 goto out; 576 } 577 578 /* 579 * Have a device, so we need to attach it. If there is currently 580 * something sitting at the slot, and the parameters are different, 581 * then we detach the old device before attaching the new one. 582 */ 583 if (td->td_dev != NULL && 584 td->td_size == newsize && 585 td->td_type == newtype && 586 td->td_stripe == newstripe) { 587 /* Same as the old device; just keep using it. */ 588 rv = 0; 589 goto out; 590 } else if (td->td_dev != NULL) { 591 /* Detach the old device first. */ 592 (void) config_detach(td->td_dev, DETACH_FORCE); 593 td->td_dev = NULL; 594 } else if (td->td_size == 0) 595 sc->sc_nunits++; 596 597 /* 598 * Committed to the new array unit; assign its parameters and 599 * recompute the number of available command openings. 600 */ 601 td->td_size = newsize; 602 td->td_type = newtype; 603 td->td_stripe = newstripe; 604 twe_recompute_openings(sc); 605 606 twea.twea_unit = unit; 607 608 ldesc->len = 1; 609 ldesc->locs[TWECF_UNIT] = unit; 610 611 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", NULL, &twea, 612 twe_print, twe_submatch); 613 614 rv = 0; 615 out: 616 free(dtp, M_DEVBUF); 617 return (rv); 618 } 619 620 static int 621 twe_del_unit(struct twe_softc *sc, int unit) 622 { 623 struct twe_drive *td; 624 625 if (unit < 0 || unit >= TWE_MAX_UNITS) 626 return (EINVAL); 627 628 td = &sc->sc_units[unit]; 629 if (td->td_size != 0) 630 sc->sc_nunits--; 631 td->td_size = 0; 632 td->td_type = 0; 633 td->td_stripe = 0; 634 if (td->td_dev != NULL) { 635 (void) config_detach(td->td_dev, DETACH_FORCE); 636 td->td_dev = NULL; 637 } 638 twe_recompute_openings(sc); 639 return (0); 640 } 641 642 /* 643 * Reset the controller. 644 * MUST BE CALLED AT splbio()! 645 */ 646 static int 647 twe_reset(struct twe_softc *sc) 648 { 649 uint16_t aen; 650 u_int status; 651 volatile u_int32_t junk; 652 int got, rv; 653 654 /* Issue a soft reset. */ 655 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 656 TWE_CTL_CLEAR_HOST_INTR | 657 TWE_CTL_CLEAR_ATTN_INTR | 658 TWE_CTL_MASK_CMD_INTR | 659 TWE_CTL_MASK_RESP_INTR | 660 TWE_CTL_CLEAR_ERROR_STS | 661 TWE_CTL_DISABLE_INTRS); 662 663 /* Wait for attention... */ 664 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 665 printf("%s: timeout waiting for attention interrupt\n", 666 sc->sc_dv.dv_xname); 667 return (-1); 668 } 669 670 /* ...and ACK it. */ 671 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 672 673 /* 674 * Pull AENs out of the controller; look for a soft reset AEN. 675 * Open code this, since we want to detect reset even if the 676 * queue for management tools is full. 677 * 678 * Note that since: 679 * - interrupts are blocked 680 * - we have reset the controller 681 * - acknowledged the pending ATTENTION 682 * that there is no way a pending asynchronous AEN fetch would 683 * finish, so clear the flag. 684 */ 685 sc->sc_flags &= ~TWEF_AEN; 686 for (got = 0;;) { 687 rv = twe_aen_get(sc, &aen); 688 if (rv != 0) 689 printf("%s: error %d while draining event queue\n", 690 sc->sc_dv.dv_xname, rv); 691 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 692 break; 693 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 694 got = 1; 695 twe_aen_enqueue(sc, aen, 1); 696 } 697 698 if (!got) { 699 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 700 return (-1); 701 } 702 703 /* Check controller status. */ 704 status = twe_inl(sc, TWE_REG_STS); 705 if (twe_status_check(sc, status)) { 706 printf("%s: controller errors detected\n", 707 sc->sc_dv.dv_xname); 708 return (-1); 709 } 710 711 /* Drain the response queue. */ 712 for (;;) { 713 status = twe_inl(sc, TWE_REG_STS); 714 if (twe_status_check(sc, status) != 0) { 715 printf("%s: can't drain response queue\n", 716 sc->sc_dv.dv_xname); 717 return (-1); 718 } 719 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 720 break; 721 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 722 } 723 724 return (0); 725 } 726 727 /* 728 * Print autoconfiguration message for a sub-device. 729 */ 730 static int 731 twe_print(void *aux, const char *pnp) 732 { 733 struct twe_attach_args *twea; 734 735 twea = aux; 736 737 if (pnp != NULL) 738 aprint_normal("block device at %s", pnp); 739 aprint_normal(" unit %d", twea->twea_unit); 740 return (UNCONF); 741 } 742 743 /* 744 * Match a sub-device. 745 */ 746 static int 747 twe_submatch(struct device *parent, struct cfdata *cf, 748 const locdesc_t *ldesc, void *aux) 749 { 750 751 if (cf->cf_loc[TWECF_UNIT] != TWECF_UNIT_DEFAULT && 752 cf->cf_loc[TWECF_UNIT] != ldesc->locs[TWECF_UNIT]) 753 return (0); 754 755 return (config_match(parent, cf, aux)); 756 } 757 758 /* 759 * Interrupt service routine. 760 */ 761 static int 762 twe_intr(void *arg) 763 { 764 struct twe_softc *sc; 765 u_int status; 766 int caught, rv; 767 768 sc = arg; 769 caught = 0; 770 status = twe_inl(sc, TWE_REG_STS); 771 twe_status_check(sc, status); 772 773 /* Host interrupts - purpose unknown. */ 774 if ((status & TWE_STS_HOST_INTR) != 0) { 775 #ifdef DEBUG 776 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 777 #endif 778 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 779 caught = 1; 780 } 781 782 /* 783 * Attention interrupts, signalled when a controller or child device 784 * state change has occurred. 785 */ 786 if ((status & TWE_STS_ATTN_INTR) != 0) { 787 rv = twe_aen_get(sc, NULL); 788 if (rv != 0) 789 printf("%s: unable to retrieve AEN (%d)\n", 790 sc->sc_dv.dv_xname, rv); 791 else 792 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 793 caught = 1; 794 } 795 796 /* 797 * Command interrupts, signalled when the controller can accept more 798 * commands. We don't use this; instead, we try to submit commands 799 * when we receive them, and when other commands have completed. 800 * Mask it so we don't get another one. 801 */ 802 if ((status & TWE_STS_CMD_INTR) != 0) { 803 #ifdef DEBUG 804 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 805 #endif 806 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 807 caught = 1; 808 } 809 810 if ((status & TWE_STS_RESP_INTR) != 0) { 811 twe_poll(sc); 812 caught = 1; 813 } 814 815 return (caught); 816 } 817 818 /* 819 * Fetch an AEN. Even though this is really like parameter 820 * retrieval, we handle this specially, because we issue this 821 * AEN retrieval command from interrupt context, and thus 822 * reserve a CCB for it to avoid resource shortage. 823 * 824 * XXX There are still potential resource shortages we could 825 * XXX encounter. Consider pre-allocating all AEN-related 826 * XXX resources. 827 * 828 * MUST BE CALLED AT splbio()! 829 */ 830 static int 831 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 832 { 833 struct twe_ccb *ccb; 834 struct twe_cmd *tc; 835 struct twe_param *tp; 836 int rv; 837 838 /* 839 * If we're already retrieving an AEN, just wait; another 840 * retrieval will be chained after the current one completes. 841 */ 842 if (sc->sc_flags & TWEF_AEN) { 843 /* 844 * It is a fatal software programming error to attempt 845 * to fetch an AEN synchronously when an AEN fetch is 846 * already pending. 847 */ 848 KASSERT(aenp == NULL); 849 return (0); 850 } 851 852 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 853 if (tp == NULL) 854 return (ENOMEM); 855 856 ccb = twe_ccb_alloc(sc, 857 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 858 KASSERT(ccb != NULL); 859 860 ccb->ccb_data = tp; 861 ccb->ccb_datasize = TWE_SECTOR_SIZE; 862 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 863 ccb->ccb_tx.tx_context = tp; 864 ccb->ccb_tx.tx_dv = &sc->sc_dv; 865 866 tc = ccb->ccb_cmd; 867 tc->tc_size = 2; 868 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 869 tc->tc_unit = 0; 870 tc->tc_count = htole16(1); 871 872 /* Fill in the outbound parameter data. */ 873 tp->tp_table_id = htole16(TWE_PARAM_AEN); 874 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 875 tp->tp_param_size = 2; 876 877 /* Map the transfer. */ 878 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 879 twe_ccb_free(sc, ccb); 880 goto done; 881 } 882 883 /* Enqueue the command and wait. */ 884 if (aenp != NULL) { 885 rv = twe_ccb_poll(sc, ccb, 5); 886 twe_ccb_unmap(sc, ccb); 887 twe_ccb_free(sc, ccb); 888 if (rv == 0) 889 *aenp = le16toh(*(uint16_t *)tp->tp_data); 890 free(tp, M_DEVBUF); 891 } else { 892 sc->sc_flags |= TWEF_AEN; 893 twe_ccb_enqueue(sc, ccb); 894 rv = 0; 895 } 896 897 done: 898 return (rv); 899 } 900 901 /* 902 * Handle an AEN returned by the controller. 903 * MUST BE CALLED AT splbio()! 904 */ 905 static void 906 twe_aen_handler(struct twe_ccb *ccb, int error) 907 { 908 struct twe_softc *sc; 909 struct twe_param *tp; 910 uint16_t aen; 911 int rv; 912 913 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 914 tp = ccb->ccb_tx.tx_context; 915 twe_ccb_unmap(sc, ccb); 916 917 sc->sc_flags &= ~TWEF_AEN; 918 919 if (error) { 920 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 921 aen = TWE_AEN_QUEUE_EMPTY; 922 } else 923 aen = le16toh(*(u_int16_t *)tp->tp_data); 924 free(tp, M_DEVBUF); 925 twe_ccb_free(sc, ccb); 926 927 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 928 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 929 return; 930 } 931 932 twe_aen_enqueue(sc, aen, 0); 933 934 /* 935 * Chain another retrieval in case interrupts have been 936 * coalesced. 937 */ 938 rv = twe_aen_get(sc, NULL); 939 if (rv != 0) 940 printf("%s: unable to retrieve AEN (%d)\n", 941 sc->sc_dv.dv_xname, rv); 942 } 943 944 static void 945 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 946 { 947 const char *str, *msg; 948 int s, next, nextnext, level; 949 950 /* 951 * First report the AEN on the console. Maybe. 952 */ 953 if (! quiet) { 954 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 955 if (str == NULL) { 956 printf("%s: unknown AEN 0x%04x\n", 957 sc->sc_dv.dv_xname, aen); 958 } else { 959 msg = str + 3; 960 switch (str[1]) { 961 case 'E': level = LOG_EMERG; break; 962 case 'a': level = LOG_ALERT; break; 963 case 'c': level = LOG_CRIT; break; 964 case 'e': level = LOG_ERR; break; 965 case 'w': level = LOG_WARNING; break; 966 case 'n': level = LOG_NOTICE; break; 967 case 'i': level = LOG_INFO; break; 968 case 'd': level = LOG_DEBUG; break; 969 default: 970 /* Don't use syslog. */ 971 level = -1; 972 } 973 974 if (level < 0) { 975 switch (str[0]) { 976 case 'u': 977 case 'p': 978 printf("%s: %s %d: %s\n", 979 sc->sc_dv.dv_xname, 980 str[0] == 'u' ? "unit" : "port", 981 TWE_AEN_UNIT(aen), msg); 982 break; 983 984 default: 985 printf("%s: %s\n", 986 sc->sc_dv.dv_xname, msg); 987 } 988 } else { 989 switch (str[0]) { 990 case 'u': 991 case 'p': 992 log(level, "%s: %s %d: %s\n", 993 sc->sc_dv.dv_xname, 994 str[0] == 'u' ? "unit" : "port", 995 TWE_AEN_UNIT(aen), msg); 996 break; 997 998 default: 999 log(level, "%s: %s\n", 1000 sc->sc_dv.dv_xname, msg); 1001 } 1002 } 1003 } 1004 } 1005 1006 /* Now enqueue the AEN for mangement tools. */ 1007 s = splbio(); 1008 1009 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1010 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1011 1012 /* 1013 * If this is the last free slot, then queue up a "queue 1014 * full" message. 1015 */ 1016 if (nextnext == sc->sc_aen_tail) 1017 aen = TWE_AEN_QUEUE_FULL; 1018 1019 if (next != sc->sc_aen_tail) { 1020 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1021 sc->sc_aen_head = next; 1022 } 1023 1024 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1025 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1026 wakeup(&sc->sc_aen_queue); 1027 } 1028 1029 splx(s); 1030 } 1031 1032 /* NOTE: Must be called at splbio(). */ 1033 static uint16_t 1034 twe_aen_dequeue(struct twe_softc *sc) 1035 { 1036 uint16_t aen; 1037 1038 if (sc->sc_aen_tail == sc->sc_aen_head) 1039 aen = TWE_AEN_QUEUE_EMPTY; 1040 else { 1041 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1042 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1043 } 1044 1045 return (aen); 1046 } 1047 1048 /* 1049 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1050 * fetch 1, 2, and 4 byte parameter values, respectively. 1051 */ 1052 int 1053 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1054 uint8_t *valp) 1055 { 1056 struct twe_param *tp; 1057 int rv; 1058 1059 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1060 if (rv != 0) 1061 return (rv); 1062 *valp = *(uint8_t *)tp->tp_data; 1063 free(tp, M_DEVBUF); 1064 return (0); 1065 } 1066 1067 int 1068 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1069 uint16_t *valp) 1070 { 1071 struct twe_param *tp; 1072 int rv; 1073 1074 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1075 if (rv != 0) 1076 return (rv); 1077 *valp = le16toh(*(uint16_t *)tp->tp_data); 1078 free(tp, M_DEVBUF); 1079 return (0); 1080 } 1081 1082 int 1083 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1084 uint32_t *valp) 1085 { 1086 struct twe_param *tp; 1087 int rv; 1088 1089 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1090 if (rv != 0) 1091 return (rv); 1092 *valp = le32toh(*(uint32_t *)tp->tp_data); 1093 free(tp, M_DEVBUF); 1094 return (0); 1095 } 1096 1097 /* 1098 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1099 * it will be called with generated context when the command has completed. 1100 * If no callback is provided, the command will be executed synchronously 1101 * and a pointer to a buffer containing the data returned. 1102 * 1103 * The caller or callback is responsible for freeing the buffer. 1104 * 1105 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1106 */ 1107 int 1108 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1109 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1110 { 1111 struct twe_ccb *ccb; 1112 struct twe_cmd *tc; 1113 struct twe_param *tp; 1114 int rv, s; 1115 1116 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1117 if (tp == NULL) 1118 return ENOMEM; 1119 1120 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1121 KASSERT(ccb != NULL); 1122 1123 ccb->ccb_data = tp; 1124 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1125 ccb->ccb_tx.tx_handler = func; 1126 ccb->ccb_tx.tx_context = tp; 1127 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1128 1129 tc = ccb->ccb_cmd; 1130 tc->tc_size = 2; 1131 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1132 tc->tc_unit = 0; 1133 tc->tc_count = htole16(1); 1134 1135 /* Fill in the outbound parameter data. */ 1136 tp->tp_table_id = htole16(table_id); 1137 tp->tp_param_id = param_id; 1138 tp->tp_param_size = size; 1139 1140 /* Map the transfer. */ 1141 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1142 twe_ccb_free(sc, ccb); 1143 goto done; 1144 } 1145 1146 /* Submit the command and either wait or let the callback handle it. */ 1147 if (func == NULL) { 1148 s = splbio(); 1149 rv = twe_ccb_poll(sc, ccb, 5); 1150 twe_ccb_unmap(sc, ccb); 1151 twe_ccb_free(sc, ccb); 1152 splx(s); 1153 } else { 1154 #ifdef DEBUG 1155 if (pbuf != NULL) 1156 panic("both func and pbuf defined"); 1157 #endif 1158 twe_ccb_enqueue(sc, ccb); 1159 return 0; 1160 } 1161 1162 done: 1163 if (pbuf == NULL || rv != 0) 1164 free(tp, M_DEVBUF); 1165 else if (pbuf != NULL && rv == 0) 1166 *pbuf = tp; 1167 return rv; 1168 } 1169 1170 /* 1171 * Execute a TWE_OP_SET_PARAM command. 1172 * 1173 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1174 */ 1175 static int 1176 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1177 void *buf) 1178 { 1179 struct twe_ccb *ccb; 1180 struct twe_cmd *tc; 1181 struct twe_param *tp; 1182 int rv, s; 1183 1184 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1185 if (tp == NULL) 1186 return ENOMEM; 1187 1188 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1189 KASSERT(ccb != NULL); 1190 1191 ccb->ccb_data = tp; 1192 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1193 ccb->ccb_tx.tx_handler = 0; 1194 ccb->ccb_tx.tx_context = tp; 1195 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1196 1197 tc = ccb->ccb_cmd; 1198 tc->tc_size = 2; 1199 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1200 tc->tc_unit = 0; 1201 tc->tc_count = htole16(1); 1202 1203 /* Fill in the outbound parameter data. */ 1204 tp->tp_table_id = htole16(table_id); 1205 tp->tp_param_id = param_id; 1206 tp->tp_param_size = size; 1207 memcpy(tp->tp_data, buf, size); 1208 1209 /* Map the transfer. */ 1210 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1211 twe_ccb_free(sc, ccb); 1212 goto done; 1213 } 1214 1215 /* Submit the command and wait. */ 1216 s = splbio(); 1217 rv = twe_ccb_poll(sc, ccb, 5); 1218 twe_ccb_unmap(sc, ccb); 1219 twe_ccb_free(sc, ccb); 1220 splx(s); 1221 done: 1222 free(tp, M_DEVBUF); 1223 return (rv); 1224 } 1225 1226 /* 1227 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1228 * Must be called with interrupts blocked. 1229 */ 1230 static int 1231 twe_init_connection(struct twe_softc *sc) 1232 /*###762 [cc] warning: `twe_init_connection' was used with no prototype before its definition%%%*/ 1233 /*###762 [cc] warning: `twe_init_connection' was declared implicitly `extern' and later `static'%%%*/ 1234 { 1235 struct twe_ccb *ccb; 1236 struct twe_cmd *tc; 1237 int rv; 1238 1239 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1240 return (EAGAIN); 1241 1242 /* Build the command. */ 1243 tc = ccb->ccb_cmd; 1244 tc->tc_size = 3; 1245 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1246 tc->tc_unit = 0; 1247 tc->tc_count = htole16(TWE_MAX_CMDS); 1248 tc->tc_args.init_connection.response_queue_pointer = 0; 1249 1250 /* Submit the command for immediate execution. */ 1251 rv = twe_ccb_poll(sc, ccb, 5); 1252 twe_ccb_free(sc, ccb); 1253 return (rv); 1254 } 1255 1256 /* 1257 * Poll the controller for completed commands. Must be called with 1258 * interrupts blocked. 1259 */ 1260 static void 1261 twe_poll(struct twe_softc *sc) 1262 { 1263 struct twe_ccb *ccb; 1264 int found; 1265 u_int status, cmdid; 1266 1267 found = 0; 1268 1269 for (;;) { 1270 status = twe_inl(sc, TWE_REG_STS); 1271 twe_status_check(sc, status); 1272 1273 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1274 break; 1275 1276 found = 1; 1277 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1278 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1279 if (cmdid >= TWE_MAX_QUEUECNT) { 1280 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1281 continue; 1282 } 1283 1284 ccb = sc->sc_ccbs + cmdid; 1285 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1286 printf("%s: CCB for cmdid %d not active\n", 1287 sc->sc_dv.dv_xname, cmdid); 1288 continue; 1289 } 1290 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1291 1292 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1293 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1294 sizeof(struct twe_cmd), 1295 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1296 1297 /* Pass notification to upper layers. */ 1298 if (ccb->ccb_tx.tx_handler != NULL) 1299 (*ccb->ccb_tx.tx_handler)(ccb, 1300 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1301 } 1302 1303 /* If any commands have completed, run the software queue. */ 1304 if (found) 1305 twe_ccb_enqueue(sc, NULL); 1306 } 1307 1308 /* 1309 * Wait for `status' to be set in the controller status register. Return 1310 * zero if found, non-zero if the operation timed out. 1311 */ 1312 static int 1313 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1314 { 1315 1316 for (timo *= 10; timo != 0; timo--) { 1317 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1318 break; 1319 delay(100000); 1320 } 1321 1322 return (timo == 0); 1323 } 1324 1325 /* 1326 * Complain if the status bits aren't what we expect. 1327 */ 1328 static int 1329 twe_status_check(struct twe_softc *sc, u_int status) 1330 { 1331 int rv; 1332 1333 rv = 0; 1334 1335 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1336 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1337 status & ~TWE_STS_EXPECTED_BITS); 1338 rv = -1; 1339 } 1340 1341 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1342 printf("%s: unexpected status bits: 0x%08x\n", 1343 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1344 rv = -1; 1345 } 1346 1347 return (rv); 1348 } 1349 1350 /* 1351 * Allocate and initialise a CCB. 1352 */ 1353 static __inline void 1354 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1355 { 1356 struct twe_cmd *tc; 1357 1358 ccb->ccb_tx.tx_handler = NULL; 1359 ccb->ccb_flags = flags; 1360 tc = ccb->ccb_cmd; 1361 tc->tc_status = 0; 1362 tc->tc_flags = 0; 1363 tc->tc_cmdid = ccb->ccb_cmdid; 1364 } 1365 1366 struct twe_ccb * 1367 twe_ccb_alloc(struct twe_softc *sc, int flags) 1368 { 1369 struct twe_ccb *ccb; 1370 int s; 1371 1372 s = splbio(); 1373 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1374 /* Use the reserved CCB. */ 1375 ccb = sc->sc_ccbs; 1376 } else { 1377 /* Allocate a CCB and command block. */ 1378 if (__predict_false((ccb = 1379 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1380 splx(s); 1381 return (NULL); 1382 } 1383 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1384 } 1385 #ifdef DIAGNOSTIC 1386 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1387 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1388 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1389 panic("twe_ccb_alloc: CCB %ld already allocated", 1390 (long)(ccb - sc->sc_ccbs)); 1391 flags |= TWE_CCB_ALLOCED; 1392 #endif 1393 splx(s); 1394 1395 twe_ccb_init(sc, ccb, flags); 1396 return (ccb); 1397 } 1398 1399 struct twe_ccb * 1400 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1401 { 1402 struct twe_ccb *ccb; 1403 int s; 1404 1405 KASSERT((flags & TWE_CCB_AEN) == 0); 1406 1407 s = splbio(); 1408 while (__predict_false((ccb = 1409 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1410 sc->sc_flags |= TWEF_WAIT_CCB; 1411 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1412 } 1413 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1414 #ifdef DIAGNOSTIC 1415 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1416 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1417 (long)(ccb - sc->sc_ccbs)); 1418 flags |= TWE_CCB_ALLOCED; 1419 #endif 1420 splx(s); 1421 1422 twe_ccb_init(sc, ccb, flags); 1423 return (ccb); 1424 } 1425 1426 /* 1427 * Free a CCB. 1428 */ 1429 void 1430 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1431 { 1432 int s; 1433 1434 s = splbio(); 1435 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1436 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1437 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1438 sc->sc_flags &= ~TWEF_WAIT_CCB; 1439 wakeup(&sc->sc_ccb_freelist); 1440 } 1441 } 1442 ccb->ccb_flags = 0; 1443 splx(s); 1444 } 1445 1446 /* 1447 * Map the specified CCB's command block and data buffer (if any) into 1448 * controller visible space. Perform DMA synchronisation. 1449 */ 1450 int 1451 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1452 { 1453 struct twe_cmd *tc; 1454 int flags, nsegs, i, s, rv; 1455 void *data; 1456 1457 /* 1458 * The data as a whole must be 512-byte aligned. 1459 */ 1460 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1461 s = splvm(); 1462 /* XXX */ 1463 ccb->ccb_abuf = uvm_km_kmemalloc(kmem_map, NULL, 1464 ccb->ccb_datasize, UVM_KMF_NOWAIT); 1465 splx(s); 1466 data = (void *)ccb->ccb_abuf; 1467 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1468 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1469 } else { 1470 ccb->ccb_abuf = (vaddr_t)0; 1471 data = ccb->ccb_data; 1472 } 1473 1474 /* 1475 * Map the data buffer into bus space and build the S/G list. 1476 */ 1477 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1478 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1479 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1480 BUS_DMA_READ : BUS_DMA_WRITE)); 1481 if (rv != 0) { 1482 if (ccb->ccb_abuf != (vaddr_t)0) { 1483 s = splvm(); 1484 /* XXX */ 1485 uvm_km_free(kmem_map, ccb->ccb_abuf, 1486 ccb->ccb_datasize); 1487 splx(s); 1488 } 1489 return (rv); 1490 } 1491 1492 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1493 tc = ccb->ccb_cmd; 1494 tc->tc_size += 2 * nsegs; 1495 1496 /* The location of the S/G list is dependant upon command type. */ 1497 switch (tc->tc_opcode >> 5) { 1498 case 2: 1499 for (i = 0; i < nsegs; i++) { 1500 tc->tc_args.param.sgl[i].tsg_address = 1501 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1502 tc->tc_args.param.sgl[i].tsg_length = 1503 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1504 } 1505 /* XXX Needed? */ 1506 for (; i < TWE_SG_SIZE; i++) { 1507 tc->tc_args.param.sgl[i].tsg_address = 0; 1508 tc->tc_args.param.sgl[i].tsg_length = 0; 1509 } 1510 break; 1511 case 3: 1512 for (i = 0; i < nsegs; i++) { 1513 tc->tc_args.io.sgl[i].tsg_address = 1514 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1515 tc->tc_args.io.sgl[i].tsg_length = 1516 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1517 } 1518 /* XXX Needed? */ 1519 for (; i < TWE_SG_SIZE; i++) { 1520 tc->tc_args.io.sgl[i].tsg_address = 0; 1521 tc->tc_args.io.sgl[i].tsg_length = 0; 1522 } 1523 break; 1524 default: 1525 /* 1526 * In all likelihood, this is a command passed from 1527 * management tools in userspace where no S/G list is 1528 * necessary because no data is being passed. 1529 */ 1530 break; 1531 } 1532 1533 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1534 flags = BUS_DMASYNC_PREREAD; 1535 else 1536 flags = 0; 1537 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1538 flags |= BUS_DMASYNC_PREWRITE; 1539 1540 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1541 ccb->ccb_datasize, flags); 1542 return (0); 1543 } 1544 1545 /* 1546 * Unmap the specified CCB's command block and data buffer (if any) and 1547 * perform DMA synchronisation. 1548 */ 1549 void 1550 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1551 { 1552 int flags, s; 1553 1554 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1555 flags = BUS_DMASYNC_POSTREAD; 1556 else 1557 flags = 0; 1558 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1559 flags |= BUS_DMASYNC_POSTWRITE; 1560 1561 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1562 ccb->ccb_datasize, flags); 1563 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1564 1565 if (ccb->ccb_abuf != (vaddr_t)0) { 1566 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1567 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1568 ccb->ccb_datasize); 1569 s = splvm(); 1570 /* XXX */ 1571 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize); 1572 splx(s); 1573 } 1574 } 1575 1576 /* 1577 * Submit a command to the controller and poll on completion. Return 1578 * non-zero on timeout (but don't check status, as some command types don't 1579 * return status). Must be called with interrupts blocked. 1580 */ 1581 int 1582 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1583 { 1584 int rv; 1585 1586 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1587 return (rv); 1588 1589 for (timo *= 1000; timo != 0; timo--) { 1590 twe_poll(sc); 1591 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1592 break; 1593 DELAY(100); 1594 } 1595 1596 return (timo == 0); 1597 } 1598 1599 /* 1600 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1601 * the order that they were enqueued and try to submit their command blocks 1602 * to the controller for execution. 1603 */ 1604 void 1605 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1606 { 1607 int s; 1608 1609 s = splbio(); 1610 1611 if (ccb != NULL) 1612 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1613 1614 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1615 if (twe_ccb_submit(sc, ccb)) 1616 break; 1617 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1618 } 1619 1620 splx(s); 1621 } 1622 1623 /* 1624 * Submit the command block associated with the specified CCB to the 1625 * controller for execution. Must be called with interrupts blocked. 1626 */ 1627 int 1628 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1629 { 1630 bus_addr_t pa; 1631 int rv; 1632 u_int status; 1633 1634 /* Check to see if we can post a command. */ 1635 status = twe_inl(sc, TWE_REG_STS); 1636 twe_status_check(sc, status); 1637 1638 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1639 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1640 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1641 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1642 #ifdef DIAGNOSTIC 1643 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1644 panic("%s: CCB %ld not ALLOCED\n", 1645 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1646 #endif 1647 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1648 pa = sc->sc_cmds_paddr + 1649 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1650 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1651 rv = 0; 1652 } else 1653 rv = EBUSY; 1654 1655 return (rv); 1656 } 1657 1658 1659 /* 1660 * Accept an open operation on the control device. 1661 */ 1662 int 1663 tweopen(dev_t dev, int flag, int mode, struct proc *p) 1664 { 1665 struct twe_softc *twe; 1666 1667 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1668 return (ENXIO); 1669 if ((twe->sc_flags & TWEF_OPEN) != 0) 1670 return (EBUSY); 1671 1672 twe->sc_flags |= TWEF_OPEN; 1673 return (0); 1674 } 1675 1676 /* 1677 * Accept the last close on the control device. 1678 */ 1679 int 1680 tweclose(dev_t dev, int flag, int mode, struct proc *p) 1681 { 1682 struct twe_softc *twe; 1683 1684 twe = device_lookup(&twe_cd, minor(dev)); 1685 twe->sc_flags &= ~TWEF_OPEN; 1686 return (0); 1687 } 1688 1689 void 1690 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1691 { 1692 1693 /* Just wake up the sleeper. */ 1694 wakeup(ccb); 1695 } 1696 1697 /* 1698 * Handle control operations. 1699 */ 1700 int 1701 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1702 { 1703 struct twe_softc *twe; 1704 struct twe_ccb *ccb; 1705 struct twe_param *param; 1706 struct twe_usercommand *tu; 1707 struct twe_paramcommand *tp; 1708 struct twe_drivecommand *td; 1709 void *pdata = NULL; 1710 int s, error = 0; 1711 u_int8_t cmdid; 1712 1713 if (securelevel >= 2) 1714 return (EPERM); 1715 1716 twe = device_lookup(&twe_cd, minor(dev)); 1717 tu = (struct twe_usercommand *)data; 1718 tp = (struct twe_paramcommand *)data; 1719 td = (struct twe_drivecommand *)data; 1720 1721 /* This is intended to be compatible with the FreeBSD interface. */ 1722 switch (cmd) { 1723 case TWEIO_COMMAND: 1724 /* XXX mutex */ 1725 if (tu->tu_size > 0) { 1726 /* 1727 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1728 * it's really necessary, first. 1729 */ 1730 if (tu->tu_size > TWE_SECTOR_SIZE) { 1731 #ifdef TWE_DEBUG 1732 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1733 twe->sc_dv.dv_xname, tu->tu_size); 1734 #endif 1735 return EINVAL; 1736 } 1737 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1738 error = copyin(tu->tu_data, pdata, tu->tu_size); 1739 if (error != 0) 1740 goto done; 1741 ccb = twe_ccb_alloc_wait(twe, 1742 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1743 KASSERT(ccb != NULL); 1744 ccb->ccb_data = pdata; 1745 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1746 } else { 1747 ccb = twe_ccb_alloc_wait(twe, 0); 1748 KASSERT(ccb != NULL); 1749 } 1750 1751 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1752 ccb->ccb_tx.tx_context = NULL; 1753 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1754 1755 cmdid = ccb->ccb_cmdid; 1756 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1757 ccb->ccb_cmd->tc_cmdid = cmdid; 1758 1759 /* Map the transfer. */ 1760 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1761 twe_ccb_free(twe, ccb); 1762 goto done; 1763 } 1764 1765 /* Submit the command and wait up to 1 minute. */ 1766 error = 0; 1767 twe_ccb_enqueue(twe, ccb); 1768 s = splbio(); 1769 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1770 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1771 60 * hz)) != 0) 1772 break; 1773 splx(s); 1774 1775 /* Copy the command back to the ioctl argument. */ 1776 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1777 #ifdef TWE_DEBUG 1778 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1779 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1780 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1781 #endif 1782 1783 s = splbio(); 1784 twe_ccb_free(twe, ccb); 1785 splx(s); 1786 1787 if (tu->tu_size > 0) 1788 error = copyout(pdata, tu->tu_data, tu->tu_size); 1789 goto done; 1790 1791 case TWEIO_STATS: 1792 return (ENOENT); 1793 1794 case TWEIO_AEN_POLL: 1795 s = splbio(); 1796 *(u_int *)data = twe_aen_dequeue(twe); 1797 splx(s); 1798 return (0); 1799 1800 case TWEIO_AEN_WAIT: 1801 s = splbio(); 1802 while ((*(u_int *)data = 1803 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1804 twe->sc_flags |= TWEF_AENQ_WAIT; 1805 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1806 "tweaen", 0); 1807 if (error == EINTR) { 1808 splx(s); 1809 return (error); 1810 } 1811 } 1812 splx(s); 1813 return (0); 1814 1815 case TWEIO_GET_PARAM: 1816 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1817 tp->tp_size, 0, ¶m); 1818 if (error != 0) 1819 return (error); 1820 if (param->tp_param_size > tp->tp_size) { 1821 error = EFAULT; 1822 goto done; 1823 } 1824 error = copyout(param->tp_data, tp->tp_data, 1825 param->tp_param_size); 1826 goto done; 1827 1828 case TWEIO_SET_PARAM: 1829 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1830 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1831 goto done; 1832 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1833 tp->tp_size, pdata); 1834 goto done; 1835 1836 case TWEIO_RESET: 1837 s = splbio(); 1838 twe_reset(twe); 1839 splx(s); 1840 return (0); 1841 1842 case TWEIO_ADD_UNIT: 1843 /* XXX mutex */ 1844 return (twe_add_unit(twe, td->td_unit)); 1845 1846 case TWEIO_DEL_UNIT: 1847 /* XXX mutex */ 1848 return (twe_del_unit(twe, td->td_unit)); 1849 1850 default: 1851 return EINVAL; 1852 } 1853 done: 1854 if (pdata) 1855 free(pdata, M_DEVBUF); 1856 return error; 1857 } 1858 1859 /* 1860 * Print some information about the controller 1861 */ 1862 static void 1863 twe_describe_controller(struct twe_softc *sc) 1864 { 1865 struct twe_param *p[6]; 1866 int i, rv = 0; 1867 uint32_t dsize; 1868 uint8_t ports; 1869 1870 /* get the port count */ 1871 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1872 TWE_PARAM_CONTROLLER_PortCount, &ports); 1873 1874 /* get version strings */ 1875 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1876 16, NULL, &p[0]); 1877 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1878 16, NULL, &p[1]); 1879 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1880 16, NULL, &p[2]); 1881 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1882 8, NULL, &p[3]); 1883 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1884 8, NULL, &p[4]); 1885 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1886 8, NULL, &p[5]); 1887 1888 if (rv) { 1889 /* some error occurred */ 1890 aprint_error("%s: failed to fetch version information\n", 1891 sc->sc_dv.dv_xname); 1892 return; 1893 } 1894 1895 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1896 sc->sc_dv.dv_xname, ports, 1897 p[1]->tp_data, p[2]->tp_data); 1898 1899 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1900 sc->sc_dv.dv_xname, 1901 p[0]->tp_data, p[3]->tp_data, 1902 p[4]->tp_data, p[5]->tp_data); 1903 1904 free(p[0], M_DEVBUF); 1905 free(p[1], M_DEVBUF); 1906 free(p[2], M_DEVBUF); 1907 free(p[3], M_DEVBUF); 1908 free(p[4], M_DEVBUF); 1909 free(p[5], M_DEVBUF); 1910 1911 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1912 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1913 if (rv) { 1914 aprint_error("%s: failed to get drive status summary\n", 1915 sc->sc_dv.dv_xname); 1916 return; 1917 } 1918 for (i = 0; i < ports; i++) { 1919 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1920 continue; 1921 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1922 TWE_PARAM_DRIVEINFO_Size, &dsize); 1923 if (rv) { 1924 aprint_error( 1925 "%s: unable to get drive size for port %d\n", 1926 sc->sc_dv.dv_xname, i); 1927 continue; 1928 } 1929 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1930 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1931 if (rv) { 1932 aprint_error( 1933 "%s: unable to get drive model for port %d\n", 1934 sc->sc_dv.dv_xname, i); 1935 continue; 1936 } 1937 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 1938 i, p[1]->tp_data, dsize / 2048); 1939 free(p[1], M_DEVBUF); 1940 } 1941 free(p[0], M_DEVBUF); 1942 } 1943
Indexes created Sun Sep 21 15:09:59 GMT 2025