twe.c revision 1.66
1 /* $NetBSD: twe.c,v 1.66 2005/05/30 04:35:23 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.66 2005/05/30 04:35:23 christos Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 89 #include <uvm/uvm_extern.h> 90 91 #include <machine/bswap.h> 92 #include <machine/bus.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 #include <dev/pci/twereg.h> 98 #include <dev/pci/twevar.h> 99 #include <dev/pci/tweio.h> 100 101 #include "locators.h" 102 103 #define PCI_CBIO 0x10 104 105 static int twe_aen_get(struct twe_softc *, uint16_t *); 106 static void twe_aen_handler(struct twe_ccb *, int); 107 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 108 static uint16_t twe_aen_dequeue(struct twe_softc *); 109 110 static void twe_attach(struct device *, struct device *, void *); 111 static int twe_init_connection(struct twe_softc *); 112 static int twe_intr(void *); 113 static int twe_match(struct device *, struct cfdata *, void *); 114 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 115 static void twe_poll(struct twe_softc *); 116 static int twe_print(void *, const char *); 117 static int twe_reset(struct twe_softc *); 118 static int twe_submatch(struct device *, struct cfdata *, 119 const locdesc_t *, void *); 120 static int twe_status_check(struct twe_softc *, u_int); 121 static int twe_status_wait(struct twe_softc *, u_int, int); 122 static void twe_describe_controller(struct twe_softc *); 123 static void twe_clear_pci_abort(struct twe_softc *sc); 124 static void twe_clear_pci_parity_error(struct twe_softc *sc); 125 126 static int twe_add_unit(struct twe_softc *, int); 127 static int twe_del_unit(struct twe_softc *, int); 128 129 static inline u_int32_t twe_inl(struct twe_softc *, int); 130 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 131 132 dev_type_open(tweopen); 133 dev_type_close(tweclose); 134 dev_type_ioctl(tweioctl); 135 136 const struct cdevsw twe_cdevsw = { 137 tweopen, tweclose, noread, nowrite, tweioctl, 138 nostop, notty, nopoll, nommap, 139 }; 140 141 extern struct cfdriver twe_cd; 142 143 CFATTACH_DECL(twe, sizeof(struct twe_softc), 144 twe_match, twe_attach, NULL, NULL); 145 146 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 147 const char twever[] = "1.50.01.002"; 148 149 /* 150 * Tables to convert numeric codes to strings. 151 */ 152 const struct twe_code_table twe_table_status[] = { 153 { 0x00, "successful completion" }, 154 155 /* info */ 156 { 0x42, "command in progress" }, 157 { 0x6c, "retrying interface CRC error from UDMA command" }, 158 159 /* warning */ 160 { 0x81, "redundant/inconsequential request ignored" }, 161 { 0x8e, "failed to write zeroes to LBA 0" }, 162 { 0x8f, "failed to profile TwinStor zones" }, 163 164 /* fatal */ 165 { 0xc1, "aborted due to system command or reconfiguration" }, 166 { 0xc4, "aborted" }, 167 { 0xc5, "access error" }, 168 { 0xc6, "access violation" }, 169 { 0xc7, "device failure" }, /* high byte may be port # */ 170 { 0xc8, "controller error" }, 171 { 0xc9, "timed out" }, 172 { 0xcb, "invalid unit number" }, 173 { 0xcf, "unit not available" }, 174 { 0xd2, "undefined opcode" }, 175 { 0xdb, "request incompatible with unit" }, 176 { 0xdc, "invalid request" }, 177 { 0xff, "firmware error, reset requested" }, 178 179 { 0, NULL } 180 }; 181 182 const struct twe_code_table twe_table_unitstate[] = { 183 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 184 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 185 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 186 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 187 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 188 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 189 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 190 191 { 0, NULL } 192 }; 193 194 const struct twe_code_table twe_table_unittype[] = { 195 /* array descriptor configuration */ 196 { TWE_AD_CONFIG_RAID0, "RAID0" }, 197 { TWE_AD_CONFIG_RAID1, "RAID1" }, 198 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 199 { TWE_AD_CONFIG_RAID5, "RAID5" }, 200 { TWE_AD_CONFIG_RAID10, "RAID10" }, 201 { TWE_UD_CONFIG_JBOD, "JBOD" }, 202 203 { 0, NULL } 204 }; 205 206 const struct twe_code_table twe_table_stripedepth[] = { 207 { TWE_AD_STRIPE_4k, "4K" }, 208 { TWE_AD_STRIPE_8k, "8K" }, 209 { TWE_AD_STRIPE_16k, "16K" }, 210 { TWE_AD_STRIPE_32k, "32K" }, 211 { TWE_AD_STRIPE_64k, "64K" }, 212 { TWE_AD_STRIPE_128k, "128K" }, 213 { TWE_AD_STRIPE_256k, "256K" }, 214 { TWE_AD_STRIPE_512k, "512K" }, 215 { TWE_AD_STRIPE_1024k, "1024K" }, 216 217 { 0, NULL } 218 }; 219 220 /* 221 * Asynchronous event notification messages are qualified: 222 * a - not unit/port specific 223 * u - unit specific 224 * p - port specific 225 * 226 * They are further qualified with a severity: 227 * E - LOG_EMERG 228 * a - LOG_ALERT 229 * c - LOG_CRIT 230 * e - LOG_ERR 231 * w - LOG_WARNING 232 * n - LOG_NOTICE 233 * i - LOG_INFO 234 * d - LOG_DEBUG 235 * blank - just use printf 236 */ 237 const struct twe_code_table twe_table_aen[] = { 238 { 0x00, "a queue empty" }, 239 { 0x01, "a soft reset" }, 240 { 0x02, "uc degraded mode" }, 241 { 0x03, "aa controller error" }, 242 { 0x04, "uE rebuild fail" }, 243 { 0x05, "un rebuild done" }, 244 { 0x06, "ue incomplete unit" }, 245 { 0x07, "un initialization done" }, 246 { 0x08, "uw unclean shutdown detected" }, 247 { 0x09, "pe drive timeout" }, 248 { 0x0a, "pc drive error" }, 249 { 0x0b, "un rebuild started" }, 250 { 0x0c, "un initialization started" }, 251 { 0x0d, "ui logical unit deleted" }, 252 { 0x0f, "pc SMART threshold exceeded" }, 253 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 254 { 0x21, "pe ATA UDMA downgrade" }, 255 { 0x22, "pi ATA UDMA upgrade" }, 256 { 0x23, "pw sector repair occurred" }, 257 { 0x24, "aa SBUF integrity check failure" }, 258 { 0x25, "pa lost cached write" }, 259 { 0x26, "pa drive ECC error detected" }, 260 { 0x27, "pe DCB checksum error" }, 261 { 0x28, "pn DCB unsupported version" }, 262 { 0x29, "ui verify started" }, 263 { 0x2a, "ua verify failed" }, 264 { 0x2b, "ui verify complete" }, 265 { 0x2c, "pw overwrote bad sector during rebuild" }, 266 { 0x2d, "pa encountered bad sector during rebuild" }, 267 { 0x2e, "pe replacement drive too small" }, 268 { 0x2f, "ue array not previously initialized" }, 269 { 0x30, "p drive not supported" }, 270 { 0xff, "a aen queue full" }, 271 272 { 0, NULL }, 273 }; 274 275 const char * 276 twe_describe_code(const struct twe_code_table *table, uint32_t code) 277 { 278 279 for (; table->string != NULL; table++) { 280 if (table->code == code) 281 return (table->string); 282 } 283 return (NULL); 284 } 285 286 static inline u_int32_t 287 twe_inl(struct twe_softc *sc, int off) 288 { 289 290 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 291 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 292 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 293 } 294 295 static inline void 296 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 297 { 298 299 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 300 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 301 BUS_SPACE_BARRIER_WRITE); 302 } 303 304 /* 305 * Match a supported board. 306 */ 307 static int 308 twe_match(struct device *parent, struct cfdata *cfdata, void *aux) 309 { 310 struct pci_attach_args *pa; 311 312 pa = aux; 313 314 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 315 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 316 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 317 } 318 319 /* 320 * Attach a supported board. 321 * 322 * XXX This doesn't fail gracefully. 323 */ 324 static void 325 twe_attach(struct device *parent, struct device *self, void *aux) 326 { 327 struct pci_attach_args *pa; 328 struct twe_softc *sc; 329 pci_chipset_tag_t pc; 330 pci_intr_handle_t ih; 331 pcireg_t csr; 332 const char *intrstr; 333 int s, size, i, rv, rseg; 334 size_t max_segs, max_xfer; 335 bus_dma_segment_t seg; 336 struct ctlname ctlnames[] = CTL_NAMES; 337 struct sysctlnode *node; 338 struct twe_cmd *tc; 339 struct twe_ccb *ccb; 340 341 sc = (struct twe_softc *)self; 342 pa = aux; 343 pc = pa->pa_pc; 344 sc->sc_dmat = pa->pa_dmat; 345 SIMPLEQ_INIT(&sc->sc_ccb_queue); 346 SLIST_INIT(&sc->sc_ccb_freelist); 347 348 aprint_naive(": RAID controller\n"); 349 aprint_normal(": 3ware Escalade\n"); 350 351 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 352 if (ccb == NULL) { 353 aprint_error("%s: unable to allocate memory for ccbs\n", 354 sc->sc_dv.dv_xname); 355 return; 356 } 357 358 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 359 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 360 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 361 return; 362 } 363 364 /* Enable the device. */ 365 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 366 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 367 csr | PCI_COMMAND_MASTER_ENABLE); 368 369 /* Map and establish the interrupt. */ 370 if (pci_intr_map(pa, &ih)) { 371 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 372 return; 373 } 374 375 intrstr = pci_intr_string(pc, ih); 376 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 377 if (sc->sc_ih == NULL) { 378 aprint_error("%s: can't establish interrupt%s%s\n", 379 sc->sc_dv.dv_xname, 380 (intrstr) ? " at " : "", 381 (intrstr) ? intrstr : ""); 382 return; 383 } 384 385 if (intrstr != NULL) 386 aprint_normal("%s: interrupting at %s\n", 387 sc->sc_dv.dv_xname, intrstr); 388 389 /* 390 * Allocate and initialise the command blocks and CCBs. 391 */ 392 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 393 394 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 395 &rseg, BUS_DMA_NOWAIT)) != 0) { 396 aprint_error("%s: unable to allocate commands, rv = %d\n", 397 sc->sc_dv.dv_xname, rv); 398 return; 399 } 400 401 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 402 (caddr_t *)&sc->sc_cmds, 403 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 404 aprint_error("%s: unable to map commands, rv = %d\n", 405 sc->sc_dv.dv_xname, rv); 406 return; 407 } 408 409 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 410 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 411 aprint_error("%s: unable to create command DMA map, rv = %d\n", 412 sc->sc_dv.dv_xname, rv); 413 return; 414 } 415 416 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 417 size, NULL, BUS_DMA_NOWAIT)) != 0) { 418 aprint_error("%s: unable to load command DMA map, rv = %d\n", 419 sc->sc_dv.dv_xname, rv); 420 return; 421 } 422 423 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 424 memset(sc->sc_cmds, 0, size); 425 426 sc->sc_ccbs = ccb; 427 tc = (struct twe_cmd *)sc->sc_cmds; 428 max_segs = twe_get_maxsegs(); 429 max_xfer = twe_get_maxxfer(max_segs); 430 431 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 432 ccb->ccb_cmd = tc; 433 ccb->ccb_cmdid = i; 434 ccb->ccb_flags = 0; 435 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 436 max_segs, PAGE_SIZE, 0, 437 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 438 &ccb->ccb_dmamap_xfer); 439 if (rv != 0) { 440 aprint_error("%s: can't create dmamap, rv = %d\n", 441 sc->sc_dv.dv_xname, rv); 442 return; 443 } 444 445 /* Save the first CCB for AEN retrieval. */ 446 if (i != 0) 447 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 448 ccb_chain.slist); 449 } 450 451 /* Wait for the controller to become ready. */ 452 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 453 aprint_error("%s: microcontroller not ready\n", 454 sc->sc_dv.dv_xname); 455 return; 456 } 457 458 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 459 460 /* Reset the controller. */ 461 s = splbio(); 462 rv = twe_reset(sc); 463 splx(s); 464 if (rv) { 465 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 466 return; 467 } 468 469 /* Initialise connection with controller. */ 470 twe_init_connection(sc); 471 472 twe_describe_controller(sc); 473 474 /* Find and attach RAID array units. */ 475 sc->sc_nunits = 0; 476 for (i = 0; i < TWE_MAX_UNITS; i++) 477 (void) twe_add_unit(sc, i); 478 479 /* ...and finally, enable interrupts. */ 480 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 481 TWE_CTL_UNMASK_RESP_INTR | 482 TWE_CTL_ENABLE_INTRS); 483 484 /* sysctl set-up for 3ware cli */ 485 if (sysctl_createv(NULL, 0, NULL, NULL, 486 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 487 NULL, NULL, 0, NULL, 0, 488 CTL_HW, CTL_EOL) != 0) { 489 printf("%s: could not create %s sysctl node\n", 490 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 491 return; 492 } 493 if (sysctl_createv(NULL, 0, NULL, &node, 494 0, CTLTYPE_NODE, sc->sc_dv.dv_xname, 495 SYSCTL_DESCR("twe driver information"), 496 NULL, 0, NULL, 0, 497 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 498 printf("%s: could not create %s.%s sysctl node\n", 499 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 500 sc->sc_dv.dv_xname); 501 return; 502 } 503 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 504 0, CTLTYPE_STRING, "driver_version", 505 SYSCTL_DESCR("twe0 driver version"), 506 NULL, 0, &twever, 0, 507 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 508 != 0) { 509 printf("%s: could not create %s.%s.driver_version sysctl\n", 510 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 511 sc->sc_dv.dv_xname); 512 return; 513 } 514 } 515 516 void 517 twe_register_callbacks(struct twe_softc *sc, int unit, 518 const struct twe_callbacks *tcb) 519 { 520 521 sc->sc_units[unit].td_callbacks = tcb; 522 } 523 524 static void 525 twe_recompute_openings(struct twe_softc *sc) 526 { 527 struct twe_drive *td; 528 int unit, openings; 529 530 if (sc->sc_nunits != 0) 531 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 532 else 533 openings = 0; 534 if (openings == sc->sc_openings) 535 return; 536 sc->sc_openings = openings; 537 538 #ifdef TWE_DEBUG 539 printf("%s: %d array%s, %d openings per array\n", 540 sc->sc_dv.dv_xname, sc->sc_nunits, 541 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 542 #endif 543 544 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 545 td = &sc->sc_units[unit]; 546 if (td->td_dev != NULL) 547 (*td->td_callbacks->tcb_openings)(td->td_dev, 548 sc->sc_openings); 549 } 550 } 551 552 static int 553 twe_add_unit(struct twe_softc *sc, int unit) 554 { 555 struct twe_param *dtp, *atp; 556 struct twe_array_descriptor *ad; 557 struct twe_drive *td; 558 struct twe_attach_args twea; 559 uint32_t newsize; 560 int rv; 561 uint16_t dsize; 562 uint8_t newtype, newstripe; 563 int help[2]; 564 locdesc_t *ldesc = (void *)help; /* XXX */ 565 566 if (unit < 0 || unit >= TWE_MAX_UNITS) 567 return (EINVAL); 568 569 /* Find attached units. */ 570 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 571 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 572 if (rv != 0) { 573 aprint_error("%s: error %d fetching unit summary\n", 574 sc->sc_dv.dv_xname, rv); 575 return (rv); 576 } 577 578 /* For each detected unit, collect size and store in an array. */ 579 td = &sc->sc_units[unit]; 580 581 /* Unit present? */ 582 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 583 /* 584 * XXX Should we check to see if a device has been 585 * XXX attached at this index and detach it if it 586 * XXX has? ("rescan" semantics) 587 */ 588 rv = 0; 589 goto out; 590 } 591 592 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 593 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 594 if (rv != 0) { 595 aprint_error("%s: error %d fetching descriptor size " 596 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 597 goto out; 598 } 599 600 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 601 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 602 if (rv != 0) { 603 aprint_error("%s: error %d fetching array descriptor " 604 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 605 goto out; 606 } 607 608 ad = (struct twe_array_descriptor *)atp->tp_data; 609 newtype = ad->configuration; 610 newstripe = ad->stripe_size; 611 free(atp, M_DEVBUF); 612 613 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 614 TWE_PARAM_UNITINFO_Capacity, &newsize); 615 if (rv != 0) { 616 aprint_error( 617 "%s: error %d fetching capacity for unit %d\n", 618 sc->sc_dv.dv_xname, rv, unit); 619 goto out; 620 } 621 622 /* 623 * Have a device, so we need to attach it. If there is currently 624 * something sitting at the slot, and the parameters are different, 625 * then we detach the old device before attaching the new one. 626 */ 627 if (td->td_dev != NULL && 628 td->td_size == newsize && 629 td->td_type == newtype && 630 td->td_stripe == newstripe) { 631 /* Same as the old device; just keep using it. */ 632 rv = 0; 633 goto out; 634 } else if (td->td_dev != NULL) { 635 /* Detach the old device first. */ 636 (void) config_detach(td->td_dev, DETACH_FORCE); 637 td->td_dev = NULL; 638 } else if (td->td_size == 0) 639 sc->sc_nunits++; 640 641 /* 642 * Committed to the new array unit; assign its parameters and 643 * recompute the number of available command openings. 644 */ 645 td->td_size = newsize; 646 td->td_type = newtype; 647 td->td_stripe = newstripe; 648 twe_recompute_openings(sc); 649 650 twea.twea_unit = unit; 651 652 ldesc->len = 1; 653 ldesc->locs[TWECF_UNIT] = unit; 654 655 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", NULL, &twea, 656 twe_print, twe_submatch); 657 658 rv = 0; 659 out: 660 free(dtp, M_DEVBUF); 661 return (rv); 662 } 663 664 static int 665 twe_del_unit(struct twe_softc *sc, int unit) 666 { 667 struct twe_drive *td; 668 669 if (unit < 0 || unit >= TWE_MAX_UNITS) 670 return (EINVAL); 671 672 td = &sc->sc_units[unit]; 673 if (td->td_size != 0) 674 sc->sc_nunits--; 675 td->td_size = 0; 676 td->td_type = 0; 677 td->td_stripe = 0; 678 if (td->td_dev != NULL) { 679 (void) config_detach(td->td_dev, DETACH_FORCE); 680 td->td_dev = NULL; 681 } 682 twe_recompute_openings(sc); 683 return (0); 684 } 685 686 /* 687 * Reset the controller. 688 * MUST BE CALLED AT splbio()! 689 */ 690 static int 691 twe_reset(struct twe_softc *sc) 692 { 693 uint16_t aen; 694 u_int status; 695 volatile u_int32_t junk; 696 int got, rv; 697 698 /* Issue a soft reset. */ 699 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 700 TWE_CTL_CLEAR_HOST_INTR | 701 TWE_CTL_CLEAR_ATTN_INTR | 702 TWE_CTL_MASK_CMD_INTR | 703 TWE_CTL_MASK_RESP_INTR | 704 TWE_CTL_CLEAR_ERROR_STS | 705 TWE_CTL_DISABLE_INTRS); 706 707 /* Wait for attention... */ 708 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 709 printf("%s: timeout waiting for attention interrupt\n", 710 sc->sc_dv.dv_xname); 711 return (-1); 712 } 713 714 /* ...and ACK it. */ 715 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 716 717 /* 718 * Pull AENs out of the controller; look for a soft reset AEN. 719 * Open code this, since we want to detect reset even if the 720 * queue for management tools is full. 721 * 722 * Note that since: 723 * - interrupts are blocked 724 * - we have reset the controller 725 * - acknowledged the pending ATTENTION 726 * that there is no way a pending asynchronous AEN fetch would 727 * finish, so clear the flag. 728 */ 729 sc->sc_flags &= ~TWEF_AEN; 730 for (got = 0;;) { 731 rv = twe_aen_get(sc, &aen); 732 if (rv != 0) 733 printf("%s: error %d while draining event queue\n", 734 sc->sc_dv.dv_xname, rv); 735 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 736 break; 737 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 738 got = 1; 739 twe_aen_enqueue(sc, aen, 1); 740 } 741 742 if (!got) { 743 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 744 return (-1); 745 } 746 747 /* Check controller status. */ 748 status = twe_inl(sc, TWE_REG_STS); 749 if (twe_status_check(sc, status)) { 750 printf("%s: controller errors detected\n", 751 sc->sc_dv.dv_xname); 752 return (-1); 753 } 754 755 /* Drain the response queue. */ 756 for (;;) { 757 status = twe_inl(sc, TWE_REG_STS); 758 if (twe_status_check(sc, status) != 0) { 759 printf("%s: can't drain response queue\n", 760 sc->sc_dv.dv_xname); 761 return (-1); 762 } 763 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 764 break; 765 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 766 } 767 768 return (0); 769 } 770 771 /* 772 * Print autoconfiguration message for a sub-device. 773 */ 774 static int 775 twe_print(void *aux, const char *pnp) 776 { 777 struct twe_attach_args *twea; 778 779 twea = aux; 780 781 if (pnp != NULL) 782 aprint_normal("block device at %s", pnp); 783 aprint_normal(" unit %d", twea->twea_unit); 784 return (UNCONF); 785 } 786 787 /* 788 * Match a sub-device. 789 */ 790 static int 791 twe_submatch(struct device *parent, struct cfdata *cf, 792 const locdesc_t *ldesc, void *aux) 793 { 794 795 if (cf->cf_loc[TWECF_UNIT] != TWECF_UNIT_DEFAULT && 796 cf->cf_loc[TWECF_UNIT] != ldesc->locs[TWECF_UNIT]) 797 return (0); 798 799 return (config_match(parent, cf, aux)); 800 } 801 802 /* 803 * Interrupt service routine. 804 */ 805 static int 806 twe_intr(void *arg) 807 { 808 struct twe_softc *sc; 809 u_int status; 810 int caught, rv; 811 812 sc = arg; 813 caught = 0; 814 status = twe_inl(sc, TWE_REG_STS); 815 twe_status_check(sc, status); 816 817 /* Host interrupts - purpose unknown. */ 818 if ((status & TWE_STS_HOST_INTR) != 0) { 819 #ifdef DEBUG 820 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 821 #endif 822 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 823 caught = 1; 824 } 825 826 /* 827 * Attention interrupts, signalled when a controller or child device 828 * state change has occurred. 829 */ 830 if ((status & TWE_STS_ATTN_INTR) != 0) { 831 rv = twe_aen_get(sc, NULL); 832 if (rv != 0) 833 printf("%s: unable to retrieve AEN (%d)\n", 834 sc->sc_dv.dv_xname, rv); 835 else 836 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 837 caught = 1; 838 } 839 840 /* 841 * Command interrupts, signalled when the controller can accept more 842 * commands. We don't use this; instead, we try to submit commands 843 * when we receive them, and when other commands have completed. 844 * Mask it so we don't get another one. 845 */ 846 if ((status & TWE_STS_CMD_INTR) != 0) { 847 #ifdef DEBUG 848 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 849 #endif 850 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 851 caught = 1; 852 } 853 854 if ((status & TWE_STS_RESP_INTR) != 0) { 855 twe_poll(sc); 856 caught = 1; 857 } 858 859 return (caught); 860 } 861 862 /* 863 * Fetch an AEN. Even though this is really like parameter 864 * retrieval, we handle this specially, because we issue this 865 * AEN retrieval command from interrupt context, and thus 866 * reserve a CCB for it to avoid resource shortage. 867 * 868 * XXX There are still potential resource shortages we could 869 * XXX encounter. Consider pre-allocating all AEN-related 870 * XXX resources. 871 * 872 * MUST BE CALLED AT splbio()! 873 */ 874 static int 875 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 876 { 877 struct twe_ccb *ccb; 878 struct twe_cmd *tc; 879 struct twe_param *tp; 880 int rv; 881 882 /* 883 * If we're already retrieving an AEN, just wait; another 884 * retrieval will be chained after the current one completes. 885 */ 886 if (sc->sc_flags & TWEF_AEN) { 887 /* 888 * It is a fatal software programming error to attempt 889 * to fetch an AEN synchronously when an AEN fetch is 890 * already pending. 891 */ 892 KASSERT(aenp == NULL); 893 return (0); 894 } 895 896 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 897 if (tp == NULL) 898 return (ENOMEM); 899 900 ccb = twe_ccb_alloc(sc, 901 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 902 KASSERT(ccb != NULL); 903 904 ccb->ccb_data = tp; 905 ccb->ccb_datasize = TWE_SECTOR_SIZE; 906 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 907 ccb->ccb_tx.tx_context = tp; 908 ccb->ccb_tx.tx_dv = &sc->sc_dv; 909 910 tc = ccb->ccb_cmd; 911 tc->tc_size = 2; 912 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 913 tc->tc_unit = 0; 914 tc->tc_count = htole16(1); 915 916 /* Fill in the outbound parameter data. */ 917 tp->tp_table_id = htole16(TWE_PARAM_AEN); 918 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 919 tp->tp_param_size = 2; 920 921 /* Map the transfer. */ 922 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 923 twe_ccb_free(sc, ccb); 924 goto done; 925 } 926 927 /* Enqueue the command and wait. */ 928 if (aenp != NULL) { 929 rv = twe_ccb_poll(sc, ccb, 5); 930 twe_ccb_unmap(sc, ccb); 931 twe_ccb_free(sc, ccb); 932 if (rv == 0) 933 *aenp = le16toh(*(uint16_t *)tp->tp_data); 934 free(tp, M_DEVBUF); 935 } else { 936 sc->sc_flags |= TWEF_AEN; 937 twe_ccb_enqueue(sc, ccb); 938 rv = 0; 939 } 940 941 done: 942 return (rv); 943 } 944 945 /* 946 * Handle an AEN returned by the controller. 947 * MUST BE CALLED AT splbio()! 948 */ 949 static void 950 twe_aen_handler(struct twe_ccb *ccb, int error) 951 { 952 struct twe_softc *sc; 953 struct twe_param *tp; 954 uint16_t aen; 955 int rv; 956 957 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 958 tp = ccb->ccb_tx.tx_context; 959 twe_ccb_unmap(sc, ccb); 960 961 sc->sc_flags &= ~TWEF_AEN; 962 963 if (error) { 964 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 965 aen = TWE_AEN_QUEUE_EMPTY; 966 } else 967 aen = le16toh(*(u_int16_t *)tp->tp_data); 968 free(tp, M_DEVBUF); 969 twe_ccb_free(sc, ccb); 970 971 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 972 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 973 return; 974 } 975 976 twe_aen_enqueue(sc, aen, 0); 977 978 /* 979 * Chain another retrieval in case interrupts have been 980 * coalesced. 981 */ 982 rv = twe_aen_get(sc, NULL); 983 if (rv != 0) 984 printf("%s: unable to retrieve AEN (%d)\n", 985 sc->sc_dv.dv_xname, rv); 986 } 987 988 static void 989 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 990 { 991 const char *str, *msg; 992 int s, next, nextnext, level; 993 994 /* 995 * First report the AEN on the console. Maybe. 996 */ 997 if (! quiet) { 998 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 999 if (str == NULL) { 1000 printf("%s: unknown AEN 0x%04x\n", 1001 sc->sc_dv.dv_xname, aen); 1002 } else { 1003 msg = str + 3; 1004 switch (str[1]) { 1005 case 'E': level = LOG_EMERG; break; 1006 case 'a': level = LOG_ALERT; break; 1007 case 'c': level = LOG_CRIT; break; 1008 case 'e': level = LOG_ERR; break; 1009 case 'w': level = LOG_WARNING; break; 1010 case 'n': level = LOG_NOTICE; break; 1011 case 'i': level = LOG_INFO; break; 1012 case 'd': level = LOG_DEBUG; break; 1013 default: 1014 /* Don't use syslog. */ 1015 level = -1; 1016 } 1017 1018 if (level < 0) { 1019 switch (str[0]) { 1020 case 'u': 1021 case 'p': 1022 printf("%s: %s %d: %s\n", 1023 sc->sc_dv.dv_xname, 1024 str[0] == 'u' ? "unit" : "port", 1025 TWE_AEN_UNIT(aen), msg); 1026 break; 1027 1028 default: 1029 printf("%s: %s\n", 1030 sc->sc_dv.dv_xname, msg); 1031 } 1032 } else { 1033 switch (str[0]) { 1034 case 'u': 1035 case 'p': 1036 log(level, "%s: %s %d: %s\n", 1037 sc->sc_dv.dv_xname, 1038 str[0] == 'u' ? "unit" : "port", 1039 TWE_AEN_UNIT(aen), msg); 1040 break; 1041 1042 default: 1043 log(level, "%s: %s\n", 1044 sc->sc_dv.dv_xname, msg); 1045 } 1046 } 1047 } 1048 } 1049 1050 /* Now enqueue the AEN for mangement tools. */ 1051 s = splbio(); 1052 1053 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1054 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1055 1056 /* 1057 * If this is the last free slot, then queue up a "queue 1058 * full" message. 1059 */ 1060 if (nextnext == sc->sc_aen_tail) 1061 aen = TWE_AEN_QUEUE_FULL; 1062 1063 if (next != sc->sc_aen_tail) { 1064 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1065 sc->sc_aen_head = next; 1066 } 1067 1068 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1069 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1070 wakeup(&sc->sc_aen_queue); 1071 } 1072 1073 splx(s); 1074 } 1075 1076 /* NOTE: Must be called at splbio(). */ 1077 static uint16_t 1078 twe_aen_dequeue(struct twe_softc *sc) 1079 { 1080 uint16_t aen; 1081 1082 if (sc->sc_aen_tail == sc->sc_aen_head) 1083 aen = TWE_AEN_QUEUE_EMPTY; 1084 else { 1085 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1086 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1087 } 1088 1089 return (aen); 1090 } 1091 1092 /* 1093 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1094 * fetch 1, 2, and 4 byte parameter values, respectively. 1095 */ 1096 int 1097 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1098 uint8_t *valp) 1099 { 1100 struct twe_param *tp; 1101 int rv; 1102 1103 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1104 if (rv != 0) 1105 return (rv); 1106 *valp = *(uint8_t *)tp->tp_data; 1107 free(tp, M_DEVBUF); 1108 return (0); 1109 } 1110 1111 int 1112 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1113 uint16_t *valp) 1114 { 1115 struct twe_param *tp; 1116 int rv; 1117 1118 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1119 if (rv != 0) 1120 return (rv); 1121 *valp = le16toh(*(uint16_t *)tp->tp_data); 1122 free(tp, M_DEVBUF); 1123 return (0); 1124 } 1125 1126 int 1127 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1128 uint32_t *valp) 1129 { 1130 struct twe_param *tp; 1131 int rv; 1132 1133 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1134 if (rv != 0) 1135 return (rv); 1136 *valp = le32toh(*(uint32_t *)tp->tp_data); 1137 free(tp, M_DEVBUF); 1138 return (0); 1139 } 1140 1141 /* 1142 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1143 * it will be called with generated context when the command has completed. 1144 * If no callback is provided, the command will be executed synchronously 1145 * and a pointer to a buffer containing the data returned. 1146 * 1147 * The caller or callback is responsible for freeing the buffer. 1148 * 1149 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1150 */ 1151 int 1152 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1153 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1154 { 1155 struct twe_ccb *ccb; 1156 struct twe_cmd *tc; 1157 struct twe_param *tp; 1158 int rv, s; 1159 1160 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1161 if (tp == NULL) 1162 return ENOMEM; 1163 1164 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1165 KASSERT(ccb != NULL); 1166 1167 ccb->ccb_data = tp; 1168 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1169 ccb->ccb_tx.tx_handler = func; 1170 ccb->ccb_tx.tx_context = tp; 1171 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1172 1173 tc = ccb->ccb_cmd; 1174 tc->tc_size = 2; 1175 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1176 tc->tc_unit = 0; 1177 tc->tc_count = htole16(1); 1178 1179 /* Fill in the outbound parameter data. */ 1180 tp->tp_table_id = htole16(table_id); 1181 tp->tp_param_id = param_id; 1182 tp->tp_param_size = size; 1183 1184 /* Map the transfer. */ 1185 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1186 twe_ccb_free(sc, ccb); 1187 goto done; 1188 } 1189 1190 /* Submit the command and either wait or let the callback handle it. */ 1191 if (func == NULL) { 1192 s = splbio(); 1193 rv = twe_ccb_poll(sc, ccb, 5); 1194 twe_ccb_unmap(sc, ccb); 1195 twe_ccb_free(sc, ccb); 1196 splx(s); 1197 } else { 1198 #ifdef DEBUG 1199 if (pbuf != NULL) 1200 panic("both func and pbuf defined"); 1201 #endif 1202 twe_ccb_enqueue(sc, ccb); 1203 return 0; 1204 } 1205 1206 done: 1207 if (pbuf == NULL || rv != 0) 1208 free(tp, M_DEVBUF); 1209 else if (pbuf != NULL && rv == 0) 1210 *pbuf = tp; 1211 return rv; 1212 } 1213 1214 /* 1215 * Execute a TWE_OP_SET_PARAM command. 1216 * 1217 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1218 */ 1219 static int 1220 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1221 void *sbuf) 1222 { 1223 struct twe_ccb *ccb; 1224 struct twe_cmd *tc; 1225 struct twe_param *tp; 1226 int rv, s; 1227 1228 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1229 if (tp == NULL) 1230 return ENOMEM; 1231 1232 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1233 KASSERT(ccb != NULL); 1234 1235 ccb->ccb_data = tp; 1236 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1237 ccb->ccb_tx.tx_handler = 0; 1238 ccb->ccb_tx.tx_context = tp; 1239 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1240 1241 tc = ccb->ccb_cmd; 1242 tc->tc_size = 2; 1243 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1244 tc->tc_unit = 0; 1245 tc->tc_count = htole16(1); 1246 1247 /* Fill in the outbound parameter data. */ 1248 tp->tp_table_id = htole16(table_id); 1249 tp->tp_param_id = param_id; 1250 tp->tp_param_size = size; 1251 memcpy(tp->tp_data, sbuf, size); 1252 1253 /* Map the transfer. */ 1254 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1255 twe_ccb_free(sc, ccb); 1256 goto done; 1257 } 1258 1259 /* Submit the command and wait. */ 1260 s = splbio(); 1261 rv = twe_ccb_poll(sc, ccb, 5); 1262 twe_ccb_unmap(sc, ccb); 1263 twe_ccb_free(sc, ccb); 1264 splx(s); 1265 done: 1266 free(tp, M_DEVBUF); 1267 return (rv); 1268 } 1269 1270 /* 1271 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1272 * Must be called with interrupts blocked. 1273 */ 1274 static int 1275 twe_init_connection(struct twe_softc *sc) 1276 /*###762 [cc] warning: `twe_init_connection' was used with no prototype before its definition%%%*/ 1277 /*###762 [cc] warning: `twe_init_connection' was declared implicitly `extern' and later `static'%%%*/ 1278 { 1279 struct twe_ccb *ccb; 1280 struct twe_cmd *tc; 1281 int rv; 1282 1283 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1284 return (EAGAIN); 1285 1286 /* Build the command. */ 1287 tc = ccb->ccb_cmd; 1288 tc->tc_size = 3; 1289 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1290 tc->tc_unit = 0; 1291 tc->tc_count = htole16(TWE_MAX_CMDS); 1292 tc->tc_args.init_connection.response_queue_pointer = 0; 1293 1294 /* Submit the command for immediate execution. */ 1295 rv = twe_ccb_poll(sc, ccb, 5); 1296 twe_ccb_free(sc, ccb); 1297 return (rv); 1298 } 1299 1300 /* 1301 * Poll the controller for completed commands. Must be called with 1302 * interrupts blocked. 1303 */ 1304 static void 1305 twe_poll(struct twe_softc *sc) 1306 { 1307 struct twe_ccb *ccb; 1308 int found; 1309 u_int status, cmdid; 1310 1311 found = 0; 1312 1313 for (;;) { 1314 status = twe_inl(sc, TWE_REG_STS); 1315 twe_status_check(sc, status); 1316 1317 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1318 break; 1319 1320 found = 1; 1321 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1322 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1323 if (cmdid >= TWE_MAX_QUEUECNT) { 1324 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1325 continue; 1326 } 1327 1328 ccb = sc->sc_ccbs + cmdid; 1329 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1330 printf("%s: CCB for cmdid %d not active\n", 1331 sc->sc_dv.dv_xname, cmdid); 1332 continue; 1333 } 1334 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1335 1336 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1337 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1338 sizeof(struct twe_cmd), 1339 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1340 1341 /* Pass notification to upper layers. */ 1342 if (ccb->ccb_tx.tx_handler != NULL) 1343 (*ccb->ccb_tx.tx_handler)(ccb, 1344 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1345 } 1346 1347 /* If any commands have completed, run the software queue. */ 1348 if (found) 1349 twe_ccb_enqueue(sc, NULL); 1350 } 1351 1352 /* 1353 * Wait for `status' to be set in the controller status register. Return 1354 * zero if found, non-zero if the operation timed out. 1355 */ 1356 static int 1357 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1358 { 1359 1360 for (timo *= 10; timo != 0; timo--) { 1361 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1362 break; 1363 delay(100000); 1364 } 1365 1366 return (timo == 0); 1367 } 1368 1369 /* 1370 * Clear a PCI parity error. 1371 */ 1372 static void 1373 twe_clear_pci_parity_error(struct twe_softc *sc) 1374 { 1375 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1376 1377 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1378 } 1379 1380 1381 /* 1382 * Clear a PCI abort. 1383 */ 1384 static void 1385 twe_clear_pci_abort(struct twe_softc *sc) 1386 { 1387 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1388 1389 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1390 } 1391 1392 /* 1393 * Complain if the status bits aren't what we expect. 1394 */ 1395 static int 1396 twe_status_check(struct twe_softc *sc, u_int status) 1397 { 1398 int rv; 1399 1400 rv = 0; 1401 1402 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1403 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1404 status & ~TWE_STS_EXPECTED_BITS); 1405 rv = -1; 1406 } 1407 1408 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1409 printf("%s: unexpected status bits: 0x%08x\n", 1410 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1411 rv = -1; 1412 if (status & TWE_STS_PCI_PARITY_ERROR) { 1413 printf("%s: PCI parity error: Reseat card, move card " 1414 "or buggy device present.\n", 1415 sc->sc_dv.dv_xname); 1416 twe_clear_pci_parity_error(sc); 1417 } 1418 if (status & TWE_STS_PCI_ABORT) { 1419 printf("%s: PCI abort, clearing.\n", 1420 sc->sc_dv.dv_xname); 1421 twe_clear_pci_abort(sc); 1422 } 1423 } 1424 1425 return (rv); 1426 } 1427 1428 /* 1429 * Allocate and initialise a CCB. 1430 */ 1431 static __inline void 1432 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1433 { 1434 struct twe_cmd *tc; 1435 1436 ccb->ccb_tx.tx_handler = NULL; 1437 ccb->ccb_flags = flags; 1438 tc = ccb->ccb_cmd; 1439 tc->tc_status = 0; 1440 tc->tc_flags = 0; 1441 tc->tc_cmdid = ccb->ccb_cmdid; 1442 } 1443 1444 struct twe_ccb * 1445 twe_ccb_alloc(struct twe_softc *sc, int flags) 1446 { 1447 struct twe_ccb *ccb; 1448 int s; 1449 1450 s = splbio(); 1451 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1452 /* Use the reserved CCB. */ 1453 ccb = sc->sc_ccbs; 1454 } else { 1455 /* Allocate a CCB and command block. */ 1456 if (__predict_false((ccb = 1457 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1458 splx(s); 1459 return (NULL); 1460 } 1461 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1462 } 1463 #ifdef DIAGNOSTIC 1464 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1465 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1466 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1467 panic("twe_ccb_alloc: CCB %ld already allocated", 1468 (long)(ccb - sc->sc_ccbs)); 1469 flags |= TWE_CCB_ALLOCED; 1470 #endif 1471 splx(s); 1472 1473 twe_ccb_init(sc, ccb, flags); 1474 return (ccb); 1475 } 1476 1477 struct twe_ccb * 1478 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1479 { 1480 struct twe_ccb *ccb; 1481 int s; 1482 1483 KASSERT((flags & TWE_CCB_AEN) == 0); 1484 1485 s = splbio(); 1486 while (__predict_false((ccb = 1487 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1488 sc->sc_flags |= TWEF_WAIT_CCB; 1489 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1490 } 1491 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1492 #ifdef DIAGNOSTIC 1493 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1494 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1495 (long)(ccb - sc->sc_ccbs)); 1496 flags |= TWE_CCB_ALLOCED; 1497 #endif 1498 splx(s); 1499 1500 twe_ccb_init(sc, ccb, flags); 1501 return (ccb); 1502 } 1503 1504 /* 1505 * Free a CCB. 1506 */ 1507 void 1508 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1509 { 1510 int s; 1511 1512 s = splbio(); 1513 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1514 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1515 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1516 sc->sc_flags &= ~TWEF_WAIT_CCB; 1517 wakeup(&sc->sc_ccb_freelist); 1518 } 1519 } 1520 ccb->ccb_flags = 0; 1521 splx(s); 1522 } 1523 1524 /* 1525 * Map the specified CCB's command block and data buffer (if any) into 1526 * controller visible space. Perform DMA synchronisation. 1527 */ 1528 int 1529 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1530 { 1531 struct twe_cmd *tc; 1532 int flags, nsegs, i, s, rv; 1533 void *data; 1534 1535 /* 1536 * The data as a whole must be 512-byte aligned. 1537 */ 1538 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1539 s = splvm(); 1540 /* XXX */ 1541 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1542 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1543 splx(s); 1544 data = (void *)ccb->ccb_abuf; 1545 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1546 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1547 } else { 1548 ccb->ccb_abuf = (vaddr_t)0; 1549 data = ccb->ccb_data; 1550 } 1551 1552 /* 1553 * Map the data buffer into bus space and build the S/G list. 1554 */ 1555 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1556 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1557 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1558 BUS_DMA_READ : BUS_DMA_WRITE)); 1559 if (rv != 0) { 1560 if (ccb->ccb_abuf != (vaddr_t)0) { 1561 s = splvm(); 1562 /* XXX */ 1563 uvm_km_free(kmem_map, ccb->ccb_abuf, 1564 ccb->ccb_datasize, UVM_KMF_WIRED); 1565 splx(s); 1566 } 1567 return (rv); 1568 } 1569 1570 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1571 tc = ccb->ccb_cmd; 1572 tc->tc_size += 2 * nsegs; 1573 1574 /* The location of the S/G list is dependant upon command type. */ 1575 switch (tc->tc_opcode >> 5) { 1576 case 2: 1577 for (i = 0; i < nsegs; i++) { 1578 tc->tc_args.param.sgl[i].tsg_address = 1579 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1580 tc->tc_args.param.sgl[i].tsg_length = 1581 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1582 } 1583 /* XXX Needed? */ 1584 for (; i < TWE_SG_SIZE; i++) { 1585 tc->tc_args.param.sgl[i].tsg_address = 0; 1586 tc->tc_args.param.sgl[i].tsg_length = 0; 1587 } 1588 break; 1589 case 3: 1590 for (i = 0; i < nsegs; i++) { 1591 tc->tc_args.io.sgl[i].tsg_address = 1592 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1593 tc->tc_args.io.sgl[i].tsg_length = 1594 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1595 } 1596 /* XXX Needed? */ 1597 for (; i < TWE_SG_SIZE; i++) { 1598 tc->tc_args.io.sgl[i].tsg_address = 0; 1599 tc->tc_args.io.sgl[i].tsg_length = 0; 1600 } 1601 break; 1602 default: 1603 /* 1604 * In all likelihood, this is a command passed from 1605 * management tools in userspace where no S/G list is 1606 * necessary because no data is being passed. 1607 */ 1608 break; 1609 } 1610 1611 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1612 flags = BUS_DMASYNC_PREREAD; 1613 else 1614 flags = 0; 1615 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1616 flags |= BUS_DMASYNC_PREWRITE; 1617 1618 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1619 ccb->ccb_datasize, flags); 1620 return (0); 1621 } 1622 1623 /* 1624 * Unmap the specified CCB's command block and data buffer (if any) and 1625 * perform DMA synchronisation. 1626 */ 1627 void 1628 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1629 { 1630 int flags, s; 1631 1632 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1633 flags = BUS_DMASYNC_POSTREAD; 1634 else 1635 flags = 0; 1636 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1637 flags |= BUS_DMASYNC_POSTWRITE; 1638 1639 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1640 ccb->ccb_datasize, flags); 1641 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1642 1643 if (ccb->ccb_abuf != (vaddr_t)0) { 1644 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1645 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1646 ccb->ccb_datasize); 1647 s = splvm(); 1648 /* XXX */ 1649 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1650 UVM_KMF_WIRED); 1651 splx(s); 1652 } 1653 } 1654 1655 /* 1656 * Submit a command to the controller and poll on completion. Return 1657 * non-zero on timeout (but don't check status, as some command types don't 1658 * return status). Must be called with interrupts blocked. 1659 */ 1660 int 1661 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1662 { 1663 int rv; 1664 1665 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1666 return (rv); 1667 1668 for (timo *= 1000; timo != 0; timo--) { 1669 twe_poll(sc); 1670 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1671 break; 1672 DELAY(100); 1673 } 1674 1675 return (timo == 0); 1676 } 1677 1678 /* 1679 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1680 * the order that they were enqueued and try to submit their command blocks 1681 * to the controller for execution. 1682 */ 1683 void 1684 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1685 { 1686 int s; 1687 1688 s = splbio(); 1689 1690 if (ccb != NULL) 1691 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1692 1693 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1694 if (twe_ccb_submit(sc, ccb)) 1695 break; 1696 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1697 } 1698 1699 splx(s); 1700 } 1701 1702 /* 1703 * Submit the command block associated with the specified CCB to the 1704 * controller for execution. Must be called with interrupts blocked. 1705 */ 1706 int 1707 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1708 { 1709 bus_addr_t pa; 1710 int rv; 1711 u_int status; 1712 1713 /* Check to see if we can post a command. */ 1714 status = twe_inl(sc, TWE_REG_STS); 1715 twe_status_check(sc, status); 1716 1717 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1718 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1719 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1720 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1721 #ifdef DIAGNOSTIC 1722 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1723 panic("%s: CCB %ld not ALLOCED\n", 1724 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1725 #endif 1726 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1727 pa = sc->sc_cmds_paddr + 1728 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1729 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1730 rv = 0; 1731 } else 1732 rv = EBUSY; 1733 1734 return (rv); 1735 } 1736 1737 1738 /* 1739 * Accept an open operation on the control device. 1740 */ 1741 int 1742 tweopen(dev_t dev, int flag, int mode, struct proc *p) 1743 { 1744 struct twe_softc *twe; 1745 1746 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1747 return (ENXIO); 1748 if ((twe->sc_flags & TWEF_OPEN) != 0) 1749 return (EBUSY); 1750 1751 twe->sc_flags |= TWEF_OPEN; 1752 return (0); 1753 } 1754 1755 /* 1756 * Accept the last close on the control device. 1757 */ 1758 int 1759 tweclose(dev_t dev, int flag, int mode, struct proc *p) 1760 { 1761 struct twe_softc *twe; 1762 1763 twe = device_lookup(&twe_cd, minor(dev)); 1764 twe->sc_flags &= ~TWEF_OPEN; 1765 return (0); 1766 } 1767 1768 void 1769 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1770 { 1771 1772 /* Just wake up the sleeper. */ 1773 wakeup(ccb); 1774 } 1775 1776 /* 1777 * Handle control operations. 1778 */ 1779 int 1780 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1781 { 1782 struct twe_softc *twe; 1783 struct twe_ccb *ccb; 1784 struct twe_param *param; 1785 struct twe_usercommand *tu; 1786 struct twe_paramcommand *tp; 1787 struct twe_drivecommand *td; 1788 void *pdata = NULL; 1789 int s, error = 0; 1790 u_int8_t cmdid; 1791 1792 if (securelevel >= 2) 1793 return (EPERM); 1794 1795 twe = device_lookup(&twe_cd, minor(dev)); 1796 tu = (struct twe_usercommand *)data; 1797 tp = (struct twe_paramcommand *)data; 1798 td = (struct twe_drivecommand *)data; 1799 1800 /* This is intended to be compatible with the FreeBSD interface. */ 1801 switch (cmd) { 1802 case TWEIO_COMMAND: 1803 /* XXX mutex */ 1804 if (tu->tu_size > 0) { 1805 /* 1806 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1807 * it's really necessary, first. 1808 */ 1809 if (tu->tu_size > TWE_SECTOR_SIZE) { 1810 #ifdef TWE_DEBUG 1811 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1812 twe->sc_dv.dv_xname, tu->tu_size); 1813 #endif 1814 return EINVAL; 1815 } 1816 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1817 error = copyin(tu->tu_data, pdata, tu->tu_size); 1818 if (error != 0) 1819 goto done; 1820 ccb = twe_ccb_alloc_wait(twe, 1821 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1822 KASSERT(ccb != NULL); 1823 ccb->ccb_data = pdata; 1824 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1825 } else { 1826 ccb = twe_ccb_alloc_wait(twe, 0); 1827 KASSERT(ccb != NULL); 1828 } 1829 1830 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1831 ccb->ccb_tx.tx_context = NULL; 1832 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1833 1834 cmdid = ccb->ccb_cmdid; 1835 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1836 ccb->ccb_cmd->tc_cmdid = cmdid; 1837 1838 /* Map the transfer. */ 1839 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1840 twe_ccb_free(twe, ccb); 1841 goto done; 1842 } 1843 1844 /* Submit the command and wait up to 1 minute. */ 1845 error = 0; 1846 twe_ccb_enqueue(twe, ccb); 1847 s = splbio(); 1848 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1849 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1850 60 * hz)) != 0) 1851 break; 1852 splx(s); 1853 1854 /* Copy the command back to the ioctl argument. */ 1855 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1856 #ifdef TWE_DEBUG 1857 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1858 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1859 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1860 #endif 1861 1862 s = splbio(); 1863 twe_ccb_free(twe, ccb); 1864 splx(s); 1865 1866 if (tu->tu_size > 0) 1867 error = copyout(pdata, tu->tu_data, tu->tu_size); 1868 goto done; 1869 1870 case TWEIO_STATS: 1871 return (ENOENT); 1872 1873 case TWEIO_AEN_POLL: 1874 s = splbio(); 1875 *(u_int *)data = twe_aen_dequeue(twe); 1876 splx(s); 1877 return (0); 1878 1879 case TWEIO_AEN_WAIT: 1880 s = splbio(); 1881 while ((*(u_int *)data = 1882 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1883 twe->sc_flags |= TWEF_AENQ_WAIT; 1884 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1885 "tweaen", 0); 1886 if (error == EINTR) { 1887 splx(s); 1888 return (error); 1889 } 1890 } 1891 splx(s); 1892 return (0); 1893 1894 case TWEIO_GET_PARAM: 1895 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1896 tp->tp_size, 0, ¶m); 1897 if (error != 0) 1898 return (error); 1899 if (param->tp_param_size > tp->tp_size) { 1900 error = EFAULT; 1901 goto done; 1902 } 1903 error = copyout(param->tp_data, tp->tp_data, 1904 param->tp_param_size); 1905 goto done; 1906 1907 case TWEIO_SET_PARAM: 1908 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1909 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1910 goto done; 1911 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1912 tp->tp_size, pdata); 1913 goto done; 1914 1915 case TWEIO_RESET: 1916 s = splbio(); 1917 twe_reset(twe); 1918 splx(s); 1919 return (0); 1920 1921 case TWEIO_ADD_UNIT: 1922 /* XXX mutex */ 1923 return (twe_add_unit(twe, td->td_unit)); 1924 1925 case TWEIO_DEL_UNIT: 1926 /* XXX mutex */ 1927 return (twe_del_unit(twe, td->td_unit)); 1928 1929 default: 1930 return EINVAL; 1931 } 1932 done: 1933 if (pdata) 1934 free(pdata, M_DEVBUF); 1935 return error; 1936 } 1937 1938 /* 1939 * Print some information about the controller 1940 */ 1941 static void 1942 twe_describe_controller(struct twe_softc *sc) 1943 { 1944 struct twe_param *p[6]; 1945 int i, rv = 0; 1946 uint32_t dsize; 1947 uint8_t ports; 1948 1949 /* get the port count */ 1950 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1951 TWE_PARAM_CONTROLLER_PortCount, &ports); 1952 1953 /* get version strings */ 1954 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1955 16, NULL, &p[0]); 1956 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1957 16, NULL, &p[1]); 1958 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1959 16, NULL, &p[2]); 1960 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1961 8, NULL, &p[3]); 1962 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1963 8, NULL, &p[4]); 1964 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1965 8, NULL, &p[5]); 1966 1967 if (rv) { 1968 /* some error occurred */ 1969 aprint_error("%s: failed to fetch version information\n", 1970 sc->sc_dv.dv_xname); 1971 return; 1972 } 1973 1974 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1975 sc->sc_dv.dv_xname, ports, 1976 p[1]->tp_data, p[2]->tp_data); 1977 1978 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1979 sc->sc_dv.dv_xname, 1980 p[0]->tp_data, p[3]->tp_data, 1981 p[4]->tp_data, p[5]->tp_data); 1982 1983 free(p[0], M_DEVBUF); 1984 free(p[1], M_DEVBUF); 1985 free(p[2], M_DEVBUF); 1986 free(p[3], M_DEVBUF); 1987 free(p[4], M_DEVBUF); 1988 free(p[5], M_DEVBUF); 1989 1990 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1991 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1992 if (rv) { 1993 aprint_error("%s: failed to get drive status summary\n", 1994 sc->sc_dv.dv_xname); 1995 return; 1996 } 1997 for (i = 0; i < ports; i++) { 1998 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1999 continue; 2000 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 2001 TWE_PARAM_DRIVEINFO_Size, &dsize); 2002 if (rv) { 2003 aprint_error( 2004 "%s: unable to get drive size for port %d\n", 2005 sc->sc_dv.dv_xname, i); 2006 continue; 2007 } 2008 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 2009 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 2010 if (rv) { 2011 aprint_error( 2012 "%s: unable to get drive model for port %d\n", 2013 sc->sc_dv.dv_xname, i); 2014 continue; 2015 } 2016 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 2017 i, p[1]->tp_data, dsize / 2048); 2018 free(p[1], M_DEVBUF); 2019 } 2020 free(p[0], M_DEVBUF); 2021 } 2022
Indexes created Sun Sep 21 20:09:37 GMT 2025