twe.c revision 1.70
1 /* $NetBSD: twe.c,v 1.70 2005/08/26 11:20:33 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.70 2005/08/26 11:20:33 drochner Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 89 #include <uvm/uvm_extern.h> 90 91 #include <machine/bswap.h> 92 #include <machine/bus.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 #include <dev/pci/twereg.h> 98 #include <dev/pci/twevar.h> 99 #include <dev/pci/tweio.h> 100 101 #include "locators.h" 102 103 #define PCI_CBIO 0x10 104 105 static int twe_aen_get(struct twe_softc *, uint16_t *); 106 static void twe_aen_handler(struct twe_ccb *, int); 107 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 108 static uint16_t twe_aen_dequeue(struct twe_softc *); 109 110 static void twe_attach(struct device *, struct device *, void *); 111 static int twe_init_connection(struct twe_softc *); 112 static int twe_intr(void *); 113 static int twe_match(struct device *, struct cfdata *, void *); 114 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 115 static void twe_poll(struct twe_softc *); 116 static int twe_print(void *, const char *); 117 static int twe_reset(struct twe_softc *); 118 static int twe_status_check(struct twe_softc *, u_int); 119 static int twe_status_wait(struct twe_softc *, u_int, int); 120 static void twe_describe_controller(struct twe_softc *); 121 static void twe_clear_pci_abort(struct twe_softc *sc); 122 static void twe_clear_pci_parity_error(struct twe_softc *sc); 123 124 static int twe_add_unit(struct twe_softc *, int); 125 static int twe_del_unit(struct twe_softc *, int); 126 127 static inline u_int32_t twe_inl(struct twe_softc *, int); 128 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 129 130 extern struct cfdriver twe_cd; 131 132 CFATTACH_DECL(twe, sizeof(struct twe_softc), 133 twe_match, twe_attach, NULL, NULL); 134 135 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 136 const char twever[] = "1.50.01.002"; 137 138 /* 139 * Tables to convert numeric codes to strings. 140 */ 141 const struct twe_code_table twe_table_status[] = { 142 { 0x00, "successful completion" }, 143 144 /* info */ 145 { 0x42, "command in progress" }, 146 { 0x6c, "retrying interface CRC error from UDMA command" }, 147 148 /* warning */ 149 { 0x81, "redundant/inconsequential request ignored" }, 150 { 0x8e, "failed to write zeroes to LBA 0" }, 151 { 0x8f, "failed to profile TwinStor zones" }, 152 153 /* fatal */ 154 { 0xc1, "aborted due to system command or reconfiguration" }, 155 { 0xc4, "aborted" }, 156 { 0xc5, "access error" }, 157 { 0xc6, "access violation" }, 158 { 0xc7, "device failure" }, /* high byte may be port # */ 159 { 0xc8, "controller error" }, 160 { 0xc9, "timed out" }, 161 { 0xcb, "invalid unit number" }, 162 { 0xcf, "unit not available" }, 163 { 0xd2, "undefined opcode" }, 164 { 0xdb, "request incompatible with unit" }, 165 { 0xdc, "invalid request" }, 166 { 0xff, "firmware error, reset requested" }, 167 168 { 0, NULL } 169 }; 170 171 const struct twe_code_table twe_table_unitstate[] = { 172 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 173 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 174 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 175 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 176 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 177 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 178 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 179 180 { 0, NULL } 181 }; 182 183 const struct twe_code_table twe_table_unittype[] = { 184 /* array descriptor configuration */ 185 { TWE_AD_CONFIG_RAID0, "RAID0" }, 186 { TWE_AD_CONFIG_RAID1, "RAID1" }, 187 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 188 { TWE_AD_CONFIG_RAID5, "RAID5" }, 189 { TWE_AD_CONFIG_RAID10, "RAID10" }, 190 { TWE_UD_CONFIG_JBOD, "JBOD" }, 191 192 { 0, NULL } 193 }; 194 195 const struct twe_code_table twe_table_stripedepth[] = { 196 { TWE_AD_STRIPE_4k, "4K" }, 197 { TWE_AD_STRIPE_8k, "8K" }, 198 { TWE_AD_STRIPE_16k, "16K" }, 199 { TWE_AD_STRIPE_32k, "32K" }, 200 { TWE_AD_STRIPE_64k, "64K" }, 201 { TWE_AD_STRIPE_128k, "128K" }, 202 { TWE_AD_STRIPE_256k, "256K" }, 203 { TWE_AD_STRIPE_512k, "512K" }, 204 { TWE_AD_STRIPE_1024k, "1024K" }, 205 206 { 0, NULL } 207 }; 208 209 /* 210 * Asynchronous event notification messages are qualified: 211 * a - not unit/port specific 212 * u - unit specific 213 * p - port specific 214 * 215 * They are further qualified with a severity: 216 * E - LOG_EMERG 217 * a - LOG_ALERT 218 * c - LOG_CRIT 219 * e - LOG_ERR 220 * w - LOG_WARNING 221 * n - LOG_NOTICE 222 * i - LOG_INFO 223 * d - LOG_DEBUG 224 * blank - just use printf 225 */ 226 const struct twe_code_table twe_table_aen[] = { 227 { 0x00, "a queue empty" }, 228 { 0x01, "a soft reset" }, 229 { 0x02, "uc degraded mode" }, 230 { 0x03, "aa controller error" }, 231 { 0x04, "uE rebuild fail" }, 232 { 0x05, "un rebuild done" }, 233 { 0x06, "ue incomplete unit" }, 234 { 0x07, "un initialization done" }, 235 { 0x08, "uw unclean shutdown detected" }, 236 { 0x09, "pe drive timeout" }, 237 { 0x0a, "pc drive error" }, 238 { 0x0b, "un rebuild started" }, 239 { 0x0c, "un initialization started" }, 240 { 0x0d, "ui logical unit deleted" }, 241 { 0x0f, "pc SMART threshold exceeded" }, 242 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 243 { 0x21, "pe ATA UDMA downgrade" }, 244 { 0x22, "pi ATA UDMA upgrade" }, 245 { 0x23, "pw sector repair occurred" }, 246 { 0x24, "aa SBUF integrity check failure" }, 247 { 0x25, "pa lost cached write" }, 248 { 0x26, "pa drive ECC error detected" }, 249 { 0x27, "pe DCB checksum error" }, 250 { 0x28, "pn DCB unsupported version" }, 251 { 0x29, "ui verify started" }, 252 { 0x2a, "ua verify failed" }, 253 { 0x2b, "ui verify complete" }, 254 { 0x2c, "pw overwrote bad sector during rebuild" }, 255 { 0x2d, "pa encountered bad sector during rebuild" }, 256 { 0x2e, "pe replacement drive too small" }, 257 { 0x2f, "ue array not previously initialized" }, 258 { 0x30, "p drive not supported" }, 259 { 0xff, "a aen queue full" }, 260 261 { 0, NULL }, 262 }; 263 264 const char * 265 twe_describe_code(const struct twe_code_table *table, uint32_t code) 266 { 267 268 for (; table->string != NULL; table++) { 269 if (table->code == code) 270 return (table->string); 271 } 272 return (NULL); 273 } 274 275 static inline u_int32_t 276 twe_inl(struct twe_softc *sc, int off) 277 { 278 279 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 280 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 281 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 282 } 283 284 static inline void 285 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 286 { 287 288 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 289 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 290 BUS_SPACE_BARRIER_WRITE); 291 } 292 293 /* 294 * Match a supported board. 295 */ 296 static int 297 twe_match(struct device *parent, struct cfdata *cfdata, void *aux) 298 { 299 struct pci_attach_args *pa; 300 301 pa = aux; 302 303 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 304 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 305 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 306 } 307 308 /* 309 * Attach a supported board. 310 * 311 * XXX This doesn't fail gracefully. 312 */ 313 static void 314 twe_attach(struct device *parent, struct device *self, void *aux) 315 { 316 struct pci_attach_args *pa; 317 struct twe_softc *sc; 318 pci_chipset_tag_t pc; 319 pci_intr_handle_t ih; 320 pcireg_t csr; 321 const char *intrstr; 322 int s, size, i, rv, rseg; 323 size_t max_segs, max_xfer; 324 bus_dma_segment_t seg; 325 struct ctlname ctlnames[] = CTL_NAMES; 326 const struct sysctlnode *node; 327 struct twe_cmd *tc; 328 struct twe_ccb *ccb; 329 330 sc = (struct twe_softc *)self; 331 pa = aux; 332 pc = pa->pa_pc; 333 sc->sc_dmat = pa->pa_dmat; 334 SIMPLEQ_INIT(&sc->sc_ccb_queue); 335 SLIST_INIT(&sc->sc_ccb_freelist); 336 337 aprint_naive(": RAID controller\n"); 338 aprint_normal(": 3ware Escalade\n"); 339 340 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 341 if (ccb == NULL) { 342 aprint_error("%s: unable to allocate memory for ccbs\n", 343 sc->sc_dv.dv_xname); 344 return; 345 } 346 347 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 348 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 349 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 350 return; 351 } 352 353 /* Enable the device. */ 354 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 355 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 356 csr | PCI_COMMAND_MASTER_ENABLE); 357 358 /* Map and establish the interrupt. */ 359 if (pci_intr_map(pa, &ih)) { 360 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 361 return; 362 } 363 364 intrstr = pci_intr_string(pc, ih); 365 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 366 if (sc->sc_ih == NULL) { 367 aprint_error("%s: can't establish interrupt%s%s\n", 368 sc->sc_dv.dv_xname, 369 (intrstr) ? " at " : "", 370 (intrstr) ? intrstr : ""); 371 return; 372 } 373 374 if (intrstr != NULL) 375 aprint_normal("%s: interrupting at %s\n", 376 sc->sc_dv.dv_xname, intrstr); 377 378 /* 379 * Allocate and initialise the command blocks and CCBs. 380 */ 381 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 382 383 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 384 &rseg, BUS_DMA_NOWAIT)) != 0) { 385 aprint_error("%s: unable to allocate commands, rv = %d\n", 386 sc->sc_dv.dv_xname, rv); 387 return; 388 } 389 390 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 391 (caddr_t *)&sc->sc_cmds, 392 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 393 aprint_error("%s: unable to map commands, rv = %d\n", 394 sc->sc_dv.dv_xname, rv); 395 return; 396 } 397 398 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 399 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 400 aprint_error("%s: unable to create command DMA map, rv = %d\n", 401 sc->sc_dv.dv_xname, rv); 402 return; 403 } 404 405 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 406 size, NULL, BUS_DMA_NOWAIT)) != 0) { 407 aprint_error("%s: unable to load command DMA map, rv = %d\n", 408 sc->sc_dv.dv_xname, rv); 409 return; 410 } 411 412 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 413 memset(sc->sc_cmds, 0, size); 414 415 sc->sc_ccbs = ccb; 416 tc = (struct twe_cmd *)sc->sc_cmds; 417 max_segs = twe_get_maxsegs(); 418 max_xfer = twe_get_maxxfer(max_segs); 419 420 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 421 ccb->ccb_cmd = tc; 422 ccb->ccb_cmdid = i; 423 ccb->ccb_flags = 0; 424 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 425 max_segs, PAGE_SIZE, 0, 426 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 427 &ccb->ccb_dmamap_xfer); 428 if (rv != 0) { 429 aprint_error("%s: can't create dmamap, rv = %d\n", 430 sc->sc_dv.dv_xname, rv); 431 return; 432 } 433 434 /* Save the first CCB for AEN retrieval. */ 435 if (i != 0) 436 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 437 ccb_chain.slist); 438 } 439 440 /* Wait for the controller to become ready. */ 441 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 442 aprint_error("%s: microcontroller not ready\n", 443 sc->sc_dv.dv_xname); 444 return; 445 } 446 447 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 448 449 /* Reset the controller. */ 450 s = splbio(); 451 rv = twe_reset(sc); 452 splx(s); 453 if (rv) { 454 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 455 return; 456 } 457 458 /* Initialise connection with controller. */ 459 twe_init_connection(sc); 460 461 twe_describe_controller(sc); 462 463 /* Find and attach RAID array units. */ 464 sc->sc_nunits = 0; 465 for (i = 0; i < TWE_MAX_UNITS; i++) 466 (void) twe_add_unit(sc, i); 467 468 /* ...and finally, enable interrupts. */ 469 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 470 TWE_CTL_UNMASK_RESP_INTR | 471 TWE_CTL_ENABLE_INTRS); 472 473 /* sysctl set-up for 3ware cli */ 474 if (sysctl_createv(NULL, 0, NULL, NULL, 475 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 476 NULL, NULL, 0, NULL, 0, 477 CTL_HW, CTL_EOL) != 0) { 478 printf("%s: could not create %s sysctl node\n", 479 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 480 return; 481 } 482 if (sysctl_createv(NULL, 0, NULL, &node, 483 0, CTLTYPE_NODE, sc->sc_dv.dv_xname, 484 SYSCTL_DESCR("twe driver information"), 485 NULL, 0, NULL, 0, 486 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 487 printf("%s: could not create %s.%s sysctl node\n", 488 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 489 sc->sc_dv.dv_xname); 490 return; 491 } 492 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 493 0, CTLTYPE_STRING, "driver_version", 494 SYSCTL_DESCR("twe0 driver version"), 495 NULL, 0, &twever, 0, 496 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 497 != 0) { 498 printf("%s: could not create %s.%s.driver_version sysctl\n", 499 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 500 sc->sc_dv.dv_xname); 501 return; 502 } 503 } 504 505 void 506 twe_register_callbacks(struct twe_softc *sc, int unit, 507 const struct twe_callbacks *tcb) 508 { 509 510 sc->sc_units[unit].td_callbacks = tcb; 511 } 512 513 static void 514 twe_recompute_openings(struct twe_softc *sc) 515 { 516 struct twe_drive *td; 517 int unit, openings; 518 519 if (sc->sc_nunits != 0) 520 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 521 else 522 openings = 0; 523 if (openings == sc->sc_openings) 524 return; 525 sc->sc_openings = openings; 526 527 #ifdef TWE_DEBUG 528 printf("%s: %d array%s, %d openings per array\n", 529 sc->sc_dv.dv_xname, sc->sc_nunits, 530 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 531 #endif 532 533 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 534 td = &sc->sc_units[unit]; 535 if (td->td_dev != NULL) 536 (*td->td_callbacks->tcb_openings)(td->td_dev, 537 sc->sc_openings); 538 } 539 } 540 541 static int 542 twe_add_unit(struct twe_softc *sc, int unit) 543 { 544 struct twe_param *dtp, *atp; 545 struct twe_array_descriptor *ad; 546 struct twe_drive *td; 547 struct twe_attach_args twea; 548 uint32_t newsize; 549 int rv; 550 uint16_t dsize; 551 uint8_t newtype, newstripe; 552 int locs[TWECF_NLOCS]; 553 554 if (unit < 0 || unit >= TWE_MAX_UNITS) 555 return (EINVAL); 556 557 /* Find attached units. */ 558 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 559 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 560 if (rv != 0) { 561 aprint_error("%s: error %d fetching unit summary\n", 562 sc->sc_dv.dv_xname, rv); 563 return (rv); 564 } 565 566 /* For each detected unit, collect size and store in an array. */ 567 td = &sc->sc_units[unit]; 568 569 /* Unit present? */ 570 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 571 /* 572 * XXX Should we check to see if a device has been 573 * XXX attached at this index and detach it if it 574 * XXX has? ("rescan" semantics) 575 */ 576 rv = 0; 577 goto out; 578 } 579 580 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 581 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 582 if (rv != 0) { 583 aprint_error("%s: error %d fetching descriptor size " 584 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 585 goto out; 586 } 587 588 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 589 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 590 if (rv != 0) { 591 aprint_error("%s: error %d fetching array descriptor " 592 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 593 goto out; 594 } 595 596 ad = (struct twe_array_descriptor *)atp->tp_data; 597 newtype = ad->configuration; 598 newstripe = ad->stripe_size; 599 free(atp, M_DEVBUF); 600 601 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 602 TWE_PARAM_UNITINFO_Capacity, &newsize); 603 if (rv != 0) { 604 aprint_error( 605 "%s: error %d fetching capacity for unit %d\n", 606 sc->sc_dv.dv_xname, rv, unit); 607 goto out; 608 } 609 610 /* 611 * Have a device, so we need to attach it. If there is currently 612 * something sitting at the slot, and the parameters are different, 613 * then we detach the old device before attaching the new one. 614 */ 615 if (td->td_dev != NULL && 616 td->td_size == newsize && 617 td->td_type == newtype && 618 td->td_stripe == newstripe) { 619 /* Same as the old device; just keep using it. */ 620 rv = 0; 621 goto out; 622 } else if (td->td_dev != NULL) { 623 /* Detach the old device first. */ 624 (void) config_detach(td->td_dev, DETACH_FORCE); 625 td->td_dev = NULL; 626 } else if (td->td_size == 0) 627 sc->sc_nunits++; 628 629 /* 630 * Committed to the new array unit; assign its parameters and 631 * recompute the number of available command openings. 632 */ 633 td->td_size = newsize; 634 td->td_type = newtype; 635 td->td_stripe = newstripe; 636 twe_recompute_openings(sc); 637 638 twea.twea_unit = unit; 639 640 locs[TWECF_UNIT] = unit; 641 642 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 643 twe_print, config_stdsubmatch); 644 645 rv = 0; 646 out: 647 free(dtp, M_DEVBUF); 648 return (rv); 649 } 650 651 static int 652 twe_del_unit(struct twe_softc *sc, int unit) 653 { 654 struct twe_drive *td; 655 656 if (unit < 0 || unit >= TWE_MAX_UNITS) 657 return (EINVAL); 658 659 td = &sc->sc_units[unit]; 660 if (td->td_size != 0) 661 sc->sc_nunits--; 662 td->td_size = 0; 663 td->td_type = 0; 664 td->td_stripe = 0; 665 if (td->td_dev != NULL) { 666 (void) config_detach(td->td_dev, DETACH_FORCE); 667 td->td_dev = NULL; 668 } 669 twe_recompute_openings(sc); 670 return (0); 671 } 672 673 /* 674 * Reset the controller. 675 * MUST BE CALLED AT splbio()! 676 */ 677 static int 678 twe_reset(struct twe_softc *sc) 679 { 680 uint16_t aen; 681 u_int status; 682 volatile u_int32_t junk; 683 int got, rv; 684 685 /* Issue a soft reset. */ 686 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 687 TWE_CTL_CLEAR_HOST_INTR | 688 TWE_CTL_CLEAR_ATTN_INTR | 689 TWE_CTL_MASK_CMD_INTR | 690 TWE_CTL_MASK_RESP_INTR | 691 TWE_CTL_CLEAR_ERROR_STS | 692 TWE_CTL_DISABLE_INTRS); 693 694 /* Wait for attention... */ 695 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 696 printf("%s: timeout waiting for attention interrupt\n", 697 sc->sc_dv.dv_xname); 698 return (-1); 699 } 700 701 /* ...and ACK it. */ 702 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 703 704 /* 705 * Pull AENs out of the controller; look for a soft reset AEN. 706 * Open code this, since we want to detect reset even if the 707 * queue for management tools is full. 708 * 709 * Note that since: 710 * - interrupts are blocked 711 * - we have reset the controller 712 * - acknowledged the pending ATTENTION 713 * that there is no way a pending asynchronous AEN fetch would 714 * finish, so clear the flag. 715 */ 716 sc->sc_flags &= ~TWEF_AEN; 717 for (got = 0;;) { 718 rv = twe_aen_get(sc, &aen); 719 if (rv != 0) 720 printf("%s: error %d while draining event queue\n", 721 sc->sc_dv.dv_xname, rv); 722 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 723 break; 724 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 725 got = 1; 726 twe_aen_enqueue(sc, aen, 1); 727 } 728 729 if (!got) { 730 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 731 return (-1); 732 } 733 734 /* Check controller status. */ 735 status = twe_inl(sc, TWE_REG_STS); 736 if (twe_status_check(sc, status)) { 737 printf("%s: controller errors detected\n", 738 sc->sc_dv.dv_xname); 739 return (-1); 740 } 741 742 /* Drain the response queue. */ 743 for (;;) { 744 status = twe_inl(sc, TWE_REG_STS); 745 if (twe_status_check(sc, status) != 0) { 746 printf("%s: can't drain response queue\n", 747 sc->sc_dv.dv_xname); 748 return (-1); 749 } 750 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 751 break; 752 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 753 } 754 755 return (0); 756 } 757 758 /* 759 * Print autoconfiguration message for a sub-device. 760 */ 761 static int 762 twe_print(void *aux, const char *pnp) 763 { 764 struct twe_attach_args *twea; 765 766 twea = aux; 767 768 if (pnp != NULL) 769 aprint_normal("block device at %s", pnp); 770 aprint_normal(" unit %d", twea->twea_unit); 771 return (UNCONF); 772 } 773 774 /* 775 * Interrupt service routine. 776 */ 777 static int 778 twe_intr(void *arg) 779 { 780 struct twe_softc *sc; 781 u_int status; 782 int caught, rv; 783 784 sc = arg; 785 caught = 0; 786 status = twe_inl(sc, TWE_REG_STS); 787 twe_status_check(sc, status); 788 789 /* Host interrupts - purpose unknown. */ 790 if ((status & TWE_STS_HOST_INTR) != 0) { 791 #ifdef DEBUG 792 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 793 #endif 794 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 795 caught = 1; 796 } 797 798 /* 799 * Attention interrupts, signalled when a controller or child device 800 * state change has occurred. 801 */ 802 if ((status & TWE_STS_ATTN_INTR) != 0) { 803 rv = twe_aen_get(sc, NULL); 804 if (rv != 0) 805 printf("%s: unable to retrieve AEN (%d)\n", 806 sc->sc_dv.dv_xname, rv); 807 else 808 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 809 caught = 1; 810 } 811 812 /* 813 * Command interrupts, signalled when the controller can accept more 814 * commands. We don't use this; instead, we try to submit commands 815 * when we receive them, and when other commands have completed. 816 * Mask it so we don't get another one. 817 */ 818 if ((status & TWE_STS_CMD_INTR) != 0) { 819 #ifdef DEBUG 820 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 821 #endif 822 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 823 caught = 1; 824 } 825 826 if ((status & TWE_STS_RESP_INTR) != 0) { 827 twe_poll(sc); 828 caught = 1; 829 } 830 831 return (caught); 832 } 833 834 /* 835 * Fetch an AEN. Even though this is really like parameter 836 * retrieval, we handle this specially, because we issue this 837 * AEN retrieval command from interrupt context, and thus 838 * reserve a CCB for it to avoid resource shortage. 839 * 840 * XXX There are still potential resource shortages we could 841 * XXX encounter. Consider pre-allocating all AEN-related 842 * XXX resources. 843 * 844 * MUST BE CALLED AT splbio()! 845 */ 846 static int 847 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 848 { 849 struct twe_ccb *ccb; 850 struct twe_cmd *tc; 851 struct twe_param *tp; 852 int rv; 853 854 /* 855 * If we're already retrieving an AEN, just wait; another 856 * retrieval will be chained after the current one completes. 857 */ 858 if (sc->sc_flags & TWEF_AEN) { 859 /* 860 * It is a fatal software programming error to attempt 861 * to fetch an AEN synchronously when an AEN fetch is 862 * already pending. 863 */ 864 KASSERT(aenp == NULL); 865 return (0); 866 } 867 868 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 869 if (tp == NULL) 870 return (ENOMEM); 871 872 ccb = twe_ccb_alloc(sc, 873 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 874 KASSERT(ccb != NULL); 875 876 ccb->ccb_data = tp; 877 ccb->ccb_datasize = TWE_SECTOR_SIZE; 878 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 879 ccb->ccb_tx.tx_context = tp; 880 ccb->ccb_tx.tx_dv = &sc->sc_dv; 881 882 tc = ccb->ccb_cmd; 883 tc->tc_size = 2; 884 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 885 tc->tc_unit = 0; 886 tc->tc_count = htole16(1); 887 888 /* Fill in the outbound parameter data. */ 889 tp->tp_table_id = htole16(TWE_PARAM_AEN); 890 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 891 tp->tp_param_size = 2; 892 893 /* Map the transfer. */ 894 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 895 twe_ccb_free(sc, ccb); 896 goto done; 897 } 898 899 /* Enqueue the command and wait. */ 900 if (aenp != NULL) { 901 rv = twe_ccb_poll(sc, ccb, 5); 902 twe_ccb_unmap(sc, ccb); 903 twe_ccb_free(sc, ccb); 904 if (rv == 0) 905 *aenp = le16toh(*(uint16_t *)tp->tp_data); 906 free(tp, M_DEVBUF); 907 } else { 908 sc->sc_flags |= TWEF_AEN; 909 twe_ccb_enqueue(sc, ccb); 910 rv = 0; 911 } 912 913 done: 914 return (rv); 915 } 916 917 /* 918 * Handle an AEN returned by the controller. 919 * MUST BE CALLED AT splbio()! 920 */ 921 static void 922 twe_aen_handler(struct twe_ccb *ccb, int error) 923 { 924 struct twe_softc *sc; 925 struct twe_param *tp; 926 uint16_t aen; 927 int rv; 928 929 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 930 tp = ccb->ccb_tx.tx_context; 931 twe_ccb_unmap(sc, ccb); 932 933 sc->sc_flags &= ~TWEF_AEN; 934 935 if (error) { 936 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 937 aen = TWE_AEN_QUEUE_EMPTY; 938 } else 939 aen = le16toh(*(u_int16_t *)tp->tp_data); 940 free(tp, M_DEVBUF); 941 twe_ccb_free(sc, ccb); 942 943 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 944 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 945 return; 946 } 947 948 twe_aen_enqueue(sc, aen, 0); 949 950 /* 951 * Chain another retrieval in case interrupts have been 952 * coalesced. 953 */ 954 rv = twe_aen_get(sc, NULL); 955 if (rv != 0) 956 printf("%s: unable to retrieve AEN (%d)\n", 957 sc->sc_dv.dv_xname, rv); 958 } 959 960 static void 961 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 962 { 963 const char *str, *msg; 964 int s, next, nextnext, level; 965 966 /* 967 * First report the AEN on the console. Maybe. 968 */ 969 if (! quiet) { 970 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 971 if (str == NULL) { 972 printf("%s: unknown AEN 0x%04x\n", 973 sc->sc_dv.dv_xname, aen); 974 } else { 975 msg = str + 3; 976 switch (str[1]) { 977 case 'E': level = LOG_EMERG; break; 978 case 'a': level = LOG_ALERT; break; 979 case 'c': level = LOG_CRIT; break; 980 case 'e': level = LOG_ERR; break; 981 case 'w': level = LOG_WARNING; break; 982 case 'n': level = LOG_NOTICE; break; 983 case 'i': level = LOG_INFO; break; 984 case 'd': level = LOG_DEBUG; break; 985 default: 986 /* Don't use syslog. */ 987 level = -1; 988 } 989 990 if (level < 0) { 991 switch (str[0]) { 992 case 'u': 993 case 'p': 994 printf("%s: %s %d: %s\n", 995 sc->sc_dv.dv_xname, 996 str[0] == 'u' ? "unit" : "port", 997 TWE_AEN_UNIT(aen), msg); 998 break; 999 1000 default: 1001 printf("%s: %s\n", 1002 sc->sc_dv.dv_xname, msg); 1003 } 1004 } else { 1005 switch (str[0]) { 1006 case 'u': 1007 case 'p': 1008 log(level, "%s: %s %d: %s\n", 1009 sc->sc_dv.dv_xname, 1010 str[0] == 'u' ? "unit" : "port", 1011 TWE_AEN_UNIT(aen), msg); 1012 break; 1013 1014 default: 1015 log(level, "%s: %s\n", 1016 sc->sc_dv.dv_xname, msg); 1017 } 1018 } 1019 } 1020 } 1021 1022 /* Now enqueue the AEN for mangement tools. */ 1023 s = splbio(); 1024 1025 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1026 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1027 1028 /* 1029 * If this is the last free slot, then queue up a "queue 1030 * full" message. 1031 */ 1032 if (nextnext == sc->sc_aen_tail) 1033 aen = TWE_AEN_QUEUE_FULL; 1034 1035 if (next != sc->sc_aen_tail) { 1036 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1037 sc->sc_aen_head = next; 1038 } 1039 1040 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1041 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1042 wakeup(&sc->sc_aen_queue); 1043 } 1044 1045 splx(s); 1046 } 1047 1048 /* NOTE: Must be called at splbio(). */ 1049 static uint16_t 1050 twe_aen_dequeue(struct twe_softc *sc) 1051 { 1052 uint16_t aen; 1053 1054 if (sc->sc_aen_tail == sc->sc_aen_head) 1055 aen = TWE_AEN_QUEUE_EMPTY; 1056 else { 1057 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1058 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1059 } 1060 1061 return (aen); 1062 } 1063 1064 /* 1065 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1066 * fetch 1, 2, and 4 byte parameter values, respectively. 1067 */ 1068 int 1069 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1070 uint8_t *valp) 1071 { 1072 struct twe_param *tp; 1073 int rv; 1074 1075 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1076 if (rv != 0) 1077 return (rv); 1078 *valp = *(uint8_t *)tp->tp_data; 1079 free(tp, M_DEVBUF); 1080 return (0); 1081 } 1082 1083 int 1084 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1085 uint16_t *valp) 1086 { 1087 struct twe_param *tp; 1088 int rv; 1089 1090 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1091 if (rv != 0) 1092 return (rv); 1093 *valp = le16toh(*(uint16_t *)tp->tp_data); 1094 free(tp, M_DEVBUF); 1095 return (0); 1096 } 1097 1098 int 1099 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1100 uint32_t *valp) 1101 { 1102 struct twe_param *tp; 1103 int rv; 1104 1105 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1106 if (rv != 0) 1107 return (rv); 1108 *valp = le32toh(*(uint32_t *)tp->tp_data); 1109 free(tp, M_DEVBUF); 1110 return (0); 1111 } 1112 1113 /* 1114 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1115 * it will be called with generated context when the command has completed. 1116 * If no callback is provided, the command will be executed synchronously 1117 * and a pointer to a buffer containing the data returned. 1118 * 1119 * The caller or callback is responsible for freeing the buffer. 1120 * 1121 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1122 */ 1123 int 1124 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1125 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1126 { 1127 struct twe_ccb *ccb; 1128 struct twe_cmd *tc; 1129 struct twe_param *tp; 1130 int rv, s; 1131 1132 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1133 if (tp == NULL) 1134 return ENOMEM; 1135 1136 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1137 KASSERT(ccb != NULL); 1138 1139 ccb->ccb_data = tp; 1140 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1141 ccb->ccb_tx.tx_handler = func; 1142 ccb->ccb_tx.tx_context = tp; 1143 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1144 1145 tc = ccb->ccb_cmd; 1146 tc->tc_size = 2; 1147 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1148 tc->tc_unit = 0; 1149 tc->tc_count = htole16(1); 1150 1151 /* Fill in the outbound parameter data. */ 1152 tp->tp_table_id = htole16(table_id); 1153 tp->tp_param_id = param_id; 1154 tp->tp_param_size = size; 1155 1156 /* Map the transfer. */ 1157 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1158 twe_ccb_free(sc, ccb); 1159 goto done; 1160 } 1161 1162 /* Submit the command and either wait or let the callback handle it. */ 1163 if (func == NULL) { 1164 s = splbio(); 1165 rv = twe_ccb_poll(sc, ccb, 5); 1166 twe_ccb_unmap(sc, ccb); 1167 twe_ccb_free(sc, ccb); 1168 splx(s); 1169 } else { 1170 #ifdef DEBUG 1171 if (pbuf != NULL) 1172 panic("both func and pbuf defined"); 1173 #endif 1174 twe_ccb_enqueue(sc, ccb); 1175 return 0; 1176 } 1177 1178 done: 1179 if (pbuf == NULL || rv != 0) 1180 free(tp, M_DEVBUF); 1181 else if (pbuf != NULL && rv == 0) 1182 *pbuf = tp; 1183 return rv; 1184 } 1185 1186 /* 1187 * Execute a TWE_OP_SET_PARAM command. 1188 * 1189 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1190 */ 1191 static int 1192 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1193 void *sbuf) 1194 { 1195 struct twe_ccb *ccb; 1196 struct twe_cmd *tc; 1197 struct twe_param *tp; 1198 int rv, s; 1199 1200 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1201 if (tp == NULL) 1202 return ENOMEM; 1203 1204 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1205 KASSERT(ccb != NULL); 1206 1207 ccb->ccb_data = tp; 1208 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1209 ccb->ccb_tx.tx_handler = 0; 1210 ccb->ccb_tx.tx_context = tp; 1211 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1212 1213 tc = ccb->ccb_cmd; 1214 tc->tc_size = 2; 1215 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1216 tc->tc_unit = 0; 1217 tc->tc_count = htole16(1); 1218 1219 /* Fill in the outbound parameter data. */ 1220 tp->tp_table_id = htole16(table_id); 1221 tp->tp_param_id = param_id; 1222 tp->tp_param_size = size; 1223 memcpy(tp->tp_data, sbuf, size); 1224 1225 /* Map the transfer. */ 1226 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1227 twe_ccb_free(sc, ccb); 1228 goto done; 1229 } 1230 1231 /* Submit the command and wait. */ 1232 s = splbio(); 1233 rv = twe_ccb_poll(sc, ccb, 5); 1234 twe_ccb_unmap(sc, ccb); 1235 twe_ccb_free(sc, ccb); 1236 splx(s); 1237 done: 1238 free(tp, M_DEVBUF); 1239 return (rv); 1240 } 1241 1242 /* 1243 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1244 * Must be called with interrupts blocked. 1245 */ 1246 static int 1247 twe_init_connection(struct twe_softc *sc) 1248 /*###762 [cc] warning: `twe_init_connection' was used with no prototype before its definition%%%*/ 1249 /*###762 [cc] warning: `twe_init_connection' was declared implicitly `extern' and later `static'%%%*/ 1250 { 1251 struct twe_ccb *ccb; 1252 struct twe_cmd *tc; 1253 int rv; 1254 1255 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1256 return (EAGAIN); 1257 1258 /* Build the command. */ 1259 tc = ccb->ccb_cmd; 1260 tc->tc_size = 3; 1261 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1262 tc->tc_unit = 0; 1263 tc->tc_count = htole16(TWE_MAX_CMDS); 1264 tc->tc_args.init_connection.response_queue_pointer = 0; 1265 1266 /* Submit the command for immediate execution. */ 1267 rv = twe_ccb_poll(sc, ccb, 5); 1268 twe_ccb_free(sc, ccb); 1269 return (rv); 1270 } 1271 1272 /* 1273 * Poll the controller for completed commands. Must be called with 1274 * interrupts blocked. 1275 */ 1276 static void 1277 twe_poll(struct twe_softc *sc) 1278 { 1279 struct twe_ccb *ccb; 1280 int found; 1281 u_int status, cmdid; 1282 1283 found = 0; 1284 1285 for (;;) { 1286 status = twe_inl(sc, TWE_REG_STS); 1287 twe_status_check(sc, status); 1288 1289 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1290 break; 1291 1292 found = 1; 1293 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1294 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1295 if (cmdid >= TWE_MAX_QUEUECNT) { 1296 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1297 continue; 1298 } 1299 1300 ccb = sc->sc_ccbs + cmdid; 1301 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1302 printf("%s: CCB for cmdid %d not active\n", 1303 sc->sc_dv.dv_xname, cmdid); 1304 continue; 1305 } 1306 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1307 1308 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1309 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1310 sizeof(struct twe_cmd), 1311 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1312 1313 /* Pass notification to upper layers. */ 1314 if (ccb->ccb_tx.tx_handler != NULL) 1315 (*ccb->ccb_tx.tx_handler)(ccb, 1316 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1317 } 1318 1319 /* If any commands have completed, run the software queue. */ 1320 if (found) 1321 twe_ccb_enqueue(sc, NULL); 1322 } 1323 1324 /* 1325 * Wait for `status' to be set in the controller status register. Return 1326 * zero if found, non-zero if the operation timed out. 1327 */ 1328 static int 1329 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1330 { 1331 1332 for (timo *= 10; timo != 0; timo--) { 1333 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1334 break; 1335 delay(100000); 1336 } 1337 1338 return (timo == 0); 1339 } 1340 1341 /* 1342 * Clear a PCI parity error. 1343 */ 1344 static void 1345 twe_clear_pci_parity_error(struct twe_softc *sc) 1346 { 1347 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1348 1349 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1350 } 1351 1352 1353 /* 1354 * Clear a PCI abort. 1355 */ 1356 static void 1357 twe_clear_pci_abort(struct twe_softc *sc) 1358 { 1359 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1360 1361 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1362 } 1363 1364 /* 1365 * Complain if the status bits aren't what we expect. 1366 */ 1367 static int 1368 twe_status_check(struct twe_softc *sc, u_int status) 1369 { 1370 int rv; 1371 1372 rv = 0; 1373 1374 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1375 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1376 status & ~TWE_STS_EXPECTED_BITS); 1377 rv = -1; 1378 } 1379 1380 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1381 printf("%s: unexpected status bits: 0x%08x\n", 1382 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1383 rv = -1; 1384 if (status & TWE_STS_PCI_PARITY_ERROR) { 1385 printf("%s: PCI parity error: Reseat card, move card " 1386 "or buggy device present.\n", 1387 sc->sc_dv.dv_xname); 1388 twe_clear_pci_parity_error(sc); 1389 } 1390 if (status & TWE_STS_PCI_ABORT) { 1391 printf("%s: PCI abort, clearing.\n", 1392 sc->sc_dv.dv_xname); 1393 twe_clear_pci_abort(sc); 1394 } 1395 } 1396 1397 return (rv); 1398 } 1399 1400 /* 1401 * Allocate and initialise a CCB. 1402 */ 1403 static __inline void 1404 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1405 { 1406 struct twe_cmd *tc; 1407 1408 ccb->ccb_tx.tx_handler = NULL; 1409 ccb->ccb_flags = flags; 1410 tc = ccb->ccb_cmd; 1411 tc->tc_status = 0; 1412 tc->tc_flags = 0; 1413 tc->tc_cmdid = ccb->ccb_cmdid; 1414 } 1415 1416 struct twe_ccb * 1417 twe_ccb_alloc(struct twe_softc *sc, int flags) 1418 { 1419 struct twe_ccb *ccb; 1420 int s; 1421 1422 s = splbio(); 1423 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1424 /* Use the reserved CCB. */ 1425 ccb = sc->sc_ccbs; 1426 } else { 1427 /* Allocate a CCB and command block. */ 1428 if (__predict_false((ccb = 1429 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1430 splx(s); 1431 return (NULL); 1432 } 1433 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1434 } 1435 #ifdef DIAGNOSTIC 1436 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1437 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1438 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1439 panic("twe_ccb_alloc: CCB %ld already allocated", 1440 (long)(ccb - sc->sc_ccbs)); 1441 flags |= TWE_CCB_ALLOCED; 1442 #endif 1443 splx(s); 1444 1445 twe_ccb_init(sc, ccb, flags); 1446 return (ccb); 1447 } 1448 1449 struct twe_ccb * 1450 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1451 { 1452 struct twe_ccb *ccb; 1453 int s; 1454 1455 KASSERT((flags & TWE_CCB_AEN) == 0); 1456 1457 s = splbio(); 1458 while (__predict_false((ccb = 1459 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1460 sc->sc_flags |= TWEF_WAIT_CCB; 1461 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1462 } 1463 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1464 #ifdef DIAGNOSTIC 1465 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1466 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1467 (long)(ccb - sc->sc_ccbs)); 1468 flags |= TWE_CCB_ALLOCED; 1469 #endif 1470 splx(s); 1471 1472 twe_ccb_init(sc, ccb, flags); 1473 return (ccb); 1474 } 1475 1476 /* 1477 * Free a CCB. 1478 */ 1479 void 1480 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1481 { 1482 int s; 1483 1484 s = splbio(); 1485 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1486 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1487 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1488 sc->sc_flags &= ~TWEF_WAIT_CCB; 1489 wakeup(&sc->sc_ccb_freelist); 1490 } 1491 } 1492 ccb->ccb_flags = 0; 1493 splx(s); 1494 } 1495 1496 /* 1497 * Map the specified CCB's command block and data buffer (if any) into 1498 * controller visible space. Perform DMA synchronisation. 1499 */ 1500 int 1501 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1502 { 1503 struct twe_cmd *tc; 1504 int flags, nsegs, i, s, rv; 1505 void *data; 1506 1507 /* 1508 * The data as a whole must be 512-byte aligned. 1509 */ 1510 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1511 s = splvm(); 1512 /* XXX */ 1513 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1514 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1515 splx(s); 1516 data = (void *)ccb->ccb_abuf; 1517 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1518 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1519 } else { 1520 ccb->ccb_abuf = (vaddr_t)0; 1521 data = ccb->ccb_data; 1522 } 1523 1524 /* 1525 * Map the data buffer into bus space and build the S/G list. 1526 */ 1527 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1528 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1529 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1530 BUS_DMA_READ : BUS_DMA_WRITE)); 1531 if (rv != 0) { 1532 if (ccb->ccb_abuf != (vaddr_t)0) { 1533 s = splvm(); 1534 /* XXX */ 1535 uvm_km_free(kmem_map, ccb->ccb_abuf, 1536 ccb->ccb_datasize, UVM_KMF_WIRED); 1537 splx(s); 1538 } 1539 return (rv); 1540 } 1541 1542 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1543 tc = ccb->ccb_cmd; 1544 tc->tc_size += 2 * nsegs; 1545 1546 /* The location of the S/G list is dependant upon command type. */ 1547 switch (tc->tc_opcode >> 5) { 1548 case 2: 1549 for (i = 0; i < nsegs; i++) { 1550 tc->tc_args.param.sgl[i].tsg_address = 1551 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1552 tc->tc_args.param.sgl[i].tsg_length = 1553 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1554 } 1555 /* XXX Needed? */ 1556 for (; i < TWE_SG_SIZE; i++) { 1557 tc->tc_args.param.sgl[i].tsg_address = 0; 1558 tc->tc_args.param.sgl[i].tsg_length = 0; 1559 } 1560 break; 1561 case 3: 1562 for (i = 0; i < nsegs; i++) { 1563 tc->tc_args.io.sgl[i].tsg_address = 1564 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1565 tc->tc_args.io.sgl[i].tsg_length = 1566 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1567 } 1568 /* XXX Needed? */ 1569 for (; i < TWE_SG_SIZE; i++) { 1570 tc->tc_args.io.sgl[i].tsg_address = 0; 1571 tc->tc_args.io.sgl[i].tsg_length = 0; 1572 } 1573 break; 1574 default: 1575 /* 1576 * In all likelihood, this is a command passed from 1577 * management tools in userspace where no S/G list is 1578 * necessary because no data is being passed. 1579 */ 1580 break; 1581 } 1582 1583 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1584 flags = BUS_DMASYNC_PREREAD; 1585 else 1586 flags = 0; 1587 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1588 flags |= BUS_DMASYNC_PREWRITE; 1589 1590 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1591 ccb->ccb_datasize, flags); 1592 return (0); 1593 } 1594 1595 /* 1596 * Unmap the specified CCB's command block and data buffer (if any) and 1597 * perform DMA synchronisation. 1598 */ 1599 void 1600 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1601 { 1602 int flags, s; 1603 1604 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1605 flags = BUS_DMASYNC_POSTREAD; 1606 else 1607 flags = 0; 1608 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1609 flags |= BUS_DMASYNC_POSTWRITE; 1610 1611 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1612 ccb->ccb_datasize, flags); 1613 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1614 1615 if (ccb->ccb_abuf != (vaddr_t)0) { 1616 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1617 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1618 ccb->ccb_datasize); 1619 s = splvm(); 1620 /* XXX */ 1621 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1622 UVM_KMF_WIRED); 1623 splx(s); 1624 } 1625 } 1626 1627 /* 1628 * Submit a command to the controller and poll on completion. Return 1629 * non-zero on timeout (but don't check status, as some command types don't 1630 * return status). Must be called with interrupts blocked. 1631 */ 1632 int 1633 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1634 { 1635 int rv; 1636 1637 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1638 return (rv); 1639 1640 for (timo *= 1000; timo != 0; timo--) { 1641 twe_poll(sc); 1642 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1643 break; 1644 DELAY(100); 1645 } 1646 1647 return (timo == 0); 1648 } 1649 1650 /* 1651 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1652 * the order that they were enqueued and try to submit their command blocks 1653 * to the controller for execution. 1654 */ 1655 void 1656 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1657 { 1658 int s; 1659 1660 s = splbio(); 1661 1662 if (ccb != NULL) 1663 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1664 1665 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1666 if (twe_ccb_submit(sc, ccb)) 1667 break; 1668 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1669 } 1670 1671 splx(s); 1672 } 1673 1674 /* 1675 * Submit the command block associated with the specified CCB to the 1676 * controller for execution. Must be called with interrupts blocked. 1677 */ 1678 int 1679 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1680 { 1681 bus_addr_t pa; 1682 int rv; 1683 u_int status; 1684 1685 /* Check to see if we can post a command. */ 1686 status = twe_inl(sc, TWE_REG_STS); 1687 twe_status_check(sc, status); 1688 1689 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1690 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1691 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1692 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1693 #ifdef DIAGNOSTIC 1694 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1695 panic("%s: CCB %ld not ALLOCED\n", 1696 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1697 #endif 1698 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1699 pa = sc->sc_cmds_paddr + 1700 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1701 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1702 rv = 0; 1703 } else 1704 rv = EBUSY; 1705 1706 return (rv); 1707 } 1708 1709 1710 /* 1711 * Accept an open operation on the control device. 1712 */ 1713 static int 1714 tweopen(dev_t dev, int flag, int mode, struct proc *p) 1715 { 1716 struct twe_softc *twe; 1717 1718 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1719 return (ENXIO); 1720 if ((twe->sc_flags & TWEF_OPEN) != 0) 1721 return (EBUSY); 1722 1723 twe->sc_flags |= TWEF_OPEN; 1724 return (0); 1725 } 1726 1727 /* 1728 * Accept the last close on the control device. 1729 */ 1730 static int 1731 tweclose(dev_t dev, int flag, int mode, struct proc *p) 1732 { 1733 struct twe_softc *twe; 1734 1735 twe = device_lookup(&twe_cd, minor(dev)); 1736 twe->sc_flags &= ~TWEF_OPEN; 1737 return (0); 1738 } 1739 1740 void 1741 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1742 { 1743 1744 /* Just wake up the sleeper. */ 1745 wakeup(ccb); 1746 } 1747 1748 /* 1749 * Handle control operations. 1750 */ 1751 static int 1752 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1753 { 1754 struct twe_softc *twe; 1755 struct twe_ccb *ccb; 1756 struct twe_param *param; 1757 struct twe_usercommand *tu; 1758 struct twe_paramcommand *tp; 1759 struct twe_drivecommand *td; 1760 void *pdata = NULL; 1761 int s, error = 0; 1762 u_int8_t cmdid; 1763 1764 if (securelevel >= 2) 1765 return (EPERM); 1766 1767 twe = device_lookup(&twe_cd, minor(dev)); 1768 tu = (struct twe_usercommand *)data; 1769 tp = (struct twe_paramcommand *)data; 1770 td = (struct twe_drivecommand *)data; 1771 1772 /* This is intended to be compatible with the FreeBSD interface. */ 1773 switch (cmd) { 1774 case TWEIO_COMMAND: 1775 /* XXX mutex */ 1776 if (tu->tu_size > 0) { 1777 /* 1778 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1779 * it's really necessary, first. 1780 */ 1781 if (tu->tu_size > TWE_SECTOR_SIZE) { 1782 #ifdef TWE_DEBUG 1783 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1784 twe->sc_dv.dv_xname, tu->tu_size); 1785 #endif 1786 return EINVAL; 1787 } 1788 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1789 error = copyin(tu->tu_data, pdata, tu->tu_size); 1790 if (error != 0) 1791 goto done; 1792 ccb = twe_ccb_alloc_wait(twe, 1793 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1794 KASSERT(ccb != NULL); 1795 ccb->ccb_data = pdata; 1796 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1797 } else { 1798 ccb = twe_ccb_alloc_wait(twe, 0); 1799 KASSERT(ccb != NULL); 1800 } 1801 1802 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1803 ccb->ccb_tx.tx_context = NULL; 1804 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1805 1806 cmdid = ccb->ccb_cmdid; 1807 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1808 ccb->ccb_cmd->tc_cmdid = cmdid; 1809 1810 /* Map the transfer. */ 1811 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1812 twe_ccb_free(twe, ccb); 1813 goto done; 1814 } 1815 1816 /* Submit the command and wait up to 1 minute. */ 1817 error = 0; 1818 twe_ccb_enqueue(twe, ccb); 1819 s = splbio(); 1820 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1821 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1822 60 * hz)) != 0) 1823 break; 1824 splx(s); 1825 1826 /* Copy the command back to the ioctl argument. */ 1827 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1828 #ifdef TWE_DEBUG 1829 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1830 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1831 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1832 #endif 1833 1834 s = splbio(); 1835 twe_ccb_free(twe, ccb); 1836 splx(s); 1837 1838 if (tu->tu_size > 0) 1839 error = copyout(pdata, tu->tu_data, tu->tu_size); 1840 goto done; 1841 1842 case TWEIO_STATS: 1843 return (ENOENT); 1844 1845 case TWEIO_AEN_POLL: 1846 s = splbio(); 1847 *(u_int *)data = twe_aen_dequeue(twe); 1848 splx(s); 1849 return (0); 1850 1851 case TWEIO_AEN_WAIT: 1852 s = splbio(); 1853 while ((*(u_int *)data = 1854 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1855 twe->sc_flags |= TWEF_AENQ_WAIT; 1856 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1857 "tweaen", 0); 1858 if (error == EINTR) { 1859 splx(s); 1860 return (error); 1861 } 1862 } 1863 splx(s); 1864 return (0); 1865 1866 case TWEIO_GET_PARAM: 1867 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1868 tp->tp_size, 0, ¶m); 1869 if (error != 0) 1870 return (error); 1871 if (param->tp_param_size > tp->tp_size) { 1872 error = EFAULT; 1873 goto done; 1874 } 1875 error = copyout(param->tp_data, tp->tp_data, 1876 param->tp_param_size); 1877 goto done; 1878 1879 case TWEIO_SET_PARAM: 1880 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1881 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1882 goto done; 1883 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1884 tp->tp_size, pdata); 1885 goto done; 1886 1887 case TWEIO_RESET: 1888 s = splbio(); 1889 twe_reset(twe); 1890 splx(s); 1891 return (0); 1892 1893 case TWEIO_ADD_UNIT: 1894 /* XXX mutex */ 1895 return (twe_add_unit(twe, td->td_unit)); 1896 1897 case TWEIO_DEL_UNIT: 1898 /* XXX mutex */ 1899 return (twe_del_unit(twe, td->td_unit)); 1900 1901 default: 1902 return EINVAL; 1903 } 1904 done: 1905 if (pdata) 1906 free(pdata, M_DEVBUF); 1907 return error; 1908 } 1909 1910 const struct cdevsw twe_cdevsw = { 1911 tweopen, tweclose, noread, nowrite, tweioctl, 1912 nostop, notty, nopoll, nommap, 1913 }; 1914 1915 /* 1916 * Print some information about the controller 1917 */ 1918 static void 1919 twe_describe_controller(struct twe_softc *sc) 1920 { 1921 struct twe_param *p[6]; 1922 int i, rv = 0; 1923 uint32_t dsize; 1924 uint8_t ports; 1925 1926 /* get the port count */ 1927 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1928 TWE_PARAM_CONTROLLER_PortCount, &ports); 1929 1930 /* get version strings */ 1931 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1932 16, NULL, &p[0]); 1933 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1934 16, NULL, &p[1]); 1935 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1936 16, NULL, &p[2]); 1937 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1938 8, NULL, &p[3]); 1939 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1940 8, NULL, &p[4]); 1941 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1942 8, NULL, &p[5]); 1943 1944 if (rv) { 1945 /* some error occurred */ 1946 aprint_error("%s: failed to fetch version information\n", 1947 sc->sc_dv.dv_xname); 1948 return; 1949 } 1950 1951 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1952 sc->sc_dv.dv_xname, ports, 1953 p[1]->tp_data, p[2]->tp_data); 1954 1955 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1956 sc->sc_dv.dv_xname, 1957 p[0]->tp_data, p[3]->tp_data, 1958 p[4]->tp_data, p[5]->tp_data); 1959 1960 free(p[0], M_DEVBUF); 1961 free(p[1], M_DEVBUF); 1962 free(p[2], M_DEVBUF); 1963 free(p[3], M_DEVBUF); 1964 free(p[4], M_DEVBUF); 1965 free(p[5], M_DEVBUF); 1966 1967 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1968 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1969 if (rv) { 1970 aprint_error("%s: failed to get drive status summary\n", 1971 sc->sc_dv.dv_xname); 1972 return; 1973 } 1974 for (i = 0; i < ports; i++) { 1975 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1976 continue; 1977 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1978 TWE_PARAM_DRIVEINFO_Size, &dsize); 1979 if (rv) { 1980 aprint_error( 1981 "%s: unable to get drive size for port %d\n", 1982 sc->sc_dv.dv_xname, i); 1983 continue; 1984 } 1985 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1986 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1987 if (rv) { 1988 aprint_error( 1989 "%s: unable to get drive model for port %d\n", 1990 sc->sc_dv.dv_xname, i); 1991 continue; 1992 } 1993 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 1994 i, p[1]->tp_data, dsize / 2048); 1995 free(p[1], M_DEVBUF); 1996 } 1997 free(p[0], M_DEVBUF); 1998 } 1999
Indexes created Mon Sep 22 05:09:51 GMT 2025