twe.c revision 1.75
1 /* $NetBSD: twe.c,v 1.75 2006/04/11 14:17:09 rpaulo Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.75 2006/04/11 14:17:09 rpaulo Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 89 #include <uvm/uvm_extern.h> 90 91 #include <sys/bswap.h> 92 #include <machine/bus.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 #include <dev/pci/twereg.h> 98 #include <dev/pci/twevar.h> 99 #include <dev/pci/tweio.h> 100 101 #include "locators.h" 102 103 #define PCI_CBIO 0x10 104 105 static int twe_aen_get(struct twe_softc *, uint16_t *); 106 static void twe_aen_handler(struct twe_ccb *, int); 107 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 108 static uint16_t twe_aen_dequeue(struct twe_softc *); 109 110 static void twe_attach(struct device *, struct device *, void *); 111 static int twe_init_connection(struct twe_softc *); 112 static int twe_intr(void *); 113 static int twe_match(struct device *, struct cfdata *, void *); 114 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 115 static void twe_poll(struct twe_softc *); 116 static int twe_print(void *, const char *); 117 static int twe_reset(struct twe_softc *); 118 static int twe_status_check(struct twe_softc *, u_int); 119 static int twe_status_wait(struct twe_softc *, u_int, int); 120 static void twe_describe_controller(struct twe_softc *); 121 static void twe_clear_pci_abort(struct twe_softc *sc); 122 static void twe_clear_pci_parity_error(struct twe_softc *sc); 123 124 static int twe_add_unit(struct twe_softc *, int); 125 static int twe_del_unit(struct twe_softc *, int); 126 127 static inline u_int32_t twe_inl(struct twe_softc *, int); 128 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 129 130 extern struct cfdriver twe_cd; 131 132 CFATTACH_DECL(twe, sizeof(struct twe_softc), 133 twe_match, twe_attach, NULL, NULL); 134 135 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 136 const char twever[] = "1.50.01.002"; 137 138 /* 139 * Tables to convert numeric codes to strings. 140 */ 141 const struct twe_code_table twe_table_status[] = { 142 { 0x00, "successful completion" }, 143 144 /* info */ 145 { 0x42, "command in progress" }, 146 { 0x6c, "retrying interface CRC error from UDMA command" }, 147 148 /* warning */ 149 { 0x81, "redundant/inconsequential request ignored" }, 150 { 0x8e, "failed to write zeroes to LBA 0" }, 151 { 0x8f, "failed to profile TwinStor zones" }, 152 153 /* fatal */ 154 { 0xc1, "aborted due to system command or reconfiguration" }, 155 { 0xc4, "aborted" }, 156 { 0xc5, "access error" }, 157 { 0xc6, "access violation" }, 158 { 0xc7, "device failure" }, /* high byte may be port # */ 159 { 0xc8, "controller error" }, 160 { 0xc9, "timed out" }, 161 { 0xcb, "invalid unit number" }, 162 { 0xcf, "unit not available" }, 163 { 0xd2, "undefined opcode" }, 164 { 0xdb, "request incompatible with unit" }, 165 { 0xdc, "invalid request" }, 166 { 0xff, "firmware error, reset requested" }, 167 168 { 0, NULL } 169 }; 170 171 const struct twe_code_table twe_table_unitstate[] = { 172 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 173 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 174 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 175 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 176 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 177 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 178 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 179 180 { 0, NULL } 181 }; 182 183 const struct twe_code_table twe_table_unittype[] = { 184 /* array descriptor configuration */ 185 { TWE_AD_CONFIG_RAID0, "RAID0" }, 186 { TWE_AD_CONFIG_RAID1, "RAID1" }, 187 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 188 { TWE_AD_CONFIG_RAID5, "RAID5" }, 189 { TWE_AD_CONFIG_RAID10, "RAID10" }, 190 { TWE_UD_CONFIG_JBOD, "JBOD" }, 191 192 { 0, NULL } 193 }; 194 195 const struct twe_code_table twe_table_stripedepth[] = { 196 { TWE_AD_STRIPE_4k, "4K" }, 197 { TWE_AD_STRIPE_8k, "8K" }, 198 { TWE_AD_STRIPE_16k, "16K" }, 199 { TWE_AD_STRIPE_32k, "32K" }, 200 { TWE_AD_STRIPE_64k, "64K" }, 201 { TWE_AD_STRIPE_128k, "128K" }, 202 { TWE_AD_STRIPE_256k, "256K" }, 203 { TWE_AD_STRIPE_512k, "512K" }, 204 { TWE_AD_STRIPE_1024k, "1024K" }, 205 206 { 0, NULL } 207 }; 208 209 /* 210 * Asynchronous event notification messages are qualified: 211 * a - not unit/port specific 212 * u - unit specific 213 * p - port specific 214 * 215 * They are further qualified with a severity: 216 * E - LOG_EMERG 217 * a - LOG_ALERT 218 * c - LOG_CRIT 219 * e - LOG_ERR 220 * w - LOG_WARNING 221 * n - LOG_NOTICE 222 * i - LOG_INFO 223 * d - LOG_DEBUG 224 * blank - just use printf 225 */ 226 const struct twe_code_table twe_table_aen[] = { 227 { 0x00, "a queue empty" }, 228 { 0x01, "a soft reset" }, 229 { 0x02, "uc degraded mode" }, 230 { 0x03, "aa controller error" }, 231 { 0x04, "uE rebuild fail" }, 232 { 0x05, "un rebuild done" }, 233 { 0x06, "ue incomplete unit" }, 234 { 0x07, "un initialization done" }, 235 { 0x08, "uw unclean shutdown detected" }, 236 { 0x09, "pe drive timeout" }, 237 { 0x0a, "pc drive error" }, 238 { 0x0b, "un rebuild started" }, 239 { 0x0c, "un initialization started" }, 240 { 0x0d, "ui logical unit deleted" }, 241 { 0x0f, "pc SMART threshold exceeded" }, 242 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 243 { 0x21, "pe ATA UDMA downgrade" }, 244 { 0x22, "pi ATA UDMA upgrade" }, 245 { 0x23, "pw sector repair occurred" }, 246 { 0x24, "aa SBUF integrity check failure" }, 247 { 0x25, "pa lost cached write" }, 248 { 0x26, "pa drive ECC error detected" }, 249 { 0x27, "pe DCB checksum error" }, 250 { 0x28, "pn DCB unsupported version" }, 251 { 0x29, "ui verify started" }, 252 { 0x2a, "ua verify failed" }, 253 { 0x2b, "ui verify complete" }, 254 { 0x2c, "pw overwrote bad sector during rebuild" }, 255 { 0x2d, "pa encountered bad sector during rebuild" }, 256 { 0x2e, "pe replacement drive too small" }, 257 { 0x2f, "ue array not previously initialized" }, 258 { 0x30, "p drive not supported" }, 259 { 0xff, "a aen queue full" }, 260 261 { 0, NULL }, 262 }; 263 264 const char * 265 twe_describe_code(const struct twe_code_table *table, uint32_t code) 266 { 267 268 for (; table->string != NULL; table++) { 269 if (table->code == code) 270 return (table->string); 271 } 272 return (NULL); 273 } 274 275 static inline u_int32_t 276 twe_inl(struct twe_softc *sc, int off) 277 { 278 279 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 280 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 281 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 282 } 283 284 static inline void 285 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 286 { 287 288 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 289 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 290 BUS_SPACE_BARRIER_WRITE); 291 } 292 293 /* 294 * Match a supported board. 295 */ 296 static int 297 twe_match(struct device *parent, struct cfdata *cfdata, void *aux) 298 { 299 struct pci_attach_args *pa; 300 301 pa = aux; 302 303 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 304 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 305 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 306 } 307 308 /* 309 * Attach a supported board. 310 * 311 * XXX This doesn't fail gracefully. 312 */ 313 static void 314 twe_attach(struct device *parent, struct device *self, void *aux) 315 { 316 struct pci_attach_args *pa; 317 struct twe_softc *sc; 318 pci_chipset_tag_t pc; 319 pci_intr_handle_t ih; 320 pcireg_t csr; 321 const char *intrstr; 322 int s, size, i, rv, rseg; 323 size_t max_segs, max_xfer; 324 bus_dma_segment_t seg; 325 struct ctlname ctlnames[] = CTL_NAMES; 326 const struct sysctlnode *node; 327 struct twe_cmd *tc; 328 struct twe_ccb *ccb; 329 330 sc = (struct twe_softc *)self; 331 pa = aux; 332 pc = pa->pa_pc; 333 sc->sc_dmat = pa->pa_dmat; 334 SIMPLEQ_INIT(&sc->sc_ccb_queue); 335 SLIST_INIT(&sc->sc_ccb_freelist); 336 337 aprint_naive(": RAID controller\n"); 338 aprint_normal(": 3ware Escalade\n"); 339 340 341 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 342 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 343 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 344 return; 345 } 346 347 /* Enable the device. */ 348 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 349 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 350 csr | PCI_COMMAND_MASTER_ENABLE); 351 352 /* Map and establish the interrupt. */ 353 if (pci_intr_map(pa, &ih)) { 354 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 355 return; 356 } 357 358 intrstr = pci_intr_string(pc, ih); 359 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 360 if (sc->sc_ih == NULL) { 361 aprint_error("%s: can't establish interrupt%s%s\n", 362 sc->sc_dv.dv_xname, 363 (intrstr) ? " at " : "", 364 (intrstr) ? intrstr : ""); 365 return; 366 } 367 368 if (intrstr != NULL) 369 aprint_normal("%s: interrupting at %s\n", 370 sc->sc_dv.dv_xname, intrstr); 371 372 /* 373 * Allocate and initialise the command blocks and CCBs. 374 */ 375 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 376 377 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 378 &rseg, BUS_DMA_NOWAIT)) != 0) { 379 aprint_error("%s: unable to allocate commands, rv = %d\n", 380 sc->sc_dv.dv_xname, rv); 381 return; 382 } 383 384 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 385 (caddr_t *)&sc->sc_cmds, 386 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 387 aprint_error("%s: unable to map commands, rv = %d\n", 388 sc->sc_dv.dv_xname, rv); 389 return; 390 } 391 392 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 393 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 394 aprint_error("%s: unable to create command DMA map, rv = %d\n", 395 sc->sc_dv.dv_xname, rv); 396 return; 397 } 398 399 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 400 size, NULL, BUS_DMA_NOWAIT)) != 0) { 401 aprint_error("%s: unable to load command DMA map, rv = %d\n", 402 sc->sc_dv.dv_xname, rv); 403 return; 404 } 405 406 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 407 if (ccb == NULL) { 408 aprint_error("%s: unable to allocate memory for ccbs\n", 409 sc->sc_dv.dv_xname); 410 return; 411 } 412 413 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 414 memset(sc->sc_cmds, 0, size); 415 416 sc->sc_ccbs = ccb; 417 tc = (struct twe_cmd *)sc->sc_cmds; 418 max_segs = twe_get_maxsegs(); 419 max_xfer = twe_get_maxxfer(max_segs); 420 421 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 422 ccb->ccb_cmd = tc; 423 ccb->ccb_cmdid = i; 424 ccb->ccb_flags = 0; 425 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 426 max_segs, PAGE_SIZE, 0, 427 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 428 &ccb->ccb_dmamap_xfer); 429 if (rv != 0) { 430 aprint_error("%s: can't create dmamap, rv = %d\n", 431 sc->sc_dv.dv_xname, rv); 432 return; 433 } 434 435 /* Save the first CCB for AEN retrieval. */ 436 if (i != 0) 437 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 438 ccb_chain.slist); 439 } 440 441 /* Wait for the controller to become ready. */ 442 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 443 aprint_error("%s: microcontroller not ready\n", 444 sc->sc_dv.dv_xname); 445 return; 446 } 447 448 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 449 450 /* Reset the controller. */ 451 s = splbio(); 452 rv = twe_reset(sc); 453 splx(s); 454 if (rv) { 455 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 456 return; 457 } 458 459 /* Initialise connection with controller. */ 460 twe_init_connection(sc); 461 462 twe_describe_controller(sc); 463 464 /* Find and attach RAID array units. */ 465 sc->sc_nunits = 0; 466 for (i = 0; i < TWE_MAX_UNITS; i++) 467 (void) twe_add_unit(sc, i); 468 469 /* ...and finally, enable interrupts. */ 470 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 471 TWE_CTL_UNMASK_RESP_INTR | 472 TWE_CTL_ENABLE_INTRS); 473 474 /* sysctl set-up for 3ware cli */ 475 if (sysctl_createv(NULL, 0, NULL, NULL, 476 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 477 NULL, NULL, 0, NULL, 0, 478 CTL_HW, CTL_EOL) != 0) { 479 printf("%s: could not create %s sysctl node\n", 480 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 481 return; 482 } 483 if (sysctl_createv(NULL, 0, NULL, &node, 484 0, CTLTYPE_NODE, sc->sc_dv.dv_xname, 485 SYSCTL_DESCR("twe driver information"), 486 NULL, 0, NULL, 0, 487 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 488 printf("%s: could not create %s.%s sysctl node\n", 489 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 490 sc->sc_dv.dv_xname); 491 return; 492 } 493 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 494 0, CTLTYPE_STRING, "driver_version", 495 SYSCTL_DESCR("twe0 driver version"), 496 NULL, 0, &twever, 0, 497 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 498 != 0) { 499 printf("%s: could not create %s.%s.driver_version sysctl\n", 500 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 501 sc->sc_dv.dv_xname); 502 return; 503 } 504 } 505 506 void 507 twe_register_callbacks(struct twe_softc *sc, int unit, 508 const struct twe_callbacks *tcb) 509 { 510 511 sc->sc_units[unit].td_callbacks = tcb; 512 } 513 514 static void 515 twe_recompute_openings(struct twe_softc *sc) 516 { 517 struct twe_drive *td; 518 int unit, openings; 519 520 if (sc->sc_nunits != 0) 521 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 522 else 523 openings = 0; 524 if (openings == sc->sc_openings) 525 return; 526 sc->sc_openings = openings; 527 528 #ifdef TWE_DEBUG 529 printf("%s: %d array%s, %d openings per array\n", 530 sc->sc_dv.dv_xname, sc->sc_nunits, 531 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 532 #endif 533 534 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 535 td = &sc->sc_units[unit]; 536 if (td->td_dev != NULL) 537 (*td->td_callbacks->tcb_openings)(td->td_dev, 538 sc->sc_openings); 539 } 540 } 541 542 static int 543 twe_add_unit(struct twe_softc *sc, int unit) 544 { 545 struct twe_param *dtp, *atp; 546 struct twe_array_descriptor *ad; 547 struct twe_drive *td; 548 struct twe_attach_args twea; 549 uint32_t newsize; 550 int rv; 551 uint16_t dsize; 552 uint8_t newtype, newstripe; 553 int locs[TWECF_NLOCS]; 554 555 if (unit < 0 || unit >= TWE_MAX_UNITS) 556 return (EINVAL); 557 558 /* Find attached units. */ 559 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 560 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 561 if (rv != 0) { 562 aprint_error("%s: error %d fetching unit summary\n", 563 sc->sc_dv.dv_xname, rv); 564 return (rv); 565 } 566 567 /* For each detected unit, collect size and store in an array. */ 568 td = &sc->sc_units[unit]; 569 570 /* Unit present? */ 571 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 572 /* 573 * XXX Should we check to see if a device has been 574 * XXX attached at this index and detach it if it 575 * XXX has? ("rescan" semantics) 576 */ 577 rv = 0; 578 goto out; 579 } 580 581 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 582 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 583 if (rv != 0) { 584 aprint_error("%s: error %d fetching descriptor size " 585 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 586 goto out; 587 } 588 589 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 590 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 591 if (rv != 0) { 592 aprint_error("%s: error %d fetching array descriptor " 593 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 594 goto out; 595 } 596 597 ad = (struct twe_array_descriptor *)atp->tp_data; 598 newtype = ad->configuration; 599 newstripe = ad->stripe_size; 600 free(atp, M_DEVBUF); 601 602 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 603 TWE_PARAM_UNITINFO_Capacity, &newsize); 604 if (rv != 0) { 605 aprint_error( 606 "%s: error %d fetching capacity for unit %d\n", 607 sc->sc_dv.dv_xname, rv, unit); 608 goto out; 609 } 610 611 /* 612 * Have a device, so we need to attach it. If there is currently 613 * something sitting at the slot, and the parameters are different, 614 * then we detach the old device before attaching the new one. 615 */ 616 if (td->td_dev != NULL && 617 td->td_size == newsize && 618 td->td_type == newtype && 619 td->td_stripe == newstripe) { 620 /* Same as the old device; just keep using it. */ 621 rv = 0; 622 goto out; 623 } else if (td->td_dev != NULL) { 624 /* Detach the old device first. */ 625 (void) config_detach(td->td_dev, DETACH_FORCE); 626 td->td_dev = NULL; 627 } else if (td->td_size == 0) 628 sc->sc_nunits++; 629 630 /* 631 * Committed to the new array unit; assign its parameters and 632 * recompute the number of available command openings. 633 */ 634 td->td_size = newsize; 635 td->td_type = newtype; 636 td->td_stripe = newstripe; 637 twe_recompute_openings(sc); 638 639 twea.twea_unit = unit; 640 641 locs[TWECF_UNIT] = unit; 642 643 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 644 twe_print, config_stdsubmatch); 645 646 rv = 0; 647 out: 648 free(dtp, M_DEVBUF); 649 return (rv); 650 } 651 652 static int 653 twe_del_unit(struct twe_softc *sc, int unit) 654 { 655 struct twe_drive *td; 656 657 if (unit < 0 || unit >= TWE_MAX_UNITS) 658 return (EINVAL); 659 660 td = &sc->sc_units[unit]; 661 if (td->td_size != 0) 662 sc->sc_nunits--; 663 td->td_size = 0; 664 td->td_type = 0; 665 td->td_stripe = 0; 666 if (td->td_dev != NULL) { 667 (void) config_detach(td->td_dev, DETACH_FORCE); 668 td->td_dev = NULL; 669 } 670 twe_recompute_openings(sc); 671 return (0); 672 } 673 674 /* 675 * Reset the controller. 676 * MUST BE CALLED AT splbio()! 677 */ 678 static int 679 twe_reset(struct twe_softc *sc) 680 { 681 uint16_t aen; 682 u_int status; 683 volatile u_int32_t junk; 684 int got, rv; 685 686 /* Issue a soft reset. */ 687 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 688 TWE_CTL_CLEAR_HOST_INTR | 689 TWE_CTL_CLEAR_ATTN_INTR | 690 TWE_CTL_MASK_CMD_INTR | 691 TWE_CTL_MASK_RESP_INTR | 692 TWE_CTL_CLEAR_ERROR_STS | 693 TWE_CTL_DISABLE_INTRS); 694 695 /* Wait for attention... */ 696 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 697 printf("%s: timeout waiting for attention interrupt\n", 698 sc->sc_dv.dv_xname); 699 return (-1); 700 } 701 702 /* ...and ACK it. */ 703 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 704 705 /* 706 * Pull AENs out of the controller; look for a soft reset AEN. 707 * Open code this, since we want to detect reset even if the 708 * queue for management tools is full. 709 * 710 * Note that since: 711 * - interrupts are blocked 712 * - we have reset the controller 713 * - acknowledged the pending ATTENTION 714 * that there is no way a pending asynchronous AEN fetch would 715 * finish, so clear the flag. 716 */ 717 sc->sc_flags &= ~TWEF_AEN; 718 for (got = 0;;) { 719 rv = twe_aen_get(sc, &aen); 720 if (rv != 0) 721 printf("%s: error %d while draining event queue\n", 722 sc->sc_dv.dv_xname, rv); 723 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 724 break; 725 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 726 got = 1; 727 twe_aen_enqueue(sc, aen, 1); 728 } 729 730 if (!got) { 731 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 732 return (-1); 733 } 734 735 /* Check controller status. */ 736 status = twe_inl(sc, TWE_REG_STS); 737 if (twe_status_check(sc, status)) { 738 printf("%s: controller errors detected\n", 739 sc->sc_dv.dv_xname); 740 return (-1); 741 } 742 743 /* Drain the response queue. */ 744 for (;;) { 745 status = twe_inl(sc, TWE_REG_STS); 746 if (twe_status_check(sc, status) != 0) { 747 printf("%s: can't drain response queue\n", 748 sc->sc_dv.dv_xname); 749 return (-1); 750 } 751 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 752 break; 753 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 754 } 755 756 return (0); 757 } 758 759 /* 760 * Print autoconfiguration message for a sub-device. 761 */ 762 static int 763 twe_print(void *aux, const char *pnp) 764 { 765 struct twe_attach_args *twea; 766 767 twea = aux; 768 769 if (pnp != NULL) 770 aprint_normal("block device at %s", pnp); 771 aprint_normal(" unit %d", twea->twea_unit); 772 return (UNCONF); 773 } 774 775 /* 776 * Interrupt service routine. 777 */ 778 static int 779 twe_intr(void *arg) 780 { 781 struct twe_softc *sc; 782 u_int status; 783 int caught, rv; 784 785 sc = arg; 786 caught = 0; 787 status = twe_inl(sc, TWE_REG_STS); 788 twe_status_check(sc, status); 789 790 /* Host interrupts - purpose unknown. */ 791 if ((status & TWE_STS_HOST_INTR) != 0) { 792 #ifdef DEBUG 793 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 794 #endif 795 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 796 caught = 1; 797 } 798 799 /* 800 * Attention interrupts, signalled when a controller or child device 801 * state change has occurred. 802 */ 803 if ((status & TWE_STS_ATTN_INTR) != 0) { 804 rv = twe_aen_get(sc, NULL); 805 if (rv != 0) 806 printf("%s: unable to retrieve AEN (%d)\n", 807 sc->sc_dv.dv_xname, rv); 808 else 809 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 810 caught = 1; 811 } 812 813 /* 814 * Command interrupts, signalled when the controller can accept more 815 * commands. We don't use this; instead, we try to submit commands 816 * when we receive them, and when other commands have completed. 817 * Mask it so we don't get another one. 818 */ 819 if ((status & TWE_STS_CMD_INTR) != 0) { 820 #ifdef DEBUG 821 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 822 #endif 823 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 824 caught = 1; 825 } 826 827 if ((status & TWE_STS_RESP_INTR) != 0) { 828 twe_poll(sc); 829 caught = 1; 830 } 831 832 return (caught); 833 } 834 835 /* 836 * Fetch an AEN. Even though this is really like parameter 837 * retrieval, we handle this specially, because we issue this 838 * AEN retrieval command from interrupt context, and thus 839 * reserve a CCB for it to avoid resource shortage. 840 * 841 * XXX There are still potential resource shortages we could 842 * XXX encounter. Consider pre-allocating all AEN-related 843 * XXX resources. 844 * 845 * MUST BE CALLED AT splbio()! 846 */ 847 static int 848 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 849 { 850 struct twe_ccb *ccb; 851 struct twe_cmd *tc; 852 struct twe_param *tp; 853 int rv; 854 855 /* 856 * If we're already retrieving an AEN, just wait; another 857 * retrieval will be chained after the current one completes. 858 */ 859 if (sc->sc_flags & TWEF_AEN) { 860 /* 861 * It is a fatal software programming error to attempt 862 * to fetch an AEN synchronously when an AEN fetch is 863 * already pending. 864 */ 865 KASSERT(aenp == NULL); 866 return (0); 867 } 868 869 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 870 if (tp == NULL) 871 return (ENOMEM); 872 873 ccb = twe_ccb_alloc(sc, 874 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 875 KASSERT(ccb != NULL); 876 877 ccb->ccb_data = tp; 878 ccb->ccb_datasize = TWE_SECTOR_SIZE; 879 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 880 ccb->ccb_tx.tx_context = tp; 881 ccb->ccb_tx.tx_dv = &sc->sc_dv; 882 883 tc = ccb->ccb_cmd; 884 tc->tc_size = 2; 885 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 886 tc->tc_unit = 0; 887 tc->tc_count = htole16(1); 888 889 /* Fill in the outbound parameter data. */ 890 tp->tp_table_id = htole16(TWE_PARAM_AEN); 891 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 892 tp->tp_param_size = 2; 893 894 /* Map the transfer. */ 895 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 896 twe_ccb_free(sc, ccb); 897 goto done; 898 } 899 900 /* Enqueue the command and wait. */ 901 if (aenp != NULL) { 902 rv = twe_ccb_poll(sc, ccb, 5); 903 twe_ccb_unmap(sc, ccb); 904 twe_ccb_free(sc, ccb); 905 if (rv == 0) 906 *aenp = le16toh(*(uint16_t *)tp->tp_data); 907 free(tp, M_DEVBUF); 908 } else { 909 sc->sc_flags |= TWEF_AEN; 910 twe_ccb_enqueue(sc, ccb); 911 rv = 0; 912 } 913 914 done: 915 return (rv); 916 } 917 918 /* 919 * Handle an AEN returned by the controller. 920 * MUST BE CALLED AT splbio()! 921 */ 922 static void 923 twe_aen_handler(struct twe_ccb *ccb, int error) 924 { 925 struct twe_softc *sc; 926 struct twe_param *tp; 927 uint16_t aen; 928 int rv; 929 930 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 931 tp = ccb->ccb_tx.tx_context; 932 twe_ccb_unmap(sc, ccb); 933 934 sc->sc_flags &= ~TWEF_AEN; 935 936 if (error) { 937 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 938 aen = TWE_AEN_QUEUE_EMPTY; 939 } else 940 aen = le16toh(*(u_int16_t *)tp->tp_data); 941 free(tp, M_DEVBUF); 942 twe_ccb_free(sc, ccb); 943 944 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 945 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 946 return; 947 } 948 949 twe_aen_enqueue(sc, aen, 0); 950 951 /* 952 * Chain another retrieval in case interrupts have been 953 * coalesced. 954 */ 955 rv = twe_aen_get(sc, NULL); 956 if (rv != 0) 957 printf("%s: unable to retrieve AEN (%d)\n", 958 sc->sc_dv.dv_xname, rv); 959 } 960 961 static void 962 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 963 { 964 const char *str, *msg; 965 int s, next, nextnext, level; 966 967 /* 968 * First report the AEN on the console. Maybe. 969 */ 970 if (! quiet) { 971 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 972 if (str == NULL) { 973 printf("%s: unknown AEN 0x%04x\n", 974 sc->sc_dv.dv_xname, aen); 975 } else { 976 msg = str + 3; 977 switch (str[1]) { 978 case 'E': level = LOG_EMERG; break; 979 case 'a': level = LOG_ALERT; break; 980 case 'c': level = LOG_CRIT; break; 981 case 'e': level = LOG_ERR; break; 982 case 'w': level = LOG_WARNING; break; 983 case 'n': level = LOG_NOTICE; break; 984 case 'i': level = LOG_INFO; break; 985 case 'd': level = LOG_DEBUG; break; 986 default: 987 /* Don't use syslog. */ 988 level = -1; 989 } 990 991 if (level < 0) { 992 switch (str[0]) { 993 case 'u': 994 case 'p': 995 printf("%s: %s %d: %s\n", 996 sc->sc_dv.dv_xname, 997 str[0] == 'u' ? "unit" : "port", 998 TWE_AEN_UNIT(aen), msg); 999 break; 1000 1001 default: 1002 printf("%s: %s\n", 1003 sc->sc_dv.dv_xname, msg); 1004 } 1005 } else { 1006 switch (str[0]) { 1007 case 'u': 1008 case 'p': 1009 log(level, "%s: %s %d: %s\n", 1010 sc->sc_dv.dv_xname, 1011 str[0] == 'u' ? "unit" : "port", 1012 TWE_AEN_UNIT(aen), msg); 1013 break; 1014 1015 default: 1016 log(level, "%s: %s\n", 1017 sc->sc_dv.dv_xname, msg); 1018 } 1019 } 1020 } 1021 } 1022 1023 /* Now enqueue the AEN for mangement tools. */ 1024 s = splbio(); 1025 1026 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1027 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1028 1029 /* 1030 * If this is the last free slot, then queue up a "queue 1031 * full" message. 1032 */ 1033 if (nextnext == sc->sc_aen_tail) 1034 aen = TWE_AEN_QUEUE_FULL; 1035 1036 if (next != sc->sc_aen_tail) { 1037 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1038 sc->sc_aen_head = next; 1039 } 1040 1041 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1042 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1043 wakeup(&sc->sc_aen_queue); 1044 } 1045 1046 splx(s); 1047 } 1048 1049 /* NOTE: Must be called at splbio(). */ 1050 static uint16_t 1051 twe_aen_dequeue(struct twe_softc *sc) 1052 { 1053 uint16_t aen; 1054 1055 if (sc->sc_aen_tail == sc->sc_aen_head) 1056 aen = TWE_AEN_QUEUE_EMPTY; 1057 else { 1058 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1059 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1060 } 1061 1062 return (aen); 1063 } 1064 1065 /* 1066 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1067 * fetch 1, 2, and 4 byte parameter values, respectively. 1068 */ 1069 int 1070 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1071 uint8_t *valp) 1072 { 1073 struct twe_param *tp; 1074 int rv; 1075 1076 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1077 if (rv != 0) 1078 return (rv); 1079 *valp = *(uint8_t *)tp->tp_data; 1080 free(tp, M_DEVBUF); 1081 return (0); 1082 } 1083 1084 int 1085 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1086 uint16_t *valp) 1087 { 1088 struct twe_param *tp; 1089 int rv; 1090 1091 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1092 if (rv != 0) 1093 return (rv); 1094 *valp = le16toh(*(uint16_t *)tp->tp_data); 1095 free(tp, M_DEVBUF); 1096 return (0); 1097 } 1098 1099 int 1100 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1101 uint32_t *valp) 1102 { 1103 struct twe_param *tp; 1104 int rv; 1105 1106 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1107 if (rv != 0) 1108 return (rv); 1109 *valp = le32toh(*(uint32_t *)tp->tp_data); 1110 free(tp, M_DEVBUF); 1111 return (0); 1112 } 1113 1114 /* 1115 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1116 * it will be called with generated context when the command has completed. 1117 * If no callback is provided, the command will be executed synchronously 1118 * and a pointer to a buffer containing the data returned. 1119 * 1120 * The caller or callback is responsible for freeing the buffer. 1121 * 1122 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1123 */ 1124 int 1125 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1126 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1127 { 1128 struct twe_ccb *ccb; 1129 struct twe_cmd *tc; 1130 struct twe_param *tp; 1131 int rv, s; 1132 1133 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1134 if (tp == NULL) 1135 return ENOMEM; 1136 1137 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1138 KASSERT(ccb != NULL); 1139 1140 ccb->ccb_data = tp; 1141 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1142 ccb->ccb_tx.tx_handler = func; 1143 ccb->ccb_tx.tx_context = tp; 1144 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1145 1146 tc = ccb->ccb_cmd; 1147 tc->tc_size = 2; 1148 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1149 tc->tc_unit = 0; 1150 tc->tc_count = htole16(1); 1151 1152 /* Fill in the outbound parameter data. */ 1153 tp->tp_table_id = htole16(table_id); 1154 tp->tp_param_id = param_id; 1155 tp->tp_param_size = size; 1156 1157 /* Map the transfer. */ 1158 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1159 twe_ccb_free(sc, ccb); 1160 goto done; 1161 } 1162 1163 /* Submit the command and either wait or let the callback handle it. */ 1164 if (func == NULL) { 1165 s = splbio(); 1166 rv = twe_ccb_poll(sc, ccb, 5); 1167 twe_ccb_unmap(sc, ccb); 1168 twe_ccb_free(sc, ccb); 1169 splx(s); 1170 } else { 1171 #ifdef DEBUG 1172 if (pbuf != NULL) 1173 panic("both func and pbuf defined"); 1174 #endif 1175 twe_ccb_enqueue(sc, ccb); 1176 return 0; 1177 } 1178 1179 done: 1180 if (pbuf == NULL || rv != 0) 1181 free(tp, M_DEVBUF); 1182 else if (pbuf != NULL && rv == 0) 1183 *pbuf = tp; 1184 return rv; 1185 } 1186 1187 /* 1188 * Execute a TWE_OP_SET_PARAM command. 1189 * 1190 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1191 */ 1192 static int 1193 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1194 void *sbuf) 1195 { 1196 struct twe_ccb *ccb; 1197 struct twe_cmd *tc; 1198 struct twe_param *tp; 1199 int rv, s; 1200 1201 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1202 if (tp == NULL) 1203 return ENOMEM; 1204 1205 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1206 KASSERT(ccb != NULL); 1207 1208 ccb->ccb_data = tp; 1209 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1210 ccb->ccb_tx.tx_handler = 0; 1211 ccb->ccb_tx.tx_context = tp; 1212 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1213 1214 tc = ccb->ccb_cmd; 1215 tc->tc_size = 2; 1216 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1217 tc->tc_unit = 0; 1218 tc->tc_count = htole16(1); 1219 1220 /* Fill in the outbound parameter data. */ 1221 tp->tp_table_id = htole16(table_id); 1222 tp->tp_param_id = param_id; 1223 tp->tp_param_size = size; 1224 memcpy(tp->tp_data, sbuf, size); 1225 1226 /* Map the transfer. */ 1227 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1228 twe_ccb_free(sc, ccb); 1229 goto done; 1230 } 1231 1232 /* Submit the command and wait. */ 1233 s = splbio(); 1234 rv = twe_ccb_poll(sc, ccb, 5); 1235 twe_ccb_unmap(sc, ccb); 1236 twe_ccb_free(sc, ccb); 1237 splx(s); 1238 done: 1239 free(tp, M_DEVBUF); 1240 return (rv); 1241 } 1242 1243 /* 1244 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1245 * Must be called with interrupts blocked. 1246 */ 1247 static int 1248 twe_init_connection(struct twe_softc *sc) 1249 /*###762 [cc] warning: `twe_init_connection' was used with no prototype before its definition%%%*/ 1250 /*###762 [cc] warning: `twe_init_connection' was declared implicitly `extern' and later `static'%%%*/ 1251 { 1252 struct twe_ccb *ccb; 1253 struct twe_cmd *tc; 1254 int rv; 1255 1256 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1257 return (EAGAIN); 1258 1259 /* Build the command. */ 1260 tc = ccb->ccb_cmd; 1261 tc->tc_size = 3; 1262 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1263 tc->tc_unit = 0; 1264 tc->tc_count = htole16(TWE_MAX_CMDS); 1265 tc->tc_args.init_connection.response_queue_pointer = 0; 1266 1267 /* Submit the command for immediate execution. */ 1268 rv = twe_ccb_poll(sc, ccb, 5); 1269 twe_ccb_free(sc, ccb); 1270 return (rv); 1271 } 1272 1273 /* 1274 * Poll the controller for completed commands. Must be called with 1275 * interrupts blocked. 1276 */ 1277 static void 1278 twe_poll(struct twe_softc *sc) 1279 { 1280 struct twe_ccb *ccb; 1281 int found; 1282 u_int status, cmdid; 1283 1284 found = 0; 1285 1286 for (;;) { 1287 status = twe_inl(sc, TWE_REG_STS); 1288 twe_status_check(sc, status); 1289 1290 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1291 break; 1292 1293 found = 1; 1294 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1295 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1296 if (cmdid >= TWE_MAX_QUEUECNT) { 1297 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1298 continue; 1299 } 1300 1301 ccb = sc->sc_ccbs + cmdid; 1302 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1303 printf("%s: CCB for cmdid %d not active\n", 1304 sc->sc_dv.dv_xname, cmdid); 1305 continue; 1306 } 1307 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1308 1309 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1310 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1311 sizeof(struct twe_cmd), 1312 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1313 1314 /* Pass notification to upper layers. */ 1315 if (ccb->ccb_tx.tx_handler != NULL) 1316 (*ccb->ccb_tx.tx_handler)(ccb, 1317 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1318 } 1319 1320 /* If any commands have completed, run the software queue. */ 1321 if (found) 1322 twe_ccb_enqueue(sc, NULL); 1323 } 1324 1325 /* 1326 * Wait for `status' to be set in the controller status register. Return 1327 * zero if found, non-zero if the operation timed out. 1328 */ 1329 static int 1330 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1331 { 1332 1333 for (timo *= 10; timo != 0; timo--) { 1334 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1335 break; 1336 delay(100000); 1337 } 1338 1339 return (timo == 0); 1340 } 1341 1342 /* 1343 * Clear a PCI parity error. 1344 */ 1345 static void 1346 twe_clear_pci_parity_error(struct twe_softc *sc) 1347 { 1348 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1349 1350 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1351 } 1352 1353 1354 /* 1355 * Clear a PCI abort. 1356 */ 1357 static void 1358 twe_clear_pci_abort(struct twe_softc *sc) 1359 { 1360 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1361 1362 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1363 } 1364 1365 /* 1366 * Complain if the status bits aren't what we expect. 1367 */ 1368 static int 1369 twe_status_check(struct twe_softc *sc, u_int status) 1370 { 1371 int rv; 1372 1373 rv = 0; 1374 1375 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1376 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1377 status & ~TWE_STS_EXPECTED_BITS); 1378 rv = -1; 1379 } 1380 1381 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1382 printf("%s: unexpected status bits: 0x%08x\n", 1383 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1384 rv = -1; 1385 if (status & TWE_STS_PCI_PARITY_ERROR) { 1386 printf("%s: PCI parity error: Reseat card, move card " 1387 "or buggy device present.\n", 1388 sc->sc_dv.dv_xname); 1389 twe_clear_pci_parity_error(sc); 1390 } 1391 if (status & TWE_STS_PCI_ABORT) { 1392 printf("%s: PCI abort, clearing.\n", 1393 sc->sc_dv.dv_xname); 1394 twe_clear_pci_abort(sc); 1395 } 1396 } 1397 1398 return (rv); 1399 } 1400 1401 /* 1402 * Allocate and initialise a CCB. 1403 */ 1404 static inline void 1405 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1406 { 1407 struct twe_cmd *tc; 1408 1409 ccb->ccb_tx.tx_handler = NULL; 1410 ccb->ccb_flags = flags; 1411 tc = ccb->ccb_cmd; 1412 tc->tc_status = 0; 1413 tc->tc_flags = 0; 1414 tc->tc_cmdid = ccb->ccb_cmdid; 1415 } 1416 1417 struct twe_ccb * 1418 twe_ccb_alloc(struct twe_softc *sc, int flags) 1419 { 1420 struct twe_ccb *ccb; 1421 int s; 1422 1423 s = splbio(); 1424 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1425 /* Use the reserved CCB. */ 1426 ccb = sc->sc_ccbs; 1427 } else { 1428 /* Allocate a CCB and command block. */ 1429 if (__predict_false((ccb = 1430 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1431 splx(s); 1432 return (NULL); 1433 } 1434 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1435 } 1436 #ifdef DIAGNOSTIC 1437 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1438 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1439 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1440 panic("twe_ccb_alloc: CCB %ld already allocated", 1441 (long)(ccb - sc->sc_ccbs)); 1442 flags |= TWE_CCB_ALLOCED; 1443 #endif 1444 splx(s); 1445 1446 twe_ccb_init(sc, ccb, flags); 1447 return (ccb); 1448 } 1449 1450 struct twe_ccb * 1451 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1452 { 1453 struct twe_ccb *ccb; 1454 int s; 1455 1456 KASSERT((flags & TWE_CCB_AEN) == 0); 1457 1458 s = splbio(); 1459 while (__predict_false((ccb = 1460 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1461 sc->sc_flags |= TWEF_WAIT_CCB; 1462 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1463 } 1464 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1465 #ifdef DIAGNOSTIC 1466 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1467 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1468 (long)(ccb - sc->sc_ccbs)); 1469 flags |= TWE_CCB_ALLOCED; 1470 #endif 1471 splx(s); 1472 1473 twe_ccb_init(sc, ccb, flags); 1474 return (ccb); 1475 } 1476 1477 /* 1478 * Free a CCB. 1479 */ 1480 void 1481 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1482 { 1483 int s; 1484 1485 s = splbio(); 1486 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1487 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1488 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1489 sc->sc_flags &= ~TWEF_WAIT_CCB; 1490 wakeup(&sc->sc_ccb_freelist); 1491 } 1492 } 1493 ccb->ccb_flags = 0; 1494 splx(s); 1495 } 1496 1497 /* 1498 * Map the specified CCB's command block and data buffer (if any) into 1499 * controller visible space. Perform DMA synchronisation. 1500 */ 1501 int 1502 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1503 { 1504 struct twe_cmd *tc; 1505 int flags, nsegs, i, s, rv; 1506 void *data; 1507 1508 /* 1509 * The data as a whole must be 512-byte aligned. 1510 */ 1511 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1512 s = splvm(); 1513 /* XXX */ 1514 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1515 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1516 splx(s); 1517 data = (void *)ccb->ccb_abuf; 1518 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1519 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1520 } else { 1521 ccb->ccb_abuf = (vaddr_t)0; 1522 data = ccb->ccb_data; 1523 } 1524 1525 /* 1526 * Map the data buffer into bus space and build the S/G list. 1527 */ 1528 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1529 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1530 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1531 BUS_DMA_READ : BUS_DMA_WRITE)); 1532 if (rv != 0) { 1533 if (ccb->ccb_abuf != (vaddr_t)0) { 1534 s = splvm(); 1535 /* XXX */ 1536 uvm_km_free(kmem_map, ccb->ccb_abuf, 1537 ccb->ccb_datasize, UVM_KMF_WIRED); 1538 splx(s); 1539 } 1540 return (rv); 1541 } 1542 1543 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1544 tc = ccb->ccb_cmd; 1545 tc->tc_size += 2 * nsegs; 1546 1547 /* The location of the S/G list is dependant upon command type. */ 1548 switch (tc->tc_opcode >> 5) { 1549 case 2: 1550 for (i = 0; i < nsegs; i++) { 1551 tc->tc_args.param.sgl[i].tsg_address = 1552 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1553 tc->tc_args.param.sgl[i].tsg_length = 1554 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1555 } 1556 /* XXX Needed? */ 1557 for (; i < TWE_SG_SIZE; i++) { 1558 tc->tc_args.param.sgl[i].tsg_address = 0; 1559 tc->tc_args.param.sgl[i].tsg_length = 0; 1560 } 1561 break; 1562 case 3: 1563 for (i = 0; i < nsegs; i++) { 1564 tc->tc_args.io.sgl[i].tsg_address = 1565 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1566 tc->tc_args.io.sgl[i].tsg_length = 1567 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1568 } 1569 /* XXX Needed? */ 1570 for (; i < TWE_SG_SIZE; i++) { 1571 tc->tc_args.io.sgl[i].tsg_address = 0; 1572 tc->tc_args.io.sgl[i].tsg_length = 0; 1573 } 1574 break; 1575 default: 1576 /* 1577 * In all likelihood, this is a command passed from 1578 * management tools in userspace where no S/G list is 1579 * necessary because no data is being passed. 1580 */ 1581 break; 1582 } 1583 1584 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1585 flags = BUS_DMASYNC_PREREAD; 1586 else 1587 flags = 0; 1588 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1589 flags |= BUS_DMASYNC_PREWRITE; 1590 1591 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1592 ccb->ccb_datasize, flags); 1593 return (0); 1594 } 1595 1596 /* 1597 * Unmap the specified CCB's command block and data buffer (if any) and 1598 * perform DMA synchronisation. 1599 */ 1600 void 1601 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1602 { 1603 int flags, s; 1604 1605 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1606 flags = BUS_DMASYNC_POSTREAD; 1607 else 1608 flags = 0; 1609 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1610 flags |= BUS_DMASYNC_POSTWRITE; 1611 1612 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1613 ccb->ccb_datasize, flags); 1614 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1615 1616 if (ccb->ccb_abuf != (vaddr_t)0) { 1617 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1618 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1619 ccb->ccb_datasize); 1620 s = splvm(); 1621 /* XXX */ 1622 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1623 UVM_KMF_WIRED); 1624 splx(s); 1625 } 1626 } 1627 1628 /* 1629 * Submit a command to the controller and poll on completion. Return 1630 * non-zero on timeout (but don't check status, as some command types don't 1631 * return status). Must be called with interrupts blocked. 1632 */ 1633 int 1634 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1635 { 1636 int rv; 1637 1638 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1639 return (rv); 1640 1641 for (timo *= 1000; timo != 0; timo--) { 1642 twe_poll(sc); 1643 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1644 break; 1645 DELAY(100); 1646 } 1647 1648 return (timo == 0); 1649 } 1650 1651 /* 1652 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1653 * the order that they were enqueued and try to submit their command blocks 1654 * to the controller for execution. 1655 */ 1656 void 1657 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1658 { 1659 int s; 1660 1661 s = splbio(); 1662 1663 if (ccb != NULL) 1664 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1665 1666 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1667 if (twe_ccb_submit(sc, ccb)) 1668 break; 1669 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1670 } 1671 1672 splx(s); 1673 } 1674 1675 /* 1676 * Submit the command block associated with the specified CCB to the 1677 * controller for execution. Must be called with interrupts blocked. 1678 */ 1679 int 1680 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1681 { 1682 bus_addr_t pa; 1683 int rv; 1684 u_int status; 1685 1686 /* Check to see if we can post a command. */ 1687 status = twe_inl(sc, TWE_REG_STS); 1688 twe_status_check(sc, status); 1689 1690 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1691 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1692 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1693 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1694 #ifdef DIAGNOSTIC 1695 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1696 panic("%s: CCB %ld not ALLOCED\n", 1697 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1698 #endif 1699 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1700 pa = sc->sc_cmds_paddr + 1701 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1702 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1703 rv = 0; 1704 } else 1705 rv = EBUSY; 1706 1707 return (rv); 1708 } 1709 1710 1711 /* 1712 * Accept an open operation on the control device. 1713 */ 1714 static int 1715 tweopen(dev_t dev, int flag, int mode, struct lwp *l) 1716 { 1717 struct twe_softc *twe; 1718 1719 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1720 return (ENXIO); 1721 if ((twe->sc_flags & TWEF_OPEN) != 0) 1722 return (EBUSY); 1723 1724 twe->sc_flags |= TWEF_OPEN; 1725 return (0); 1726 } 1727 1728 /* 1729 * Accept the last close on the control device. 1730 */ 1731 static int 1732 tweclose(dev_t dev, int flag, int mode, struct lwp *l) 1733 { 1734 struct twe_softc *twe; 1735 1736 twe = device_lookup(&twe_cd, minor(dev)); 1737 twe->sc_flags &= ~TWEF_OPEN; 1738 return (0); 1739 } 1740 1741 void 1742 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1743 { 1744 1745 /* Just wake up the sleeper. */ 1746 wakeup(ccb); 1747 } 1748 1749 /* 1750 * Handle control operations. 1751 */ 1752 static int 1753 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1754 { 1755 struct twe_softc *twe; 1756 struct twe_ccb *ccb; 1757 struct twe_param *param; 1758 struct twe_usercommand *tu; 1759 struct twe_paramcommand *tp; 1760 struct twe_drivecommand *td; 1761 void *pdata = NULL; 1762 int s, error = 0; 1763 u_int8_t cmdid; 1764 1765 if (securelevel >= 2) 1766 return (EPERM); 1767 1768 twe = device_lookup(&twe_cd, minor(dev)); 1769 tu = (struct twe_usercommand *)data; 1770 tp = (struct twe_paramcommand *)data; 1771 td = (struct twe_drivecommand *)data; 1772 1773 /* This is intended to be compatible with the FreeBSD interface. */ 1774 switch (cmd) { 1775 case TWEIO_COMMAND: 1776 /* XXX mutex */ 1777 if (tu->tu_size > 0) { 1778 /* 1779 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1780 * it's really necessary, first. 1781 */ 1782 if (tu->tu_size > TWE_SECTOR_SIZE) { 1783 #ifdef TWE_DEBUG 1784 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1785 twe->sc_dv.dv_xname, tu->tu_size); 1786 #endif 1787 return EINVAL; 1788 } 1789 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1790 error = copyin(tu->tu_data, pdata, tu->tu_size); 1791 if (error != 0) 1792 goto done; 1793 ccb = twe_ccb_alloc_wait(twe, 1794 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1795 KASSERT(ccb != NULL); 1796 ccb->ccb_data = pdata; 1797 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1798 } else { 1799 ccb = twe_ccb_alloc_wait(twe, 0); 1800 KASSERT(ccb != NULL); 1801 } 1802 1803 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1804 ccb->ccb_tx.tx_context = NULL; 1805 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1806 1807 cmdid = ccb->ccb_cmdid; 1808 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1809 ccb->ccb_cmd->tc_cmdid = cmdid; 1810 1811 /* Map the transfer. */ 1812 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1813 twe_ccb_free(twe, ccb); 1814 goto done; 1815 } 1816 1817 /* Submit the command and wait up to 1 minute. */ 1818 error = 0; 1819 twe_ccb_enqueue(twe, ccb); 1820 s = splbio(); 1821 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1822 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1823 60 * hz)) != 0) 1824 break; 1825 splx(s); 1826 1827 /* Copy the command back to the ioctl argument. */ 1828 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1829 #ifdef TWE_DEBUG 1830 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1831 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1832 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1833 #endif 1834 1835 s = splbio(); 1836 twe_ccb_free(twe, ccb); 1837 splx(s); 1838 1839 if (tu->tu_size > 0) 1840 error = copyout(pdata, tu->tu_data, tu->tu_size); 1841 goto done; 1842 1843 case TWEIO_STATS: 1844 return (ENOENT); 1845 1846 case TWEIO_AEN_POLL: 1847 s = splbio(); 1848 *(u_int *)data = twe_aen_dequeue(twe); 1849 splx(s); 1850 return (0); 1851 1852 case TWEIO_AEN_WAIT: 1853 s = splbio(); 1854 while ((*(u_int *)data = 1855 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1856 twe->sc_flags |= TWEF_AENQ_WAIT; 1857 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1858 "tweaen", 0); 1859 if (error == EINTR) { 1860 splx(s); 1861 return (error); 1862 } 1863 } 1864 splx(s); 1865 return (0); 1866 1867 case TWEIO_GET_PARAM: 1868 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1869 tp->tp_size, 0, ¶m); 1870 if (error != 0) 1871 return (error); 1872 if (param->tp_param_size > tp->tp_size) { 1873 error = EFAULT; 1874 goto done; 1875 } 1876 error = copyout(param->tp_data, tp->tp_data, 1877 param->tp_param_size); 1878 free(param, M_DEVBUF); 1879 goto done; 1880 1881 case TWEIO_SET_PARAM: 1882 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1883 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1884 goto done; 1885 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1886 tp->tp_size, pdata); 1887 goto done; 1888 1889 case TWEIO_RESET: 1890 s = splbio(); 1891 twe_reset(twe); 1892 splx(s); 1893 return (0); 1894 1895 case TWEIO_ADD_UNIT: 1896 /* XXX mutex */ 1897 return (twe_add_unit(twe, td->td_unit)); 1898 1899 case TWEIO_DEL_UNIT: 1900 /* XXX mutex */ 1901 return (twe_del_unit(twe, td->td_unit)); 1902 1903 default: 1904 return EINVAL; 1905 } 1906 done: 1907 if (pdata) 1908 free(pdata, M_DEVBUF); 1909 return error; 1910 } 1911 1912 const struct cdevsw twe_cdevsw = { 1913 tweopen, tweclose, noread, nowrite, tweioctl, 1914 nostop, notty, nopoll, nommap, 1915 }; 1916 1917 /* 1918 * Print some information about the controller 1919 */ 1920 static void 1921 twe_describe_controller(struct twe_softc *sc) 1922 { 1923 struct twe_param *p[6]; 1924 int i, rv = 0; 1925 uint32_t dsize; 1926 uint8_t ports; 1927 1928 /* get the port count */ 1929 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1930 TWE_PARAM_CONTROLLER_PortCount, &ports); 1931 1932 /* get version strings */ 1933 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1934 16, NULL, &p[0]); 1935 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1936 16, NULL, &p[1]); 1937 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1938 16, NULL, &p[2]); 1939 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1940 8, NULL, &p[3]); 1941 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1942 8, NULL, &p[4]); 1943 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1944 8, NULL, &p[5]); 1945 1946 if (rv) { 1947 /* some error occurred */ 1948 aprint_error("%s: failed to fetch version information\n", 1949 sc->sc_dv.dv_xname); 1950 return; 1951 } 1952 1953 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1954 sc->sc_dv.dv_xname, ports, 1955 p[1]->tp_data, p[2]->tp_data); 1956 1957 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1958 sc->sc_dv.dv_xname, 1959 p[0]->tp_data, p[3]->tp_data, 1960 p[4]->tp_data, p[5]->tp_data); 1961 1962 free(p[0], M_DEVBUF); 1963 free(p[1], M_DEVBUF); 1964 free(p[2], M_DEVBUF); 1965 free(p[3], M_DEVBUF); 1966 free(p[4], M_DEVBUF); 1967 free(p[5], M_DEVBUF); 1968 1969 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1970 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1971 if (rv) { 1972 aprint_error("%s: failed to get drive status summary\n", 1973 sc->sc_dv.dv_xname); 1974 return; 1975 } 1976 for (i = 0; i < ports; i++) { 1977 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1978 continue; 1979 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1980 TWE_PARAM_DRIVEINFO_Size, &dsize); 1981 if (rv) { 1982 aprint_error( 1983 "%s: unable to get drive size for port %d\n", 1984 sc->sc_dv.dv_xname, i); 1985 continue; 1986 } 1987 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1988 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1989 if (rv) { 1990 aprint_error( 1991 "%s: unable to get drive model for port %d\n", 1992 sc->sc_dv.dv_xname, i); 1993 continue; 1994 } 1995 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 1996 i, p[1]->tp_data, dsize / 2048); 1997 free(p[1], M_DEVBUF); 1998 } 1999 free(p[0], M_DEVBUF); 2000 } 2001
Indexes created Tue Sep 23 14:10:03 GMT 2025