twe.c revision 1.78
1 /* $NetBSD: twe.c,v 1.78 2006/09/03 07:05:16 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.78 2006/09/03 07:05:16 christos Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 89 #include <uvm/uvm_extern.h> 90 91 #include <sys/bswap.h> 92 #include <machine/bus.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 #include <dev/pci/twereg.h> 98 #include <dev/pci/twevar.h> 99 #include <dev/pci/tweio.h> 100 101 #include "locators.h" 102 103 #define PCI_CBIO 0x10 104 105 static int twe_aen_get(struct twe_softc *, uint16_t *); 106 static void twe_aen_handler(struct twe_ccb *, int); 107 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 108 static uint16_t twe_aen_dequeue(struct twe_softc *); 109 110 static void twe_attach(struct device *, struct device *, void *); 111 static int twe_init_connection(struct twe_softc *); 112 static int twe_intr(void *); 113 static int twe_match(struct device *, struct cfdata *, void *); 114 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 115 static void twe_poll(struct twe_softc *); 116 static int twe_print(void *, const char *); 117 static int twe_reset(struct twe_softc *); 118 static int twe_status_check(struct twe_softc *, u_int); 119 static int twe_status_wait(struct twe_softc *, u_int, int); 120 static void twe_describe_controller(struct twe_softc *); 121 static void twe_clear_pci_abort(struct twe_softc *sc); 122 static void twe_clear_pci_parity_error(struct twe_softc *sc); 123 124 static int twe_add_unit(struct twe_softc *, int); 125 static int twe_del_unit(struct twe_softc *, int); 126 static int twe_init_connection(struct twe_softc *); 127 128 static inline u_int32_t twe_inl(struct twe_softc *, int); 129 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 130 131 extern struct cfdriver twe_cd; 132 133 CFATTACH_DECL(twe, sizeof(struct twe_softc), 134 twe_match, twe_attach, NULL, NULL); 135 136 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 137 const char twever[] = "1.50.01.002"; 138 139 /* 140 * Tables to convert numeric codes to strings. 141 */ 142 const struct twe_code_table twe_table_status[] = { 143 { 0x00, "successful completion" }, 144 145 /* info */ 146 { 0x42, "command in progress" }, 147 { 0x6c, "retrying interface CRC error from UDMA command" }, 148 149 /* warning */ 150 { 0x81, "redundant/inconsequential request ignored" }, 151 { 0x8e, "failed to write zeroes to LBA 0" }, 152 { 0x8f, "failed to profile TwinStor zones" }, 153 154 /* fatal */ 155 { 0xc1, "aborted due to system command or reconfiguration" }, 156 { 0xc4, "aborted" }, 157 { 0xc5, "access error" }, 158 { 0xc6, "access violation" }, 159 { 0xc7, "device failure" }, /* high byte may be port # */ 160 { 0xc8, "controller error" }, 161 { 0xc9, "timed out" }, 162 { 0xcb, "invalid unit number" }, 163 { 0xcf, "unit not available" }, 164 { 0xd2, "undefined opcode" }, 165 { 0xdb, "request incompatible with unit" }, 166 { 0xdc, "invalid request" }, 167 { 0xff, "firmware error, reset requested" }, 168 169 { 0, NULL } 170 }; 171 172 const struct twe_code_table twe_table_unitstate[] = { 173 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 174 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 175 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 176 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 177 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 178 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 179 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 180 181 { 0, NULL } 182 }; 183 184 const struct twe_code_table twe_table_unittype[] = { 185 /* array descriptor configuration */ 186 { TWE_AD_CONFIG_RAID0, "RAID0" }, 187 { TWE_AD_CONFIG_RAID1, "RAID1" }, 188 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 189 { TWE_AD_CONFIG_RAID5, "RAID5" }, 190 { TWE_AD_CONFIG_RAID10, "RAID10" }, 191 { TWE_UD_CONFIG_JBOD, "JBOD" }, 192 193 { 0, NULL } 194 }; 195 196 const struct twe_code_table twe_table_stripedepth[] = { 197 { TWE_AD_STRIPE_4k, "4K" }, 198 { TWE_AD_STRIPE_8k, "8K" }, 199 { TWE_AD_STRIPE_16k, "16K" }, 200 { TWE_AD_STRIPE_32k, "32K" }, 201 { TWE_AD_STRIPE_64k, "64K" }, 202 { TWE_AD_STRIPE_128k, "128K" }, 203 { TWE_AD_STRIPE_256k, "256K" }, 204 { TWE_AD_STRIPE_512k, "512K" }, 205 { TWE_AD_STRIPE_1024k, "1024K" }, 206 207 { 0, NULL } 208 }; 209 210 /* 211 * Asynchronous event notification messages are qualified: 212 * a - not unit/port specific 213 * u - unit specific 214 * p - port specific 215 * 216 * They are further qualified with a severity: 217 * E - LOG_EMERG 218 * a - LOG_ALERT 219 * c - LOG_CRIT 220 * e - LOG_ERR 221 * w - LOG_WARNING 222 * n - LOG_NOTICE 223 * i - LOG_INFO 224 * d - LOG_DEBUG 225 * blank - just use printf 226 */ 227 const struct twe_code_table twe_table_aen[] = { 228 { 0x00, "a queue empty" }, 229 { 0x01, "a soft reset" }, 230 { 0x02, "uc degraded mode" }, 231 { 0x03, "aa controller error" }, 232 { 0x04, "uE rebuild fail" }, 233 { 0x05, "un rebuild done" }, 234 { 0x06, "ue incomplete unit" }, 235 { 0x07, "un initialization done" }, 236 { 0x08, "uw unclean shutdown detected" }, 237 { 0x09, "pe drive timeout" }, 238 { 0x0a, "pc drive error" }, 239 { 0x0b, "un rebuild started" }, 240 { 0x0c, "un initialization started" }, 241 { 0x0d, "ui logical unit deleted" }, 242 { 0x0f, "pc SMART threshold exceeded" }, 243 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 244 { 0x21, "pe ATA UDMA downgrade" }, 245 { 0x22, "pi ATA UDMA upgrade" }, 246 { 0x23, "pw sector repair occurred" }, 247 { 0x24, "aa SBUF integrity check failure" }, 248 { 0x25, "pa lost cached write" }, 249 { 0x26, "pa drive ECC error detected" }, 250 { 0x27, "pe DCB checksum error" }, 251 { 0x28, "pn DCB unsupported version" }, 252 { 0x29, "ui verify started" }, 253 { 0x2a, "ua verify failed" }, 254 { 0x2b, "ui verify complete" }, 255 { 0x2c, "pw overwrote bad sector during rebuild" }, 256 { 0x2d, "pa encountered bad sector during rebuild" }, 257 { 0x2e, "pe replacement drive too small" }, 258 { 0x2f, "ue array not previously initialized" }, 259 { 0x30, "p drive not supported" }, 260 { 0xff, "a aen queue full" }, 261 262 { 0, NULL }, 263 }; 264 265 const char * 266 twe_describe_code(const struct twe_code_table *table, uint32_t code) 267 { 268 269 for (; table->string != NULL; table++) { 270 if (table->code == code) 271 return (table->string); 272 } 273 return (NULL); 274 } 275 276 static inline u_int32_t 277 twe_inl(struct twe_softc *sc, int off) 278 { 279 280 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 281 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 282 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 283 } 284 285 static inline void 286 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 287 { 288 289 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 290 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 291 BUS_SPACE_BARRIER_WRITE); 292 } 293 294 /* 295 * Match a supported board. 296 */ 297 static int 298 twe_match(struct device *parent, struct cfdata *cfdata, void *aux) 299 { 300 struct pci_attach_args *pa; 301 302 pa = aux; 303 304 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 305 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 306 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 307 } 308 309 /* 310 * Attach a supported board. 311 * 312 * XXX This doesn't fail gracefully. 313 */ 314 static void 315 twe_attach(struct device *parent, struct device *self, void *aux) 316 { 317 struct pci_attach_args *pa; 318 struct twe_softc *sc; 319 pci_chipset_tag_t pc; 320 pci_intr_handle_t ih; 321 pcireg_t csr; 322 const char *intrstr; 323 int s, size, i, rv, rseg; 324 size_t max_segs, max_xfer; 325 bus_dma_segment_t seg; 326 struct ctlname ctlnames[] = CTL_NAMES; 327 const struct sysctlnode *node; 328 struct twe_cmd *tc; 329 struct twe_ccb *ccb; 330 331 sc = (struct twe_softc *)self; 332 pa = aux; 333 pc = pa->pa_pc; 334 sc->sc_dmat = pa->pa_dmat; 335 SIMPLEQ_INIT(&sc->sc_ccb_queue); 336 SLIST_INIT(&sc->sc_ccb_freelist); 337 338 aprint_naive(": RAID controller\n"); 339 aprint_normal(": 3ware Escalade\n"); 340 341 342 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 343 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 344 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 345 return; 346 } 347 348 /* Enable the device. */ 349 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 350 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 351 csr | PCI_COMMAND_MASTER_ENABLE); 352 353 /* Map and establish the interrupt. */ 354 if (pci_intr_map(pa, &ih)) { 355 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 356 return; 357 } 358 359 intrstr = pci_intr_string(pc, ih); 360 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 361 if (sc->sc_ih == NULL) { 362 aprint_error("%s: can't establish interrupt%s%s\n", 363 sc->sc_dv.dv_xname, 364 (intrstr) ? " at " : "", 365 (intrstr) ? intrstr : ""); 366 return; 367 } 368 369 if (intrstr != NULL) 370 aprint_normal("%s: interrupting at %s\n", 371 sc->sc_dv.dv_xname, intrstr); 372 373 /* 374 * Allocate and initialise the command blocks and CCBs. 375 */ 376 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 377 378 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 379 &rseg, BUS_DMA_NOWAIT)) != 0) { 380 aprint_error("%s: unable to allocate commands, rv = %d\n", 381 sc->sc_dv.dv_xname, rv); 382 return; 383 } 384 385 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 386 (caddr_t *)&sc->sc_cmds, 387 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 388 aprint_error("%s: unable to map commands, rv = %d\n", 389 sc->sc_dv.dv_xname, rv); 390 return; 391 } 392 393 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 394 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 395 aprint_error("%s: unable to create command DMA map, rv = %d\n", 396 sc->sc_dv.dv_xname, rv); 397 return; 398 } 399 400 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 401 size, NULL, BUS_DMA_NOWAIT)) != 0) { 402 aprint_error("%s: unable to load command DMA map, rv = %d\n", 403 sc->sc_dv.dv_xname, rv); 404 return; 405 } 406 407 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 408 if (ccb == NULL) { 409 aprint_error("%s: unable to allocate memory for ccbs\n", 410 sc->sc_dv.dv_xname); 411 return; 412 } 413 414 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 415 memset(sc->sc_cmds, 0, size); 416 417 sc->sc_ccbs = ccb; 418 tc = (struct twe_cmd *)sc->sc_cmds; 419 max_segs = twe_get_maxsegs(); 420 max_xfer = twe_get_maxxfer(max_segs); 421 422 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 423 ccb->ccb_cmd = tc; 424 ccb->ccb_cmdid = i; 425 ccb->ccb_flags = 0; 426 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 427 max_segs, PAGE_SIZE, 0, 428 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 429 &ccb->ccb_dmamap_xfer); 430 if (rv != 0) { 431 aprint_error("%s: can't create dmamap, rv = %d\n", 432 sc->sc_dv.dv_xname, rv); 433 return; 434 } 435 436 /* Save the first CCB for AEN retrieval. */ 437 if (i != 0) 438 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 439 ccb_chain.slist); 440 } 441 442 /* Wait for the controller to become ready. */ 443 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 444 aprint_error("%s: microcontroller not ready\n", 445 sc->sc_dv.dv_xname); 446 return; 447 } 448 449 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 450 451 /* Reset the controller. */ 452 s = splbio(); 453 rv = twe_reset(sc); 454 splx(s); 455 if (rv) { 456 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 457 return; 458 } 459 460 /* Initialise connection with controller. */ 461 twe_init_connection(sc); 462 463 twe_describe_controller(sc); 464 465 /* Find and attach RAID array units. */ 466 sc->sc_nunits = 0; 467 for (i = 0; i < TWE_MAX_UNITS; i++) 468 (void) twe_add_unit(sc, i); 469 470 /* ...and finally, enable interrupts. */ 471 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 472 TWE_CTL_UNMASK_RESP_INTR | 473 TWE_CTL_ENABLE_INTRS); 474 475 /* sysctl set-up for 3ware cli */ 476 if (sysctl_createv(NULL, 0, NULL, NULL, 477 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 478 NULL, NULL, 0, NULL, 0, 479 CTL_HW, CTL_EOL) != 0) { 480 printf("%s: could not create %s sysctl node\n", 481 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 482 return; 483 } 484 if (sysctl_createv(NULL, 0, NULL, &node, 485 0, CTLTYPE_NODE, sc->sc_dv.dv_xname, 486 SYSCTL_DESCR("twe driver information"), 487 NULL, 0, NULL, 0, 488 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 489 printf("%s: could not create %s.%s sysctl node\n", 490 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 491 sc->sc_dv.dv_xname); 492 return; 493 } 494 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 495 0, CTLTYPE_STRING, "driver_version", 496 SYSCTL_DESCR("twe0 driver version"), 497 NULL, 0, &twever, 0, 498 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 499 != 0) { 500 printf("%s: could not create %s.%s.driver_version sysctl\n", 501 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 502 sc->sc_dv.dv_xname); 503 return; 504 } 505 } 506 507 void 508 twe_register_callbacks(struct twe_softc *sc, int unit, 509 const struct twe_callbacks *tcb) 510 { 511 512 sc->sc_units[unit].td_callbacks = tcb; 513 } 514 515 static void 516 twe_recompute_openings(struct twe_softc *sc) 517 { 518 struct twe_drive *td; 519 int unit, openings; 520 521 if (sc->sc_nunits != 0) 522 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 523 else 524 openings = 0; 525 if (openings == sc->sc_openings) 526 return; 527 sc->sc_openings = openings; 528 529 #ifdef TWE_DEBUG 530 printf("%s: %d array%s, %d openings per array\n", 531 sc->sc_dv.dv_xname, sc->sc_nunits, 532 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 533 #endif 534 535 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 536 td = &sc->sc_units[unit]; 537 if (td->td_dev != NULL) 538 (*td->td_callbacks->tcb_openings)(td->td_dev, 539 sc->sc_openings); 540 } 541 } 542 543 static int 544 twe_add_unit(struct twe_softc *sc, int unit) 545 { 546 struct twe_param *dtp, *atp; 547 struct twe_array_descriptor *ad; 548 struct twe_drive *td; 549 struct twe_attach_args twea; 550 uint32_t newsize; 551 int rv; 552 uint16_t dsize; 553 uint8_t newtype, newstripe; 554 int locs[TWECF_NLOCS]; 555 556 if (unit < 0 || unit >= TWE_MAX_UNITS) 557 return (EINVAL); 558 559 /* Find attached units. */ 560 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 561 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 562 if (rv != 0) { 563 aprint_error("%s: error %d fetching unit summary\n", 564 sc->sc_dv.dv_xname, rv); 565 return (rv); 566 } 567 568 /* For each detected unit, collect size and store in an array. */ 569 td = &sc->sc_units[unit]; 570 571 /* Unit present? */ 572 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 573 /* 574 * XXX Should we check to see if a device has been 575 * XXX attached at this index and detach it if it 576 * XXX has? ("rescan" semantics) 577 */ 578 rv = 0; 579 goto out; 580 } 581 582 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 583 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 584 if (rv != 0) { 585 aprint_error("%s: error %d fetching descriptor size " 586 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 587 goto out; 588 } 589 590 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 591 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 592 if (rv != 0) { 593 aprint_error("%s: error %d fetching array descriptor " 594 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 595 goto out; 596 } 597 598 ad = (struct twe_array_descriptor *)atp->tp_data; 599 newtype = ad->configuration; 600 newstripe = ad->stripe_size; 601 free(atp, M_DEVBUF); 602 603 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 604 TWE_PARAM_UNITINFO_Capacity, &newsize); 605 if (rv != 0) { 606 aprint_error( 607 "%s: error %d fetching capacity for unit %d\n", 608 sc->sc_dv.dv_xname, rv, unit); 609 goto out; 610 } 611 612 /* 613 * Have a device, so we need to attach it. If there is currently 614 * something sitting at the slot, and the parameters are different, 615 * then we detach the old device before attaching the new one. 616 */ 617 if (td->td_dev != NULL && 618 td->td_size == newsize && 619 td->td_type == newtype && 620 td->td_stripe == newstripe) { 621 /* Same as the old device; just keep using it. */ 622 rv = 0; 623 goto out; 624 } else if (td->td_dev != NULL) { 625 /* Detach the old device first. */ 626 (void) config_detach(td->td_dev, DETACH_FORCE); 627 td->td_dev = NULL; 628 } else if (td->td_size == 0) 629 sc->sc_nunits++; 630 631 /* 632 * Committed to the new array unit; assign its parameters and 633 * recompute the number of available command openings. 634 */ 635 td->td_size = newsize; 636 td->td_type = newtype; 637 td->td_stripe = newstripe; 638 twe_recompute_openings(sc); 639 640 twea.twea_unit = unit; 641 642 locs[TWECF_UNIT] = unit; 643 644 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 645 twe_print, config_stdsubmatch); 646 647 rv = 0; 648 out: 649 free(dtp, M_DEVBUF); 650 return (rv); 651 } 652 653 static int 654 twe_del_unit(struct twe_softc *sc, int unit) 655 { 656 struct twe_drive *td; 657 658 if (unit < 0 || unit >= TWE_MAX_UNITS) 659 return (EINVAL); 660 661 td = &sc->sc_units[unit]; 662 if (td->td_size != 0) 663 sc->sc_nunits--; 664 td->td_size = 0; 665 td->td_type = 0; 666 td->td_stripe = 0; 667 if (td->td_dev != NULL) { 668 (void) config_detach(td->td_dev, DETACH_FORCE); 669 td->td_dev = NULL; 670 } 671 twe_recompute_openings(sc); 672 return (0); 673 } 674 675 /* 676 * Reset the controller. 677 * MUST BE CALLED AT splbio()! 678 */ 679 static int 680 twe_reset(struct twe_softc *sc) 681 { 682 uint16_t aen; 683 u_int status; 684 volatile u_int32_t junk; 685 int got, rv; 686 687 /* Issue a soft reset. */ 688 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 689 TWE_CTL_CLEAR_HOST_INTR | 690 TWE_CTL_CLEAR_ATTN_INTR | 691 TWE_CTL_MASK_CMD_INTR | 692 TWE_CTL_MASK_RESP_INTR | 693 TWE_CTL_CLEAR_ERROR_STS | 694 TWE_CTL_DISABLE_INTRS); 695 696 /* Wait for attention... */ 697 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 698 printf("%s: timeout waiting for attention interrupt\n", 699 sc->sc_dv.dv_xname); 700 return (-1); 701 } 702 703 /* ...and ACK it. */ 704 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 705 706 /* 707 * Pull AENs out of the controller; look for a soft reset AEN. 708 * Open code this, since we want to detect reset even if the 709 * queue for management tools is full. 710 * 711 * Note that since: 712 * - interrupts are blocked 713 * - we have reset the controller 714 * - acknowledged the pending ATTENTION 715 * that there is no way a pending asynchronous AEN fetch would 716 * finish, so clear the flag. 717 */ 718 sc->sc_flags &= ~TWEF_AEN; 719 for (got = 0;;) { 720 rv = twe_aen_get(sc, &aen); 721 if (rv != 0) 722 printf("%s: error %d while draining event queue\n", 723 sc->sc_dv.dv_xname, rv); 724 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 725 break; 726 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 727 got = 1; 728 twe_aen_enqueue(sc, aen, 1); 729 } 730 731 if (!got) { 732 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 733 return (-1); 734 } 735 736 /* Check controller status. */ 737 status = twe_inl(sc, TWE_REG_STS); 738 if (twe_status_check(sc, status)) { 739 printf("%s: controller errors detected\n", 740 sc->sc_dv.dv_xname); 741 return (-1); 742 } 743 744 /* Drain the response queue. */ 745 for (;;) { 746 status = twe_inl(sc, TWE_REG_STS); 747 if (twe_status_check(sc, status) != 0) { 748 printf("%s: can't drain response queue\n", 749 sc->sc_dv.dv_xname); 750 return (-1); 751 } 752 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 753 break; 754 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 755 } 756 757 return (0); 758 } 759 760 /* 761 * Print autoconfiguration message for a sub-device. 762 */ 763 static int 764 twe_print(void *aux, const char *pnp) 765 { 766 struct twe_attach_args *twea; 767 768 twea = aux; 769 770 if (pnp != NULL) 771 aprint_normal("block device at %s", pnp); 772 aprint_normal(" unit %d", twea->twea_unit); 773 return (UNCONF); 774 } 775 776 /* 777 * Interrupt service routine. 778 */ 779 static int 780 twe_intr(void *arg) 781 { 782 struct twe_softc *sc; 783 u_int status; 784 int caught, rv; 785 786 sc = arg; 787 caught = 0; 788 status = twe_inl(sc, TWE_REG_STS); 789 twe_status_check(sc, status); 790 791 /* Host interrupts - purpose unknown. */ 792 if ((status & TWE_STS_HOST_INTR) != 0) { 793 #ifdef DEBUG 794 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 795 #endif 796 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 797 caught = 1; 798 } 799 800 /* 801 * Attention interrupts, signalled when a controller or child device 802 * state change has occurred. 803 */ 804 if ((status & TWE_STS_ATTN_INTR) != 0) { 805 rv = twe_aen_get(sc, NULL); 806 if (rv != 0) 807 printf("%s: unable to retrieve AEN (%d)\n", 808 sc->sc_dv.dv_xname, rv); 809 else 810 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 811 caught = 1; 812 } 813 814 /* 815 * Command interrupts, signalled when the controller can accept more 816 * commands. We don't use this; instead, we try to submit commands 817 * when we receive them, and when other commands have completed. 818 * Mask it so we don't get another one. 819 */ 820 if ((status & TWE_STS_CMD_INTR) != 0) { 821 #ifdef DEBUG 822 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 823 #endif 824 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 825 caught = 1; 826 } 827 828 if ((status & TWE_STS_RESP_INTR) != 0) { 829 twe_poll(sc); 830 caught = 1; 831 } 832 833 return (caught); 834 } 835 836 /* 837 * Fetch an AEN. Even though this is really like parameter 838 * retrieval, we handle this specially, because we issue this 839 * AEN retrieval command from interrupt context, and thus 840 * reserve a CCB for it to avoid resource shortage. 841 * 842 * XXX There are still potential resource shortages we could 843 * XXX encounter. Consider pre-allocating all AEN-related 844 * XXX resources. 845 * 846 * MUST BE CALLED AT splbio()! 847 */ 848 static int 849 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 850 { 851 struct twe_ccb *ccb; 852 struct twe_cmd *tc; 853 struct twe_param *tp; 854 int rv; 855 856 /* 857 * If we're already retrieving an AEN, just wait; another 858 * retrieval will be chained after the current one completes. 859 */ 860 if (sc->sc_flags & TWEF_AEN) { 861 /* 862 * It is a fatal software programming error to attempt 863 * to fetch an AEN synchronously when an AEN fetch is 864 * already pending. 865 */ 866 KASSERT(aenp == NULL); 867 return (0); 868 } 869 870 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 871 if (tp == NULL) 872 return (ENOMEM); 873 874 ccb = twe_ccb_alloc(sc, 875 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 876 KASSERT(ccb != NULL); 877 878 ccb->ccb_data = tp; 879 ccb->ccb_datasize = TWE_SECTOR_SIZE; 880 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 881 ccb->ccb_tx.tx_context = tp; 882 ccb->ccb_tx.tx_dv = &sc->sc_dv; 883 884 tc = ccb->ccb_cmd; 885 tc->tc_size = 2; 886 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 887 tc->tc_unit = 0; 888 tc->tc_count = htole16(1); 889 890 /* Fill in the outbound parameter data. */ 891 tp->tp_table_id = htole16(TWE_PARAM_AEN); 892 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 893 tp->tp_param_size = 2; 894 895 /* Map the transfer. */ 896 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 897 twe_ccb_free(sc, ccb); 898 goto done; 899 } 900 901 /* Enqueue the command and wait. */ 902 if (aenp != NULL) { 903 rv = twe_ccb_poll(sc, ccb, 5); 904 twe_ccb_unmap(sc, ccb); 905 twe_ccb_free(sc, ccb); 906 if (rv == 0) 907 *aenp = le16toh(*(uint16_t *)tp->tp_data); 908 free(tp, M_DEVBUF); 909 } else { 910 sc->sc_flags |= TWEF_AEN; 911 twe_ccb_enqueue(sc, ccb); 912 rv = 0; 913 } 914 915 done: 916 return (rv); 917 } 918 919 /* 920 * Handle an AEN returned by the controller. 921 * MUST BE CALLED AT splbio()! 922 */ 923 static void 924 twe_aen_handler(struct twe_ccb *ccb, int error) 925 { 926 struct twe_softc *sc; 927 struct twe_param *tp; 928 uint16_t aen; 929 int rv; 930 931 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 932 tp = ccb->ccb_tx.tx_context; 933 twe_ccb_unmap(sc, ccb); 934 935 sc->sc_flags &= ~TWEF_AEN; 936 937 if (error) { 938 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 939 aen = TWE_AEN_QUEUE_EMPTY; 940 } else 941 aen = le16toh(*(u_int16_t *)tp->tp_data); 942 free(tp, M_DEVBUF); 943 twe_ccb_free(sc, ccb); 944 945 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 946 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 947 return; 948 } 949 950 twe_aen_enqueue(sc, aen, 0); 951 952 /* 953 * Chain another retrieval in case interrupts have been 954 * coalesced. 955 */ 956 rv = twe_aen_get(sc, NULL); 957 if (rv != 0) 958 printf("%s: unable to retrieve AEN (%d)\n", 959 sc->sc_dv.dv_xname, rv); 960 } 961 962 static void 963 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 964 { 965 const char *str, *msg; 966 int s, next, nextnext, level; 967 968 /* 969 * First report the AEN on the console. Maybe. 970 */ 971 if (! quiet) { 972 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 973 if (str == NULL) { 974 printf("%s: unknown AEN 0x%04x\n", 975 sc->sc_dv.dv_xname, aen); 976 } else { 977 msg = str + 3; 978 switch (str[1]) { 979 case 'E': level = LOG_EMERG; break; 980 case 'a': level = LOG_ALERT; break; 981 case 'c': level = LOG_CRIT; break; 982 case 'e': level = LOG_ERR; break; 983 case 'w': level = LOG_WARNING; break; 984 case 'n': level = LOG_NOTICE; break; 985 case 'i': level = LOG_INFO; break; 986 case 'd': level = LOG_DEBUG; break; 987 default: 988 /* Don't use syslog. */ 989 level = -1; 990 } 991 992 if (level < 0) { 993 switch (str[0]) { 994 case 'u': 995 case 'p': 996 printf("%s: %s %d: %s\n", 997 sc->sc_dv.dv_xname, 998 str[0] == 'u' ? "unit" : "port", 999 TWE_AEN_UNIT(aen), msg); 1000 break; 1001 1002 default: 1003 printf("%s: %s\n", 1004 sc->sc_dv.dv_xname, msg); 1005 } 1006 } else { 1007 switch (str[0]) { 1008 case 'u': 1009 case 'p': 1010 log(level, "%s: %s %d: %s\n", 1011 sc->sc_dv.dv_xname, 1012 str[0] == 'u' ? "unit" : "port", 1013 TWE_AEN_UNIT(aen), msg); 1014 break; 1015 1016 default: 1017 log(level, "%s: %s\n", 1018 sc->sc_dv.dv_xname, msg); 1019 } 1020 } 1021 } 1022 } 1023 1024 /* Now enqueue the AEN for mangement tools. */ 1025 s = splbio(); 1026 1027 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1028 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1029 1030 /* 1031 * If this is the last free slot, then queue up a "queue 1032 * full" message. 1033 */ 1034 if (nextnext == sc->sc_aen_tail) 1035 aen = TWE_AEN_QUEUE_FULL; 1036 1037 if (next != sc->sc_aen_tail) { 1038 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1039 sc->sc_aen_head = next; 1040 } 1041 1042 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1043 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1044 wakeup(&sc->sc_aen_queue); 1045 } 1046 1047 splx(s); 1048 } 1049 1050 /* NOTE: Must be called at splbio(). */ 1051 static uint16_t 1052 twe_aen_dequeue(struct twe_softc *sc) 1053 { 1054 uint16_t aen; 1055 1056 if (sc->sc_aen_tail == sc->sc_aen_head) 1057 aen = TWE_AEN_QUEUE_EMPTY; 1058 else { 1059 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1060 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1061 } 1062 1063 return (aen); 1064 } 1065 1066 /* 1067 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1068 * fetch 1, 2, and 4 byte parameter values, respectively. 1069 */ 1070 int 1071 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1072 uint8_t *valp) 1073 { 1074 struct twe_param *tp; 1075 int rv; 1076 1077 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1078 if (rv != 0) 1079 return (rv); 1080 *valp = *(uint8_t *)tp->tp_data; 1081 free(tp, M_DEVBUF); 1082 return (0); 1083 } 1084 1085 int 1086 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1087 uint16_t *valp) 1088 { 1089 struct twe_param *tp; 1090 int rv; 1091 1092 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1093 if (rv != 0) 1094 return (rv); 1095 *valp = le16toh(*(uint16_t *)tp->tp_data); 1096 free(tp, M_DEVBUF); 1097 return (0); 1098 } 1099 1100 int 1101 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1102 uint32_t *valp) 1103 { 1104 struct twe_param *tp; 1105 int rv; 1106 1107 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1108 if (rv != 0) 1109 return (rv); 1110 *valp = le32toh(*(uint32_t *)tp->tp_data); 1111 free(tp, M_DEVBUF); 1112 return (0); 1113 } 1114 1115 /* 1116 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1117 * it will be called with generated context when the command has completed. 1118 * If no callback is provided, the command will be executed synchronously 1119 * and a pointer to a buffer containing the data returned. 1120 * 1121 * The caller or callback is responsible for freeing the buffer. 1122 * 1123 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1124 */ 1125 int 1126 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1127 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1128 { 1129 struct twe_ccb *ccb; 1130 struct twe_cmd *tc; 1131 struct twe_param *tp; 1132 int rv, s; 1133 1134 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1135 if (tp == NULL) 1136 return ENOMEM; 1137 1138 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1139 KASSERT(ccb != NULL); 1140 1141 ccb->ccb_data = tp; 1142 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1143 ccb->ccb_tx.tx_handler = func; 1144 ccb->ccb_tx.tx_context = tp; 1145 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1146 1147 tc = ccb->ccb_cmd; 1148 tc->tc_size = 2; 1149 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1150 tc->tc_unit = 0; 1151 tc->tc_count = htole16(1); 1152 1153 /* Fill in the outbound parameter data. */ 1154 tp->tp_table_id = htole16(table_id); 1155 tp->tp_param_id = param_id; 1156 tp->tp_param_size = size; 1157 1158 /* Map the transfer. */ 1159 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1160 twe_ccb_free(sc, ccb); 1161 goto done; 1162 } 1163 1164 /* Submit the command and either wait or let the callback handle it. */ 1165 if (func == NULL) { 1166 s = splbio(); 1167 rv = twe_ccb_poll(sc, ccb, 5); 1168 twe_ccb_unmap(sc, ccb); 1169 twe_ccb_free(sc, ccb); 1170 splx(s); 1171 } else { 1172 #ifdef DEBUG 1173 if (pbuf != NULL) 1174 panic("both func and pbuf defined"); 1175 #endif 1176 twe_ccb_enqueue(sc, ccb); 1177 return 0; 1178 } 1179 1180 done: 1181 if (pbuf == NULL || rv != 0) 1182 free(tp, M_DEVBUF); 1183 else if (pbuf != NULL && rv == 0) 1184 *pbuf = tp; 1185 return rv; 1186 } 1187 1188 /* 1189 * Execute a TWE_OP_SET_PARAM command. 1190 * 1191 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1192 */ 1193 static int 1194 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1195 void *sbuf) 1196 { 1197 struct twe_ccb *ccb; 1198 struct twe_cmd *tc; 1199 struct twe_param *tp; 1200 int rv, s; 1201 1202 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1203 if (tp == NULL) 1204 return ENOMEM; 1205 1206 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1207 KASSERT(ccb != NULL); 1208 1209 ccb->ccb_data = tp; 1210 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1211 ccb->ccb_tx.tx_handler = 0; 1212 ccb->ccb_tx.tx_context = tp; 1213 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1214 1215 tc = ccb->ccb_cmd; 1216 tc->tc_size = 2; 1217 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1218 tc->tc_unit = 0; 1219 tc->tc_count = htole16(1); 1220 1221 /* Fill in the outbound parameter data. */ 1222 tp->tp_table_id = htole16(table_id); 1223 tp->tp_param_id = param_id; 1224 tp->tp_param_size = size; 1225 memcpy(tp->tp_data, sbuf, size); 1226 1227 /* Map the transfer. */ 1228 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1229 twe_ccb_free(sc, ccb); 1230 goto done; 1231 } 1232 1233 /* Submit the command and wait. */ 1234 s = splbio(); 1235 rv = twe_ccb_poll(sc, ccb, 5); 1236 twe_ccb_unmap(sc, ccb); 1237 twe_ccb_free(sc, ccb); 1238 splx(s); 1239 done: 1240 free(tp, M_DEVBUF); 1241 return (rv); 1242 } 1243 1244 /* 1245 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1246 * Must be called with interrupts blocked. 1247 */ 1248 static int 1249 twe_init_connection(struct twe_softc *sc) 1250 { 1251 struct twe_ccb *ccb; 1252 struct twe_cmd *tc; 1253 int rv; 1254 1255 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1256 return (EAGAIN); 1257 1258 /* Build the command. */ 1259 tc = ccb->ccb_cmd; 1260 tc->tc_size = 3; 1261 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1262 tc->tc_unit = 0; 1263 tc->tc_count = htole16(TWE_MAX_CMDS); 1264 tc->tc_args.init_connection.response_queue_pointer = 0; 1265 1266 /* Submit the command for immediate execution. */ 1267 rv = twe_ccb_poll(sc, ccb, 5); 1268 twe_ccb_free(sc, ccb); 1269 return (rv); 1270 } 1271 1272 /* 1273 * Poll the controller for completed commands. Must be called with 1274 * interrupts blocked. 1275 */ 1276 static void 1277 twe_poll(struct twe_softc *sc) 1278 { 1279 struct twe_ccb *ccb; 1280 int found; 1281 u_int status, cmdid; 1282 1283 found = 0; 1284 1285 for (;;) { 1286 status = twe_inl(sc, TWE_REG_STS); 1287 twe_status_check(sc, status); 1288 1289 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1290 break; 1291 1292 found = 1; 1293 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1294 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1295 if (cmdid >= TWE_MAX_QUEUECNT) { 1296 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1297 continue; 1298 } 1299 1300 ccb = sc->sc_ccbs + cmdid; 1301 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1302 printf("%s: CCB for cmdid %d not active\n", 1303 sc->sc_dv.dv_xname, cmdid); 1304 continue; 1305 } 1306 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1307 1308 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1309 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1310 sizeof(struct twe_cmd), 1311 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1312 1313 /* Pass notification to upper layers. */ 1314 if (ccb->ccb_tx.tx_handler != NULL) 1315 (*ccb->ccb_tx.tx_handler)(ccb, 1316 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1317 } 1318 1319 /* If any commands have completed, run the software queue. */ 1320 if (found) 1321 twe_ccb_enqueue(sc, NULL); 1322 } 1323 1324 /* 1325 * Wait for `status' to be set in the controller status register. Return 1326 * zero if found, non-zero if the operation timed out. 1327 */ 1328 static int 1329 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1330 { 1331 1332 for (timo *= 10; timo != 0; timo--) { 1333 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1334 break; 1335 delay(100000); 1336 } 1337 1338 return (timo == 0); 1339 } 1340 1341 /* 1342 * Clear a PCI parity error. 1343 */ 1344 static void 1345 twe_clear_pci_parity_error(struct twe_softc *sc) 1346 { 1347 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1348 1349 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1350 } 1351 1352 1353 /* 1354 * Clear a PCI abort. 1355 */ 1356 static void 1357 twe_clear_pci_abort(struct twe_softc *sc) 1358 { 1359 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1360 1361 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1362 } 1363 1364 /* 1365 * Complain if the status bits aren't what we expect. 1366 */ 1367 static int 1368 twe_status_check(struct twe_softc *sc, u_int status) 1369 { 1370 int rv; 1371 1372 rv = 0; 1373 1374 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1375 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1376 status & ~TWE_STS_EXPECTED_BITS); 1377 rv = -1; 1378 } 1379 1380 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1381 printf("%s: unexpected status bits: 0x%08x\n", 1382 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1383 rv = -1; 1384 if (status & TWE_STS_PCI_PARITY_ERROR) { 1385 printf("%s: PCI parity error: Reseat card, move card " 1386 "or buggy device present.\n", 1387 sc->sc_dv.dv_xname); 1388 twe_clear_pci_parity_error(sc); 1389 } 1390 if (status & TWE_STS_PCI_ABORT) { 1391 printf("%s: PCI abort, clearing.\n", 1392 sc->sc_dv.dv_xname); 1393 twe_clear_pci_abort(sc); 1394 } 1395 } 1396 1397 return (rv); 1398 } 1399 1400 /* 1401 * Allocate and initialise a CCB. 1402 */ 1403 static inline void 1404 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1405 { 1406 struct twe_cmd *tc; 1407 1408 ccb->ccb_tx.tx_handler = NULL; 1409 ccb->ccb_flags = flags; 1410 tc = ccb->ccb_cmd; 1411 tc->tc_status = 0; 1412 tc->tc_flags = 0; 1413 tc->tc_cmdid = ccb->ccb_cmdid; 1414 } 1415 1416 struct twe_ccb * 1417 twe_ccb_alloc(struct twe_softc *sc, int flags) 1418 { 1419 struct twe_ccb *ccb; 1420 int s; 1421 1422 s = splbio(); 1423 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1424 /* Use the reserved CCB. */ 1425 ccb = sc->sc_ccbs; 1426 } else { 1427 /* Allocate a CCB and command block. */ 1428 if (__predict_false((ccb = 1429 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1430 splx(s); 1431 return (NULL); 1432 } 1433 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1434 } 1435 #ifdef DIAGNOSTIC 1436 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1437 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1438 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1439 panic("twe_ccb_alloc: CCB %ld already allocated", 1440 (long)(ccb - sc->sc_ccbs)); 1441 flags |= TWE_CCB_ALLOCED; 1442 #endif 1443 splx(s); 1444 1445 twe_ccb_init(sc, ccb, flags); 1446 return (ccb); 1447 } 1448 1449 struct twe_ccb * 1450 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1451 { 1452 struct twe_ccb *ccb; 1453 int s; 1454 1455 KASSERT((flags & TWE_CCB_AEN) == 0); 1456 1457 s = splbio(); 1458 while (__predict_false((ccb = 1459 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1460 sc->sc_flags |= TWEF_WAIT_CCB; 1461 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1462 } 1463 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1464 #ifdef DIAGNOSTIC 1465 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1466 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1467 (long)(ccb - sc->sc_ccbs)); 1468 flags |= TWE_CCB_ALLOCED; 1469 #endif 1470 splx(s); 1471 1472 twe_ccb_init(sc, ccb, flags); 1473 return (ccb); 1474 } 1475 1476 /* 1477 * Free a CCB. 1478 */ 1479 void 1480 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1481 { 1482 int s; 1483 1484 s = splbio(); 1485 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1486 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1487 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1488 sc->sc_flags &= ~TWEF_WAIT_CCB; 1489 wakeup(&sc->sc_ccb_freelist); 1490 } 1491 } 1492 ccb->ccb_flags = 0; 1493 splx(s); 1494 } 1495 1496 /* 1497 * Map the specified CCB's command block and data buffer (if any) into 1498 * controller visible space. Perform DMA synchronisation. 1499 */ 1500 int 1501 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1502 { 1503 struct twe_cmd *tc; 1504 int flags, nsegs, i, s, rv; 1505 void *data; 1506 1507 /* 1508 * The data as a whole must be 512-byte aligned. 1509 */ 1510 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1511 s = splvm(); 1512 /* XXX */ 1513 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1514 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1515 splx(s); 1516 data = (void *)ccb->ccb_abuf; 1517 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1518 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1519 } else { 1520 ccb->ccb_abuf = (vaddr_t)0; 1521 data = ccb->ccb_data; 1522 } 1523 1524 /* 1525 * Map the data buffer into bus space and build the S/G list. 1526 */ 1527 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1528 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1529 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1530 BUS_DMA_READ : BUS_DMA_WRITE)); 1531 if (rv != 0) { 1532 if (ccb->ccb_abuf != (vaddr_t)0) { 1533 s = splvm(); 1534 /* XXX */ 1535 uvm_km_free(kmem_map, ccb->ccb_abuf, 1536 ccb->ccb_datasize, UVM_KMF_WIRED); 1537 splx(s); 1538 } 1539 return (rv); 1540 } 1541 1542 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1543 tc = ccb->ccb_cmd; 1544 tc->tc_size += 2 * nsegs; 1545 1546 /* The location of the S/G list is dependant upon command type. */ 1547 switch (tc->tc_opcode >> 5) { 1548 case 2: 1549 for (i = 0; i < nsegs; i++) { 1550 tc->tc_args.param.sgl[i].tsg_address = 1551 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1552 tc->tc_args.param.sgl[i].tsg_length = 1553 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1554 } 1555 /* XXX Needed? */ 1556 for (; i < TWE_SG_SIZE; i++) { 1557 tc->tc_args.param.sgl[i].tsg_address = 0; 1558 tc->tc_args.param.sgl[i].tsg_length = 0; 1559 } 1560 break; 1561 case 3: 1562 for (i = 0; i < nsegs; i++) { 1563 tc->tc_args.io.sgl[i].tsg_address = 1564 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1565 tc->tc_args.io.sgl[i].tsg_length = 1566 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1567 } 1568 /* XXX Needed? */ 1569 for (; i < TWE_SG_SIZE; i++) { 1570 tc->tc_args.io.sgl[i].tsg_address = 0; 1571 tc->tc_args.io.sgl[i].tsg_length = 0; 1572 } 1573 break; 1574 default: 1575 /* 1576 * In all likelihood, this is a command passed from 1577 * management tools in userspace where no S/G list is 1578 * necessary because no data is being passed. 1579 */ 1580 break; 1581 } 1582 1583 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1584 flags = BUS_DMASYNC_PREREAD; 1585 else 1586 flags = 0; 1587 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1588 flags |= BUS_DMASYNC_PREWRITE; 1589 1590 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1591 ccb->ccb_datasize, flags); 1592 return (0); 1593 } 1594 1595 /* 1596 * Unmap the specified CCB's command block and data buffer (if any) and 1597 * perform DMA synchronisation. 1598 */ 1599 void 1600 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1601 { 1602 int flags, s; 1603 1604 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1605 flags = BUS_DMASYNC_POSTREAD; 1606 else 1607 flags = 0; 1608 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1609 flags |= BUS_DMASYNC_POSTWRITE; 1610 1611 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1612 ccb->ccb_datasize, flags); 1613 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1614 1615 if (ccb->ccb_abuf != (vaddr_t)0) { 1616 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1617 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1618 ccb->ccb_datasize); 1619 s = splvm(); 1620 /* XXX */ 1621 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1622 UVM_KMF_WIRED); 1623 splx(s); 1624 } 1625 } 1626 1627 /* 1628 * Submit a command to the controller and poll on completion. Return 1629 * non-zero on timeout (but don't check status, as some command types don't 1630 * return status). Must be called with interrupts blocked. 1631 */ 1632 int 1633 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1634 { 1635 int rv; 1636 1637 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1638 return (rv); 1639 1640 for (timo *= 1000; timo != 0; timo--) { 1641 twe_poll(sc); 1642 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1643 break; 1644 DELAY(100); 1645 } 1646 1647 return (timo == 0); 1648 } 1649 1650 /* 1651 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1652 * the order that they were enqueued and try to submit their command blocks 1653 * to the controller for execution. 1654 */ 1655 void 1656 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1657 { 1658 int s; 1659 1660 s = splbio(); 1661 1662 if (ccb != NULL) 1663 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1664 1665 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1666 if (twe_ccb_submit(sc, ccb)) 1667 break; 1668 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1669 } 1670 1671 splx(s); 1672 } 1673 1674 /* 1675 * Submit the command block associated with the specified CCB to the 1676 * controller for execution. Must be called with interrupts blocked. 1677 */ 1678 int 1679 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1680 { 1681 bus_addr_t pa; 1682 int rv; 1683 u_int status; 1684 1685 /* Check to see if we can post a command. */ 1686 status = twe_inl(sc, TWE_REG_STS); 1687 twe_status_check(sc, status); 1688 1689 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1690 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1691 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1692 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1693 #ifdef DIAGNOSTIC 1694 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1695 panic("%s: CCB %ld not ALLOCED\n", 1696 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1697 #endif 1698 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1699 pa = sc->sc_cmds_paddr + 1700 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1701 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1702 rv = 0; 1703 } else 1704 rv = EBUSY; 1705 1706 return (rv); 1707 } 1708 1709 1710 /* 1711 * Accept an open operation on the control device. 1712 */ 1713 static int 1714 tweopen(dev_t dev, int flag, int mode, struct lwp *l) 1715 { 1716 struct twe_softc *twe; 1717 1718 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1719 return (ENXIO); 1720 if ((twe->sc_flags & TWEF_OPEN) != 0) 1721 return (EBUSY); 1722 1723 twe->sc_flags |= TWEF_OPEN; 1724 return (0); 1725 } 1726 1727 /* 1728 * Accept the last close on the control device. 1729 */ 1730 static int 1731 tweclose(dev_t dev, int flag, int mode, struct lwp *l) 1732 { 1733 struct twe_softc *twe; 1734 1735 twe = device_lookup(&twe_cd, minor(dev)); 1736 twe->sc_flags &= ~TWEF_OPEN; 1737 return (0); 1738 } 1739 1740 void 1741 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1742 { 1743 1744 /* Just wake up the sleeper. */ 1745 wakeup(ccb); 1746 } 1747 1748 /* 1749 * Handle control operations. 1750 */ 1751 static int 1752 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 1753 { 1754 struct twe_softc *twe; 1755 struct twe_ccb *ccb; 1756 struct twe_param *param; 1757 struct twe_usercommand *tu; 1758 struct twe_paramcommand *tp; 1759 struct twe_drivecommand *td; 1760 void *pdata = NULL; 1761 int s, error = 0; 1762 u_int8_t cmdid; 1763 1764 twe = device_lookup(&twe_cd, minor(dev)); 1765 tu = (struct twe_usercommand *)data; 1766 tp = (struct twe_paramcommand *)data; 1767 td = (struct twe_drivecommand *)data; 1768 1769 /* This is intended to be compatible with the FreeBSD interface. */ 1770 switch (cmd) { 1771 case TWEIO_COMMAND: 1772 if (securelevel >= 2) 1773 return (EPERM); 1774 1775 /* XXX mutex */ 1776 if (tu->tu_size > 0) { 1777 /* 1778 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1779 * it's really necessary, first. 1780 */ 1781 if (tu->tu_size > TWE_SECTOR_SIZE) { 1782 #ifdef TWE_DEBUG 1783 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1784 twe->sc_dv.dv_xname, tu->tu_size); 1785 #endif 1786 return EINVAL; 1787 } 1788 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1789 error = copyin(tu->tu_data, pdata, tu->tu_size); 1790 if (error != 0) 1791 goto done; 1792 ccb = twe_ccb_alloc_wait(twe, 1793 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1794 KASSERT(ccb != NULL); 1795 ccb->ccb_data = pdata; 1796 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1797 } else { 1798 ccb = twe_ccb_alloc_wait(twe, 0); 1799 KASSERT(ccb != NULL); 1800 } 1801 1802 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1803 ccb->ccb_tx.tx_context = NULL; 1804 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1805 1806 cmdid = ccb->ccb_cmdid; 1807 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1808 ccb->ccb_cmd->tc_cmdid = cmdid; 1809 1810 /* Map the transfer. */ 1811 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1812 twe_ccb_free(twe, ccb); 1813 goto done; 1814 } 1815 1816 /* Submit the command and wait up to 1 minute. */ 1817 error = 0; 1818 twe_ccb_enqueue(twe, ccb); 1819 s = splbio(); 1820 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1821 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1822 60 * hz)) != 0) 1823 break; 1824 splx(s); 1825 1826 /* Copy the command back to the ioctl argument. */ 1827 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1828 #ifdef TWE_DEBUG 1829 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1830 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1831 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1832 #endif 1833 1834 s = splbio(); 1835 twe_ccb_free(twe, ccb); 1836 splx(s); 1837 1838 if (tu->tu_size > 0) 1839 error = copyout(pdata, tu->tu_data, tu->tu_size); 1840 goto done; 1841 1842 case TWEIO_STATS: 1843 return (ENOENT); 1844 1845 case TWEIO_AEN_POLL: 1846 s = splbio(); 1847 *(u_int *)data = twe_aen_dequeue(twe); 1848 splx(s); 1849 return (0); 1850 1851 case TWEIO_AEN_WAIT: 1852 s = splbio(); 1853 while ((*(u_int *)data = 1854 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1855 twe->sc_flags |= TWEF_AENQ_WAIT; 1856 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1857 "tweaen", 0); 1858 if (error == EINTR) { 1859 splx(s); 1860 return (error); 1861 } 1862 } 1863 splx(s); 1864 return (0); 1865 1866 case TWEIO_GET_PARAM: 1867 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1868 tp->tp_size, 0, ¶m); 1869 if (error != 0) 1870 return (error); 1871 if (param->tp_param_size > tp->tp_size) { 1872 error = EFAULT; 1873 goto done; 1874 } 1875 error = copyout(param->tp_data, tp->tp_data, 1876 param->tp_param_size); 1877 free(param, M_DEVBUF); 1878 goto done; 1879 1880 case TWEIO_SET_PARAM: 1881 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1882 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1883 goto done; 1884 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1885 tp->tp_size, pdata); 1886 goto done; 1887 1888 case TWEIO_RESET: 1889 s = splbio(); 1890 twe_reset(twe); 1891 splx(s); 1892 return (0); 1893 1894 case TWEIO_ADD_UNIT: 1895 /* XXX mutex */ 1896 return (twe_add_unit(twe, td->td_unit)); 1897 1898 case TWEIO_DEL_UNIT: 1899 /* XXX mutex */ 1900 return (twe_del_unit(twe, td->td_unit)); 1901 1902 default: 1903 return EINVAL; 1904 } 1905 done: 1906 if (pdata) 1907 free(pdata, M_DEVBUF); 1908 return error; 1909 } 1910 1911 const struct cdevsw twe_cdevsw = { 1912 tweopen, tweclose, noread, nowrite, tweioctl, 1913 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 1914 }; 1915 1916 /* 1917 * Print some information about the controller 1918 */ 1919 static void 1920 twe_describe_controller(struct twe_softc *sc) 1921 { 1922 struct twe_param *p[6]; 1923 int i, rv = 0; 1924 uint32_t dsize; 1925 uint8_t ports; 1926 1927 ports = 0; 1928 1929 /* get the port count */ 1930 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1931 TWE_PARAM_CONTROLLER_PortCount, &ports); 1932 1933 /* get version strings */ 1934 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1935 16, NULL, &p[0]); 1936 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1937 16, NULL, &p[1]); 1938 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1939 16, NULL, &p[2]); 1940 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1941 8, NULL, &p[3]); 1942 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1943 8, NULL, &p[4]); 1944 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1945 8, NULL, &p[5]); 1946 1947 if (rv) { 1948 /* some error occurred */ 1949 aprint_error("%s: failed to fetch version information\n", 1950 sc->sc_dv.dv_xname); 1951 return; 1952 } 1953 1954 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1955 sc->sc_dv.dv_xname, ports, 1956 p[1]->tp_data, p[2]->tp_data); 1957 1958 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1959 sc->sc_dv.dv_xname, 1960 p[0]->tp_data, p[3]->tp_data, 1961 p[4]->tp_data, p[5]->tp_data); 1962 1963 free(p[0], M_DEVBUF); 1964 free(p[1], M_DEVBUF); 1965 free(p[2], M_DEVBUF); 1966 free(p[3], M_DEVBUF); 1967 free(p[4], M_DEVBUF); 1968 free(p[5], M_DEVBUF); 1969 1970 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1971 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1972 if (rv) { 1973 aprint_error("%s: failed to get drive status summary\n", 1974 sc->sc_dv.dv_xname); 1975 return; 1976 } 1977 for (i = 0; i < ports; i++) { 1978 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1979 continue; 1980 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1981 TWE_PARAM_DRIVEINFO_Size, &dsize); 1982 if (rv) { 1983 aprint_error( 1984 "%s: unable to get drive size for port %d\n", 1985 sc->sc_dv.dv_xname, i); 1986 continue; 1987 } 1988 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1989 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1990 if (rv) { 1991 aprint_error( 1992 "%s: unable to get drive model for port %d\n", 1993 sc->sc_dv.dv_xname, i); 1994 continue; 1995 } 1996 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 1997 i, p[1]->tp_data, dsize / 2048); 1998 free(p[1], M_DEVBUF); 1999 } 2000 free(p[0], M_DEVBUF); 2001 } 2002
Indexes created Wed Sep 24 05:09:52 GMT 2025