twe.c revision 1.78.4.1
1 /* $NetBSD: twe.c,v 1.78.4.1 2006/10/22 06:06:19 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 2000 Michael Smith 41 * Copyright (c) 2000 BSDi 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 57 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 60 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 62 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 63 * SUCH DAMAGE. 64 * 65 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 66 */ 67 68 /* 69 * Driver for the 3ware Escalade family of RAID controllers. 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.78.4.1 2006/10/22 06:06:19 yamt Exp $"); 74 75 #include <sys/param.h> 76 #include <sys/systm.h> 77 #include <sys/kernel.h> 78 #include <sys/device.h> 79 #include <sys/queue.h> 80 #include <sys/proc.h> 81 #include <sys/buf.h> 82 #include <sys/endian.h> 83 #include <sys/malloc.h> 84 #include <sys/conf.h> 85 #include <sys/disk.h> 86 #include <sys/sysctl.h> 87 #include <sys/syslog.h> 88 89 #include <uvm/uvm_extern.h> 90 91 #include <sys/bswap.h> 92 #include <machine/bus.h> 93 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcivar.h> 96 #include <dev/pci/pcidevs.h> 97 #include <dev/pci/twereg.h> 98 #include <dev/pci/twevar.h> 99 #include <dev/pci/tweio.h> 100 101 #include "locators.h" 102 103 #define PCI_CBIO 0x10 104 105 static int twe_aen_get(struct twe_softc *, uint16_t *); 106 static void twe_aen_handler(struct twe_ccb *, int); 107 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 108 static uint16_t twe_aen_dequeue(struct twe_softc *); 109 110 static void twe_attach(struct device *, struct device *, void *); 111 static int twe_init_connection(struct twe_softc *); 112 static int twe_intr(void *); 113 static int twe_match(struct device *, struct cfdata *, void *); 114 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 115 static void twe_poll(struct twe_softc *); 116 static int twe_print(void *, const char *); 117 static int twe_reset(struct twe_softc *); 118 static int twe_status_check(struct twe_softc *, u_int); 119 static int twe_status_wait(struct twe_softc *, u_int, int); 120 static void twe_describe_controller(struct twe_softc *); 121 static void twe_clear_pci_abort(struct twe_softc *sc); 122 static void twe_clear_pci_parity_error(struct twe_softc *sc); 123 124 static int twe_add_unit(struct twe_softc *, int); 125 static int twe_del_unit(struct twe_softc *, int); 126 static int twe_init_connection(struct twe_softc *); 127 128 static inline u_int32_t twe_inl(struct twe_softc *, int); 129 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 130 131 extern struct cfdriver twe_cd; 132 133 CFATTACH_DECL(twe, sizeof(struct twe_softc), 134 twe_match, twe_attach, NULL, NULL); 135 136 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 137 const char twever[] = "1.50.01.002"; 138 139 /* 140 * Tables to convert numeric codes to strings. 141 */ 142 const struct twe_code_table twe_table_status[] = { 143 { 0x00, "successful completion" }, 144 145 /* info */ 146 { 0x42, "command in progress" }, 147 { 0x6c, "retrying interface CRC error from UDMA command" }, 148 149 /* warning */ 150 { 0x81, "redundant/inconsequential request ignored" }, 151 { 0x8e, "failed to write zeroes to LBA 0" }, 152 { 0x8f, "failed to profile TwinStor zones" }, 153 154 /* fatal */ 155 { 0xc1, "aborted due to system command or reconfiguration" }, 156 { 0xc4, "aborted" }, 157 { 0xc5, "access error" }, 158 { 0xc6, "access violation" }, 159 { 0xc7, "device failure" }, /* high byte may be port # */ 160 { 0xc8, "controller error" }, 161 { 0xc9, "timed out" }, 162 { 0xcb, "invalid unit number" }, 163 { 0xcf, "unit not available" }, 164 { 0xd2, "undefined opcode" }, 165 { 0xdb, "request incompatible with unit" }, 166 { 0xdc, "invalid request" }, 167 { 0xff, "firmware error, reset requested" }, 168 169 { 0, NULL } 170 }; 171 172 const struct twe_code_table twe_table_unitstate[] = { 173 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 174 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 175 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 176 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 177 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 178 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 179 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 180 181 { 0, NULL } 182 }; 183 184 const struct twe_code_table twe_table_unittype[] = { 185 /* array descriptor configuration */ 186 { TWE_AD_CONFIG_RAID0, "RAID0" }, 187 { TWE_AD_CONFIG_RAID1, "RAID1" }, 188 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 189 { TWE_AD_CONFIG_RAID5, "RAID5" }, 190 { TWE_AD_CONFIG_RAID10, "RAID10" }, 191 { TWE_UD_CONFIG_JBOD, "JBOD" }, 192 193 { 0, NULL } 194 }; 195 196 const struct twe_code_table twe_table_stripedepth[] = { 197 { TWE_AD_STRIPE_4k, "4K" }, 198 { TWE_AD_STRIPE_8k, "8K" }, 199 { TWE_AD_STRIPE_16k, "16K" }, 200 { TWE_AD_STRIPE_32k, "32K" }, 201 { TWE_AD_STRIPE_64k, "64K" }, 202 { TWE_AD_STRIPE_128k, "128K" }, 203 { TWE_AD_STRIPE_256k, "256K" }, 204 { TWE_AD_STRIPE_512k, "512K" }, 205 { TWE_AD_STRIPE_1024k, "1024K" }, 206 207 { 0, NULL } 208 }; 209 210 /* 211 * Asynchronous event notification messages are qualified: 212 * a - not unit/port specific 213 * u - unit specific 214 * p - port specific 215 * 216 * They are further qualified with a severity: 217 * E - LOG_EMERG 218 * a - LOG_ALERT 219 * c - LOG_CRIT 220 * e - LOG_ERR 221 * w - LOG_WARNING 222 * n - LOG_NOTICE 223 * i - LOG_INFO 224 * d - LOG_DEBUG 225 * blank - just use printf 226 */ 227 const struct twe_code_table twe_table_aen[] = { 228 { 0x00, "a queue empty" }, 229 { 0x01, "a soft reset" }, 230 { 0x02, "uc degraded mode" }, 231 { 0x03, "aa controller error" }, 232 { 0x04, "uE rebuild fail" }, 233 { 0x05, "un rebuild done" }, 234 { 0x06, "ue incomplete unit" }, 235 { 0x07, "un initialization done" }, 236 { 0x08, "uw unclean shutdown detected" }, 237 { 0x09, "pe drive timeout" }, 238 { 0x0a, "pc drive error" }, 239 { 0x0b, "un rebuild started" }, 240 { 0x0c, "un initialization started" }, 241 { 0x0d, "ui logical unit deleted" }, 242 { 0x0f, "pc SMART threshold exceeded" }, 243 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 244 { 0x21, "pe ATA UDMA downgrade" }, 245 { 0x22, "pi ATA UDMA upgrade" }, 246 { 0x23, "pw sector repair occurred" }, 247 { 0x24, "aa SBUF integrity check failure" }, 248 { 0x25, "pa lost cached write" }, 249 { 0x26, "pa drive ECC error detected" }, 250 { 0x27, "pe DCB checksum error" }, 251 { 0x28, "pn DCB unsupported version" }, 252 { 0x29, "ui verify started" }, 253 { 0x2a, "ua verify failed" }, 254 { 0x2b, "ui verify complete" }, 255 { 0x2c, "pw overwrote bad sector during rebuild" }, 256 { 0x2d, "pa encountered bad sector during rebuild" }, 257 { 0x2e, "pe replacement drive too small" }, 258 { 0x2f, "ue array not previously initialized" }, 259 { 0x30, "p drive not supported" }, 260 { 0xff, "a aen queue full" }, 261 262 { 0, NULL }, 263 }; 264 265 const char * 266 twe_describe_code(const struct twe_code_table *table, uint32_t code) 267 { 268 269 for (; table->string != NULL; table++) { 270 if (table->code == code) 271 return (table->string); 272 } 273 return (NULL); 274 } 275 276 static inline u_int32_t 277 twe_inl(struct twe_softc *sc, int off) 278 { 279 280 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 281 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 282 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 283 } 284 285 static inline void 286 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 287 { 288 289 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 290 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 291 BUS_SPACE_BARRIER_WRITE); 292 } 293 294 /* 295 * Match a supported board. 296 */ 297 static int 298 twe_match(struct device *parent __unused, struct cfdata *cfdata __unused, 299 void *aux) 300 { 301 struct pci_attach_args *pa; 302 303 pa = aux; 304 305 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 306 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 307 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 308 } 309 310 /* 311 * Attach a supported board. 312 * 313 * XXX This doesn't fail gracefully. 314 */ 315 static void 316 twe_attach(struct device *parent __unused, struct device *self, void *aux) 317 { 318 struct pci_attach_args *pa; 319 struct twe_softc *sc; 320 pci_chipset_tag_t pc; 321 pci_intr_handle_t ih; 322 pcireg_t csr; 323 const char *intrstr; 324 int s, size, i, rv, rseg; 325 size_t max_segs, max_xfer; 326 bus_dma_segment_t seg; 327 struct ctlname ctlnames[] = CTL_NAMES; 328 const struct sysctlnode *node; 329 struct twe_cmd *tc; 330 struct twe_ccb *ccb; 331 332 sc = (struct twe_softc *)self; 333 pa = aux; 334 pc = pa->pa_pc; 335 sc->sc_dmat = pa->pa_dmat; 336 SIMPLEQ_INIT(&sc->sc_ccb_queue); 337 SLIST_INIT(&sc->sc_ccb_freelist); 338 339 aprint_naive(": RAID controller\n"); 340 aprint_normal(": 3ware Escalade\n"); 341 342 343 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 344 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 345 aprint_error("%s: can't map i/o space\n", sc->sc_dv.dv_xname); 346 return; 347 } 348 349 /* Enable the device. */ 350 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 351 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 352 csr | PCI_COMMAND_MASTER_ENABLE); 353 354 /* Map and establish the interrupt. */ 355 if (pci_intr_map(pa, &ih)) { 356 aprint_error("%s: can't map interrupt\n", sc->sc_dv.dv_xname); 357 return; 358 } 359 360 intrstr = pci_intr_string(pc, ih); 361 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 362 if (sc->sc_ih == NULL) { 363 aprint_error("%s: can't establish interrupt%s%s\n", 364 sc->sc_dv.dv_xname, 365 (intrstr) ? " at " : "", 366 (intrstr) ? intrstr : ""); 367 return; 368 } 369 370 if (intrstr != NULL) 371 aprint_normal("%s: interrupting at %s\n", 372 sc->sc_dv.dv_xname, intrstr); 373 374 /* 375 * Allocate and initialise the command blocks and CCBs. 376 */ 377 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 378 379 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 380 &rseg, BUS_DMA_NOWAIT)) != 0) { 381 aprint_error("%s: unable to allocate commands, rv = %d\n", 382 sc->sc_dv.dv_xname, rv); 383 return; 384 } 385 386 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 387 (caddr_t *)&sc->sc_cmds, 388 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 389 aprint_error("%s: unable to map commands, rv = %d\n", 390 sc->sc_dv.dv_xname, rv); 391 return; 392 } 393 394 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 395 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 396 aprint_error("%s: unable to create command DMA map, rv = %d\n", 397 sc->sc_dv.dv_xname, rv); 398 return; 399 } 400 401 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 402 size, NULL, BUS_DMA_NOWAIT)) != 0) { 403 aprint_error("%s: unable to load command DMA map, rv = %d\n", 404 sc->sc_dv.dv_xname, rv); 405 return; 406 } 407 408 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 409 if (ccb == NULL) { 410 aprint_error("%s: unable to allocate memory for ccbs\n", 411 sc->sc_dv.dv_xname); 412 return; 413 } 414 415 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 416 memset(sc->sc_cmds, 0, size); 417 418 sc->sc_ccbs = ccb; 419 tc = (struct twe_cmd *)sc->sc_cmds; 420 max_segs = twe_get_maxsegs(); 421 max_xfer = twe_get_maxxfer(max_segs); 422 423 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 424 ccb->ccb_cmd = tc; 425 ccb->ccb_cmdid = i; 426 ccb->ccb_flags = 0; 427 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 428 max_segs, PAGE_SIZE, 0, 429 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 430 &ccb->ccb_dmamap_xfer); 431 if (rv != 0) { 432 aprint_error("%s: can't create dmamap, rv = %d\n", 433 sc->sc_dv.dv_xname, rv); 434 return; 435 } 436 437 /* Save the first CCB for AEN retrieval. */ 438 if (i != 0) 439 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 440 ccb_chain.slist); 441 } 442 443 /* Wait for the controller to become ready. */ 444 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 445 aprint_error("%s: microcontroller not ready\n", 446 sc->sc_dv.dv_xname); 447 return; 448 } 449 450 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 451 452 /* Reset the controller. */ 453 s = splbio(); 454 rv = twe_reset(sc); 455 splx(s); 456 if (rv) { 457 aprint_error("%s: reset failed\n", sc->sc_dv.dv_xname); 458 return; 459 } 460 461 /* Initialise connection with controller. */ 462 twe_init_connection(sc); 463 464 twe_describe_controller(sc); 465 466 /* Find and attach RAID array units. */ 467 sc->sc_nunits = 0; 468 for (i = 0; i < TWE_MAX_UNITS; i++) 469 (void) twe_add_unit(sc, i); 470 471 /* ...and finally, enable interrupts. */ 472 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 473 TWE_CTL_UNMASK_RESP_INTR | 474 TWE_CTL_ENABLE_INTRS); 475 476 /* sysctl set-up for 3ware cli */ 477 if (sysctl_createv(NULL, 0, NULL, NULL, 478 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 479 NULL, NULL, 0, NULL, 0, 480 CTL_HW, CTL_EOL) != 0) { 481 printf("%s: could not create %s sysctl node\n", 482 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name); 483 return; 484 } 485 if (sysctl_createv(NULL, 0, NULL, &node, 486 0, CTLTYPE_NODE, sc->sc_dv.dv_xname, 487 SYSCTL_DESCR("twe driver information"), 488 NULL, 0, NULL, 0, 489 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 490 printf("%s: could not create %s.%s sysctl node\n", 491 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 492 sc->sc_dv.dv_xname); 493 return; 494 } 495 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 496 0, CTLTYPE_STRING, "driver_version", 497 SYSCTL_DESCR("twe0 driver version"), 498 NULL, 0, &twever, 0, 499 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 500 != 0) { 501 printf("%s: could not create %s.%s.driver_version sysctl\n", 502 sc->sc_dv.dv_xname, ctlnames[CTL_HW].ctl_name, 503 sc->sc_dv.dv_xname); 504 return; 505 } 506 } 507 508 void 509 twe_register_callbacks(struct twe_softc *sc, int unit, 510 const struct twe_callbacks *tcb) 511 { 512 513 sc->sc_units[unit].td_callbacks = tcb; 514 } 515 516 static void 517 twe_recompute_openings(struct twe_softc *sc) 518 { 519 struct twe_drive *td; 520 int unit, openings; 521 522 if (sc->sc_nunits != 0) 523 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 524 else 525 openings = 0; 526 if (openings == sc->sc_openings) 527 return; 528 sc->sc_openings = openings; 529 530 #ifdef TWE_DEBUG 531 printf("%s: %d array%s, %d openings per array\n", 532 sc->sc_dv.dv_xname, sc->sc_nunits, 533 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 534 #endif 535 536 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 537 td = &sc->sc_units[unit]; 538 if (td->td_dev != NULL) 539 (*td->td_callbacks->tcb_openings)(td->td_dev, 540 sc->sc_openings); 541 } 542 } 543 544 static int 545 twe_add_unit(struct twe_softc *sc, int unit) 546 { 547 struct twe_param *dtp, *atp; 548 struct twe_array_descriptor *ad; 549 struct twe_drive *td; 550 struct twe_attach_args twea; 551 uint32_t newsize; 552 int rv; 553 uint16_t dsize; 554 uint8_t newtype, newstripe; 555 int locs[TWECF_NLOCS]; 556 557 if (unit < 0 || unit >= TWE_MAX_UNITS) 558 return (EINVAL); 559 560 /* Find attached units. */ 561 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 562 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 563 if (rv != 0) { 564 aprint_error("%s: error %d fetching unit summary\n", 565 sc->sc_dv.dv_xname, rv); 566 return (rv); 567 } 568 569 /* For each detected unit, collect size and store in an array. */ 570 td = &sc->sc_units[unit]; 571 572 /* Unit present? */ 573 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 574 /* 575 * XXX Should we check to see if a device has been 576 * XXX attached at this index and detach it if it 577 * XXX has? ("rescan" semantics) 578 */ 579 rv = 0; 580 goto out; 581 } 582 583 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 584 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 585 if (rv != 0) { 586 aprint_error("%s: error %d fetching descriptor size " 587 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 588 goto out; 589 } 590 591 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 592 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 593 if (rv != 0) { 594 aprint_error("%s: error %d fetching array descriptor " 595 "for unit %d\n", sc->sc_dv.dv_xname, rv, unit); 596 goto out; 597 } 598 599 ad = (struct twe_array_descriptor *)atp->tp_data; 600 newtype = ad->configuration; 601 newstripe = ad->stripe_size; 602 free(atp, M_DEVBUF); 603 604 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 605 TWE_PARAM_UNITINFO_Capacity, &newsize); 606 if (rv != 0) { 607 aprint_error( 608 "%s: error %d fetching capacity for unit %d\n", 609 sc->sc_dv.dv_xname, rv, unit); 610 goto out; 611 } 612 613 /* 614 * Have a device, so we need to attach it. If there is currently 615 * something sitting at the slot, and the parameters are different, 616 * then we detach the old device before attaching the new one. 617 */ 618 if (td->td_dev != NULL && 619 td->td_size == newsize && 620 td->td_type == newtype && 621 td->td_stripe == newstripe) { 622 /* Same as the old device; just keep using it. */ 623 rv = 0; 624 goto out; 625 } else if (td->td_dev != NULL) { 626 /* Detach the old device first. */ 627 (void) config_detach(td->td_dev, DETACH_FORCE); 628 td->td_dev = NULL; 629 } else if (td->td_size == 0) 630 sc->sc_nunits++; 631 632 /* 633 * Committed to the new array unit; assign its parameters and 634 * recompute the number of available command openings. 635 */ 636 td->td_size = newsize; 637 td->td_type = newtype; 638 td->td_stripe = newstripe; 639 twe_recompute_openings(sc); 640 641 twea.twea_unit = unit; 642 643 locs[TWECF_UNIT] = unit; 644 645 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 646 twe_print, config_stdsubmatch); 647 648 rv = 0; 649 out: 650 free(dtp, M_DEVBUF); 651 return (rv); 652 } 653 654 static int 655 twe_del_unit(struct twe_softc *sc, int unit) 656 { 657 struct twe_drive *td; 658 659 if (unit < 0 || unit >= TWE_MAX_UNITS) 660 return (EINVAL); 661 662 td = &sc->sc_units[unit]; 663 if (td->td_size != 0) 664 sc->sc_nunits--; 665 td->td_size = 0; 666 td->td_type = 0; 667 td->td_stripe = 0; 668 if (td->td_dev != NULL) { 669 (void) config_detach(td->td_dev, DETACH_FORCE); 670 td->td_dev = NULL; 671 } 672 twe_recompute_openings(sc); 673 return (0); 674 } 675 676 /* 677 * Reset the controller. 678 * MUST BE CALLED AT splbio()! 679 */ 680 static int 681 twe_reset(struct twe_softc *sc) 682 { 683 uint16_t aen; 684 u_int status; 685 volatile u_int32_t junk; 686 int got, rv; 687 688 /* Issue a soft reset. */ 689 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 690 TWE_CTL_CLEAR_HOST_INTR | 691 TWE_CTL_CLEAR_ATTN_INTR | 692 TWE_CTL_MASK_CMD_INTR | 693 TWE_CTL_MASK_RESP_INTR | 694 TWE_CTL_CLEAR_ERROR_STS | 695 TWE_CTL_DISABLE_INTRS); 696 697 /* Wait for attention... */ 698 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 699 printf("%s: timeout waiting for attention interrupt\n", 700 sc->sc_dv.dv_xname); 701 return (-1); 702 } 703 704 /* ...and ACK it. */ 705 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 706 707 /* 708 * Pull AENs out of the controller; look for a soft reset AEN. 709 * Open code this, since we want to detect reset even if the 710 * queue for management tools is full. 711 * 712 * Note that since: 713 * - interrupts are blocked 714 * - we have reset the controller 715 * - acknowledged the pending ATTENTION 716 * that there is no way a pending asynchronous AEN fetch would 717 * finish, so clear the flag. 718 */ 719 sc->sc_flags &= ~TWEF_AEN; 720 for (got = 0;;) { 721 rv = twe_aen_get(sc, &aen); 722 if (rv != 0) 723 printf("%s: error %d while draining event queue\n", 724 sc->sc_dv.dv_xname, rv); 725 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 726 break; 727 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 728 got = 1; 729 twe_aen_enqueue(sc, aen, 1); 730 } 731 732 if (!got) { 733 printf("%s: reset not reported\n", sc->sc_dv.dv_xname); 734 return (-1); 735 } 736 737 /* Check controller status. */ 738 status = twe_inl(sc, TWE_REG_STS); 739 if (twe_status_check(sc, status)) { 740 printf("%s: controller errors detected\n", 741 sc->sc_dv.dv_xname); 742 return (-1); 743 } 744 745 /* Drain the response queue. */ 746 for (;;) { 747 status = twe_inl(sc, TWE_REG_STS); 748 if (twe_status_check(sc, status) != 0) { 749 printf("%s: can't drain response queue\n", 750 sc->sc_dv.dv_xname); 751 return (-1); 752 } 753 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 754 break; 755 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 756 } 757 758 return (0); 759 } 760 761 /* 762 * Print autoconfiguration message for a sub-device. 763 */ 764 static int 765 twe_print(void *aux, const char *pnp) 766 { 767 struct twe_attach_args *twea; 768 769 twea = aux; 770 771 if (pnp != NULL) 772 aprint_normal("block device at %s", pnp); 773 aprint_normal(" unit %d", twea->twea_unit); 774 return (UNCONF); 775 } 776 777 /* 778 * Interrupt service routine. 779 */ 780 static int 781 twe_intr(void *arg) 782 { 783 struct twe_softc *sc; 784 u_int status; 785 int caught, rv; 786 787 sc = arg; 788 caught = 0; 789 status = twe_inl(sc, TWE_REG_STS); 790 twe_status_check(sc, status); 791 792 /* Host interrupts - purpose unknown. */ 793 if ((status & TWE_STS_HOST_INTR) != 0) { 794 #ifdef DEBUG 795 printf("%s: host interrupt\n", sc->sc_dv.dv_xname); 796 #endif 797 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 798 caught = 1; 799 } 800 801 /* 802 * Attention interrupts, signalled when a controller or child device 803 * state change has occurred. 804 */ 805 if ((status & TWE_STS_ATTN_INTR) != 0) { 806 rv = twe_aen_get(sc, NULL); 807 if (rv != 0) 808 printf("%s: unable to retrieve AEN (%d)\n", 809 sc->sc_dv.dv_xname, rv); 810 else 811 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 812 caught = 1; 813 } 814 815 /* 816 * Command interrupts, signalled when the controller can accept more 817 * commands. We don't use this; instead, we try to submit commands 818 * when we receive them, and when other commands have completed. 819 * Mask it so we don't get another one. 820 */ 821 if ((status & TWE_STS_CMD_INTR) != 0) { 822 #ifdef DEBUG 823 printf("%s: command interrupt\n", sc->sc_dv.dv_xname); 824 #endif 825 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 826 caught = 1; 827 } 828 829 if ((status & TWE_STS_RESP_INTR) != 0) { 830 twe_poll(sc); 831 caught = 1; 832 } 833 834 return (caught); 835 } 836 837 /* 838 * Fetch an AEN. Even though this is really like parameter 839 * retrieval, we handle this specially, because we issue this 840 * AEN retrieval command from interrupt context, and thus 841 * reserve a CCB for it to avoid resource shortage. 842 * 843 * XXX There are still potential resource shortages we could 844 * XXX encounter. Consider pre-allocating all AEN-related 845 * XXX resources. 846 * 847 * MUST BE CALLED AT splbio()! 848 */ 849 static int 850 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 851 { 852 struct twe_ccb *ccb; 853 struct twe_cmd *tc; 854 struct twe_param *tp; 855 int rv; 856 857 /* 858 * If we're already retrieving an AEN, just wait; another 859 * retrieval will be chained after the current one completes. 860 */ 861 if (sc->sc_flags & TWEF_AEN) { 862 /* 863 * It is a fatal software programming error to attempt 864 * to fetch an AEN synchronously when an AEN fetch is 865 * already pending. 866 */ 867 KASSERT(aenp == NULL); 868 return (0); 869 } 870 871 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 872 if (tp == NULL) 873 return (ENOMEM); 874 875 ccb = twe_ccb_alloc(sc, 876 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 877 KASSERT(ccb != NULL); 878 879 ccb->ccb_data = tp; 880 ccb->ccb_datasize = TWE_SECTOR_SIZE; 881 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 882 ccb->ccb_tx.tx_context = tp; 883 ccb->ccb_tx.tx_dv = &sc->sc_dv; 884 885 tc = ccb->ccb_cmd; 886 tc->tc_size = 2; 887 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 888 tc->tc_unit = 0; 889 tc->tc_count = htole16(1); 890 891 /* Fill in the outbound parameter data. */ 892 tp->tp_table_id = htole16(TWE_PARAM_AEN); 893 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 894 tp->tp_param_size = 2; 895 896 /* Map the transfer. */ 897 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 898 twe_ccb_free(sc, ccb); 899 goto done; 900 } 901 902 /* Enqueue the command and wait. */ 903 if (aenp != NULL) { 904 rv = twe_ccb_poll(sc, ccb, 5); 905 twe_ccb_unmap(sc, ccb); 906 twe_ccb_free(sc, ccb); 907 if (rv == 0) 908 *aenp = le16toh(*(uint16_t *)tp->tp_data); 909 free(tp, M_DEVBUF); 910 } else { 911 sc->sc_flags |= TWEF_AEN; 912 twe_ccb_enqueue(sc, ccb); 913 rv = 0; 914 } 915 916 done: 917 return (rv); 918 } 919 920 /* 921 * Handle an AEN returned by the controller. 922 * MUST BE CALLED AT splbio()! 923 */ 924 static void 925 twe_aen_handler(struct twe_ccb *ccb, int error) 926 { 927 struct twe_softc *sc; 928 struct twe_param *tp; 929 uint16_t aen; 930 int rv; 931 932 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 933 tp = ccb->ccb_tx.tx_context; 934 twe_ccb_unmap(sc, ccb); 935 936 sc->sc_flags &= ~TWEF_AEN; 937 938 if (error) { 939 printf("%s: error retrieving AEN\n", sc->sc_dv.dv_xname); 940 aen = TWE_AEN_QUEUE_EMPTY; 941 } else 942 aen = le16toh(*(u_int16_t *)tp->tp_data); 943 free(tp, M_DEVBUF); 944 twe_ccb_free(sc, ccb); 945 946 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 947 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 948 return; 949 } 950 951 twe_aen_enqueue(sc, aen, 0); 952 953 /* 954 * Chain another retrieval in case interrupts have been 955 * coalesced. 956 */ 957 rv = twe_aen_get(sc, NULL); 958 if (rv != 0) 959 printf("%s: unable to retrieve AEN (%d)\n", 960 sc->sc_dv.dv_xname, rv); 961 } 962 963 static void 964 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 965 { 966 const char *str, *msg; 967 int s, next, nextnext, level; 968 969 /* 970 * First report the AEN on the console. Maybe. 971 */ 972 if (! quiet) { 973 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 974 if (str == NULL) { 975 printf("%s: unknown AEN 0x%04x\n", 976 sc->sc_dv.dv_xname, aen); 977 } else { 978 msg = str + 3; 979 switch (str[1]) { 980 case 'E': level = LOG_EMERG; break; 981 case 'a': level = LOG_ALERT; break; 982 case 'c': level = LOG_CRIT; break; 983 case 'e': level = LOG_ERR; break; 984 case 'w': level = LOG_WARNING; break; 985 case 'n': level = LOG_NOTICE; break; 986 case 'i': level = LOG_INFO; break; 987 case 'd': level = LOG_DEBUG; break; 988 default: 989 /* Don't use syslog. */ 990 level = -1; 991 } 992 993 if (level < 0) { 994 switch (str[0]) { 995 case 'u': 996 case 'p': 997 printf("%s: %s %d: %s\n", 998 sc->sc_dv.dv_xname, 999 str[0] == 'u' ? "unit" : "port", 1000 TWE_AEN_UNIT(aen), msg); 1001 break; 1002 1003 default: 1004 printf("%s: %s\n", 1005 sc->sc_dv.dv_xname, msg); 1006 } 1007 } else { 1008 switch (str[0]) { 1009 case 'u': 1010 case 'p': 1011 log(level, "%s: %s %d: %s\n", 1012 sc->sc_dv.dv_xname, 1013 str[0] == 'u' ? "unit" : "port", 1014 TWE_AEN_UNIT(aen), msg); 1015 break; 1016 1017 default: 1018 log(level, "%s: %s\n", 1019 sc->sc_dv.dv_xname, msg); 1020 } 1021 } 1022 } 1023 } 1024 1025 /* Now enqueue the AEN for mangement tools. */ 1026 s = splbio(); 1027 1028 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1029 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1030 1031 /* 1032 * If this is the last free slot, then queue up a "queue 1033 * full" message. 1034 */ 1035 if (nextnext == sc->sc_aen_tail) 1036 aen = TWE_AEN_QUEUE_FULL; 1037 1038 if (next != sc->sc_aen_tail) { 1039 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1040 sc->sc_aen_head = next; 1041 } 1042 1043 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1044 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1045 wakeup(&sc->sc_aen_queue); 1046 } 1047 1048 splx(s); 1049 } 1050 1051 /* NOTE: Must be called at splbio(). */ 1052 static uint16_t 1053 twe_aen_dequeue(struct twe_softc *sc) 1054 { 1055 uint16_t aen; 1056 1057 if (sc->sc_aen_tail == sc->sc_aen_head) 1058 aen = TWE_AEN_QUEUE_EMPTY; 1059 else { 1060 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1061 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1062 } 1063 1064 return (aen); 1065 } 1066 1067 /* 1068 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1069 * fetch 1, 2, and 4 byte parameter values, respectively. 1070 */ 1071 int 1072 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1073 uint8_t *valp) 1074 { 1075 struct twe_param *tp; 1076 int rv; 1077 1078 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1079 if (rv != 0) 1080 return (rv); 1081 *valp = *(uint8_t *)tp->tp_data; 1082 free(tp, M_DEVBUF); 1083 return (0); 1084 } 1085 1086 int 1087 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1088 uint16_t *valp) 1089 { 1090 struct twe_param *tp; 1091 int rv; 1092 1093 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1094 if (rv != 0) 1095 return (rv); 1096 *valp = le16toh(*(uint16_t *)tp->tp_data); 1097 free(tp, M_DEVBUF); 1098 return (0); 1099 } 1100 1101 int 1102 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1103 uint32_t *valp) 1104 { 1105 struct twe_param *tp; 1106 int rv; 1107 1108 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1109 if (rv != 0) 1110 return (rv); 1111 *valp = le32toh(*(uint32_t *)tp->tp_data); 1112 free(tp, M_DEVBUF); 1113 return (0); 1114 } 1115 1116 /* 1117 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1118 * it will be called with generated context when the command has completed. 1119 * If no callback is provided, the command will be executed synchronously 1120 * and a pointer to a buffer containing the data returned. 1121 * 1122 * The caller or callback is responsible for freeing the buffer. 1123 * 1124 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1125 */ 1126 int 1127 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1128 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1129 { 1130 struct twe_ccb *ccb; 1131 struct twe_cmd *tc; 1132 struct twe_param *tp; 1133 int rv, s; 1134 1135 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1136 if (tp == NULL) 1137 return ENOMEM; 1138 1139 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1140 KASSERT(ccb != NULL); 1141 1142 ccb->ccb_data = tp; 1143 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1144 ccb->ccb_tx.tx_handler = func; 1145 ccb->ccb_tx.tx_context = tp; 1146 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1147 1148 tc = ccb->ccb_cmd; 1149 tc->tc_size = 2; 1150 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1151 tc->tc_unit = 0; 1152 tc->tc_count = htole16(1); 1153 1154 /* Fill in the outbound parameter data. */ 1155 tp->tp_table_id = htole16(table_id); 1156 tp->tp_param_id = param_id; 1157 tp->tp_param_size = size; 1158 1159 /* Map the transfer. */ 1160 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1161 twe_ccb_free(sc, ccb); 1162 goto done; 1163 } 1164 1165 /* Submit the command and either wait or let the callback handle it. */ 1166 if (func == NULL) { 1167 s = splbio(); 1168 rv = twe_ccb_poll(sc, ccb, 5); 1169 twe_ccb_unmap(sc, ccb); 1170 twe_ccb_free(sc, ccb); 1171 splx(s); 1172 } else { 1173 #ifdef DEBUG 1174 if (pbuf != NULL) 1175 panic("both func and pbuf defined"); 1176 #endif 1177 twe_ccb_enqueue(sc, ccb); 1178 return 0; 1179 } 1180 1181 done: 1182 if (pbuf == NULL || rv != 0) 1183 free(tp, M_DEVBUF); 1184 else if (pbuf != NULL && rv == 0) 1185 *pbuf = tp; 1186 return rv; 1187 } 1188 1189 /* 1190 * Execute a TWE_OP_SET_PARAM command. 1191 * 1192 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1193 */ 1194 static int 1195 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1196 void *sbuf) 1197 { 1198 struct twe_ccb *ccb; 1199 struct twe_cmd *tc; 1200 struct twe_param *tp; 1201 int rv, s; 1202 1203 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1204 if (tp == NULL) 1205 return ENOMEM; 1206 1207 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1208 KASSERT(ccb != NULL); 1209 1210 ccb->ccb_data = tp; 1211 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1212 ccb->ccb_tx.tx_handler = 0; 1213 ccb->ccb_tx.tx_context = tp; 1214 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1215 1216 tc = ccb->ccb_cmd; 1217 tc->tc_size = 2; 1218 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1219 tc->tc_unit = 0; 1220 tc->tc_count = htole16(1); 1221 1222 /* Fill in the outbound parameter data. */ 1223 tp->tp_table_id = htole16(table_id); 1224 tp->tp_param_id = param_id; 1225 tp->tp_param_size = size; 1226 memcpy(tp->tp_data, sbuf, size); 1227 1228 /* Map the transfer. */ 1229 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1230 twe_ccb_free(sc, ccb); 1231 goto done; 1232 } 1233 1234 /* Submit the command and wait. */ 1235 s = splbio(); 1236 rv = twe_ccb_poll(sc, ccb, 5); 1237 twe_ccb_unmap(sc, ccb); 1238 twe_ccb_free(sc, ccb); 1239 splx(s); 1240 done: 1241 free(tp, M_DEVBUF); 1242 return (rv); 1243 } 1244 1245 /* 1246 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1247 * Must be called with interrupts blocked. 1248 */ 1249 static int 1250 twe_init_connection(struct twe_softc *sc) 1251 { 1252 struct twe_ccb *ccb; 1253 struct twe_cmd *tc; 1254 int rv; 1255 1256 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1257 return (EAGAIN); 1258 1259 /* Build the command. */ 1260 tc = ccb->ccb_cmd; 1261 tc->tc_size = 3; 1262 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1263 tc->tc_unit = 0; 1264 tc->tc_count = htole16(TWE_MAX_CMDS); 1265 tc->tc_args.init_connection.response_queue_pointer = 0; 1266 1267 /* Submit the command for immediate execution. */ 1268 rv = twe_ccb_poll(sc, ccb, 5); 1269 twe_ccb_free(sc, ccb); 1270 return (rv); 1271 } 1272 1273 /* 1274 * Poll the controller for completed commands. Must be called with 1275 * interrupts blocked. 1276 */ 1277 static void 1278 twe_poll(struct twe_softc *sc) 1279 { 1280 struct twe_ccb *ccb; 1281 int found; 1282 u_int status, cmdid; 1283 1284 found = 0; 1285 1286 for (;;) { 1287 status = twe_inl(sc, TWE_REG_STS); 1288 twe_status_check(sc, status); 1289 1290 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1291 break; 1292 1293 found = 1; 1294 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1295 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1296 if (cmdid >= TWE_MAX_QUEUECNT) { 1297 printf("%s: bad cmdid %d\n", sc->sc_dv.dv_xname, cmdid); 1298 continue; 1299 } 1300 1301 ccb = sc->sc_ccbs + cmdid; 1302 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1303 printf("%s: CCB for cmdid %d not active\n", 1304 sc->sc_dv.dv_xname, cmdid); 1305 continue; 1306 } 1307 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1308 1309 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1310 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, 1311 sizeof(struct twe_cmd), 1312 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1313 1314 /* Pass notification to upper layers. */ 1315 if (ccb->ccb_tx.tx_handler != NULL) 1316 (*ccb->ccb_tx.tx_handler)(ccb, 1317 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1318 } 1319 1320 /* If any commands have completed, run the software queue. */ 1321 if (found) 1322 twe_ccb_enqueue(sc, NULL); 1323 } 1324 1325 /* 1326 * Wait for `status' to be set in the controller status register. Return 1327 * zero if found, non-zero if the operation timed out. 1328 */ 1329 static int 1330 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1331 { 1332 1333 for (timo *= 10; timo != 0; timo--) { 1334 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1335 break; 1336 delay(100000); 1337 } 1338 1339 return (timo == 0); 1340 } 1341 1342 /* 1343 * Clear a PCI parity error. 1344 */ 1345 static void 1346 twe_clear_pci_parity_error(struct twe_softc *sc) 1347 { 1348 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1349 1350 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1351 } 1352 1353 1354 /* 1355 * Clear a PCI abort. 1356 */ 1357 static void 1358 twe_clear_pci_abort(struct twe_softc *sc) 1359 { 1360 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1361 1362 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1363 } 1364 1365 /* 1366 * Complain if the status bits aren't what we expect. 1367 */ 1368 static int 1369 twe_status_check(struct twe_softc *sc, u_int status) 1370 { 1371 int rv; 1372 1373 rv = 0; 1374 1375 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1376 printf("%s: missing status bits: 0x%08x\n", sc->sc_dv.dv_xname, 1377 status & ~TWE_STS_EXPECTED_BITS); 1378 rv = -1; 1379 } 1380 1381 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1382 printf("%s: unexpected status bits: 0x%08x\n", 1383 sc->sc_dv.dv_xname, status & TWE_STS_UNEXPECTED_BITS); 1384 rv = -1; 1385 if (status & TWE_STS_PCI_PARITY_ERROR) { 1386 printf("%s: PCI parity error: Reseat card, move card " 1387 "or buggy device present.\n", 1388 sc->sc_dv.dv_xname); 1389 twe_clear_pci_parity_error(sc); 1390 } 1391 if (status & TWE_STS_PCI_ABORT) { 1392 printf("%s: PCI abort, clearing.\n", 1393 sc->sc_dv.dv_xname); 1394 twe_clear_pci_abort(sc); 1395 } 1396 } 1397 1398 return (rv); 1399 } 1400 1401 /* 1402 * Allocate and initialise a CCB. 1403 */ 1404 static inline void 1405 twe_ccb_init(struct twe_softc *sc __unused, struct twe_ccb *ccb, int flags) 1406 { 1407 struct twe_cmd *tc; 1408 1409 ccb->ccb_tx.tx_handler = NULL; 1410 ccb->ccb_flags = flags; 1411 tc = ccb->ccb_cmd; 1412 tc->tc_status = 0; 1413 tc->tc_flags = 0; 1414 tc->tc_cmdid = ccb->ccb_cmdid; 1415 } 1416 1417 struct twe_ccb * 1418 twe_ccb_alloc(struct twe_softc *sc, int flags) 1419 { 1420 struct twe_ccb *ccb; 1421 int s; 1422 1423 s = splbio(); 1424 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1425 /* Use the reserved CCB. */ 1426 ccb = sc->sc_ccbs; 1427 } else { 1428 /* Allocate a CCB and command block. */ 1429 if (__predict_false((ccb = 1430 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1431 splx(s); 1432 return (NULL); 1433 } 1434 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1435 } 1436 #ifdef DIAGNOSTIC 1437 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1438 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1439 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1440 panic("twe_ccb_alloc: CCB %ld already allocated", 1441 (long)(ccb - sc->sc_ccbs)); 1442 flags |= TWE_CCB_ALLOCED; 1443 #endif 1444 splx(s); 1445 1446 twe_ccb_init(sc, ccb, flags); 1447 return (ccb); 1448 } 1449 1450 struct twe_ccb * 1451 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1452 { 1453 struct twe_ccb *ccb; 1454 int s; 1455 1456 KASSERT((flags & TWE_CCB_AEN) == 0); 1457 1458 s = splbio(); 1459 while (__predict_false((ccb = 1460 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1461 sc->sc_flags |= TWEF_WAIT_CCB; 1462 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1463 } 1464 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1465 #ifdef DIAGNOSTIC 1466 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1467 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1468 (long)(ccb - sc->sc_ccbs)); 1469 flags |= TWE_CCB_ALLOCED; 1470 #endif 1471 splx(s); 1472 1473 twe_ccb_init(sc, ccb, flags); 1474 return (ccb); 1475 } 1476 1477 /* 1478 * Free a CCB. 1479 */ 1480 void 1481 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1482 { 1483 int s; 1484 1485 s = splbio(); 1486 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1487 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1488 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1489 sc->sc_flags &= ~TWEF_WAIT_CCB; 1490 wakeup(&sc->sc_ccb_freelist); 1491 } 1492 } 1493 ccb->ccb_flags = 0; 1494 splx(s); 1495 } 1496 1497 /* 1498 * Map the specified CCB's command block and data buffer (if any) into 1499 * controller visible space. Perform DMA synchronisation. 1500 */ 1501 int 1502 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1503 { 1504 struct twe_cmd *tc; 1505 int flags, nsegs, i, s, rv; 1506 void *data; 1507 1508 /* 1509 * The data as a whole must be 512-byte aligned. 1510 */ 1511 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1512 s = splvm(); 1513 /* XXX */ 1514 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1515 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1516 splx(s); 1517 data = (void *)ccb->ccb_abuf; 1518 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1519 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1520 } else { 1521 ccb->ccb_abuf = (vaddr_t)0; 1522 data = ccb->ccb_data; 1523 } 1524 1525 /* 1526 * Map the data buffer into bus space and build the S/G list. 1527 */ 1528 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1529 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1530 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1531 BUS_DMA_READ : BUS_DMA_WRITE)); 1532 if (rv != 0) { 1533 if (ccb->ccb_abuf != (vaddr_t)0) { 1534 s = splvm(); 1535 /* XXX */ 1536 uvm_km_free(kmem_map, ccb->ccb_abuf, 1537 ccb->ccb_datasize, UVM_KMF_WIRED); 1538 splx(s); 1539 } 1540 return (rv); 1541 } 1542 1543 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1544 tc = ccb->ccb_cmd; 1545 tc->tc_size += 2 * nsegs; 1546 1547 /* The location of the S/G list is dependant upon command type. */ 1548 switch (tc->tc_opcode >> 5) { 1549 case 2: 1550 for (i = 0; i < nsegs; i++) { 1551 tc->tc_args.param.sgl[i].tsg_address = 1552 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1553 tc->tc_args.param.sgl[i].tsg_length = 1554 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1555 } 1556 /* XXX Needed? */ 1557 for (; i < TWE_SG_SIZE; i++) { 1558 tc->tc_args.param.sgl[i].tsg_address = 0; 1559 tc->tc_args.param.sgl[i].tsg_length = 0; 1560 } 1561 break; 1562 case 3: 1563 for (i = 0; i < nsegs; i++) { 1564 tc->tc_args.io.sgl[i].tsg_address = 1565 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1566 tc->tc_args.io.sgl[i].tsg_length = 1567 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1568 } 1569 /* XXX Needed? */ 1570 for (; i < TWE_SG_SIZE; i++) { 1571 tc->tc_args.io.sgl[i].tsg_address = 0; 1572 tc->tc_args.io.sgl[i].tsg_length = 0; 1573 } 1574 break; 1575 default: 1576 /* 1577 * In all likelihood, this is a command passed from 1578 * management tools in userspace where no S/G list is 1579 * necessary because no data is being passed. 1580 */ 1581 break; 1582 } 1583 1584 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1585 flags = BUS_DMASYNC_PREREAD; 1586 else 1587 flags = 0; 1588 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1589 flags |= BUS_DMASYNC_PREWRITE; 1590 1591 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1592 ccb->ccb_datasize, flags); 1593 return (0); 1594 } 1595 1596 /* 1597 * Unmap the specified CCB's command block and data buffer (if any) and 1598 * perform DMA synchronisation. 1599 */ 1600 void 1601 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1602 { 1603 int flags, s; 1604 1605 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1606 flags = BUS_DMASYNC_POSTREAD; 1607 else 1608 flags = 0; 1609 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1610 flags |= BUS_DMASYNC_POSTWRITE; 1611 1612 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1613 ccb->ccb_datasize, flags); 1614 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1615 1616 if (ccb->ccb_abuf != (vaddr_t)0) { 1617 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1618 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1619 ccb->ccb_datasize); 1620 s = splvm(); 1621 /* XXX */ 1622 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1623 UVM_KMF_WIRED); 1624 splx(s); 1625 } 1626 } 1627 1628 /* 1629 * Submit a command to the controller and poll on completion. Return 1630 * non-zero on timeout (but don't check status, as some command types don't 1631 * return status). Must be called with interrupts blocked. 1632 */ 1633 int 1634 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1635 { 1636 int rv; 1637 1638 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1639 return (rv); 1640 1641 for (timo *= 1000; timo != 0; timo--) { 1642 twe_poll(sc); 1643 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1644 break; 1645 DELAY(100); 1646 } 1647 1648 return (timo == 0); 1649 } 1650 1651 /* 1652 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1653 * the order that they were enqueued and try to submit their command blocks 1654 * to the controller for execution. 1655 */ 1656 void 1657 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1658 { 1659 int s; 1660 1661 s = splbio(); 1662 1663 if (ccb != NULL) 1664 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1665 1666 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1667 if (twe_ccb_submit(sc, ccb)) 1668 break; 1669 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1670 } 1671 1672 splx(s); 1673 } 1674 1675 /* 1676 * Submit the command block associated with the specified CCB to the 1677 * controller for execution. Must be called with interrupts blocked. 1678 */ 1679 int 1680 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1681 { 1682 bus_addr_t pa; 1683 int rv; 1684 u_int status; 1685 1686 /* Check to see if we can post a command. */ 1687 status = twe_inl(sc, TWE_REG_STS); 1688 twe_status_check(sc, status); 1689 1690 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1691 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1692 (caddr_t)ccb->ccb_cmd - sc->sc_cmds, sizeof(struct twe_cmd), 1693 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1694 #ifdef DIAGNOSTIC 1695 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1696 panic("%s: CCB %ld not ALLOCED\n", 1697 sc->sc_dv.dv_xname, (long)(ccb - sc->sc_ccbs)); 1698 #endif 1699 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1700 pa = sc->sc_cmds_paddr + 1701 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1702 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1703 rv = 0; 1704 } else 1705 rv = EBUSY; 1706 1707 return (rv); 1708 } 1709 1710 1711 /* 1712 * Accept an open operation on the control device. 1713 */ 1714 static int 1715 tweopen(dev_t dev, int flag __unused, int mode __unused, struct lwp *l __unused) 1716 { 1717 struct twe_softc *twe; 1718 1719 if ((twe = device_lookup(&twe_cd, minor(dev))) == NULL) 1720 return (ENXIO); 1721 if ((twe->sc_flags & TWEF_OPEN) != 0) 1722 return (EBUSY); 1723 1724 twe->sc_flags |= TWEF_OPEN; 1725 return (0); 1726 } 1727 1728 /* 1729 * Accept the last close on the control device. 1730 */ 1731 static int 1732 tweclose(dev_t dev, int flag __unused, int mode __unused, 1733 struct lwp *l __unused) 1734 { 1735 struct twe_softc *twe; 1736 1737 twe = device_lookup(&twe_cd, minor(dev)); 1738 twe->sc_flags &= ~TWEF_OPEN; 1739 return (0); 1740 } 1741 1742 void 1743 twe_ccb_wait_handler(struct twe_ccb *ccb, int error __unused) 1744 { 1745 1746 /* Just wake up the sleeper. */ 1747 wakeup(ccb); 1748 } 1749 1750 /* 1751 * Handle control operations. 1752 */ 1753 static int 1754 tweioctl(dev_t dev, u_long cmd, caddr_t data, int flag __unused, 1755 struct lwp *l __unused) 1756 { 1757 struct twe_softc *twe; 1758 struct twe_ccb *ccb; 1759 struct twe_param *param; 1760 struct twe_usercommand *tu; 1761 struct twe_paramcommand *tp; 1762 struct twe_drivecommand *td; 1763 void *pdata = NULL; 1764 int s, error = 0; 1765 u_int8_t cmdid; 1766 1767 twe = device_lookup(&twe_cd, minor(dev)); 1768 tu = (struct twe_usercommand *)data; 1769 tp = (struct twe_paramcommand *)data; 1770 td = (struct twe_drivecommand *)data; 1771 1772 /* This is intended to be compatible with the FreeBSD interface. */ 1773 switch (cmd) { 1774 case TWEIO_COMMAND: 1775 if (securelevel >= 2) 1776 return (EPERM); 1777 1778 /* XXX mutex */ 1779 if (tu->tu_size > 0) { 1780 /* 1781 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1782 * it's really necessary, first. 1783 */ 1784 if (tu->tu_size > TWE_SECTOR_SIZE) { 1785 #ifdef TWE_DEBUG 1786 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1787 twe->sc_dv.dv_xname, tu->tu_size); 1788 #endif 1789 return EINVAL; 1790 } 1791 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1792 error = copyin(tu->tu_data, pdata, tu->tu_size); 1793 if (error != 0) 1794 goto done; 1795 ccb = twe_ccb_alloc_wait(twe, 1796 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1797 KASSERT(ccb != NULL); 1798 ccb->ccb_data = pdata; 1799 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1800 } else { 1801 ccb = twe_ccb_alloc_wait(twe, 0); 1802 KASSERT(ccb != NULL); 1803 } 1804 1805 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1806 ccb->ccb_tx.tx_context = NULL; 1807 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1808 1809 cmdid = ccb->ccb_cmdid; 1810 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1811 ccb->ccb_cmd->tc_cmdid = cmdid; 1812 1813 /* Map the transfer. */ 1814 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1815 twe_ccb_free(twe, ccb); 1816 goto done; 1817 } 1818 1819 /* Submit the command and wait up to 1 minute. */ 1820 error = 0; 1821 twe_ccb_enqueue(twe, ccb); 1822 s = splbio(); 1823 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1824 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1825 60 * hz)) != 0) 1826 break; 1827 splx(s); 1828 1829 /* Copy the command back to the ioctl argument. */ 1830 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1831 #ifdef TWE_DEBUG 1832 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1833 "tc_status = 0x%02x\n", twe->sc_dv.dv_xname, 1834 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1835 #endif 1836 1837 s = splbio(); 1838 twe_ccb_free(twe, ccb); 1839 splx(s); 1840 1841 if (tu->tu_size > 0) 1842 error = copyout(pdata, tu->tu_data, tu->tu_size); 1843 goto done; 1844 1845 case TWEIO_STATS: 1846 return (ENOENT); 1847 1848 case TWEIO_AEN_POLL: 1849 s = splbio(); 1850 *(u_int *)data = twe_aen_dequeue(twe); 1851 splx(s); 1852 return (0); 1853 1854 case TWEIO_AEN_WAIT: 1855 s = splbio(); 1856 while ((*(u_int *)data = 1857 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1858 twe->sc_flags |= TWEF_AENQ_WAIT; 1859 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1860 "tweaen", 0); 1861 if (error == EINTR) { 1862 splx(s); 1863 return (error); 1864 } 1865 } 1866 splx(s); 1867 return (0); 1868 1869 case TWEIO_GET_PARAM: 1870 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1871 tp->tp_size, 0, ¶m); 1872 if (error != 0) 1873 return (error); 1874 if (param->tp_param_size > tp->tp_size) { 1875 error = EFAULT; 1876 goto done; 1877 } 1878 error = copyout(param->tp_data, tp->tp_data, 1879 param->tp_param_size); 1880 free(param, M_DEVBUF); 1881 goto done; 1882 1883 case TWEIO_SET_PARAM: 1884 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1885 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1886 goto done; 1887 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1888 tp->tp_size, pdata); 1889 goto done; 1890 1891 case TWEIO_RESET: 1892 s = splbio(); 1893 twe_reset(twe); 1894 splx(s); 1895 return (0); 1896 1897 case TWEIO_ADD_UNIT: 1898 /* XXX mutex */ 1899 return (twe_add_unit(twe, td->td_unit)); 1900 1901 case TWEIO_DEL_UNIT: 1902 /* XXX mutex */ 1903 return (twe_del_unit(twe, td->td_unit)); 1904 1905 default: 1906 return EINVAL; 1907 } 1908 done: 1909 if (pdata) 1910 free(pdata, M_DEVBUF); 1911 return error; 1912 } 1913 1914 const struct cdevsw twe_cdevsw = { 1915 tweopen, tweclose, noread, nowrite, tweioctl, 1916 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 1917 }; 1918 1919 /* 1920 * Print some information about the controller 1921 */ 1922 static void 1923 twe_describe_controller(struct twe_softc *sc) 1924 { 1925 struct twe_param *p[6]; 1926 int i, rv = 0; 1927 uint32_t dsize; 1928 uint8_t ports; 1929 1930 ports = 0; 1931 1932 /* get the port count */ 1933 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1934 TWE_PARAM_CONTROLLER_PortCount, &ports); 1935 1936 /* get version strings */ 1937 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1938 16, NULL, &p[0]); 1939 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1940 16, NULL, &p[1]); 1941 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1942 16, NULL, &p[2]); 1943 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1944 8, NULL, &p[3]); 1945 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1946 8, NULL, &p[4]); 1947 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1948 8, NULL, &p[5]); 1949 1950 if (rv) { 1951 /* some error occurred */ 1952 aprint_error("%s: failed to fetch version information\n", 1953 sc->sc_dv.dv_xname); 1954 return; 1955 } 1956 1957 aprint_normal("%s: %d ports, Firmware %.16s, BIOS %.16s\n", 1958 sc->sc_dv.dv_xname, ports, 1959 p[1]->tp_data, p[2]->tp_data); 1960 1961 aprint_verbose("%s: Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1962 sc->sc_dv.dv_xname, 1963 p[0]->tp_data, p[3]->tp_data, 1964 p[4]->tp_data, p[5]->tp_data); 1965 1966 free(p[0], M_DEVBUF); 1967 free(p[1], M_DEVBUF); 1968 free(p[2], M_DEVBUF); 1969 free(p[3], M_DEVBUF); 1970 free(p[4], M_DEVBUF); 1971 free(p[5], M_DEVBUF); 1972 1973 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1974 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1975 if (rv) { 1976 aprint_error("%s: failed to get drive status summary\n", 1977 sc->sc_dv.dv_xname); 1978 return; 1979 } 1980 for (i = 0; i < ports; i++) { 1981 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1982 continue; 1983 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1984 TWE_PARAM_DRIVEINFO_Size, &dsize); 1985 if (rv) { 1986 aprint_error( 1987 "%s: unable to get drive size for port %d\n", 1988 sc->sc_dv.dv_xname, i); 1989 continue; 1990 } 1991 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1992 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1993 if (rv) { 1994 aprint_error( 1995 "%s: unable to get drive model for port %d\n", 1996 sc->sc_dv.dv_xname, i); 1997 continue; 1998 } 1999 aprint_verbose("%s: port %d: %.40s %d MB\n", sc->sc_dv.dv_xname, 2000 i, p[1]->tp_data, dsize / 2048); 2001 free(p[1], M_DEVBUF); 2002 } 2003 free(p[0], M_DEVBUF); 2004 } 2005
Indexes created Wed Oct 01 07:09:59 GMT 2025