twe.c revision 1.84.16.3
1 /* $NetBSD: twe.c,v 1.84.16.3 2008/06/29 09:33:09 mjf Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 2000 Michael Smith 34 * Copyright (c) 2000 BSDi 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 56 * SUCH DAMAGE. 57 * 58 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 59 */ 60 61 /* 62 * Driver for the 3ware Escalade family of RAID controllers. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.84.16.3 2008/06/29 09:33:09 mjf Exp $"); 67 68 #include <sys/param.h> 69 #include <sys/systm.h> 70 #include <sys/kernel.h> 71 #include <sys/device.h> 72 #include <sys/queue.h> 73 #include <sys/proc.h> 74 #include <sys/buf.h> 75 #include <sys/endian.h> 76 #include <sys/malloc.h> 77 #include <sys/conf.h> 78 #include <sys/disk.h> 79 #include <sys/sysctl.h> 80 #include <sys/syslog.h> 81 #include <sys/kauth.h> 82 83 #include <uvm/uvm_extern.h> 84 85 #include <sys/bswap.h> 86 #include <sys/bus.h> 87 88 #include <dev/pci/pcireg.h> 89 #include <dev/pci/pcivar.h> 90 #include <dev/pci/pcidevs.h> 91 #include <dev/pci/twereg.h> 92 #include <dev/pci/twevar.h> 93 #include <dev/pci/tweio.h> 94 95 #include "locators.h" 96 97 #define PCI_CBIO 0x10 98 99 static int twe_aen_get(struct twe_softc *, uint16_t *); 100 static void twe_aen_handler(struct twe_ccb *, int); 101 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 102 static uint16_t twe_aen_dequeue(struct twe_softc *); 103 104 static void twe_attach(struct device *, struct device *, void *); 105 static int twe_init_connection(struct twe_softc *); 106 static int twe_intr(void *); 107 static int twe_match(struct device *, struct cfdata *, void *); 108 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 109 static void twe_poll(struct twe_softc *); 110 static int twe_print(void *, const char *); 111 static int twe_reset(struct twe_softc *); 112 static int twe_status_check(struct twe_softc *, u_int); 113 static int twe_status_wait(struct twe_softc *, u_int, int); 114 static void twe_describe_controller(struct twe_softc *); 115 static void twe_clear_pci_abort(struct twe_softc *sc); 116 static void twe_clear_pci_parity_error(struct twe_softc *sc); 117 118 static int twe_add_unit(struct twe_softc *, int); 119 static int twe_del_unit(struct twe_softc *, int); 120 static int twe_init_connection(struct twe_softc *); 121 122 static inline u_int32_t twe_inl(struct twe_softc *, int); 123 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 124 125 static int tweopen(dev_t, int, int, struct lwp *); 126 static int tweclose(dev_t, int, int, struct lwp *); 127 static int tweioctl(dev_t, u_long, void *, int, struct lwp *); 128 129 extern struct cfdriver twe_cd; 130 131 CFATTACH_DECL(twe, sizeof(struct twe_softc), 132 twe_match, twe_attach, NULL, NULL); 133 134 const struct cdevsw twe_cdevsw = { 135 tweopen, tweclose, noread, nowrite, tweioctl, 136 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 137 }; 138 139 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 140 const char twever[] = "1.50.01.002"; 141 142 /* 143 * Tables to convert numeric codes to strings. 144 */ 145 const struct twe_code_table twe_table_status[] = { 146 { 0x00, "successful completion" }, 147 148 /* info */ 149 { 0x42, "command in progress" }, 150 { 0x6c, "retrying interface CRC error from UDMA command" }, 151 152 /* warning */ 153 { 0x81, "redundant/inconsequential request ignored" }, 154 { 0x8e, "failed to write zeroes to LBA 0" }, 155 { 0x8f, "failed to profile TwinStor zones" }, 156 157 /* fatal */ 158 { 0xc1, "aborted due to system command or reconfiguration" }, 159 { 0xc4, "aborted" }, 160 { 0xc5, "access error" }, 161 { 0xc6, "access violation" }, 162 { 0xc7, "device failure" }, /* high byte may be port # */ 163 { 0xc8, "controller error" }, 164 { 0xc9, "timed out" }, 165 { 0xcb, "invalid unit number" }, 166 { 0xcf, "unit not available" }, 167 { 0xd2, "undefined opcode" }, 168 { 0xdb, "request incompatible with unit" }, 169 { 0xdc, "invalid request" }, 170 { 0xff, "firmware error, reset requested" }, 171 172 { 0, NULL } 173 }; 174 175 const struct twe_code_table twe_table_unitstate[] = { 176 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 177 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 178 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 179 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 180 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 181 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 182 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 183 184 { 0, NULL } 185 }; 186 187 const struct twe_code_table twe_table_unittype[] = { 188 /* array descriptor configuration */ 189 { TWE_AD_CONFIG_RAID0, "RAID0" }, 190 { TWE_AD_CONFIG_RAID1, "RAID1" }, 191 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 192 { TWE_AD_CONFIG_RAID5, "RAID5" }, 193 { TWE_AD_CONFIG_RAID10, "RAID10" }, 194 { TWE_UD_CONFIG_JBOD, "JBOD" }, 195 196 { 0, NULL } 197 }; 198 199 const struct twe_code_table twe_table_stripedepth[] = { 200 { TWE_AD_STRIPE_4k, "4K" }, 201 { TWE_AD_STRIPE_8k, "8K" }, 202 { TWE_AD_STRIPE_16k, "16K" }, 203 { TWE_AD_STRIPE_32k, "32K" }, 204 { TWE_AD_STRIPE_64k, "64K" }, 205 { TWE_AD_STRIPE_128k, "128K" }, 206 { TWE_AD_STRIPE_256k, "256K" }, 207 { TWE_AD_STRIPE_512k, "512K" }, 208 { TWE_AD_STRIPE_1024k, "1024K" }, 209 210 { 0, NULL } 211 }; 212 213 /* 214 * Asynchronous event notification messages are qualified: 215 * a - not unit/port specific 216 * u - unit specific 217 * p - port specific 218 * 219 * They are further qualified with a severity: 220 * E - LOG_EMERG 221 * a - LOG_ALERT 222 * c - LOG_CRIT 223 * e - LOG_ERR 224 * w - LOG_WARNING 225 * n - LOG_NOTICE 226 * i - LOG_INFO 227 * d - LOG_DEBUG 228 * blank - just use printf 229 */ 230 const struct twe_code_table twe_table_aen[] = { 231 { 0x00, "a queue empty" }, 232 { 0x01, "a soft reset" }, 233 { 0x02, "uc degraded mode" }, 234 { 0x03, "aa controller error" }, 235 { 0x04, "uE rebuild fail" }, 236 { 0x05, "un rebuild done" }, 237 { 0x06, "ue incomplete unit" }, 238 { 0x07, "un initialization done" }, 239 { 0x08, "uw unclean shutdown detected" }, 240 { 0x09, "pe drive timeout" }, 241 { 0x0a, "pc drive error" }, 242 { 0x0b, "un rebuild started" }, 243 { 0x0c, "un initialization started" }, 244 { 0x0d, "ui logical unit deleted" }, 245 { 0x0f, "pc SMART threshold exceeded" }, 246 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 247 { 0x21, "pe ATA UDMA downgrade" }, 248 { 0x22, "pi ATA UDMA upgrade" }, 249 { 0x23, "pw sector repair occurred" }, 250 { 0x24, "aa SBUF integrity check failure" }, 251 { 0x25, "pa lost cached write" }, 252 { 0x26, "pa drive ECC error detected" }, 253 { 0x27, "pe DCB checksum error" }, 254 { 0x28, "pn DCB unsupported version" }, 255 { 0x29, "ui verify started" }, 256 { 0x2a, "ua verify failed" }, 257 { 0x2b, "ui verify complete" }, 258 { 0x2c, "pw overwrote bad sector during rebuild" }, 259 { 0x2d, "pa encountered bad sector during rebuild" }, 260 { 0x2e, "pe replacement drive too small" }, 261 { 0x2f, "ue array not previously initialized" }, 262 { 0x30, "p drive not supported" }, 263 { 0xff, "a aen queue full" }, 264 265 { 0, NULL }, 266 }; 267 268 const char * 269 twe_describe_code(const struct twe_code_table *table, uint32_t code) 270 { 271 272 for (; table->string != NULL; table++) { 273 if (table->code == code) 274 return (table->string); 275 } 276 return (NULL); 277 } 278 279 static inline u_int32_t 280 twe_inl(struct twe_softc *sc, int off) 281 { 282 283 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 284 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 285 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 286 } 287 288 static inline void 289 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 290 { 291 292 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 293 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 294 BUS_SPACE_BARRIER_WRITE); 295 } 296 297 /* 298 * Match a supported board. 299 */ 300 static int 301 twe_match(struct device *parent, struct cfdata *cfdata, 302 void *aux) 303 { 304 struct pci_attach_args *pa; 305 306 pa = aux; 307 308 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 309 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 310 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 311 } 312 313 /* 314 * Attach a supported board. 315 * 316 * XXX This doesn't fail gracefully. 317 */ 318 static void 319 twe_attach(struct device *parent, struct device *self, void *aux) 320 { 321 struct pci_attach_args *pa; 322 struct twe_softc *sc; 323 pci_chipset_tag_t pc; 324 pci_intr_handle_t ih; 325 pcireg_t csr; 326 const char *intrstr; 327 int s, size, i, rv, rseg; 328 size_t max_segs, max_xfer; 329 bus_dma_segment_t seg; 330 struct ctlname ctlnames[] = CTL_NAMES; 331 const struct sysctlnode *node; 332 struct twe_cmd *tc; 333 struct twe_ccb *ccb; 334 int maj; 335 336 sc = (struct twe_softc *)self; 337 pa = aux; 338 pc = pa->pa_pc; 339 sc->sc_dmat = pa->pa_dmat; 340 SIMPLEQ_INIT(&sc->sc_ccb_queue); 341 SLIST_INIT(&sc->sc_ccb_freelist); 342 343 aprint_naive(": RAID controller\n"); 344 aprint_normal(": 3ware Escalade\n"); 345 346 347 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 348 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 349 aprint_error_dev(&sc->sc_dv, "can't map i/o space\n"); 350 return; 351 } 352 353 /* Enable the device. */ 354 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 355 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 356 csr | PCI_COMMAND_MASTER_ENABLE); 357 358 /* Map and establish the interrupt. */ 359 if (pci_intr_map(pa, &ih)) { 360 aprint_error_dev(&sc->sc_dv, "can't map interrupt\n"); 361 return; 362 } 363 364 intrstr = pci_intr_string(pc, ih); 365 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 366 if (sc->sc_ih == NULL) { 367 aprint_error_dev(&sc->sc_dv, "can't establish interrupt%s%s\n", 368 (intrstr) ? " at " : "", 369 (intrstr) ? intrstr : ""); 370 return; 371 } 372 373 if (intrstr != NULL) 374 aprint_normal_dev(&sc->sc_dv, "interrupting at %s\n", 375 intrstr); 376 377 /* 378 * Allocate and initialise the command blocks and CCBs. 379 */ 380 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 381 382 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 383 &rseg, BUS_DMA_NOWAIT)) != 0) { 384 aprint_error_dev(&sc->sc_dv, "unable to allocate commands, rv = %d\n", rv); 385 return; 386 } 387 388 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 389 (void **)&sc->sc_cmds, 390 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 391 aprint_error_dev(&sc->sc_dv, "unable to map commands, rv = %d\n", rv); 392 return; 393 } 394 395 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 396 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 397 aprint_error_dev(&sc->sc_dv, "unable to create command DMA map, rv = %d\n", rv); 398 return; 399 } 400 401 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 402 size, NULL, BUS_DMA_NOWAIT)) != 0) { 403 aprint_error_dev(&sc->sc_dv, "unable to load command DMA map, rv = %d\n", rv); 404 return; 405 } 406 407 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 408 if (ccb == NULL) { 409 aprint_error_dev(&sc->sc_dv, "unable to allocate memory for ccbs\n"); 410 return; 411 } 412 413 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 414 memset(sc->sc_cmds, 0, size); 415 416 sc->sc_ccbs = ccb; 417 tc = (struct twe_cmd *)sc->sc_cmds; 418 max_segs = twe_get_maxsegs(); 419 max_xfer = twe_get_maxxfer(max_segs); 420 421 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 422 ccb->ccb_cmd = tc; 423 ccb->ccb_cmdid = i; 424 ccb->ccb_flags = 0; 425 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 426 max_segs, PAGE_SIZE, 0, 427 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 428 &ccb->ccb_dmamap_xfer); 429 if (rv != 0) { 430 aprint_error_dev(&sc->sc_dv, "can't create dmamap, rv = %d\n", rv); 431 return; 432 } 433 434 /* Save the first CCB for AEN retrieval. */ 435 if (i != 0) 436 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 437 ccb_chain.slist); 438 } 439 440 /* Wait for the controller to become ready. */ 441 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 442 aprint_error_dev(&sc->sc_dv, "microcontroller not ready\n"); 443 return; 444 } 445 446 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 447 448 /* Reset the controller. */ 449 s = splbio(); 450 rv = twe_reset(sc); 451 splx(s); 452 if (rv) { 453 aprint_error_dev(&sc->sc_dv, "reset failed\n"); 454 return; 455 } 456 457 /* Initialise connection with controller. */ 458 twe_init_connection(sc); 459 460 twe_describe_controller(sc); 461 462 /* Find and attach RAID array units. */ 463 sc->sc_nunits = 0; 464 for (i = 0; i < TWE_MAX_UNITS; i++) 465 (void) twe_add_unit(sc, i); 466 467 /* ...and finally, enable interrupts. */ 468 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 469 TWE_CTL_UNMASK_RESP_INTR | 470 TWE_CTL_ENABLE_INTRS); 471 472 /* sysctl set-up for 3ware cli */ 473 if (sysctl_createv(NULL, 0, NULL, NULL, 474 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 475 NULL, NULL, 0, NULL, 0, 476 CTL_HW, CTL_EOL) != 0) { 477 aprint_error_dev(&sc->sc_dv, "could not create %s sysctl node\n", 478 ctlnames[CTL_HW].ctl_name); 479 return; 480 } 481 if (sysctl_createv(NULL, 0, NULL, &node, 482 0, CTLTYPE_NODE, device_xname(&sc->sc_dv), 483 SYSCTL_DESCR("twe driver information"), 484 NULL, 0, NULL, 0, 485 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 486 aprint_error_dev(&sc->sc_dv, "could not create %s.%s sysctl node\n", 487 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv)); 488 return; 489 } 490 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 491 0, CTLTYPE_STRING, "driver_version", 492 SYSCTL_DESCR("twe0 driver version"), 493 NULL, 0, &twever, 0, 494 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 495 != 0) { 496 aprint_error_dev(&sc->sc_dv, "could not create %s.%s.driver_version sysctl\n", 497 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv)); 498 return; 499 } 500 501 maj = cdevsw_lookup_major(&twe_cdevsw); 502 device_register_name(makedev(maj, device_unit(self)), self, true, 503 DEV_OTHER, device_xname(self)); 504 } 505 506 void 507 twe_register_callbacks(struct twe_softc *sc, int unit, 508 const struct twe_callbacks *tcb) 509 { 510 511 sc->sc_units[unit].td_callbacks = tcb; 512 } 513 514 static void 515 twe_recompute_openings(struct twe_softc *sc) 516 { 517 struct twe_drive *td; 518 int unit, openings; 519 520 if (sc->sc_nunits != 0) 521 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 522 else 523 openings = 0; 524 if (openings == sc->sc_openings) 525 return; 526 sc->sc_openings = openings; 527 528 #ifdef TWE_DEBUG 529 printf("%s: %d array%s, %d openings per array\n", 530 device_xname(&sc->sc_dv), sc->sc_nunits, 531 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 532 #endif 533 534 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 535 td = &sc->sc_units[unit]; 536 if (td->td_dev != NULL) 537 (*td->td_callbacks->tcb_openings)(td->td_dev, 538 sc->sc_openings); 539 } 540 } 541 542 static int 543 twe_add_unit(struct twe_softc *sc, int unit) 544 { 545 struct twe_param *dtp, *atp; 546 struct twe_array_descriptor *ad; 547 struct twe_drive *td; 548 struct twe_attach_args twea; 549 uint32_t newsize; 550 int rv; 551 uint16_t dsize; 552 uint8_t newtype, newstripe; 553 int locs[TWECF_NLOCS]; 554 555 if (unit < 0 || unit >= TWE_MAX_UNITS) 556 return (EINVAL); 557 558 /* Find attached units. */ 559 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 560 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 561 if (rv != 0) { 562 aprint_error_dev(&sc->sc_dv, "error %d fetching unit summary\n", 563 rv); 564 return (rv); 565 } 566 567 /* For each detected unit, collect size and store in an array. */ 568 td = &sc->sc_units[unit]; 569 570 /* Unit present? */ 571 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 572 /* 573 * XXX Should we check to see if a device has been 574 * XXX attached at this index and detach it if it 575 * XXX has? ("rescan" semantics) 576 */ 577 rv = 0; 578 goto out; 579 } 580 581 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 582 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 583 if (rv != 0) { 584 aprint_error_dev(&sc->sc_dv, "error %d fetching descriptor size " 585 "for unit %d\n", rv, unit); 586 goto out; 587 } 588 589 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 590 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 591 if (rv != 0) { 592 aprint_error_dev(&sc->sc_dv, "error %d fetching array descriptor " 593 "for unit %d\n", rv, unit); 594 goto out; 595 } 596 597 ad = (struct twe_array_descriptor *)atp->tp_data; 598 newtype = ad->configuration; 599 newstripe = ad->stripe_size; 600 free(atp, M_DEVBUF); 601 602 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 603 TWE_PARAM_UNITINFO_Capacity, &newsize); 604 if (rv != 0) { 605 aprint_error_dev(&sc->sc_dv, 606 "error %d fetching capacity for unit %d\n", 607 rv, unit); 608 goto out; 609 } 610 611 /* 612 * Have a device, so we need to attach it. If there is currently 613 * something sitting at the slot, and the parameters are different, 614 * then we detach the old device before attaching the new one. 615 */ 616 if (td->td_dev != NULL && 617 td->td_size == newsize && 618 td->td_type == newtype && 619 td->td_stripe == newstripe) { 620 /* Same as the old device; just keep using it. */ 621 rv = 0; 622 goto out; 623 } else if (td->td_dev != NULL) { 624 /* Detach the old device first. */ 625 (void) config_detach(td->td_dev, DETACH_FORCE); 626 td->td_dev = NULL; 627 } else if (td->td_size == 0) 628 sc->sc_nunits++; 629 630 /* 631 * Committed to the new array unit; assign its parameters and 632 * recompute the number of available command openings. 633 */ 634 td->td_size = newsize; 635 td->td_type = newtype; 636 td->td_stripe = newstripe; 637 twe_recompute_openings(sc); 638 639 twea.twea_unit = unit; 640 641 locs[TWECF_UNIT] = unit; 642 643 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 644 twe_print, config_stdsubmatch); 645 646 rv = 0; 647 out: 648 free(dtp, M_DEVBUF); 649 return (rv); 650 } 651 652 static int 653 twe_del_unit(struct twe_softc *sc, int unit) 654 { 655 struct twe_drive *td; 656 657 if (unit < 0 || unit >= TWE_MAX_UNITS) 658 return (EINVAL); 659 660 td = &sc->sc_units[unit]; 661 if (td->td_size != 0) 662 sc->sc_nunits--; 663 td->td_size = 0; 664 td->td_type = 0; 665 td->td_stripe = 0; 666 if (td->td_dev != NULL) { 667 (void) config_detach(td->td_dev, DETACH_FORCE); 668 td->td_dev = NULL; 669 } 670 twe_recompute_openings(sc); 671 return (0); 672 } 673 674 /* 675 * Reset the controller. 676 * MUST BE CALLED AT splbio()! 677 */ 678 static int 679 twe_reset(struct twe_softc *sc) 680 { 681 uint16_t aen; 682 u_int status; 683 volatile u_int32_t junk; 684 int got, rv; 685 686 /* Issue a soft reset. */ 687 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 688 TWE_CTL_CLEAR_HOST_INTR | 689 TWE_CTL_CLEAR_ATTN_INTR | 690 TWE_CTL_MASK_CMD_INTR | 691 TWE_CTL_MASK_RESP_INTR | 692 TWE_CTL_CLEAR_ERROR_STS | 693 TWE_CTL_DISABLE_INTRS); 694 695 /* Wait for attention... */ 696 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 697 aprint_error_dev(&sc->sc_dv, "timeout waiting for attention interrupt\n"); 698 return (-1); 699 } 700 701 /* ...and ACK it. */ 702 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 703 704 /* 705 * Pull AENs out of the controller; look for a soft reset AEN. 706 * Open code this, since we want to detect reset even if the 707 * queue for management tools is full. 708 * 709 * Note that since: 710 * - interrupts are blocked 711 * - we have reset the controller 712 * - acknowledged the pending ATTENTION 713 * that there is no way a pending asynchronous AEN fetch would 714 * finish, so clear the flag. 715 */ 716 sc->sc_flags &= ~TWEF_AEN; 717 for (got = 0;;) { 718 rv = twe_aen_get(sc, &aen); 719 if (rv != 0) 720 printf("%s: error %d while draining event queue\n", 721 device_xname(&sc->sc_dv), rv); 722 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 723 break; 724 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 725 got = 1; 726 twe_aen_enqueue(sc, aen, 1); 727 } 728 729 if (!got) { 730 printf("%s: reset not reported\n", device_xname(&sc->sc_dv)); 731 return (-1); 732 } 733 734 /* Check controller status. */ 735 status = twe_inl(sc, TWE_REG_STS); 736 if (twe_status_check(sc, status)) { 737 printf("%s: controller errors detected\n", 738 device_xname(&sc->sc_dv)); 739 return (-1); 740 } 741 742 /* Drain the response queue. */ 743 for (;;) { 744 status = twe_inl(sc, TWE_REG_STS); 745 if (twe_status_check(sc, status) != 0) { 746 aprint_error_dev(&sc->sc_dv, "can't drain response queue\n"); 747 return (-1); 748 } 749 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 750 break; 751 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 752 } 753 754 return (0); 755 } 756 757 /* 758 * Print autoconfiguration message for a sub-device. 759 */ 760 static int 761 twe_print(void *aux, const char *pnp) 762 { 763 struct twe_attach_args *twea; 764 765 twea = aux; 766 767 if (pnp != NULL) 768 aprint_normal("block device at %s", pnp); 769 aprint_normal(" unit %d", twea->twea_unit); 770 return (UNCONF); 771 } 772 773 /* 774 * Interrupt service routine. 775 */ 776 static int 777 twe_intr(void *arg) 778 { 779 struct twe_softc *sc; 780 u_int status; 781 int caught, rv; 782 783 sc = arg; 784 caught = 0; 785 status = twe_inl(sc, TWE_REG_STS); 786 twe_status_check(sc, status); 787 788 /* Host interrupts - purpose unknown. */ 789 if ((status & TWE_STS_HOST_INTR) != 0) { 790 #ifdef DEBUG 791 printf("%s: host interrupt\n", device_xname(&sc->sc_dv)); 792 #endif 793 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 794 caught = 1; 795 } 796 797 /* 798 * Attention interrupts, signalled when a controller or child device 799 * state change has occurred. 800 */ 801 if ((status & TWE_STS_ATTN_INTR) != 0) { 802 rv = twe_aen_get(sc, NULL); 803 if (rv != 0) 804 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv); 805 else 806 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 807 caught = 1; 808 } 809 810 /* 811 * Command interrupts, signalled when the controller can accept more 812 * commands. We don't use this; instead, we try to submit commands 813 * when we receive them, and when other commands have completed. 814 * Mask it so we don't get another one. 815 */ 816 if ((status & TWE_STS_CMD_INTR) != 0) { 817 #ifdef DEBUG 818 printf("%s: command interrupt\n", device_xname(&sc->sc_dv)); 819 #endif 820 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 821 caught = 1; 822 } 823 824 if ((status & TWE_STS_RESP_INTR) != 0) { 825 twe_poll(sc); 826 caught = 1; 827 } 828 829 return (caught); 830 } 831 832 /* 833 * Fetch an AEN. Even though this is really like parameter 834 * retrieval, we handle this specially, because we issue this 835 * AEN retrieval command from interrupt context, and thus 836 * reserve a CCB for it to avoid resource shortage. 837 * 838 * XXX There are still potential resource shortages we could 839 * XXX encounter. Consider pre-allocating all AEN-related 840 * XXX resources. 841 * 842 * MUST BE CALLED AT splbio()! 843 */ 844 static int 845 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 846 { 847 struct twe_ccb *ccb; 848 struct twe_cmd *tc; 849 struct twe_param *tp; 850 int rv; 851 852 /* 853 * If we're already retrieving an AEN, just wait; another 854 * retrieval will be chained after the current one completes. 855 */ 856 if (sc->sc_flags & TWEF_AEN) { 857 /* 858 * It is a fatal software programming error to attempt 859 * to fetch an AEN synchronously when an AEN fetch is 860 * already pending. 861 */ 862 KASSERT(aenp == NULL); 863 return (0); 864 } 865 866 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 867 if (tp == NULL) 868 return (ENOMEM); 869 870 ccb = twe_ccb_alloc(sc, 871 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 872 KASSERT(ccb != NULL); 873 874 ccb->ccb_data = tp; 875 ccb->ccb_datasize = TWE_SECTOR_SIZE; 876 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 877 ccb->ccb_tx.tx_context = tp; 878 ccb->ccb_tx.tx_dv = &sc->sc_dv; 879 880 tc = ccb->ccb_cmd; 881 tc->tc_size = 2; 882 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 883 tc->tc_unit = 0; 884 tc->tc_count = htole16(1); 885 886 /* Fill in the outbound parameter data. */ 887 tp->tp_table_id = htole16(TWE_PARAM_AEN); 888 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 889 tp->tp_param_size = 2; 890 891 /* Map the transfer. */ 892 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 893 twe_ccb_free(sc, ccb); 894 goto done; 895 } 896 897 /* Enqueue the command and wait. */ 898 if (aenp != NULL) { 899 rv = twe_ccb_poll(sc, ccb, 5); 900 twe_ccb_unmap(sc, ccb); 901 twe_ccb_free(sc, ccb); 902 if (rv == 0) 903 *aenp = le16toh(*(uint16_t *)tp->tp_data); 904 free(tp, M_DEVBUF); 905 } else { 906 sc->sc_flags |= TWEF_AEN; 907 twe_ccb_enqueue(sc, ccb); 908 rv = 0; 909 } 910 911 done: 912 return (rv); 913 } 914 915 /* 916 * Handle an AEN returned by the controller. 917 * MUST BE CALLED AT splbio()! 918 */ 919 static void 920 twe_aen_handler(struct twe_ccb *ccb, int error) 921 { 922 struct twe_softc *sc; 923 struct twe_param *tp; 924 uint16_t aen; 925 int rv; 926 927 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 928 tp = ccb->ccb_tx.tx_context; 929 twe_ccb_unmap(sc, ccb); 930 931 sc->sc_flags &= ~TWEF_AEN; 932 933 if (error) { 934 aprint_error_dev(&sc->sc_dv, "error retrieving AEN\n"); 935 aen = TWE_AEN_QUEUE_EMPTY; 936 } else 937 aen = le16toh(*(u_int16_t *)tp->tp_data); 938 free(tp, M_DEVBUF); 939 twe_ccb_free(sc, ccb); 940 941 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 942 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 943 return; 944 } 945 946 twe_aen_enqueue(sc, aen, 0); 947 948 /* 949 * Chain another retrieval in case interrupts have been 950 * coalesced. 951 */ 952 rv = twe_aen_get(sc, NULL); 953 if (rv != 0) 954 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv); 955 } 956 957 static void 958 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 959 { 960 const char *str, *msg; 961 int s, next, nextnext, level; 962 963 /* 964 * First report the AEN on the console. Maybe. 965 */ 966 if (! quiet) { 967 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 968 if (str == NULL) { 969 aprint_error_dev(&sc->sc_dv, "unknown AEN 0x%04x\n", aen); 970 } else { 971 msg = str + 3; 972 switch (str[1]) { 973 case 'E': level = LOG_EMERG; break; 974 case 'a': level = LOG_ALERT; break; 975 case 'c': level = LOG_CRIT; break; 976 case 'e': level = LOG_ERR; break; 977 case 'w': level = LOG_WARNING; break; 978 case 'n': level = LOG_NOTICE; break; 979 case 'i': level = LOG_INFO; break; 980 case 'd': level = LOG_DEBUG; break; 981 default: 982 /* Don't use syslog. */ 983 level = -1; 984 } 985 986 if (level < 0) { 987 switch (str[0]) { 988 case 'u': 989 case 'p': 990 printf("%s: %s %d: %s\n", 991 device_xname(&sc->sc_dv), 992 str[0] == 'u' ? "unit" : "port", 993 TWE_AEN_UNIT(aen), msg); 994 break; 995 996 default: 997 printf("%s: %s\n", 998 device_xname(&sc->sc_dv), msg); 999 } 1000 } else { 1001 switch (str[0]) { 1002 case 'u': 1003 case 'p': 1004 log(level, "%s: %s %d: %s\n", 1005 device_xname(&sc->sc_dv), 1006 str[0] == 'u' ? "unit" : "port", 1007 TWE_AEN_UNIT(aen), msg); 1008 break; 1009 1010 default: 1011 log(level, "%s: %s\n", 1012 device_xname(&sc->sc_dv), msg); 1013 } 1014 } 1015 } 1016 } 1017 1018 /* Now enqueue the AEN for mangement tools. */ 1019 s = splbio(); 1020 1021 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1022 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1023 1024 /* 1025 * If this is the last free slot, then queue up a "queue 1026 * full" message. 1027 */ 1028 if (nextnext == sc->sc_aen_tail) 1029 aen = TWE_AEN_QUEUE_FULL; 1030 1031 if (next != sc->sc_aen_tail) { 1032 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1033 sc->sc_aen_head = next; 1034 } 1035 1036 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1037 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1038 wakeup(&sc->sc_aen_queue); 1039 } 1040 1041 splx(s); 1042 } 1043 1044 /* NOTE: Must be called at splbio(). */ 1045 static uint16_t 1046 twe_aen_dequeue(struct twe_softc *sc) 1047 { 1048 uint16_t aen; 1049 1050 if (sc->sc_aen_tail == sc->sc_aen_head) 1051 aen = TWE_AEN_QUEUE_EMPTY; 1052 else { 1053 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1054 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1055 } 1056 1057 return (aen); 1058 } 1059 1060 /* 1061 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1062 * fetch 1, 2, and 4 byte parameter values, respectively. 1063 */ 1064 int 1065 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1066 uint8_t *valp) 1067 { 1068 struct twe_param *tp; 1069 int rv; 1070 1071 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1072 if (rv != 0) 1073 return (rv); 1074 *valp = *(uint8_t *)tp->tp_data; 1075 free(tp, M_DEVBUF); 1076 return (0); 1077 } 1078 1079 int 1080 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1081 uint16_t *valp) 1082 { 1083 struct twe_param *tp; 1084 int rv; 1085 1086 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1087 if (rv != 0) 1088 return (rv); 1089 *valp = le16toh(*(uint16_t *)tp->tp_data); 1090 free(tp, M_DEVBUF); 1091 return (0); 1092 } 1093 1094 int 1095 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1096 uint32_t *valp) 1097 { 1098 struct twe_param *tp; 1099 int rv; 1100 1101 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1102 if (rv != 0) 1103 return (rv); 1104 *valp = le32toh(*(uint32_t *)tp->tp_data); 1105 free(tp, M_DEVBUF); 1106 return (0); 1107 } 1108 1109 /* 1110 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1111 * it will be called with generated context when the command has completed. 1112 * If no callback is provided, the command will be executed synchronously 1113 * and a pointer to a buffer containing the data returned. 1114 * 1115 * The caller or callback is responsible for freeing the buffer. 1116 * 1117 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1118 */ 1119 int 1120 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1121 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1122 { 1123 struct twe_ccb *ccb; 1124 struct twe_cmd *tc; 1125 struct twe_param *tp; 1126 int rv, s; 1127 1128 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1129 if (tp == NULL) 1130 return ENOMEM; 1131 1132 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1133 KASSERT(ccb != NULL); 1134 1135 ccb->ccb_data = tp; 1136 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1137 ccb->ccb_tx.tx_handler = func; 1138 ccb->ccb_tx.tx_context = tp; 1139 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1140 1141 tc = ccb->ccb_cmd; 1142 tc->tc_size = 2; 1143 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1144 tc->tc_unit = 0; 1145 tc->tc_count = htole16(1); 1146 1147 /* Fill in the outbound parameter data. */ 1148 tp->tp_table_id = htole16(table_id); 1149 tp->tp_param_id = param_id; 1150 tp->tp_param_size = size; 1151 1152 /* Map the transfer. */ 1153 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1154 twe_ccb_free(sc, ccb); 1155 goto done; 1156 } 1157 1158 /* Submit the command and either wait or let the callback handle it. */ 1159 if (func == NULL) { 1160 s = splbio(); 1161 rv = twe_ccb_poll(sc, ccb, 5); 1162 twe_ccb_unmap(sc, ccb); 1163 twe_ccb_free(sc, ccb); 1164 splx(s); 1165 } else { 1166 #ifdef DEBUG 1167 if (pbuf != NULL) 1168 panic("both func and pbuf defined"); 1169 #endif 1170 twe_ccb_enqueue(sc, ccb); 1171 return 0; 1172 } 1173 1174 done: 1175 if (pbuf == NULL || rv != 0) 1176 free(tp, M_DEVBUF); 1177 else if (pbuf != NULL && rv == 0) 1178 *pbuf = tp; 1179 return rv; 1180 } 1181 1182 /* 1183 * Execute a TWE_OP_SET_PARAM command. 1184 * 1185 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1186 */ 1187 static int 1188 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1189 void *sbuf) 1190 { 1191 struct twe_ccb *ccb; 1192 struct twe_cmd *tc; 1193 struct twe_param *tp; 1194 int rv, s; 1195 1196 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1197 if (tp == NULL) 1198 return ENOMEM; 1199 1200 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1201 KASSERT(ccb != NULL); 1202 1203 ccb->ccb_data = tp; 1204 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1205 ccb->ccb_tx.tx_handler = 0; 1206 ccb->ccb_tx.tx_context = tp; 1207 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1208 1209 tc = ccb->ccb_cmd; 1210 tc->tc_size = 2; 1211 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1212 tc->tc_unit = 0; 1213 tc->tc_count = htole16(1); 1214 1215 /* Fill in the outbound parameter data. */ 1216 tp->tp_table_id = htole16(table_id); 1217 tp->tp_param_id = param_id; 1218 tp->tp_param_size = size; 1219 memcpy(tp->tp_data, sbuf, size); 1220 1221 /* Map the transfer. */ 1222 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1223 twe_ccb_free(sc, ccb); 1224 goto done; 1225 } 1226 1227 /* Submit the command and wait. */ 1228 s = splbio(); 1229 rv = twe_ccb_poll(sc, ccb, 5); 1230 twe_ccb_unmap(sc, ccb); 1231 twe_ccb_free(sc, ccb); 1232 splx(s); 1233 done: 1234 free(tp, M_DEVBUF); 1235 return (rv); 1236 } 1237 1238 /* 1239 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1240 * Must be called with interrupts blocked. 1241 */ 1242 static int 1243 twe_init_connection(struct twe_softc *sc) 1244 { 1245 struct twe_ccb *ccb; 1246 struct twe_cmd *tc; 1247 int rv; 1248 1249 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1250 return (EAGAIN); 1251 1252 /* Build the command. */ 1253 tc = ccb->ccb_cmd; 1254 tc->tc_size = 3; 1255 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1256 tc->tc_unit = 0; 1257 tc->tc_count = htole16(TWE_MAX_CMDS); 1258 tc->tc_args.init_connection.response_queue_pointer = 0; 1259 1260 /* Submit the command for immediate execution. */ 1261 rv = twe_ccb_poll(sc, ccb, 5); 1262 twe_ccb_free(sc, ccb); 1263 return (rv); 1264 } 1265 1266 /* 1267 * Poll the controller for completed commands. Must be called with 1268 * interrupts blocked. 1269 */ 1270 static void 1271 twe_poll(struct twe_softc *sc) 1272 { 1273 struct twe_ccb *ccb; 1274 int found; 1275 u_int status, cmdid; 1276 1277 found = 0; 1278 1279 for (;;) { 1280 status = twe_inl(sc, TWE_REG_STS); 1281 twe_status_check(sc, status); 1282 1283 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1284 break; 1285 1286 found = 1; 1287 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1288 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1289 if (cmdid >= TWE_MAX_QUEUECNT) { 1290 aprint_error_dev(&sc->sc_dv, "bad cmdid %d\n", cmdid); 1291 continue; 1292 } 1293 1294 ccb = sc->sc_ccbs + cmdid; 1295 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1296 printf("%s: CCB for cmdid %d not active\n", 1297 device_xname(&sc->sc_dv), cmdid); 1298 continue; 1299 } 1300 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1301 1302 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1303 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1304 sizeof(struct twe_cmd), 1305 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1306 1307 /* Pass notification to upper layers. */ 1308 if (ccb->ccb_tx.tx_handler != NULL) 1309 (*ccb->ccb_tx.tx_handler)(ccb, 1310 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1311 } 1312 1313 /* If any commands have completed, run the software queue. */ 1314 if (found) 1315 twe_ccb_enqueue(sc, NULL); 1316 } 1317 1318 /* 1319 * Wait for `status' to be set in the controller status register. Return 1320 * zero if found, non-zero if the operation timed out. 1321 */ 1322 static int 1323 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1324 { 1325 1326 for (timo *= 10; timo != 0; timo--) { 1327 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1328 break; 1329 delay(100000); 1330 } 1331 1332 return (timo == 0); 1333 } 1334 1335 /* 1336 * Clear a PCI parity error. 1337 */ 1338 static void 1339 twe_clear_pci_parity_error(struct twe_softc *sc) 1340 { 1341 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1342 1343 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1344 } 1345 1346 1347 /* 1348 * Clear a PCI abort. 1349 */ 1350 static void 1351 twe_clear_pci_abort(struct twe_softc *sc) 1352 { 1353 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1354 1355 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1356 } 1357 1358 /* 1359 * Complain if the status bits aren't what we expect. 1360 */ 1361 static int 1362 twe_status_check(struct twe_softc *sc, u_int status) 1363 { 1364 int rv; 1365 1366 rv = 0; 1367 1368 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1369 aprint_error_dev(&sc->sc_dv, "missing status bits: 0x%08x\n", 1370 status & ~TWE_STS_EXPECTED_BITS); 1371 rv = -1; 1372 } 1373 1374 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1375 aprint_error_dev(&sc->sc_dv, "unexpected status bits: 0x%08x\n", 1376 status & TWE_STS_UNEXPECTED_BITS); 1377 rv = -1; 1378 if (status & TWE_STS_PCI_PARITY_ERROR) { 1379 aprint_error_dev(&sc->sc_dv, "PCI parity error: Reseat card, move card " 1380 "or buggy device present.\n"); 1381 twe_clear_pci_parity_error(sc); 1382 } 1383 if (status & TWE_STS_PCI_ABORT) { 1384 aprint_error_dev(&sc->sc_dv, "PCI abort, clearing.\n"); 1385 twe_clear_pci_abort(sc); 1386 } 1387 } 1388 1389 return (rv); 1390 } 1391 1392 /* 1393 * Allocate and initialise a CCB. 1394 */ 1395 static inline void 1396 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1397 { 1398 struct twe_cmd *tc; 1399 1400 ccb->ccb_tx.tx_handler = NULL; 1401 ccb->ccb_flags = flags; 1402 tc = ccb->ccb_cmd; 1403 tc->tc_status = 0; 1404 tc->tc_flags = 0; 1405 tc->tc_cmdid = ccb->ccb_cmdid; 1406 } 1407 1408 struct twe_ccb * 1409 twe_ccb_alloc(struct twe_softc *sc, int flags) 1410 { 1411 struct twe_ccb *ccb; 1412 int s; 1413 1414 s = splbio(); 1415 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1416 /* Use the reserved CCB. */ 1417 ccb = sc->sc_ccbs; 1418 } else { 1419 /* Allocate a CCB and command block. */ 1420 if (__predict_false((ccb = 1421 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1422 splx(s); 1423 return (NULL); 1424 } 1425 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1426 } 1427 #ifdef DIAGNOSTIC 1428 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1429 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1430 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1431 panic("twe_ccb_alloc: CCB %ld already allocated", 1432 (long)(ccb - sc->sc_ccbs)); 1433 flags |= TWE_CCB_ALLOCED; 1434 #endif 1435 splx(s); 1436 1437 twe_ccb_init(sc, ccb, flags); 1438 return (ccb); 1439 } 1440 1441 struct twe_ccb * 1442 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1443 { 1444 struct twe_ccb *ccb; 1445 int s; 1446 1447 KASSERT((flags & TWE_CCB_AEN) == 0); 1448 1449 s = splbio(); 1450 while (__predict_false((ccb = 1451 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1452 sc->sc_flags |= TWEF_WAIT_CCB; 1453 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1454 } 1455 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1456 #ifdef DIAGNOSTIC 1457 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1458 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1459 (long)(ccb - sc->sc_ccbs)); 1460 flags |= TWE_CCB_ALLOCED; 1461 #endif 1462 splx(s); 1463 1464 twe_ccb_init(sc, ccb, flags); 1465 return (ccb); 1466 } 1467 1468 /* 1469 * Free a CCB. 1470 */ 1471 void 1472 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1473 { 1474 int s; 1475 1476 s = splbio(); 1477 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1478 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1479 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1480 sc->sc_flags &= ~TWEF_WAIT_CCB; 1481 wakeup(&sc->sc_ccb_freelist); 1482 } 1483 } 1484 ccb->ccb_flags = 0; 1485 splx(s); 1486 } 1487 1488 /* 1489 * Map the specified CCB's command block and data buffer (if any) into 1490 * controller visible space. Perform DMA synchronisation. 1491 */ 1492 int 1493 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1494 { 1495 struct twe_cmd *tc; 1496 int flags, nsegs, i, s, rv; 1497 void *data; 1498 1499 /* 1500 * The data as a whole must be 512-byte aligned. 1501 */ 1502 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1503 s = splvm(); 1504 /* XXX */ 1505 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1506 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1507 splx(s); 1508 data = (void *)ccb->ccb_abuf; 1509 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1510 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1511 } else { 1512 ccb->ccb_abuf = (vaddr_t)0; 1513 data = ccb->ccb_data; 1514 } 1515 1516 /* 1517 * Map the data buffer into bus space and build the S/G list. 1518 */ 1519 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1520 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1521 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1522 BUS_DMA_READ : BUS_DMA_WRITE)); 1523 if (rv != 0) { 1524 if (ccb->ccb_abuf != (vaddr_t)0) { 1525 s = splvm(); 1526 /* XXX */ 1527 uvm_km_free(kmem_map, ccb->ccb_abuf, 1528 ccb->ccb_datasize, UVM_KMF_WIRED); 1529 splx(s); 1530 } 1531 return (rv); 1532 } 1533 1534 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1535 tc = ccb->ccb_cmd; 1536 tc->tc_size += 2 * nsegs; 1537 1538 /* The location of the S/G list is dependant upon command type. */ 1539 switch (tc->tc_opcode >> 5) { 1540 case 2: 1541 for (i = 0; i < nsegs; i++) { 1542 tc->tc_args.param.sgl[i].tsg_address = 1543 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1544 tc->tc_args.param.sgl[i].tsg_length = 1545 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1546 } 1547 /* XXX Needed? */ 1548 for (; i < TWE_SG_SIZE; i++) { 1549 tc->tc_args.param.sgl[i].tsg_address = 0; 1550 tc->tc_args.param.sgl[i].tsg_length = 0; 1551 } 1552 break; 1553 case 3: 1554 for (i = 0; i < nsegs; i++) { 1555 tc->tc_args.io.sgl[i].tsg_address = 1556 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1557 tc->tc_args.io.sgl[i].tsg_length = 1558 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1559 } 1560 /* XXX Needed? */ 1561 for (; i < TWE_SG_SIZE; i++) { 1562 tc->tc_args.io.sgl[i].tsg_address = 0; 1563 tc->tc_args.io.sgl[i].tsg_length = 0; 1564 } 1565 break; 1566 default: 1567 /* 1568 * In all likelihood, this is a command passed from 1569 * management tools in userspace where no S/G list is 1570 * necessary because no data is being passed. 1571 */ 1572 break; 1573 } 1574 1575 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1576 flags = BUS_DMASYNC_PREREAD; 1577 else 1578 flags = 0; 1579 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1580 flags |= BUS_DMASYNC_PREWRITE; 1581 1582 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1583 ccb->ccb_datasize, flags); 1584 return (0); 1585 } 1586 1587 /* 1588 * Unmap the specified CCB's command block and data buffer (if any) and 1589 * perform DMA synchronisation. 1590 */ 1591 void 1592 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1593 { 1594 int flags, s; 1595 1596 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1597 flags = BUS_DMASYNC_POSTREAD; 1598 else 1599 flags = 0; 1600 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1601 flags |= BUS_DMASYNC_POSTWRITE; 1602 1603 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1604 ccb->ccb_datasize, flags); 1605 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1606 1607 if (ccb->ccb_abuf != (vaddr_t)0) { 1608 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1609 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1610 ccb->ccb_datasize); 1611 s = splvm(); 1612 /* XXX */ 1613 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1614 UVM_KMF_WIRED); 1615 splx(s); 1616 } 1617 } 1618 1619 /* 1620 * Submit a command to the controller and poll on completion. Return 1621 * non-zero on timeout (but don't check status, as some command types don't 1622 * return status). Must be called with interrupts blocked. 1623 */ 1624 int 1625 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1626 { 1627 int rv; 1628 1629 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1630 return (rv); 1631 1632 for (timo *= 1000; timo != 0; timo--) { 1633 twe_poll(sc); 1634 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1635 break; 1636 DELAY(100); 1637 } 1638 1639 return (timo == 0); 1640 } 1641 1642 /* 1643 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1644 * the order that they were enqueued and try to submit their command blocks 1645 * to the controller for execution. 1646 */ 1647 void 1648 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1649 { 1650 int s; 1651 1652 s = splbio(); 1653 1654 if (ccb != NULL) 1655 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1656 1657 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1658 if (twe_ccb_submit(sc, ccb)) 1659 break; 1660 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1661 } 1662 1663 splx(s); 1664 } 1665 1666 /* 1667 * Submit the command block associated with the specified CCB to the 1668 * controller for execution. Must be called with interrupts blocked. 1669 */ 1670 int 1671 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1672 { 1673 bus_addr_t pa; 1674 int rv; 1675 u_int status; 1676 1677 /* Check to see if we can post a command. */ 1678 status = twe_inl(sc, TWE_REG_STS); 1679 twe_status_check(sc, status); 1680 1681 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1682 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1683 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1684 sizeof(struct twe_cmd), 1685 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1686 #ifdef DIAGNOSTIC 1687 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1688 panic("%s: CCB %ld not ALLOCED\n", 1689 device_xname(&sc->sc_dv), (long)(ccb - sc->sc_ccbs)); 1690 #endif 1691 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1692 pa = sc->sc_cmds_paddr + 1693 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1694 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1695 rv = 0; 1696 } else 1697 rv = EBUSY; 1698 1699 return (rv); 1700 } 1701 1702 1703 /* 1704 * Accept an open operation on the control device. 1705 */ 1706 static int 1707 tweopen(dev_t dev, int flag, int mode, struct lwp *l) 1708 { 1709 struct twe_softc *twe; 1710 1711 if ((twe = device_lookup_private(&twe_cd, minor(dev))) == NULL) 1712 return (ENXIO); 1713 if ((twe->sc_flags & TWEF_OPEN) != 0) 1714 return (EBUSY); 1715 1716 twe->sc_flags |= TWEF_OPEN; 1717 return (0); 1718 } 1719 1720 /* 1721 * Accept the last close on the control device. 1722 */ 1723 static int 1724 tweclose(dev_t dev, int flag, int mode, 1725 struct lwp *l) 1726 { 1727 struct twe_softc *twe; 1728 1729 twe = device_lookup_private(&twe_cd, minor(dev)); 1730 twe->sc_flags &= ~TWEF_OPEN; 1731 return (0); 1732 } 1733 1734 void 1735 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1736 { 1737 1738 /* Just wake up the sleeper. */ 1739 wakeup(ccb); 1740 } 1741 1742 /* 1743 * Handle control operations. 1744 */ 1745 static int 1746 tweioctl(dev_t dev, u_long cmd, void *data, int flag, 1747 struct lwp *l) 1748 { 1749 struct twe_softc *twe; 1750 struct twe_ccb *ccb; 1751 struct twe_param *param; 1752 struct twe_usercommand *tu; 1753 struct twe_paramcommand *tp; 1754 struct twe_drivecommand *td; 1755 void *pdata = NULL; 1756 int s, error = 0; 1757 u_int8_t cmdid; 1758 1759 twe = device_lookup_private(&twe_cd, minor(dev)); 1760 tu = (struct twe_usercommand *)data; 1761 tp = (struct twe_paramcommand *)data; 1762 td = (struct twe_drivecommand *)data; 1763 1764 /* This is intended to be compatible with the FreeBSD interface. */ 1765 switch (cmd) { 1766 case TWEIO_COMMAND: 1767 error = kauth_authorize_device_passthru(l->l_cred, dev, 1768 KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data); 1769 if (error) 1770 return (error); 1771 1772 /* XXX mutex */ 1773 if (tu->tu_size > 0) { 1774 /* 1775 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1776 * it's really necessary, first. 1777 */ 1778 if (tu->tu_size > TWE_SECTOR_SIZE) { 1779 #ifdef TWE_DEBUG 1780 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1781 device_xname(&twe->sc_dv), tu->tu_size); 1782 #endif 1783 return EINVAL; 1784 } 1785 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1786 error = copyin(tu->tu_data, pdata, tu->tu_size); 1787 if (error != 0) 1788 goto done; 1789 ccb = twe_ccb_alloc_wait(twe, 1790 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1791 KASSERT(ccb != NULL); 1792 ccb->ccb_data = pdata; 1793 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1794 } else { 1795 ccb = twe_ccb_alloc_wait(twe, 0); 1796 KASSERT(ccb != NULL); 1797 } 1798 1799 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1800 ccb->ccb_tx.tx_context = NULL; 1801 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1802 1803 cmdid = ccb->ccb_cmdid; 1804 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1805 ccb->ccb_cmd->tc_cmdid = cmdid; 1806 1807 /* Map the transfer. */ 1808 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1809 twe_ccb_free(twe, ccb); 1810 goto done; 1811 } 1812 1813 /* Submit the command and wait up to 1 minute. */ 1814 error = 0; 1815 twe_ccb_enqueue(twe, ccb); 1816 s = splbio(); 1817 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1818 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1819 60 * hz)) != 0) 1820 break; 1821 splx(s); 1822 1823 /* Copy the command back to the ioctl argument. */ 1824 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1825 #ifdef TWE_DEBUG 1826 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1827 "tc_status = 0x%02x\n", device_xname(&twe->sc_dv), 1828 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1829 #endif 1830 1831 s = splbio(); 1832 twe_ccb_free(twe, ccb); 1833 splx(s); 1834 1835 if (tu->tu_size > 0) 1836 error = copyout(pdata, tu->tu_data, tu->tu_size); 1837 goto done; 1838 1839 case TWEIO_STATS: 1840 return (ENOENT); 1841 1842 case TWEIO_AEN_POLL: 1843 s = splbio(); 1844 *(u_int *)data = twe_aen_dequeue(twe); 1845 splx(s); 1846 return (0); 1847 1848 case TWEIO_AEN_WAIT: 1849 s = splbio(); 1850 while ((*(u_int *)data = 1851 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1852 twe->sc_flags |= TWEF_AENQ_WAIT; 1853 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1854 "tweaen", 0); 1855 if (error == EINTR) { 1856 splx(s); 1857 return (error); 1858 } 1859 } 1860 splx(s); 1861 return (0); 1862 1863 case TWEIO_GET_PARAM: 1864 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1865 tp->tp_size, 0, ¶m); 1866 if (error != 0) 1867 return (error); 1868 if (param->tp_param_size > tp->tp_size) { 1869 error = EFAULT; 1870 goto done; 1871 } 1872 error = copyout(param->tp_data, tp->tp_data, 1873 param->tp_param_size); 1874 free(param, M_DEVBUF); 1875 goto done; 1876 1877 case TWEIO_SET_PARAM: 1878 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1879 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1880 goto done; 1881 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1882 tp->tp_size, pdata); 1883 goto done; 1884 1885 case TWEIO_RESET: 1886 s = splbio(); 1887 twe_reset(twe); 1888 splx(s); 1889 return (0); 1890 1891 case TWEIO_ADD_UNIT: 1892 /* XXX mutex */ 1893 return (twe_add_unit(twe, td->td_unit)); 1894 1895 case TWEIO_DEL_UNIT: 1896 /* XXX mutex */ 1897 return (twe_del_unit(twe, td->td_unit)); 1898 1899 default: 1900 return EINVAL; 1901 } 1902 done: 1903 if (pdata) 1904 free(pdata, M_DEVBUF); 1905 return error; 1906 } 1907 1908 /* 1909 * Print some information about the controller 1910 */ 1911 static void 1912 twe_describe_controller(struct twe_softc *sc) 1913 { 1914 struct twe_param *p[6]; 1915 int i, rv = 0; 1916 uint32_t dsize; 1917 uint8_t ports; 1918 1919 ports = 0; 1920 1921 /* get the port count */ 1922 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1923 TWE_PARAM_CONTROLLER_PortCount, &ports); 1924 1925 /* get version strings */ 1926 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1927 16, NULL, &p[0]); 1928 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1929 16, NULL, &p[1]); 1930 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1931 16, NULL, &p[2]); 1932 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1933 8, NULL, &p[3]); 1934 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1935 8, NULL, &p[4]); 1936 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1937 8, NULL, &p[5]); 1938 1939 if (rv) { 1940 /* some error occurred */ 1941 aprint_error_dev(&sc->sc_dv, "failed to fetch version information\n"); 1942 return; 1943 } 1944 1945 aprint_normal_dev(&sc->sc_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 1946 ports, p[1]->tp_data, p[2]->tp_data); 1947 1948 aprint_verbose_dev(&sc->sc_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1949 p[0]->tp_data, p[3]->tp_data, 1950 p[4]->tp_data, p[5]->tp_data); 1951 1952 free(p[0], M_DEVBUF); 1953 free(p[1], M_DEVBUF); 1954 free(p[2], M_DEVBUF); 1955 free(p[3], M_DEVBUF); 1956 free(p[4], M_DEVBUF); 1957 free(p[5], M_DEVBUF); 1958 1959 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1960 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1961 if (rv) { 1962 aprint_error_dev(&sc->sc_dv, "failed to get drive status summary\n"); 1963 return; 1964 } 1965 for (i = 0; i < ports; i++) { 1966 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1967 continue; 1968 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1969 TWE_PARAM_DRIVEINFO_Size, &dsize); 1970 if (rv) { 1971 aprint_error_dev(&sc->sc_dv, 1972 "unable to get drive size for port %d\n", i); 1973 continue; 1974 } 1975 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1976 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1977 if (rv) { 1978 aprint_error_dev(&sc->sc_dv, 1979 "unable to get drive model for port %d\n", i); 1980 continue; 1981 } 1982 aprint_verbose_dev(&sc->sc_dv, "port %d: %.40s %d MB\n", 1983 i, p[1]->tp_data, dsize / 2048); 1984 free(p[1], M_DEVBUF); 1985 } 1986 free(p[0], M_DEVBUF); 1987 } 1988
Indexes created Wed Oct 01 07:09:59 GMT 2025