twe.c revision 1.87
1 /* $NetBSD: twe.c,v 1.87 2008/06/08 12:43:52 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 2000 Michael Smith 34 * Copyright (c) 2000 BSDi 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 56 * SUCH DAMAGE. 57 * 58 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 59 */ 60 61 /* 62 * Driver for the 3ware Escalade family of RAID controllers. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.87 2008/06/08 12:43:52 tsutsui Exp $"); 67 68 #include <sys/param.h> 69 #include <sys/systm.h> 70 #include <sys/kernel.h> 71 #include <sys/device.h> 72 #include <sys/queue.h> 73 #include <sys/proc.h> 74 #include <sys/buf.h> 75 #include <sys/endian.h> 76 #include <sys/malloc.h> 77 #include <sys/conf.h> 78 #include <sys/disk.h> 79 #include <sys/sysctl.h> 80 #include <sys/syslog.h> 81 #include <sys/kauth.h> 82 83 #include <uvm/uvm_extern.h> 84 85 #include <sys/bswap.h> 86 #include <sys/bus.h> 87 88 #include <dev/pci/pcireg.h> 89 #include <dev/pci/pcivar.h> 90 #include <dev/pci/pcidevs.h> 91 #include <dev/pci/twereg.h> 92 #include <dev/pci/twevar.h> 93 #include <dev/pci/tweio.h> 94 95 #include "locators.h" 96 97 #define PCI_CBIO 0x10 98 99 static int twe_aen_get(struct twe_softc *, uint16_t *); 100 static void twe_aen_handler(struct twe_ccb *, int); 101 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 102 static uint16_t twe_aen_dequeue(struct twe_softc *); 103 104 static void twe_attach(struct device *, struct device *, void *); 105 static int twe_init_connection(struct twe_softc *); 106 static int twe_intr(void *); 107 static int twe_match(struct device *, struct cfdata *, void *); 108 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 109 static void twe_poll(struct twe_softc *); 110 static int twe_print(void *, const char *); 111 static int twe_reset(struct twe_softc *); 112 static int twe_status_check(struct twe_softc *, u_int); 113 static int twe_status_wait(struct twe_softc *, u_int, int); 114 static void twe_describe_controller(struct twe_softc *); 115 static void twe_clear_pci_abort(struct twe_softc *sc); 116 static void twe_clear_pci_parity_error(struct twe_softc *sc); 117 118 static int twe_add_unit(struct twe_softc *, int); 119 static int twe_del_unit(struct twe_softc *, int); 120 static int twe_init_connection(struct twe_softc *); 121 122 static inline u_int32_t twe_inl(struct twe_softc *, int); 123 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 124 125 extern struct cfdriver twe_cd; 126 127 CFATTACH_DECL(twe, sizeof(struct twe_softc), 128 twe_match, twe_attach, NULL, NULL); 129 130 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 131 const char twever[] = "1.50.01.002"; 132 133 /* 134 * Tables to convert numeric codes to strings. 135 */ 136 const struct twe_code_table twe_table_status[] = { 137 { 0x00, "successful completion" }, 138 139 /* info */ 140 { 0x42, "command in progress" }, 141 { 0x6c, "retrying interface CRC error from UDMA command" }, 142 143 /* warning */ 144 { 0x81, "redundant/inconsequential request ignored" }, 145 { 0x8e, "failed to write zeroes to LBA 0" }, 146 { 0x8f, "failed to profile TwinStor zones" }, 147 148 /* fatal */ 149 { 0xc1, "aborted due to system command or reconfiguration" }, 150 { 0xc4, "aborted" }, 151 { 0xc5, "access error" }, 152 { 0xc6, "access violation" }, 153 { 0xc7, "device failure" }, /* high byte may be port # */ 154 { 0xc8, "controller error" }, 155 { 0xc9, "timed out" }, 156 { 0xcb, "invalid unit number" }, 157 { 0xcf, "unit not available" }, 158 { 0xd2, "undefined opcode" }, 159 { 0xdb, "request incompatible with unit" }, 160 { 0xdc, "invalid request" }, 161 { 0xff, "firmware error, reset requested" }, 162 163 { 0, NULL } 164 }; 165 166 const struct twe_code_table twe_table_unitstate[] = { 167 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 168 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 169 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 170 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 171 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 172 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 173 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 174 175 { 0, NULL } 176 }; 177 178 const struct twe_code_table twe_table_unittype[] = { 179 /* array descriptor configuration */ 180 { TWE_AD_CONFIG_RAID0, "RAID0" }, 181 { TWE_AD_CONFIG_RAID1, "RAID1" }, 182 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 183 { TWE_AD_CONFIG_RAID5, "RAID5" }, 184 { TWE_AD_CONFIG_RAID10, "RAID10" }, 185 { TWE_UD_CONFIG_JBOD, "JBOD" }, 186 187 { 0, NULL } 188 }; 189 190 const struct twe_code_table twe_table_stripedepth[] = { 191 { TWE_AD_STRIPE_4k, "4K" }, 192 { TWE_AD_STRIPE_8k, "8K" }, 193 { TWE_AD_STRIPE_16k, "16K" }, 194 { TWE_AD_STRIPE_32k, "32K" }, 195 { TWE_AD_STRIPE_64k, "64K" }, 196 { TWE_AD_STRIPE_128k, "128K" }, 197 { TWE_AD_STRIPE_256k, "256K" }, 198 { TWE_AD_STRIPE_512k, "512K" }, 199 { TWE_AD_STRIPE_1024k, "1024K" }, 200 201 { 0, NULL } 202 }; 203 204 /* 205 * Asynchronous event notification messages are qualified: 206 * a - not unit/port specific 207 * u - unit specific 208 * p - port specific 209 * 210 * They are further qualified with a severity: 211 * E - LOG_EMERG 212 * a - LOG_ALERT 213 * c - LOG_CRIT 214 * e - LOG_ERR 215 * w - LOG_WARNING 216 * n - LOG_NOTICE 217 * i - LOG_INFO 218 * d - LOG_DEBUG 219 * blank - just use printf 220 */ 221 const struct twe_code_table twe_table_aen[] = { 222 { 0x00, "a queue empty" }, 223 { 0x01, "a soft reset" }, 224 { 0x02, "uc degraded mode" }, 225 { 0x03, "aa controller error" }, 226 { 0x04, "uE rebuild fail" }, 227 { 0x05, "un rebuild done" }, 228 { 0x06, "ue incomplete unit" }, 229 { 0x07, "un initialization done" }, 230 { 0x08, "uw unclean shutdown detected" }, 231 { 0x09, "pe drive timeout" }, 232 { 0x0a, "pc drive error" }, 233 { 0x0b, "un rebuild started" }, 234 { 0x0c, "un initialization started" }, 235 { 0x0d, "ui logical unit deleted" }, 236 { 0x0f, "pc SMART threshold exceeded" }, 237 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 238 { 0x21, "pe ATA UDMA downgrade" }, 239 { 0x22, "pi ATA UDMA upgrade" }, 240 { 0x23, "pw sector repair occurred" }, 241 { 0x24, "aa SBUF integrity check failure" }, 242 { 0x25, "pa lost cached write" }, 243 { 0x26, "pa drive ECC error detected" }, 244 { 0x27, "pe DCB checksum error" }, 245 { 0x28, "pn DCB unsupported version" }, 246 { 0x29, "ui verify started" }, 247 { 0x2a, "ua verify failed" }, 248 { 0x2b, "ui verify complete" }, 249 { 0x2c, "pw overwrote bad sector during rebuild" }, 250 { 0x2d, "pa encountered bad sector during rebuild" }, 251 { 0x2e, "pe replacement drive too small" }, 252 { 0x2f, "ue array not previously initialized" }, 253 { 0x30, "p drive not supported" }, 254 { 0xff, "a aen queue full" }, 255 256 { 0, NULL }, 257 }; 258 259 const char * 260 twe_describe_code(const struct twe_code_table *table, uint32_t code) 261 { 262 263 for (; table->string != NULL; table++) { 264 if (table->code == code) 265 return (table->string); 266 } 267 return (NULL); 268 } 269 270 static inline u_int32_t 271 twe_inl(struct twe_softc *sc, int off) 272 { 273 274 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 275 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 276 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 277 } 278 279 static inline void 280 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 281 { 282 283 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 284 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 285 BUS_SPACE_BARRIER_WRITE); 286 } 287 288 /* 289 * Match a supported board. 290 */ 291 static int 292 twe_match(struct device *parent, struct cfdata *cfdata, 293 void *aux) 294 { 295 struct pci_attach_args *pa; 296 297 pa = aux; 298 299 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 300 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 301 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 302 } 303 304 /* 305 * Attach a supported board. 306 * 307 * XXX This doesn't fail gracefully. 308 */ 309 static void 310 twe_attach(struct device *parent, struct device *self, void *aux) 311 { 312 struct pci_attach_args *pa; 313 struct twe_softc *sc; 314 pci_chipset_tag_t pc; 315 pci_intr_handle_t ih; 316 pcireg_t csr; 317 const char *intrstr; 318 int s, size, i, rv, rseg; 319 size_t max_segs, max_xfer; 320 bus_dma_segment_t seg; 321 struct ctlname ctlnames[] = CTL_NAMES; 322 const struct sysctlnode *node; 323 struct twe_cmd *tc; 324 struct twe_ccb *ccb; 325 326 sc = (struct twe_softc *)self; 327 pa = aux; 328 pc = pa->pa_pc; 329 sc->sc_dmat = pa->pa_dmat; 330 SIMPLEQ_INIT(&sc->sc_ccb_queue); 331 SLIST_INIT(&sc->sc_ccb_freelist); 332 333 aprint_naive(": RAID controller\n"); 334 aprint_normal(": 3ware Escalade\n"); 335 336 337 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 338 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 339 aprint_error_dev(&sc->sc_dv, "can't map i/o space\n"); 340 return; 341 } 342 343 /* Enable the device. */ 344 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 345 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 346 csr | PCI_COMMAND_MASTER_ENABLE); 347 348 /* Map and establish the interrupt. */ 349 if (pci_intr_map(pa, &ih)) { 350 aprint_error_dev(&sc->sc_dv, "can't map interrupt\n"); 351 return; 352 } 353 354 intrstr = pci_intr_string(pc, ih); 355 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 356 if (sc->sc_ih == NULL) { 357 aprint_error_dev(&sc->sc_dv, "can't establish interrupt%s%s\n", 358 (intrstr) ? " at " : "", 359 (intrstr) ? intrstr : ""); 360 return; 361 } 362 363 if (intrstr != NULL) 364 aprint_normal_dev(&sc->sc_dv, "interrupting at %s\n", 365 intrstr); 366 367 /* 368 * Allocate and initialise the command blocks and CCBs. 369 */ 370 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 371 372 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 373 &rseg, BUS_DMA_NOWAIT)) != 0) { 374 aprint_error_dev(&sc->sc_dv, "unable to allocate commands, rv = %d\n", rv); 375 return; 376 } 377 378 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 379 (void **)&sc->sc_cmds, 380 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 381 aprint_error_dev(&sc->sc_dv, "unable to map commands, rv = %d\n", rv); 382 return; 383 } 384 385 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 386 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 387 aprint_error_dev(&sc->sc_dv, "unable to create command DMA map, rv = %d\n", rv); 388 return; 389 } 390 391 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 392 size, NULL, BUS_DMA_NOWAIT)) != 0) { 393 aprint_error_dev(&sc->sc_dv, "unable to load command DMA map, rv = %d\n", rv); 394 return; 395 } 396 397 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 398 if (ccb == NULL) { 399 aprint_error_dev(&sc->sc_dv, "unable to allocate memory for ccbs\n"); 400 return; 401 } 402 403 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 404 memset(sc->sc_cmds, 0, size); 405 406 sc->sc_ccbs = ccb; 407 tc = (struct twe_cmd *)sc->sc_cmds; 408 max_segs = twe_get_maxsegs(); 409 max_xfer = twe_get_maxxfer(max_segs); 410 411 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 412 ccb->ccb_cmd = tc; 413 ccb->ccb_cmdid = i; 414 ccb->ccb_flags = 0; 415 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 416 max_segs, PAGE_SIZE, 0, 417 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 418 &ccb->ccb_dmamap_xfer); 419 if (rv != 0) { 420 aprint_error_dev(&sc->sc_dv, "can't create dmamap, rv = %d\n", rv); 421 return; 422 } 423 424 /* Save the first CCB for AEN retrieval. */ 425 if (i != 0) 426 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 427 ccb_chain.slist); 428 } 429 430 /* Wait for the controller to become ready. */ 431 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 432 aprint_error_dev(&sc->sc_dv, "microcontroller not ready\n"); 433 return; 434 } 435 436 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 437 438 /* Reset the controller. */ 439 s = splbio(); 440 rv = twe_reset(sc); 441 splx(s); 442 if (rv) { 443 aprint_error_dev(&sc->sc_dv, "reset failed\n"); 444 return; 445 } 446 447 /* Initialise connection with controller. */ 448 twe_init_connection(sc); 449 450 twe_describe_controller(sc); 451 452 /* Find and attach RAID array units. */ 453 sc->sc_nunits = 0; 454 for (i = 0; i < TWE_MAX_UNITS; i++) 455 (void) twe_add_unit(sc, i); 456 457 /* ...and finally, enable interrupts. */ 458 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 459 TWE_CTL_UNMASK_RESP_INTR | 460 TWE_CTL_ENABLE_INTRS); 461 462 /* sysctl set-up for 3ware cli */ 463 if (sysctl_createv(NULL, 0, NULL, NULL, 464 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 465 NULL, NULL, 0, NULL, 0, 466 CTL_HW, CTL_EOL) != 0) { 467 aprint_error_dev(&sc->sc_dv, "could not create %s sysctl node\n", 468 ctlnames[CTL_HW].ctl_name); 469 return; 470 } 471 if (sysctl_createv(NULL, 0, NULL, &node, 472 0, CTLTYPE_NODE, device_xname(&sc->sc_dv), 473 SYSCTL_DESCR("twe driver information"), 474 NULL, 0, NULL, 0, 475 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 476 aprint_error_dev(&sc->sc_dv, "could not create %s.%s sysctl node\n", 477 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv)); 478 return; 479 } 480 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 481 0, CTLTYPE_STRING, "driver_version", 482 SYSCTL_DESCR("twe0 driver version"), 483 NULL, 0, &twever, 0, 484 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 485 != 0) { 486 aprint_error_dev(&sc->sc_dv, "could not create %s.%s.driver_version sysctl\n", 487 ctlnames[CTL_HW].ctl_name, device_xname(&sc->sc_dv)); 488 return; 489 } 490 } 491 492 void 493 twe_register_callbacks(struct twe_softc *sc, int unit, 494 const struct twe_callbacks *tcb) 495 { 496 497 sc->sc_units[unit].td_callbacks = tcb; 498 } 499 500 static void 501 twe_recompute_openings(struct twe_softc *sc) 502 { 503 struct twe_drive *td; 504 int unit, openings; 505 506 if (sc->sc_nunits != 0) 507 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 508 else 509 openings = 0; 510 if (openings == sc->sc_openings) 511 return; 512 sc->sc_openings = openings; 513 514 #ifdef TWE_DEBUG 515 printf("%s: %d array%s, %d openings per array\n", 516 device_xname(&sc->sc_dv), sc->sc_nunits, 517 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 518 #endif 519 520 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 521 td = &sc->sc_units[unit]; 522 if (td->td_dev != NULL) 523 (*td->td_callbacks->tcb_openings)(td->td_dev, 524 sc->sc_openings); 525 } 526 } 527 528 static int 529 twe_add_unit(struct twe_softc *sc, int unit) 530 { 531 struct twe_param *dtp, *atp; 532 struct twe_array_descriptor *ad; 533 struct twe_drive *td; 534 struct twe_attach_args twea; 535 uint32_t newsize; 536 int rv; 537 uint16_t dsize; 538 uint8_t newtype, newstripe; 539 int locs[TWECF_NLOCS]; 540 541 if (unit < 0 || unit >= TWE_MAX_UNITS) 542 return (EINVAL); 543 544 /* Find attached units. */ 545 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 546 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 547 if (rv != 0) { 548 aprint_error_dev(&sc->sc_dv, "error %d fetching unit summary\n", 549 rv); 550 return (rv); 551 } 552 553 /* For each detected unit, collect size and store in an array. */ 554 td = &sc->sc_units[unit]; 555 556 /* Unit present? */ 557 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 558 /* 559 * XXX Should we check to see if a device has been 560 * XXX attached at this index and detach it if it 561 * XXX has? ("rescan" semantics) 562 */ 563 rv = 0; 564 goto out; 565 } 566 567 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 568 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 569 if (rv != 0) { 570 aprint_error_dev(&sc->sc_dv, "error %d fetching descriptor size " 571 "for unit %d\n", rv, unit); 572 goto out; 573 } 574 575 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 576 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 577 if (rv != 0) { 578 aprint_error_dev(&sc->sc_dv, "error %d fetching array descriptor " 579 "for unit %d\n", rv, unit); 580 goto out; 581 } 582 583 ad = (struct twe_array_descriptor *)atp->tp_data; 584 newtype = ad->configuration; 585 newstripe = ad->stripe_size; 586 free(atp, M_DEVBUF); 587 588 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 589 TWE_PARAM_UNITINFO_Capacity, &newsize); 590 if (rv != 0) { 591 aprint_error_dev(&sc->sc_dv, 592 "error %d fetching capacity for unit %d\n", 593 rv, unit); 594 goto out; 595 } 596 597 /* 598 * Have a device, so we need to attach it. If there is currently 599 * something sitting at the slot, and the parameters are different, 600 * then we detach the old device before attaching the new one. 601 */ 602 if (td->td_dev != NULL && 603 td->td_size == newsize && 604 td->td_type == newtype && 605 td->td_stripe == newstripe) { 606 /* Same as the old device; just keep using it. */ 607 rv = 0; 608 goto out; 609 } else if (td->td_dev != NULL) { 610 /* Detach the old device first. */ 611 (void) config_detach(td->td_dev, DETACH_FORCE); 612 td->td_dev = NULL; 613 } else if (td->td_size == 0) 614 sc->sc_nunits++; 615 616 /* 617 * Committed to the new array unit; assign its parameters and 618 * recompute the number of available command openings. 619 */ 620 td->td_size = newsize; 621 td->td_type = newtype; 622 td->td_stripe = newstripe; 623 twe_recompute_openings(sc); 624 625 twea.twea_unit = unit; 626 627 locs[TWECF_UNIT] = unit; 628 629 td->td_dev = config_found_sm_loc(&sc->sc_dv, "twe", locs, &twea, 630 twe_print, config_stdsubmatch); 631 632 rv = 0; 633 out: 634 free(dtp, M_DEVBUF); 635 return (rv); 636 } 637 638 static int 639 twe_del_unit(struct twe_softc *sc, int unit) 640 { 641 struct twe_drive *td; 642 643 if (unit < 0 || unit >= TWE_MAX_UNITS) 644 return (EINVAL); 645 646 td = &sc->sc_units[unit]; 647 if (td->td_size != 0) 648 sc->sc_nunits--; 649 td->td_size = 0; 650 td->td_type = 0; 651 td->td_stripe = 0; 652 if (td->td_dev != NULL) { 653 (void) config_detach(td->td_dev, DETACH_FORCE); 654 td->td_dev = NULL; 655 } 656 twe_recompute_openings(sc); 657 return (0); 658 } 659 660 /* 661 * Reset the controller. 662 * MUST BE CALLED AT splbio()! 663 */ 664 static int 665 twe_reset(struct twe_softc *sc) 666 { 667 uint16_t aen; 668 u_int status; 669 volatile u_int32_t junk; 670 int got, rv; 671 672 /* Issue a soft reset. */ 673 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 674 TWE_CTL_CLEAR_HOST_INTR | 675 TWE_CTL_CLEAR_ATTN_INTR | 676 TWE_CTL_MASK_CMD_INTR | 677 TWE_CTL_MASK_RESP_INTR | 678 TWE_CTL_CLEAR_ERROR_STS | 679 TWE_CTL_DISABLE_INTRS); 680 681 /* Wait for attention... */ 682 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 683 aprint_error_dev(&sc->sc_dv, "timeout waiting for attention interrupt\n"); 684 return (-1); 685 } 686 687 /* ...and ACK it. */ 688 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 689 690 /* 691 * Pull AENs out of the controller; look for a soft reset AEN. 692 * Open code this, since we want to detect reset even if the 693 * queue for management tools is full. 694 * 695 * Note that since: 696 * - interrupts are blocked 697 * - we have reset the controller 698 * - acknowledged the pending ATTENTION 699 * that there is no way a pending asynchronous AEN fetch would 700 * finish, so clear the flag. 701 */ 702 sc->sc_flags &= ~TWEF_AEN; 703 for (got = 0;;) { 704 rv = twe_aen_get(sc, &aen); 705 if (rv != 0) 706 printf("%s: error %d while draining event queue\n", 707 device_xname(&sc->sc_dv), rv); 708 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 709 break; 710 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 711 got = 1; 712 twe_aen_enqueue(sc, aen, 1); 713 } 714 715 if (!got) { 716 printf("%s: reset not reported\n", device_xname(&sc->sc_dv)); 717 return (-1); 718 } 719 720 /* Check controller status. */ 721 status = twe_inl(sc, TWE_REG_STS); 722 if (twe_status_check(sc, status)) { 723 printf("%s: controller errors detected\n", 724 device_xname(&sc->sc_dv)); 725 return (-1); 726 } 727 728 /* Drain the response queue. */ 729 for (;;) { 730 status = twe_inl(sc, TWE_REG_STS); 731 if (twe_status_check(sc, status) != 0) { 732 aprint_error_dev(&sc->sc_dv, "can't drain response queue\n"); 733 return (-1); 734 } 735 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 736 break; 737 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 738 } 739 740 return (0); 741 } 742 743 /* 744 * Print autoconfiguration message for a sub-device. 745 */ 746 static int 747 twe_print(void *aux, const char *pnp) 748 { 749 struct twe_attach_args *twea; 750 751 twea = aux; 752 753 if (pnp != NULL) 754 aprint_normal("block device at %s", pnp); 755 aprint_normal(" unit %d", twea->twea_unit); 756 return (UNCONF); 757 } 758 759 /* 760 * Interrupt service routine. 761 */ 762 static int 763 twe_intr(void *arg) 764 { 765 struct twe_softc *sc; 766 u_int status; 767 int caught, rv; 768 769 sc = arg; 770 caught = 0; 771 status = twe_inl(sc, TWE_REG_STS); 772 twe_status_check(sc, status); 773 774 /* Host interrupts - purpose unknown. */ 775 if ((status & TWE_STS_HOST_INTR) != 0) { 776 #ifdef DEBUG 777 printf("%s: host interrupt\n", device_xname(&sc->sc_dv)); 778 #endif 779 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 780 caught = 1; 781 } 782 783 /* 784 * Attention interrupts, signalled when a controller or child device 785 * state change has occurred. 786 */ 787 if ((status & TWE_STS_ATTN_INTR) != 0) { 788 rv = twe_aen_get(sc, NULL); 789 if (rv != 0) 790 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv); 791 else 792 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 793 caught = 1; 794 } 795 796 /* 797 * Command interrupts, signalled when the controller can accept more 798 * commands. We don't use this; instead, we try to submit commands 799 * when we receive them, and when other commands have completed. 800 * Mask it so we don't get another one. 801 */ 802 if ((status & TWE_STS_CMD_INTR) != 0) { 803 #ifdef DEBUG 804 printf("%s: command interrupt\n", device_xname(&sc->sc_dv)); 805 #endif 806 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 807 caught = 1; 808 } 809 810 if ((status & TWE_STS_RESP_INTR) != 0) { 811 twe_poll(sc); 812 caught = 1; 813 } 814 815 return (caught); 816 } 817 818 /* 819 * Fetch an AEN. Even though this is really like parameter 820 * retrieval, we handle this specially, because we issue this 821 * AEN retrieval command from interrupt context, and thus 822 * reserve a CCB for it to avoid resource shortage. 823 * 824 * XXX There are still potential resource shortages we could 825 * XXX encounter. Consider pre-allocating all AEN-related 826 * XXX resources. 827 * 828 * MUST BE CALLED AT splbio()! 829 */ 830 static int 831 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 832 { 833 struct twe_ccb *ccb; 834 struct twe_cmd *tc; 835 struct twe_param *tp; 836 int rv; 837 838 /* 839 * If we're already retrieving an AEN, just wait; another 840 * retrieval will be chained after the current one completes. 841 */ 842 if (sc->sc_flags & TWEF_AEN) { 843 /* 844 * It is a fatal software programming error to attempt 845 * to fetch an AEN synchronously when an AEN fetch is 846 * already pending. 847 */ 848 KASSERT(aenp == NULL); 849 return (0); 850 } 851 852 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 853 if (tp == NULL) 854 return (ENOMEM); 855 856 ccb = twe_ccb_alloc(sc, 857 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 858 KASSERT(ccb != NULL); 859 860 ccb->ccb_data = tp; 861 ccb->ccb_datasize = TWE_SECTOR_SIZE; 862 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 863 ccb->ccb_tx.tx_context = tp; 864 ccb->ccb_tx.tx_dv = &sc->sc_dv; 865 866 tc = ccb->ccb_cmd; 867 tc->tc_size = 2; 868 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 869 tc->tc_unit = 0; 870 tc->tc_count = htole16(1); 871 872 /* Fill in the outbound parameter data. */ 873 tp->tp_table_id = htole16(TWE_PARAM_AEN); 874 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 875 tp->tp_param_size = 2; 876 877 /* Map the transfer. */ 878 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 879 twe_ccb_free(sc, ccb); 880 goto done; 881 } 882 883 /* Enqueue the command and wait. */ 884 if (aenp != NULL) { 885 rv = twe_ccb_poll(sc, ccb, 5); 886 twe_ccb_unmap(sc, ccb); 887 twe_ccb_free(sc, ccb); 888 if (rv == 0) 889 *aenp = le16toh(*(uint16_t *)tp->tp_data); 890 free(tp, M_DEVBUF); 891 } else { 892 sc->sc_flags |= TWEF_AEN; 893 twe_ccb_enqueue(sc, ccb); 894 rv = 0; 895 } 896 897 done: 898 return (rv); 899 } 900 901 /* 902 * Handle an AEN returned by the controller. 903 * MUST BE CALLED AT splbio()! 904 */ 905 static void 906 twe_aen_handler(struct twe_ccb *ccb, int error) 907 { 908 struct twe_softc *sc; 909 struct twe_param *tp; 910 uint16_t aen; 911 int rv; 912 913 sc = (struct twe_softc *)ccb->ccb_tx.tx_dv; 914 tp = ccb->ccb_tx.tx_context; 915 twe_ccb_unmap(sc, ccb); 916 917 sc->sc_flags &= ~TWEF_AEN; 918 919 if (error) { 920 aprint_error_dev(&sc->sc_dv, "error retrieving AEN\n"); 921 aen = TWE_AEN_QUEUE_EMPTY; 922 } else 923 aen = le16toh(*(u_int16_t *)tp->tp_data); 924 free(tp, M_DEVBUF); 925 twe_ccb_free(sc, ccb); 926 927 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 928 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 929 return; 930 } 931 932 twe_aen_enqueue(sc, aen, 0); 933 934 /* 935 * Chain another retrieval in case interrupts have been 936 * coalesced. 937 */ 938 rv = twe_aen_get(sc, NULL); 939 if (rv != 0) 940 aprint_error_dev(&sc->sc_dv, "unable to retrieve AEN (%d)\n", rv); 941 } 942 943 static void 944 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 945 { 946 const char *str, *msg; 947 int s, next, nextnext, level; 948 949 /* 950 * First report the AEN on the console. Maybe. 951 */ 952 if (! quiet) { 953 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 954 if (str == NULL) { 955 aprint_error_dev(&sc->sc_dv, "unknown AEN 0x%04x\n", aen); 956 } else { 957 msg = str + 3; 958 switch (str[1]) { 959 case 'E': level = LOG_EMERG; break; 960 case 'a': level = LOG_ALERT; break; 961 case 'c': level = LOG_CRIT; break; 962 case 'e': level = LOG_ERR; break; 963 case 'w': level = LOG_WARNING; break; 964 case 'n': level = LOG_NOTICE; break; 965 case 'i': level = LOG_INFO; break; 966 case 'd': level = LOG_DEBUG; break; 967 default: 968 /* Don't use syslog. */ 969 level = -1; 970 } 971 972 if (level < 0) { 973 switch (str[0]) { 974 case 'u': 975 case 'p': 976 printf("%s: %s %d: %s\n", 977 device_xname(&sc->sc_dv), 978 str[0] == 'u' ? "unit" : "port", 979 TWE_AEN_UNIT(aen), msg); 980 break; 981 982 default: 983 printf("%s: %s\n", 984 device_xname(&sc->sc_dv), msg); 985 } 986 } else { 987 switch (str[0]) { 988 case 'u': 989 case 'p': 990 log(level, "%s: %s %d: %s\n", 991 device_xname(&sc->sc_dv), 992 str[0] == 'u' ? "unit" : "port", 993 TWE_AEN_UNIT(aen), msg); 994 break; 995 996 default: 997 log(level, "%s: %s\n", 998 device_xname(&sc->sc_dv), msg); 999 } 1000 } 1001 } 1002 } 1003 1004 /* Now enqueue the AEN for mangement tools. */ 1005 s = splbio(); 1006 1007 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1008 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1009 1010 /* 1011 * If this is the last free slot, then queue up a "queue 1012 * full" message. 1013 */ 1014 if (nextnext == sc->sc_aen_tail) 1015 aen = TWE_AEN_QUEUE_FULL; 1016 1017 if (next != sc->sc_aen_tail) { 1018 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1019 sc->sc_aen_head = next; 1020 } 1021 1022 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1023 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1024 wakeup(&sc->sc_aen_queue); 1025 } 1026 1027 splx(s); 1028 } 1029 1030 /* NOTE: Must be called at splbio(). */ 1031 static uint16_t 1032 twe_aen_dequeue(struct twe_softc *sc) 1033 { 1034 uint16_t aen; 1035 1036 if (sc->sc_aen_tail == sc->sc_aen_head) 1037 aen = TWE_AEN_QUEUE_EMPTY; 1038 else { 1039 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1040 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1041 } 1042 1043 return (aen); 1044 } 1045 1046 /* 1047 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1048 * fetch 1, 2, and 4 byte parameter values, respectively. 1049 */ 1050 int 1051 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1052 uint8_t *valp) 1053 { 1054 struct twe_param *tp; 1055 int rv; 1056 1057 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1058 if (rv != 0) 1059 return (rv); 1060 *valp = *(uint8_t *)tp->tp_data; 1061 free(tp, M_DEVBUF); 1062 return (0); 1063 } 1064 1065 int 1066 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1067 uint16_t *valp) 1068 { 1069 struct twe_param *tp; 1070 int rv; 1071 1072 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1073 if (rv != 0) 1074 return (rv); 1075 *valp = le16toh(*(uint16_t *)tp->tp_data); 1076 free(tp, M_DEVBUF); 1077 return (0); 1078 } 1079 1080 int 1081 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1082 uint32_t *valp) 1083 { 1084 struct twe_param *tp; 1085 int rv; 1086 1087 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1088 if (rv != 0) 1089 return (rv); 1090 *valp = le32toh(*(uint32_t *)tp->tp_data); 1091 free(tp, M_DEVBUF); 1092 return (0); 1093 } 1094 1095 /* 1096 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1097 * it will be called with generated context when the command has completed. 1098 * If no callback is provided, the command will be executed synchronously 1099 * and a pointer to a buffer containing the data returned. 1100 * 1101 * The caller or callback is responsible for freeing the buffer. 1102 * 1103 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1104 */ 1105 int 1106 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1107 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1108 { 1109 struct twe_ccb *ccb; 1110 struct twe_cmd *tc; 1111 struct twe_param *tp; 1112 int rv, s; 1113 1114 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1115 if (tp == NULL) 1116 return ENOMEM; 1117 1118 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1119 KASSERT(ccb != NULL); 1120 1121 ccb->ccb_data = tp; 1122 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1123 ccb->ccb_tx.tx_handler = func; 1124 ccb->ccb_tx.tx_context = tp; 1125 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1126 1127 tc = ccb->ccb_cmd; 1128 tc->tc_size = 2; 1129 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1130 tc->tc_unit = 0; 1131 tc->tc_count = htole16(1); 1132 1133 /* Fill in the outbound parameter data. */ 1134 tp->tp_table_id = htole16(table_id); 1135 tp->tp_param_id = param_id; 1136 tp->tp_param_size = size; 1137 1138 /* Map the transfer. */ 1139 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1140 twe_ccb_free(sc, ccb); 1141 goto done; 1142 } 1143 1144 /* Submit the command and either wait or let the callback handle it. */ 1145 if (func == NULL) { 1146 s = splbio(); 1147 rv = twe_ccb_poll(sc, ccb, 5); 1148 twe_ccb_unmap(sc, ccb); 1149 twe_ccb_free(sc, ccb); 1150 splx(s); 1151 } else { 1152 #ifdef DEBUG 1153 if (pbuf != NULL) 1154 panic("both func and pbuf defined"); 1155 #endif 1156 twe_ccb_enqueue(sc, ccb); 1157 return 0; 1158 } 1159 1160 done: 1161 if (pbuf == NULL || rv != 0) 1162 free(tp, M_DEVBUF); 1163 else if (pbuf != NULL && rv == 0) 1164 *pbuf = tp; 1165 return rv; 1166 } 1167 1168 /* 1169 * Execute a TWE_OP_SET_PARAM command. 1170 * 1171 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1172 */ 1173 static int 1174 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1175 void *sbuf) 1176 { 1177 struct twe_ccb *ccb; 1178 struct twe_cmd *tc; 1179 struct twe_param *tp; 1180 int rv, s; 1181 1182 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1183 if (tp == NULL) 1184 return ENOMEM; 1185 1186 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1187 KASSERT(ccb != NULL); 1188 1189 ccb->ccb_data = tp; 1190 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1191 ccb->ccb_tx.tx_handler = 0; 1192 ccb->ccb_tx.tx_context = tp; 1193 ccb->ccb_tx.tx_dv = &sc->sc_dv; 1194 1195 tc = ccb->ccb_cmd; 1196 tc->tc_size = 2; 1197 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1198 tc->tc_unit = 0; 1199 tc->tc_count = htole16(1); 1200 1201 /* Fill in the outbound parameter data. */ 1202 tp->tp_table_id = htole16(table_id); 1203 tp->tp_param_id = param_id; 1204 tp->tp_param_size = size; 1205 memcpy(tp->tp_data, sbuf, size); 1206 1207 /* Map the transfer. */ 1208 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1209 twe_ccb_free(sc, ccb); 1210 goto done; 1211 } 1212 1213 /* Submit the command and wait. */ 1214 s = splbio(); 1215 rv = twe_ccb_poll(sc, ccb, 5); 1216 twe_ccb_unmap(sc, ccb); 1217 twe_ccb_free(sc, ccb); 1218 splx(s); 1219 done: 1220 free(tp, M_DEVBUF); 1221 return (rv); 1222 } 1223 1224 /* 1225 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1226 * Must be called with interrupts blocked. 1227 */ 1228 static int 1229 twe_init_connection(struct twe_softc *sc) 1230 { 1231 struct twe_ccb *ccb; 1232 struct twe_cmd *tc; 1233 int rv; 1234 1235 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1236 return (EAGAIN); 1237 1238 /* Build the command. */ 1239 tc = ccb->ccb_cmd; 1240 tc->tc_size = 3; 1241 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1242 tc->tc_unit = 0; 1243 tc->tc_count = htole16(TWE_MAX_CMDS); 1244 tc->tc_args.init_connection.response_queue_pointer = 0; 1245 1246 /* Submit the command for immediate execution. */ 1247 rv = twe_ccb_poll(sc, ccb, 5); 1248 twe_ccb_free(sc, ccb); 1249 return (rv); 1250 } 1251 1252 /* 1253 * Poll the controller for completed commands. Must be called with 1254 * interrupts blocked. 1255 */ 1256 static void 1257 twe_poll(struct twe_softc *sc) 1258 { 1259 struct twe_ccb *ccb; 1260 int found; 1261 u_int status, cmdid; 1262 1263 found = 0; 1264 1265 for (;;) { 1266 status = twe_inl(sc, TWE_REG_STS); 1267 twe_status_check(sc, status); 1268 1269 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1270 break; 1271 1272 found = 1; 1273 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1274 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1275 if (cmdid >= TWE_MAX_QUEUECNT) { 1276 aprint_error_dev(&sc->sc_dv, "bad cmdid %d\n", cmdid); 1277 continue; 1278 } 1279 1280 ccb = sc->sc_ccbs + cmdid; 1281 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1282 printf("%s: CCB for cmdid %d not active\n", 1283 device_xname(&sc->sc_dv), cmdid); 1284 continue; 1285 } 1286 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1287 1288 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1289 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1290 sizeof(struct twe_cmd), 1291 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1292 1293 /* Pass notification to upper layers. */ 1294 if (ccb->ccb_tx.tx_handler != NULL) 1295 (*ccb->ccb_tx.tx_handler)(ccb, 1296 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1297 } 1298 1299 /* If any commands have completed, run the software queue. */ 1300 if (found) 1301 twe_ccb_enqueue(sc, NULL); 1302 } 1303 1304 /* 1305 * Wait for `status' to be set in the controller status register. Return 1306 * zero if found, non-zero if the operation timed out. 1307 */ 1308 static int 1309 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1310 { 1311 1312 for (timo *= 10; timo != 0; timo--) { 1313 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1314 break; 1315 delay(100000); 1316 } 1317 1318 return (timo == 0); 1319 } 1320 1321 /* 1322 * Clear a PCI parity error. 1323 */ 1324 static void 1325 twe_clear_pci_parity_error(struct twe_softc *sc) 1326 { 1327 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1328 1329 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1330 } 1331 1332 1333 /* 1334 * Clear a PCI abort. 1335 */ 1336 static void 1337 twe_clear_pci_abort(struct twe_softc *sc) 1338 { 1339 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1340 1341 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1342 } 1343 1344 /* 1345 * Complain if the status bits aren't what we expect. 1346 */ 1347 static int 1348 twe_status_check(struct twe_softc *sc, u_int status) 1349 { 1350 int rv; 1351 1352 rv = 0; 1353 1354 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1355 aprint_error_dev(&sc->sc_dv, "missing status bits: 0x%08x\n", 1356 status & ~TWE_STS_EXPECTED_BITS); 1357 rv = -1; 1358 } 1359 1360 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1361 aprint_error_dev(&sc->sc_dv, "unexpected status bits: 0x%08x\n", 1362 status & TWE_STS_UNEXPECTED_BITS); 1363 rv = -1; 1364 if (status & TWE_STS_PCI_PARITY_ERROR) { 1365 aprint_error_dev(&sc->sc_dv, "PCI parity error: Reseat card, move card " 1366 "or buggy device present.\n"); 1367 twe_clear_pci_parity_error(sc); 1368 } 1369 if (status & TWE_STS_PCI_ABORT) { 1370 aprint_error_dev(&sc->sc_dv, "PCI abort, clearing.\n"); 1371 twe_clear_pci_abort(sc); 1372 } 1373 } 1374 1375 return (rv); 1376 } 1377 1378 /* 1379 * Allocate and initialise a CCB. 1380 */ 1381 static inline void 1382 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1383 { 1384 struct twe_cmd *tc; 1385 1386 ccb->ccb_tx.tx_handler = NULL; 1387 ccb->ccb_flags = flags; 1388 tc = ccb->ccb_cmd; 1389 tc->tc_status = 0; 1390 tc->tc_flags = 0; 1391 tc->tc_cmdid = ccb->ccb_cmdid; 1392 } 1393 1394 struct twe_ccb * 1395 twe_ccb_alloc(struct twe_softc *sc, int flags) 1396 { 1397 struct twe_ccb *ccb; 1398 int s; 1399 1400 s = splbio(); 1401 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1402 /* Use the reserved CCB. */ 1403 ccb = sc->sc_ccbs; 1404 } else { 1405 /* Allocate a CCB and command block. */ 1406 if (__predict_false((ccb = 1407 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1408 splx(s); 1409 return (NULL); 1410 } 1411 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1412 } 1413 #ifdef DIAGNOSTIC 1414 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1415 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1416 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1417 panic("twe_ccb_alloc: CCB %ld already allocated", 1418 (long)(ccb - sc->sc_ccbs)); 1419 flags |= TWE_CCB_ALLOCED; 1420 #endif 1421 splx(s); 1422 1423 twe_ccb_init(sc, ccb, flags); 1424 return (ccb); 1425 } 1426 1427 struct twe_ccb * 1428 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1429 { 1430 struct twe_ccb *ccb; 1431 int s; 1432 1433 KASSERT((flags & TWE_CCB_AEN) == 0); 1434 1435 s = splbio(); 1436 while (__predict_false((ccb = 1437 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1438 sc->sc_flags |= TWEF_WAIT_CCB; 1439 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1440 } 1441 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1442 #ifdef DIAGNOSTIC 1443 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1444 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1445 (long)(ccb - sc->sc_ccbs)); 1446 flags |= TWE_CCB_ALLOCED; 1447 #endif 1448 splx(s); 1449 1450 twe_ccb_init(sc, ccb, flags); 1451 return (ccb); 1452 } 1453 1454 /* 1455 * Free a CCB. 1456 */ 1457 void 1458 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1459 { 1460 int s; 1461 1462 s = splbio(); 1463 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1464 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1465 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1466 sc->sc_flags &= ~TWEF_WAIT_CCB; 1467 wakeup(&sc->sc_ccb_freelist); 1468 } 1469 } 1470 ccb->ccb_flags = 0; 1471 splx(s); 1472 } 1473 1474 /* 1475 * Map the specified CCB's command block and data buffer (if any) into 1476 * controller visible space. Perform DMA synchronisation. 1477 */ 1478 int 1479 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1480 { 1481 struct twe_cmd *tc; 1482 int flags, nsegs, i, s, rv; 1483 void *data; 1484 1485 /* 1486 * The data as a whole must be 512-byte aligned. 1487 */ 1488 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1489 s = splvm(); 1490 /* XXX */ 1491 ccb->ccb_abuf = uvm_km_alloc(kmem_map, 1492 ccb->ccb_datasize, 0, UVM_KMF_NOWAIT|UVM_KMF_WIRED); 1493 splx(s); 1494 data = (void *)ccb->ccb_abuf; 1495 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1496 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1497 } else { 1498 ccb->ccb_abuf = (vaddr_t)0; 1499 data = ccb->ccb_data; 1500 } 1501 1502 /* 1503 * Map the data buffer into bus space and build the S/G list. 1504 */ 1505 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1506 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1507 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1508 BUS_DMA_READ : BUS_DMA_WRITE)); 1509 if (rv != 0) { 1510 if (ccb->ccb_abuf != (vaddr_t)0) { 1511 s = splvm(); 1512 /* XXX */ 1513 uvm_km_free(kmem_map, ccb->ccb_abuf, 1514 ccb->ccb_datasize, UVM_KMF_WIRED); 1515 splx(s); 1516 } 1517 return (rv); 1518 } 1519 1520 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1521 tc = ccb->ccb_cmd; 1522 tc->tc_size += 2 * nsegs; 1523 1524 /* The location of the S/G list is dependant upon command type. */ 1525 switch (tc->tc_opcode >> 5) { 1526 case 2: 1527 for (i = 0; i < nsegs; i++) { 1528 tc->tc_args.param.sgl[i].tsg_address = 1529 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1530 tc->tc_args.param.sgl[i].tsg_length = 1531 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1532 } 1533 /* XXX Needed? */ 1534 for (; i < TWE_SG_SIZE; i++) { 1535 tc->tc_args.param.sgl[i].tsg_address = 0; 1536 tc->tc_args.param.sgl[i].tsg_length = 0; 1537 } 1538 break; 1539 case 3: 1540 for (i = 0; i < nsegs; i++) { 1541 tc->tc_args.io.sgl[i].tsg_address = 1542 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1543 tc->tc_args.io.sgl[i].tsg_length = 1544 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1545 } 1546 /* XXX Needed? */ 1547 for (; i < TWE_SG_SIZE; i++) { 1548 tc->tc_args.io.sgl[i].tsg_address = 0; 1549 tc->tc_args.io.sgl[i].tsg_length = 0; 1550 } 1551 break; 1552 default: 1553 /* 1554 * In all likelihood, this is a command passed from 1555 * management tools in userspace where no S/G list is 1556 * necessary because no data is being passed. 1557 */ 1558 break; 1559 } 1560 1561 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1562 flags = BUS_DMASYNC_PREREAD; 1563 else 1564 flags = 0; 1565 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1566 flags |= BUS_DMASYNC_PREWRITE; 1567 1568 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1569 ccb->ccb_datasize, flags); 1570 return (0); 1571 } 1572 1573 /* 1574 * Unmap the specified CCB's command block and data buffer (if any) and 1575 * perform DMA synchronisation. 1576 */ 1577 void 1578 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1579 { 1580 int flags, s; 1581 1582 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1583 flags = BUS_DMASYNC_POSTREAD; 1584 else 1585 flags = 0; 1586 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1587 flags |= BUS_DMASYNC_POSTWRITE; 1588 1589 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1590 ccb->ccb_datasize, flags); 1591 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1592 1593 if (ccb->ccb_abuf != (vaddr_t)0) { 1594 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1595 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1596 ccb->ccb_datasize); 1597 s = splvm(); 1598 /* XXX */ 1599 uvm_km_free(kmem_map, ccb->ccb_abuf, ccb->ccb_datasize, 1600 UVM_KMF_WIRED); 1601 splx(s); 1602 } 1603 } 1604 1605 /* 1606 * Submit a command to the controller and poll on completion. Return 1607 * non-zero on timeout (but don't check status, as some command types don't 1608 * return status). Must be called with interrupts blocked. 1609 */ 1610 int 1611 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1612 { 1613 int rv; 1614 1615 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1616 return (rv); 1617 1618 for (timo *= 1000; timo != 0; timo--) { 1619 twe_poll(sc); 1620 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1621 break; 1622 DELAY(100); 1623 } 1624 1625 return (timo == 0); 1626 } 1627 1628 /* 1629 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1630 * the order that they were enqueued and try to submit their command blocks 1631 * to the controller for execution. 1632 */ 1633 void 1634 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1635 { 1636 int s; 1637 1638 s = splbio(); 1639 1640 if (ccb != NULL) 1641 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1642 1643 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1644 if (twe_ccb_submit(sc, ccb)) 1645 break; 1646 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1647 } 1648 1649 splx(s); 1650 } 1651 1652 /* 1653 * Submit the command block associated with the specified CCB to the 1654 * controller for execution. Must be called with interrupts blocked. 1655 */ 1656 int 1657 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1658 { 1659 bus_addr_t pa; 1660 int rv; 1661 u_int status; 1662 1663 /* Check to see if we can post a command. */ 1664 status = twe_inl(sc, TWE_REG_STS); 1665 twe_status_check(sc, status); 1666 1667 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1668 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1669 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1670 sizeof(struct twe_cmd), 1671 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1672 #ifdef DIAGNOSTIC 1673 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1674 panic("%s: CCB %ld not ALLOCED\n", 1675 device_xname(&sc->sc_dv), (long)(ccb - sc->sc_ccbs)); 1676 #endif 1677 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1678 pa = sc->sc_cmds_paddr + 1679 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1680 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1681 rv = 0; 1682 } else 1683 rv = EBUSY; 1684 1685 return (rv); 1686 } 1687 1688 1689 /* 1690 * Accept an open operation on the control device. 1691 */ 1692 static int 1693 tweopen(dev_t dev, int flag, int mode, struct lwp *l) 1694 { 1695 struct twe_softc *twe; 1696 1697 if ((twe = device_lookup_private(&twe_cd, minor(dev))) == NULL) 1698 return (ENXIO); 1699 if ((twe->sc_flags & TWEF_OPEN) != 0) 1700 return (EBUSY); 1701 1702 twe->sc_flags |= TWEF_OPEN; 1703 return (0); 1704 } 1705 1706 /* 1707 * Accept the last close on the control device. 1708 */ 1709 static int 1710 tweclose(dev_t dev, int flag, int mode, 1711 struct lwp *l) 1712 { 1713 struct twe_softc *twe; 1714 1715 twe = device_lookup_private(&twe_cd, minor(dev)); 1716 twe->sc_flags &= ~TWEF_OPEN; 1717 return (0); 1718 } 1719 1720 void 1721 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1722 { 1723 1724 /* Just wake up the sleeper. */ 1725 wakeup(ccb); 1726 } 1727 1728 /* 1729 * Handle control operations. 1730 */ 1731 static int 1732 tweioctl(dev_t dev, u_long cmd, void *data, int flag, 1733 struct lwp *l) 1734 { 1735 struct twe_softc *twe; 1736 struct twe_ccb *ccb; 1737 struct twe_param *param; 1738 struct twe_usercommand *tu; 1739 struct twe_paramcommand *tp; 1740 struct twe_drivecommand *td; 1741 void *pdata = NULL; 1742 int s, error = 0; 1743 u_int8_t cmdid; 1744 1745 twe = device_lookup_private(&twe_cd, minor(dev)); 1746 tu = (struct twe_usercommand *)data; 1747 tp = (struct twe_paramcommand *)data; 1748 td = (struct twe_drivecommand *)data; 1749 1750 /* This is intended to be compatible with the FreeBSD interface. */ 1751 switch (cmd) { 1752 case TWEIO_COMMAND: 1753 error = kauth_authorize_device_passthru(l->l_cred, dev, 1754 KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data); 1755 if (error) 1756 return (error); 1757 1758 /* XXX mutex */ 1759 if (tu->tu_size > 0) { 1760 /* 1761 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1762 * it's really necessary, first. 1763 */ 1764 if (tu->tu_size > TWE_SECTOR_SIZE) { 1765 #ifdef TWE_DEBUG 1766 printf("%s: TWEIO_COMMAND: tu_size = %d\n", 1767 device_xname(&twe->sc_dv), tu->tu_size); 1768 #endif 1769 return EINVAL; 1770 } 1771 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1772 error = copyin(tu->tu_data, pdata, tu->tu_size); 1773 if (error != 0) 1774 goto done; 1775 ccb = twe_ccb_alloc_wait(twe, 1776 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1777 KASSERT(ccb != NULL); 1778 ccb->ccb_data = pdata; 1779 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1780 } else { 1781 ccb = twe_ccb_alloc_wait(twe, 0); 1782 KASSERT(ccb != NULL); 1783 } 1784 1785 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1786 ccb->ccb_tx.tx_context = NULL; 1787 ccb->ccb_tx.tx_dv = &twe->sc_dv; 1788 1789 cmdid = ccb->ccb_cmdid; 1790 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1791 ccb->ccb_cmd->tc_cmdid = cmdid; 1792 1793 /* Map the transfer. */ 1794 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1795 twe_ccb_free(twe, ccb); 1796 goto done; 1797 } 1798 1799 /* Submit the command and wait up to 1 minute. */ 1800 error = 0; 1801 twe_ccb_enqueue(twe, ccb); 1802 s = splbio(); 1803 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1804 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1805 60 * hz)) != 0) 1806 break; 1807 splx(s); 1808 1809 /* Copy the command back to the ioctl argument. */ 1810 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1811 #ifdef TWE_DEBUG 1812 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1813 "tc_status = 0x%02x\n", device_xname(&twe->sc_dv), 1814 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1815 #endif 1816 1817 s = splbio(); 1818 twe_ccb_free(twe, ccb); 1819 splx(s); 1820 1821 if (tu->tu_size > 0) 1822 error = copyout(pdata, tu->tu_data, tu->tu_size); 1823 goto done; 1824 1825 case TWEIO_STATS: 1826 return (ENOENT); 1827 1828 case TWEIO_AEN_POLL: 1829 s = splbio(); 1830 *(u_int *)data = twe_aen_dequeue(twe); 1831 splx(s); 1832 return (0); 1833 1834 case TWEIO_AEN_WAIT: 1835 s = splbio(); 1836 while ((*(u_int *)data = 1837 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1838 twe->sc_flags |= TWEF_AENQ_WAIT; 1839 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1840 "tweaen", 0); 1841 if (error == EINTR) { 1842 splx(s); 1843 return (error); 1844 } 1845 } 1846 splx(s); 1847 return (0); 1848 1849 case TWEIO_GET_PARAM: 1850 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1851 tp->tp_size, 0, ¶m); 1852 if (error != 0) 1853 return (error); 1854 if (param->tp_param_size > tp->tp_size) { 1855 error = EFAULT; 1856 goto done; 1857 } 1858 error = copyout(param->tp_data, tp->tp_data, 1859 param->tp_param_size); 1860 free(param, M_DEVBUF); 1861 goto done; 1862 1863 case TWEIO_SET_PARAM: 1864 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1865 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1866 goto done; 1867 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1868 tp->tp_size, pdata); 1869 goto done; 1870 1871 case TWEIO_RESET: 1872 s = splbio(); 1873 twe_reset(twe); 1874 splx(s); 1875 return (0); 1876 1877 case TWEIO_ADD_UNIT: 1878 /* XXX mutex */ 1879 return (twe_add_unit(twe, td->td_unit)); 1880 1881 case TWEIO_DEL_UNIT: 1882 /* XXX mutex */ 1883 return (twe_del_unit(twe, td->td_unit)); 1884 1885 default: 1886 return EINVAL; 1887 } 1888 done: 1889 if (pdata) 1890 free(pdata, M_DEVBUF); 1891 return error; 1892 } 1893 1894 const struct cdevsw twe_cdevsw = { 1895 tweopen, tweclose, noread, nowrite, tweioctl, 1896 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 1897 }; 1898 1899 /* 1900 * Print some information about the controller 1901 */ 1902 static void 1903 twe_describe_controller(struct twe_softc *sc) 1904 { 1905 struct twe_param *p[6]; 1906 int i, rv = 0; 1907 uint32_t dsize; 1908 uint8_t ports; 1909 1910 ports = 0; 1911 1912 /* get the port count */ 1913 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1914 TWE_PARAM_CONTROLLER_PortCount, &ports); 1915 1916 /* get version strings */ 1917 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1918 16, NULL, &p[0]); 1919 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1920 16, NULL, &p[1]); 1921 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1922 16, NULL, &p[2]); 1923 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1924 8, NULL, &p[3]); 1925 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1926 8, NULL, &p[4]); 1927 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1928 8, NULL, &p[5]); 1929 1930 if (rv) { 1931 /* some error occurred */ 1932 aprint_error_dev(&sc->sc_dv, "failed to fetch version information\n"); 1933 return; 1934 } 1935 1936 aprint_normal_dev(&sc->sc_dv, "%d ports, Firmware %.16s, BIOS %.16s\n", 1937 ports, p[1]->tp_data, p[2]->tp_data); 1938 1939 aprint_verbose_dev(&sc->sc_dv, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1940 p[0]->tp_data, p[3]->tp_data, 1941 p[4]->tp_data, p[5]->tp_data); 1942 1943 free(p[0], M_DEVBUF); 1944 free(p[1], M_DEVBUF); 1945 free(p[2], M_DEVBUF); 1946 free(p[3], M_DEVBUF); 1947 free(p[4], M_DEVBUF); 1948 free(p[5], M_DEVBUF); 1949 1950 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1951 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1952 if (rv) { 1953 aprint_error_dev(&sc->sc_dv, "failed to get drive status summary\n"); 1954 return; 1955 } 1956 for (i = 0; i < ports; i++) { 1957 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1958 continue; 1959 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1960 TWE_PARAM_DRIVEINFO_Size, &dsize); 1961 if (rv) { 1962 aprint_error_dev(&sc->sc_dv, 1963 "unable to get drive size for port %d\n", i); 1964 continue; 1965 } 1966 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1967 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1968 if (rv) { 1969 aprint_error_dev(&sc->sc_dv, 1970 "unable to get drive model for port %d\n", i); 1971 continue; 1972 } 1973 aprint_verbose_dev(&sc->sc_dv, "port %d: %.40s %d MB\n", 1974 i, p[1]->tp_data, dsize / 2048); 1975 free(p[1], M_DEVBUF); 1976 } 1977 free(p[0], M_DEVBUF); 1978 } 1979
Indexes created Mon Sep 22 21:09:42 GMT 2025