twe.c revision 1.96.6.2
1 /* $NetBSD: twe.c,v 1.96.6.2 2013/02/25 00:29:29 tls Exp $ */ 2 3 /*- 4 * Copyright (c) 2000, 2001, 2002, 2003, 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran; and by Jason R. Thorpe of Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * Copyright (c) 2000 Michael Smith 34 * Copyright (c) 2000 BSDi 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 56 * SUCH DAMAGE. 57 * 58 * from FreeBSD: twe.c,v 1.1 2000/05/24 23:35:23 msmith Exp 59 */ 60 61 /* 62 * Driver for the 3ware Escalade family of RAID controllers. 63 */ 64 65 #include <sys/cdefs.h> 66 __KERNEL_RCSID(0, "$NetBSD: twe.c,v 1.96.6.2 2013/02/25 00:29:29 tls Exp $"); 67 68 #include <sys/param.h> 69 #include <sys/systm.h> 70 #include <sys/kernel.h> 71 #include <sys/device.h> 72 #include <sys/queue.h> 73 #include <sys/proc.h> 74 #include <sys/buf.h> 75 #include <sys/endian.h> 76 #include <sys/malloc.h> 77 #include <sys/conf.h> 78 #include <sys/disk.h> 79 #include <sys/sysctl.h> 80 #include <sys/syslog.h> 81 #include <sys/kauth.h> 82 83 #include <sys/bswap.h> 84 #include <sys/bus.h> 85 86 #include <dev/pci/pcireg.h> 87 #include <dev/pci/pcivar.h> 88 #include <dev/pci/pcidevs.h> 89 #include <dev/pci/twereg.h> 90 #include <dev/pci/twevar.h> 91 #include <dev/pci/tweio.h> 92 93 #include "locators.h" 94 95 #define PCI_CBIO 0x10 96 97 static int twe_aen_get(struct twe_softc *, uint16_t *); 98 static void twe_aen_handler(struct twe_ccb *, int); 99 static void twe_aen_enqueue(struct twe_softc *sc, uint16_t, int); 100 static uint16_t twe_aen_dequeue(struct twe_softc *); 101 102 static void twe_attach(device_t, device_t, void *); 103 static int twe_init_connection(struct twe_softc *); 104 static int twe_intr(void *); 105 static int twe_match(device_t, cfdata_t, void *); 106 static int twe_param_set(struct twe_softc *, int, int, size_t, void *); 107 static void twe_poll(struct twe_softc *); 108 static int twe_print(void *, const char *); 109 static int twe_reset(struct twe_softc *); 110 static int twe_status_check(struct twe_softc *, u_int); 111 static int twe_status_wait(struct twe_softc *, u_int, int); 112 static void twe_describe_controller(struct twe_softc *); 113 static void twe_clear_pci_abort(struct twe_softc *sc); 114 static void twe_clear_pci_parity_error(struct twe_softc *sc); 115 116 static int twe_add_unit(struct twe_softc *, int); 117 static int twe_del_unit(struct twe_softc *, int); 118 static int twe_init_connection(struct twe_softc *); 119 120 static inline u_int32_t twe_inl(struct twe_softc *, int); 121 static inline void twe_outl(struct twe_softc *, int, u_int32_t); 122 123 extern struct cfdriver twe_cd; 124 125 CFATTACH_DECL_NEW(twe, sizeof(struct twe_softc), 126 twe_match, twe_attach, NULL, NULL); 127 128 /* FreeBSD driver revision for sysctl expected by the 3ware cli */ 129 const char twever[] = "1.50.01.002"; 130 131 /* 132 * Tables to convert numeric codes to strings. 133 */ 134 const struct twe_code_table twe_table_status[] = { 135 { 0x00, "successful completion" }, 136 137 /* info */ 138 { 0x42, "command in progress" }, 139 { 0x6c, "retrying interface CRC error from UDMA command" }, 140 141 /* warning */ 142 { 0x81, "redundant/inconsequential request ignored" }, 143 { 0x8e, "failed to write zeroes to LBA 0" }, 144 { 0x8f, "failed to profile TwinStor zones" }, 145 146 /* fatal */ 147 { 0xc1, "aborted due to system command or reconfiguration" }, 148 { 0xc4, "aborted" }, 149 { 0xc5, "access error" }, 150 { 0xc6, "access violation" }, 151 { 0xc7, "device failure" }, /* high byte may be port # */ 152 { 0xc8, "controller error" }, 153 { 0xc9, "timed out" }, 154 { 0xcb, "invalid unit number" }, 155 { 0xcf, "unit not available" }, 156 { 0xd2, "undefined opcode" }, 157 { 0xdb, "request incompatible with unit" }, 158 { 0xdc, "invalid request" }, 159 { 0xff, "firmware error, reset requested" }, 160 161 { 0, NULL } 162 }; 163 164 const struct twe_code_table twe_table_unitstate[] = { 165 { TWE_PARAM_UNITSTATUS_Normal, "Normal" }, 166 { TWE_PARAM_UNITSTATUS_Initialising, "Initializing" }, 167 { TWE_PARAM_UNITSTATUS_Degraded, "Degraded" }, 168 { TWE_PARAM_UNITSTATUS_Rebuilding, "Rebuilding" }, 169 { TWE_PARAM_UNITSTATUS_Verifying, "Verifying" }, 170 { TWE_PARAM_UNITSTATUS_Corrupt, "Corrupt" }, 171 { TWE_PARAM_UNITSTATUS_Missing, "Missing" }, 172 173 { 0, NULL } 174 }; 175 176 const struct twe_code_table twe_table_unittype[] = { 177 /* array descriptor configuration */ 178 { TWE_AD_CONFIG_RAID0, "RAID0" }, 179 { TWE_AD_CONFIG_RAID1, "RAID1" }, 180 { TWE_AD_CONFIG_TwinStor, "TwinStor" }, 181 { TWE_AD_CONFIG_RAID5, "RAID5" }, 182 { TWE_AD_CONFIG_RAID10, "RAID10" }, 183 { TWE_UD_CONFIG_JBOD, "JBOD" }, 184 185 { 0, NULL } 186 }; 187 188 const struct twe_code_table twe_table_stripedepth[] = { 189 { TWE_AD_STRIPE_4k, "4K" }, 190 { TWE_AD_STRIPE_8k, "8K" }, 191 { TWE_AD_STRIPE_16k, "16K" }, 192 { TWE_AD_STRIPE_32k, "32K" }, 193 { TWE_AD_STRIPE_64k, "64K" }, 194 { TWE_AD_STRIPE_128k, "128K" }, 195 { TWE_AD_STRIPE_256k, "256K" }, 196 { TWE_AD_STRIPE_512k, "512K" }, 197 { TWE_AD_STRIPE_1024k, "1024K" }, 198 199 { 0, NULL } 200 }; 201 202 /* 203 * Asynchronous event notification messages are qualified: 204 * a - not unit/port specific 205 * u - unit specific 206 * p - port specific 207 * 208 * They are further qualified with a severity: 209 * E - LOG_EMERG 210 * a - LOG_ALERT 211 * c - LOG_CRIT 212 * e - LOG_ERR 213 * w - LOG_WARNING 214 * n - LOG_NOTICE 215 * i - LOG_INFO 216 * d - LOG_DEBUG 217 * blank - just use printf 218 */ 219 const struct twe_code_table twe_table_aen[] = { 220 { 0x00, "a queue empty" }, 221 { 0x01, "a soft reset" }, 222 { 0x02, "uc degraded mode" }, 223 { 0x03, "aa controller error" }, 224 { 0x04, "uE rebuild fail" }, 225 { 0x05, "un rebuild done" }, 226 { 0x06, "ue incomplete unit" }, 227 { 0x07, "un initialization done" }, 228 { 0x08, "uw unclean shutdown detected" }, 229 { 0x09, "pe drive timeout" }, 230 { 0x0a, "pc drive error" }, 231 { 0x0b, "un rebuild started" }, 232 { 0x0c, "un initialization started" }, 233 { 0x0d, "ui logical unit deleted" }, 234 { 0x0f, "pc SMART threshold exceeded" }, 235 { 0x15, "a table undefined" }, /* XXX: Not in FreeBSD's table */ 236 { 0x21, "pe ATA UDMA downgrade" }, 237 { 0x22, "pi ATA UDMA upgrade" }, 238 { 0x23, "pw sector repair occurred" }, 239 { 0x24, "aa SBUF integrity check failure" }, 240 { 0x25, "pa lost cached write" }, 241 { 0x26, "pa drive ECC error detected" }, 242 { 0x27, "pe DCB checksum error" }, 243 { 0x28, "pn DCB unsupported version" }, 244 { 0x29, "ui verify started" }, 245 { 0x2a, "ua verify failed" }, 246 { 0x2b, "ui verify complete" }, 247 { 0x2c, "pw overwrote bad sector during rebuild" }, 248 { 0x2d, "pa encountered bad sector during rebuild" }, 249 { 0x2e, "pe replacement drive too small" }, 250 { 0x2f, "ue array not previously initialized" }, 251 { 0x30, "p drive not supported" }, 252 { 0xff, "a aen queue full" }, 253 254 { 0, NULL }, 255 }; 256 257 const char * 258 twe_describe_code(const struct twe_code_table *table, uint32_t code) 259 { 260 261 for (; table->string != NULL; table++) { 262 if (table->code == code) 263 return (table->string); 264 } 265 return (NULL); 266 } 267 268 static inline u_int32_t 269 twe_inl(struct twe_softc *sc, int off) 270 { 271 272 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 273 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ); 274 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off)); 275 } 276 277 static inline void 278 twe_outl(struct twe_softc *sc, int off, u_int32_t val) 279 { 280 281 bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val); 282 bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4, 283 BUS_SPACE_BARRIER_WRITE); 284 } 285 286 /* 287 * Match a supported board. 288 */ 289 static int 290 twe_match(device_t parent, cfdata_t cfdata, void *aux) 291 { 292 struct pci_attach_args *pa; 293 294 pa = aux; 295 296 return (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_3WARE && 297 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE || 298 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_ESCALADE_ASIC)); 299 } 300 301 /* 302 * Attach a supported board. 303 * 304 * XXX This doesn't fail gracefully. 305 */ 306 static void 307 twe_attach(device_t parent, device_t self, void *aux) 308 { 309 struct pci_attach_args *pa; 310 struct twe_softc *sc; 311 pci_chipset_tag_t pc; 312 pci_intr_handle_t ih; 313 pcireg_t csr; 314 const char *intrstr; 315 int s, size, i, rv, rseg; 316 size_t max_segs, max_xfer; 317 bus_dma_segment_t seg; 318 const struct sysctlnode *node; 319 struct twe_cmd *tc; 320 struct twe_ccb *ccb; 321 322 sc = device_private(self); 323 sc->sc_dev = self; 324 pa = aux; 325 pc = pa->pa_pc; 326 sc->sc_dmat = pa->pa_dmat; 327 SIMPLEQ_INIT(&sc->sc_ccb_queue); 328 SLIST_INIT(&sc->sc_ccb_freelist); 329 330 aprint_naive(": RAID controller\n"); 331 aprint_normal(": 3ware Escalade\n"); 332 333 334 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 335 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) { 336 aprint_error_dev(self, "can't map i/o space\n"); 337 return; 338 } 339 340 /* Enable the device. */ 341 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 342 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 343 csr | PCI_COMMAND_MASTER_ENABLE); 344 345 /* Map and establish the interrupt. */ 346 if (pci_intr_map(pa, &ih)) { 347 aprint_error_dev(self, "can't map interrupt\n"); 348 return; 349 } 350 351 intrstr = pci_intr_string(pc, ih); 352 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, twe_intr, sc); 353 if (sc->sc_ih == NULL) { 354 aprint_error_dev(self, "can't establish interrupt%s%s\n", 355 (intrstr) ? " at " : "", 356 (intrstr) ? intrstr : ""); 357 return; 358 } 359 360 if (intrstr != NULL) 361 aprint_normal_dev(self, "interrupting at %s\n", 362 intrstr); 363 364 /* 365 * Allocate and initialise the command blocks and CCBs. 366 */ 367 size = sizeof(struct twe_cmd) * TWE_MAX_QUEUECNT; 368 369 if ((rv = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 370 &rseg, BUS_DMA_NOWAIT)) != 0) { 371 aprint_error_dev(self, "unable to allocate commands, rv = %d\n", rv); 372 return; 373 } 374 375 if ((rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 376 (void **)&sc->sc_cmds, 377 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 378 aprint_error_dev(self, "unable to map commands, rv = %d\n", rv); 379 return; 380 } 381 382 if ((rv = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0, 383 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 384 aprint_error_dev(self, "unable to create command DMA map, rv = %d\n", rv); 385 return; 386 } 387 388 if ((rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_cmds, 389 size, NULL, BUS_DMA_NOWAIT)) != 0) { 390 aprint_error_dev(self, "unable to load command DMA map, rv = %d\n", rv); 391 return; 392 } 393 394 ccb = malloc(sizeof(*ccb) * TWE_MAX_QUEUECNT, M_DEVBUF, M_NOWAIT); 395 if (ccb == NULL) { 396 aprint_error_dev(self, "unable to allocate memory for ccbs\n"); 397 return; 398 } 399 400 sc->sc_cmds_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 401 memset(sc->sc_cmds, 0, size); 402 403 sc->sc_ccbs = ccb; 404 tc = (struct twe_cmd *)sc->sc_cmds; 405 max_segs = twe_get_maxsegs(); 406 max_xfer = twe_get_maxxfer(max_segs); 407 408 for (i = 0; i < TWE_MAX_QUEUECNT; i++, tc++, ccb++) { 409 ccb->ccb_cmd = tc; 410 ccb->ccb_cmdid = i; 411 ccb->ccb_flags = 0; 412 rv = bus_dmamap_create(sc->sc_dmat, max_xfer, 413 max_segs, PAGE_SIZE, 0, 414 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 415 &ccb->ccb_dmamap_xfer); 416 if (rv != 0) { 417 aprint_error_dev(self, "can't create dmamap, rv = %d\n", rv); 418 return; 419 } 420 421 /* Save the first CCB for AEN retrieval. */ 422 if (i != 0) 423 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, 424 ccb_chain.slist); 425 } 426 427 /* Wait for the controller to become ready. */ 428 if (twe_status_wait(sc, TWE_STS_MICROCONTROLLER_READY, 6)) { 429 aprint_error_dev(self, "microcontroller not ready\n"); 430 return; 431 } 432 433 twe_outl(sc, TWE_REG_CTL, TWE_CTL_DISABLE_INTRS); 434 435 /* Reset the controller. */ 436 s = splbio(); 437 rv = twe_reset(sc); 438 splx(s); 439 if (rv) { 440 aprint_error_dev(self, "reset failed\n"); 441 return; 442 } 443 444 /* Initialise connection with controller. */ 445 twe_init_connection(sc); 446 447 twe_describe_controller(sc); 448 449 /* Find and attach RAID array units. */ 450 sc->sc_nunits = 0; 451 for (i = 0; i < TWE_MAX_UNITS; i++) 452 (void) twe_add_unit(sc, i); 453 454 /* ...and finally, enable interrupts. */ 455 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR | 456 TWE_CTL_UNMASK_RESP_INTR | 457 TWE_CTL_ENABLE_INTRS); 458 459 /* sysctl set-up for 3ware cli */ 460 if (sysctl_createv(NULL, 0, NULL, NULL, 461 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", 462 NULL, NULL, 0, NULL, 0, 463 CTL_HW, CTL_EOL) != 0) { 464 aprint_error_dev(self, "could not create %s sysctl node\n", 465 "hw"); 466 return; 467 } 468 if (sysctl_createv(NULL, 0, NULL, &node, 469 0, CTLTYPE_NODE, device_xname(self), 470 SYSCTL_DESCR("twe driver information"), 471 NULL, 0, NULL, 0, 472 CTL_HW, CTL_CREATE, CTL_EOL) != 0) { 473 aprint_error_dev(self, "could not create %s.%s sysctl node\n", 474 "hw", device_xname(self)); 475 return; 476 } 477 if ((i = sysctl_createv(NULL, 0, NULL, NULL, 478 0, CTLTYPE_STRING, "driver_version", 479 SYSCTL_DESCR("twe0 driver version"), 480 NULL, 0, __UNCONST(&twever), 0, 481 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL)) 482 != 0) { 483 aprint_error_dev(self, "could not create %s.%s.driver_version sysctl\n", 484 "hw", device_xname(self)); 485 return; 486 } 487 } 488 489 void 490 twe_register_callbacks(struct twe_softc *sc, int unit, 491 const struct twe_callbacks *tcb) 492 { 493 494 sc->sc_units[unit].td_callbacks = tcb; 495 } 496 497 static void 498 twe_recompute_openings(struct twe_softc *sc) 499 { 500 struct twe_drive *td; 501 int unit, openings; 502 503 if (sc->sc_nunits != 0) 504 openings = (TWE_MAX_QUEUECNT - 1) / sc->sc_nunits; 505 else 506 openings = 0; 507 if (openings == sc->sc_openings) 508 return; 509 sc->sc_openings = openings; 510 511 #ifdef TWE_DEBUG 512 printf("%s: %d array%s, %d openings per array\n", 513 device_xname(sc->sc_dev), sc->sc_nunits, 514 sc->sc_nunits == 1 ? "" : "s", sc->sc_openings); 515 #endif 516 517 for (unit = 0; unit < TWE_MAX_UNITS; unit++) { 518 td = &sc->sc_units[unit]; 519 if (td->td_dev != NULL) 520 (*td->td_callbacks->tcb_openings)(td->td_dev, 521 sc->sc_openings); 522 } 523 } 524 525 static int 526 twe_add_unit(struct twe_softc *sc, int unit) 527 { 528 struct twe_param *dtp, *atp; 529 struct twe_array_descriptor *ad; 530 struct twe_drive *td; 531 struct twe_attach_args twea; 532 uint32_t newsize; 533 int rv; 534 uint16_t dsize; 535 uint8_t newtype, newstripe; 536 int locs[TWECF_NLOCS]; 537 538 if (unit < 0 || unit >= TWE_MAX_UNITS) 539 return (EINVAL); 540 541 /* Find attached units. */ 542 rv = twe_param_get(sc, TWE_PARAM_UNITSUMMARY, 543 TWE_PARAM_UNITSUMMARY_Status, TWE_MAX_UNITS, NULL, &dtp); 544 if (rv != 0) { 545 aprint_error_dev(sc->sc_dev, "error %d fetching unit summary\n", 546 rv); 547 return (rv); 548 } 549 550 /* For each detected unit, collect size and store in an array. */ 551 td = &sc->sc_units[unit]; 552 553 /* Unit present? */ 554 if ((dtp->tp_data[unit] & TWE_PARAM_UNITSTATUS_Online) == 0) { 555 /* 556 * XXX Should we check to see if a device has been 557 * XXX attached at this index and detach it if it 558 * XXX has? ("rescan" semantics) 559 */ 560 rv = 0; 561 goto out; 562 } 563 564 rv = twe_param_get_2(sc, TWE_PARAM_UNITINFO + unit, 565 TWE_PARAM_UNITINFO_DescriptorSize, &dsize); 566 if (rv != 0) { 567 aprint_error_dev(sc->sc_dev, "error %d fetching descriptor size " 568 "for unit %d\n", rv, unit); 569 goto out; 570 } 571 572 rv = twe_param_get(sc, TWE_PARAM_UNITINFO + unit, 573 TWE_PARAM_UNITINFO_Descriptor, dsize - 3, NULL, &atp); 574 if (rv != 0) { 575 aprint_error_dev(sc->sc_dev, "error %d fetching array descriptor " 576 "for unit %d\n", rv, unit); 577 goto out; 578 } 579 580 ad = (struct twe_array_descriptor *)atp->tp_data; 581 newtype = ad->configuration; 582 newstripe = ad->stripe_size; 583 free(atp, M_DEVBUF); 584 585 rv = twe_param_get_4(sc, TWE_PARAM_UNITINFO + unit, 586 TWE_PARAM_UNITINFO_Capacity, &newsize); 587 if (rv != 0) { 588 aprint_error_dev(sc->sc_dev, 589 "error %d fetching capacity for unit %d\n", 590 rv, unit); 591 goto out; 592 } 593 594 /* 595 * Have a device, so we need to attach it. If there is currently 596 * something sitting at the slot, and the parameters are different, 597 * then we detach the old device before attaching the new one. 598 */ 599 if (td->td_dev != NULL && 600 td->td_size == newsize && 601 td->td_type == newtype && 602 td->td_stripe == newstripe) { 603 /* Same as the old device; just keep using it. */ 604 rv = 0; 605 goto out; 606 } else if (td->td_dev != NULL) { 607 /* Detach the old device first. */ 608 (void) config_detach(td->td_dev, DETACH_FORCE); 609 td->td_dev = NULL; 610 } else if (td->td_size == 0) 611 sc->sc_nunits++; 612 613 /* 614 * Committed to the new array unit; assign its parameters and 615 * recompute the number of available command openings. 616 */ 617 td->td_size = newsize; 618 td->td_type = newtype; 619 td->td_stripe = newstripe; 620 twe_recompute_openings(sc); 621 622 twea.twea_unit = unit; 623 624 locs[TWECF_UNIT] = unit; 625 626 td->td_dev = config_found_sm_loc(sc->sc_dev, "twe", locs, &twea, 627 twe_print, config_stdsubmatch); 628 629 rv = 0; 630 out: 631 free(dtp, M_DEVBUF); 632 return (rv); 633 } 634 635 static int 636 twe_del_unit(struct twe_softc *sc, int unit) 637 { 638 struct twe_drive *td; 639 640 if (unit < 0 || unit >= TWE_MAX_UNITS) 641 return (EINVAL); 642 643 td = &sc->sc_units[unit]; 644 if (td->td_size != 0) 645 sc->sc_nunits--; 646 td->td_size = 0; 647 td->td_type = 0; 648 td->td_stripe = 0; 649 if (td->td_dev != NULL) { 650 (void) config_detach(td->td_dev, DETACH_FORCE); 651 td->td_dev = NULL; 652 } 653 twe_recompute_openings(sc); 654 return (0); 655 } 656 657 /* 658 * Reset the controller. 659 * MUST BE CALLED AT splbio()! 660 */ 661 static int 662 twe_reset(struct twe_softc *sc) 663 { 664 uint16_t aen; 665 u_int status; 666 volatile u_int32_t junk; 667 int got, rv; 668 669 /* Issue a soft reset. */ 670 twe_outl(sc, TWE_REG_CTL, TWE_CTL_ISSUE_SOFT_RESET | 671 TWE_CTL_CLEAR_HOST_INTR | 672 TWE_CTL_CLEAR_ATTN_INTR | 673 TWE_CTL_MASK_CMD_INTR | 674 TWE_CTL_MASK_RESP_INTR | 675 TWE_CTL_CLEAR_ERROR_STS | 676 TWE_CTL_DISABLE_INTRS); 677 678 /* Wait for attention... */ 679 if (twe_status_wait(sc, TWE_STS_ATTN_INTR, 30)) { 680 aprint_error_dev(sc->sc_dev, "timeout waiting for attention interrupt\n"); 681 return (-1); 682 } 683 684 /* ...and ACK it. */ 685 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 686 687 /* 688 * Pull AENs out of the controller; look for a soft reset AEN. 689 * Open code this, since we want to detect reset even if the 690 * queue for management tools is full. 691 * 692 * Note that since: 693 * - interrupts are blocked 694 * - we have reset the controller 695 * - acknowledged the pending ATTENTION 696 * that there is no way a pending asynchronous AEN fetch would 697 * finish, so clear the flag. 698 */ 699 sc->sc_flags &= ~TWEF_AEN; 700 for (got = 0;;) { 701 rv = twe_aen_get(sc, &aen); 702 if (rv != 0) 703 printf("%s: error %d while draining event queue\n", 704 device_xname(sc->sc_dev), rv); 705 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) 706 break; 707 if (TWE_AEN_CODE(aen) == TWE_AEN_SOFT_RESET) 708 got = 1; 709 twe_aen_enqueue(sc, aen, 1); 710 } 711 712 if (!got) { 713 printf("%s: reset not reported\n", device_xname(sc->sc_dev)); 714 return (-1); 715 } 716 717 /* Check controller status. */ 718 status = twe_inl(sc, TWE_REG_STS); 719 if (twe_status_check(sc, status)) { 720 printf("%s: controller errors detected\n", 721 device_xname(sc->sc_dev)); 722 return (-1); 723 } 724 725 /* Drain the response queue. */ 726 for (;;) { 727 status = twe_inl(sc, TWE_REG_STS); 728 if (twe_status_check(sc, status) != 0) { 729 aprint_error_dev(sc->sc_dev, "can't drain response queue\n"); 730 return (-1); 731 } 732 if ((status & TWE_STS_RESP_QUEUE_EMPTY) != 0) 733 break; 734 junk = twe_inl(sc, TWE_REG_RESP_QUEUE); 735 } 736 737 return (0); 738 } 739 740 /* 741 * Print autoconfiguration message for a sub-device. 742 */ 743 static int 744 twe_print(void *aux, const char *pnp) 745 { 746 struct twe_attach_args *twea; 747 748 twea = aux; 749 750 if (pnp != NULL) 751 aprint_normal("block device at %s", pnp); 752 aprint_normal(" unit %d", twea->twea_unit); 753 return (UNCONF); 754 } 755 756 /* 757 * Interrupt service routine. 758 */ 759 static int 760 twe_intr(void *arg) 761 { 762 struct twe_softc *sc; 763 u_int status; 764 int caught, rv; 765 766 sc = arg; 767 caught = 0; 768 status = twe_inl(sc, TWE_REG_STS); 769 twe_status_check(sc, status); 770 771 /* Host interrupts - purpose unknown. */ 772 if ((status & TWE_STS_HOST_INTR) != 0) { 773 #ifdef DEBUG 774 printf("%s: host interrupt\n", device_xname(sc->sc_dev)); 775 #endif 776 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_HOST_INTR); 777 caught = 1; 778 } 779 780 /* 781 * Attention interrupts, signalled when a controller or child device 782 * state change has occurred. 783 */ 784 if ((status & TWE_STS_ATTN_INTR) != 0) { 785 rv = twe_aen_get(sc, NULL); 786 if (rv != 0) 787 aprint_error_dev(sc->sc_dev, "unable to retrieve AEN (%d)\n", rv); 788 else 789 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 790 caught = 1; 791 } 792 793 /* 794 * Command interrupts, signalled when the controller can accept more 795 * commands. We don't use this; instead, we try to submit commands 796 * when we receive them, and when other commands have completed. 797 * Mask it so we don't get another one. 798 */ 799 if ((status & TWE_STS_CMD_INTR) != 0) { 800 #ifdef DEBUG 801 printf("%s: command interrupt\n", device_xname(sc->sc_dev)); 802 #endif 803 twe_outl(sc, TWE_REG_CTL, TWE_CTL_MASK_CMD_INTR); 804 caught = 1; 805 } 806 807 if ((status & TWE_STS_RESP_INTR) != 0) { 808 twe_poll(sc); 809 caught = 1; 810 } 811 812 return (caught); 813 } 814 815 /* 816 * Fetch an AEN. Even though this is really like parameter 817 * retrieval, we handle this specially, because we issue this 818 * AEN retrieval command from interrupt context, and thus 819 * reserve a CCB for it to avoid resource shortage. 820 * 821 * XXX There are still potential resource shortages we could 822 * XXX encounter. Consider pre-allocating all AEN-related 823 * XXX resources. 824 * 825 * MUST BE CALLED AT splbio()! 826 */ 827 static int 828 twe_aen_get(struct twe_softc *sc, uint16_t *aenp) 829 { 830 struct twe_ccb *ccb; 831 struct twe_cmd *tc; 832 struct twe_param *tp; 833 int rv; 834 835 /* 836 * If we're already retrieving an AEN, just wait; another 837 * retrieval will be chained after the current one completes. 838 */ 839 if (sc->sc_flags & TWEF_AEN) { 840 /* 841 * It is a fatal software programming error to attempt 842 * to fetch an AEN synchronously when an AEN fetch is 843 * already pending. 844 */ 845 KASSERT(aenp == NULL); 846 return (0); 847 } 848 849 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 850 if (tp == NULL) 851 return (ENOMEM); 852 853 ccb = twe_ccb_alloc(sc, 854 TWE_CCB_AEN | TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 855 KASSERT(ccb != NULL); 856 857 ccb->ccb_data = tp; 858 ccb->ccb_datasize = TWE_SECTOR_SIZE; 859 ccb->ccb_tx.tx_handler = (aenp == NULL) ? twe_aen_handler : NULL; 860 ccb->ccb_tx.tx_context = tp; 861 ccb->ccb_tx.tx_dv = sc->sc_dev; 862 863 tc = ccb->ccb_cmd; 864 tc->tc_size = 2; 865 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 866 tc->tc_unit = 0; 867 tc->tc_count = htole16(1); 868 869 /* Fill in the outbound parameter data. */ 870 tp->tp_table_id = htole16(TWE_PARAM_AEN); 871 tp->tp_param_id = TWE_PARAM_AEN_UnitCode; 872 tp->tp_param_size = 2; 873 874 /* Map the transfer. */ 875 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 876 twe_ccb_free(sc, ccb); 877 goto done; 878 } 879 880 /* Enqueue the command and wait. */ 881 if (aenp != NULL) { 882 rv = twe_ccb_poll(sc, ccb, 5); 883 twe_ccb_unmap(sc, ccb); 884 twe_ccb_free(sc, ccb); 885 if (rv == 0) 886 *aenp = le16toh(*(uint16_t *)tp->tp_data); 887 free(tp, M_DEVBUF); 888 } else { 889 sc->sc_flags |= TWEF_AEN; 890 twe_ccb_enqueue(sc, ccb); 891 rv = 0; 892 } 893 894 done: 895 return (rv); 896 } 897 898 /* 899 * Handle an AEN returned by the controller. 900 * MUST BE CALLED AT splbio()! 901 */ 902 static void 903 twe_aen_handler(struct twe_ccb *ccb, int error) 904 { 905 struct twe_softc *sc; 906 struct twe_param *tp; 907 uint16_t aen; 908 int rv; 909 910 sc = device_private(ccb->ccb_tx.tx_dv); 911 tp = ccb->ccb_tx.tx_context; 912 twe_ccb_unmap(sc, ccb); 913 914 sc->sc_flags &= ~TWEF_AEN; 915 916 if (error) { 917 aprint_error_dev(sc->sc_dev, "error retrieving AEN\n"); 918 aen = TWE_AEN_QUEUE_EMPTY; 919 } else 920 aen = le16toh(*(u_int16_t *)tp->tp_data); 921 free(tp, M_DEVBUF); 922 twe_ccb_free(sc, ccb); 923 924 if (TWE_AEN_CODE(aen) == TWE_AEN_QUEUE_EMPTY) { 925 twe_outl(sc, TWE_REG_CTL, TWE_CTL_CLEAR_ATTN_INTR); 926 return; 927 } 928 929 twe_aen_enqueue(sc, aen, 0); 930 931 /* 932 * Chain another retrieval in case interrupts have been 933 * coalesced. 934 */ 935 rv = twe_aen_get(sc, NULL); 936 if (rv != 0) 937 aprint_error_dev(sc->sc_dev, "unable to retrieve AEN (%d)\n", rv); 938 } 939 940 static void 941 twe_aen_enqueue(struct twe_softc *sc, uint16_t aen, int quiet) 942 { 943 const char *str, *msg; 944 int s, next, nextnext, level; 945 946 /* 947 * First report the AEN on the console. Maybe. 948 */ 949 if (! quiet) { 950 str = twe_describe_code(twe_table_aen, TWE_AEN_CODE(aen)); 951 if (str == NULL) { 952 aprint_error_dev(sc->sc_dev, "unknown AEN 0x%04x\n", aen); 953 } else { 954 msg = str + 3; 955 switch (str[1]) { 956 case 'E': level = LOG_EMERG; break; 957 case 'a': level = LOG_ALERT; break; 958 case 'c': level = LOG_CRIT; break; 959 case 'e': level = LOG_ERR; break; 960 case 'w': level = LOG_WARNING; break; 961 case 'n': level = LOG_NOTICE; break; 962 case 'i': level = LOG_INFO; break; 963 case 'd': level = LOG_DEBUG; break; 964 default: 965 /* Don't use syslog. */ 966 level = -1; 967 } 968 969 if (level < 0) { 970 switch (str[0]) { 971 case 'u': 972 case 'p': 973 printf("%s: %s %d: %s\n", 974 device_xname(sc->sc_dev), 975 str[0] == 'u' ? "unit" : "port", 976 TWE_AEN_UNIT(aen), msg); 977 break; 978 979 default: 980 printf("%s: %s\n", 981 device_xname(sc->sc_dev), msg); 982 } 983 } else { 984 switch (str[0]) { 985 case 'u': 986 case 'p': 987 log(level, "%s: %s %d: %s\n", 988 device_xname(sc->sc_dev), 989 str[0] == 'u' ? "unit" : "port", 990 TWE_AEN_UNIT(aen), msg); 991 break; 992 993 default: 994 log(level, "%s: %s\n", 995 device_xname(sc->sc_dev), msg); 996 } 997 } 998 } 999 } 1000 1001 /* Now enqueue the AEN for mangement tools. */ 1002 s = splbio(); 1003 1004 next = (sc->sc_aen_head + 1) % TWE_AEN_Q_LENGTH; 1005 nextnext = (sc->sc_aen_head + 2) % TWE_AEN_Q_LENGTH; 1006 1007 /* 1008 * If this is the last free slot, then queue up a "queue 1009 * full" message. 1010 */ 1011 if (nextnext == sc->sc_aen_tail) 1012 aen = TWE_AEN_QUEUE_FULL; 1013 1014 if (next != sc->sc_aen_tail) { 1015 sc->sc_aen_queue[sc->sc_aen_head] = aen; 1016 sc->sc_aen_head = next; 1017 } 1018 1019 if (sc->sc_flags & TWEF_AENQ_WAIT) { 1020 sc->sc_flags &= ~TWEF_AENQ_WAIT; 1021 wakeup(&sc->sc_aen_queue); 1022 } 1023 1024 splx(s); 1025 } 1026 1027 /* NOTE: Must be called at splbio(). */ 1028 static uint16_t 1029 twe_aen_dequeue(struct twe_softc *sc) 1030 { 1031 uint16_t aen; 1032 1033 if (sc->sc_aen_tail == sc->sc_aen_head) 1034 aen = TWE_AEN_QUEUE_EMPTY; 1035 else { 1036 aen = sc->sc_aen_queue[sc->sc_aen_tail]; 1037 sc->sc_aen_tail = (sc->sc_aen_tail + 1) % TWE_AEN_Q_LENGTH; 1038 } 1039 1040 return (aen); 1041 } 1042 1043 /* 1044 * These are short-hand functions that execute TWE_OP_GET_PARAM to 1045 * fetch 1, 2, and 4 byte parameter values, respectively. 1046 */ 1047 int 1048 twe_param_get_1(struct twe_softc *sc, int table_id, int param_id, 1049 uint8_t *valp) 1050 { 1051 struct twe_param *tp; 1052 int rv; 1053 1054 rv = twe_param_get(sc, table_id, param_id, 1, NULL, &tp); 1055 if (rv != 0) 1056 return (rv); 1057 *valp = *(uint8_t *)tp->tp_data; 1058 free(tp, M_DEVBUF); 1059 return (0); 1060 } 1061 1062 int 1063 twe_param_get_2(struct twe_softc *sc, int table_id, int param_id, 1064 uint16_t *valp) 1065 { 1066 struct twe_param *tp; 1067 int rv; 1068 1069 rv = twe_param_get(sc, table_id, param_id, 2, NULL, &tp); 1070 if (rv != 0) 1071 return (rv); 1072 *valp = le16toh(*(uint16_t *)tp->tp_data); 1073 free(tp, M_DEVBUF); 1074 return (0); 1075 } 1076 1077 int 1078 twe_param_get_4(struct twe_softc *sc, int table_id, int param_id, 1079 uint32_t *valp) 1080 { 1081 struct twe_param *tp; 1082 int rv; 1083 1084 rv = twe_param_get(sc, table_id, param_id, 4, NULL, &tp); 1085 if (rv != 0) 1086 return (rv); 1087 *valp = le32toh(*(uint32_t *)tp->tp_data); 1088 free(tp, M_DEVBUF); 1089 return (0); 1090 } 1091 1092 /* 1093 * Execute a TWE_OP_GET_PARAM command. If a callback function is provided, 1094 * it will be called with generated context when the command has completed. 1095 * If no callback is provided, the command will be executed synchronously 1096 * and a pointer to a buffer containing the data returned. 1097 * 1098 * The caller or callback is responsible for freeing the buffer. 1099 * 1100 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1101 */ 1102 int 1103 twe_param_get(struct twe_softc *sc, int table_id, int param_id, size_t size, 1104 void (*func)(struct twe_ccb *, int), struct twe_param **pbuf) 1105 { 1106 struct twe_ccb *ccb; 1107 struct twe_cmd *tc; 1108 struct twe_param *tp; 1109 int rv, s; 1110 1111 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1112 if (tp == NULL) 1113 return ENOMEM; 1114 1115 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1116 KASSERT(ccb != NULL); 1117 1118 ccb->ccb_data = tp; 1119 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1120 ccb->ccb_tx.tx_handler = func; 1121 ccb->ccb_tx.tx_context = tp; 1122 ccb->ccb_tx.tx_dv = sc->sc_dev; 1123 1124 tc = ccb->ccb_cmd; 1125 tc->tc_size = 2; 1126 tc->tc_opcode = TWE_OP_GET_PARAM | (tc->tc_size << 5); 1127 tc->tc_unit = 0; 1128 tc->tc_count = htole16(1); 1129 1130 /* Fill in the outbound parameter data. */ 1131 tp->tp_table_id = htole16(table_id); 1132 tp->tp_param_id = param_id; 1133 tp->tp_param_size = size; 1134 1135 /* Map the transfer. */ 1136 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1137 twe_ccb_free(sc, ccb); 1138 goto done; 1139 } 1140 1141 /* Submit the command and either wait or let the callback handle it. */ 1142 if (func == NULL) { 1143 s = splbio(); 1144 rv = twe_ccb_poll(sc, ccb, 5); 1145 twe_ccb_unmap(sc, ccb); 1146 twe_ccb_free(sc, ccb); 1147 splx(s); 1148 } else { 1149 #ifdef DEBUG 1150 if (pbuf != NULL) 1151 panic("both func and pbuf defined"); 1152 #endif 1153 twe_ccb_enqueue(sc, ccb); 1154 return 0; 1155 } 1156 1157 done: 1158 if (pbuf == NULL || rv != 0) 1159 free(tp, M_DEVBUF); 1160 else if (pbuf != NULL && rv == 0) 1161 *pbuf = tp; 1162 return rv; 1163 } 1164 1165 /* 1166 * Execute a TWE_OP_SET_PARAM command. 1167 * 1168 * NOTE: We assume we can sleep here to wait for a CCB to become available. 1169 */ 1170 static int 1171 twe_param_set(struct twe_softc *sc, int table_id, int param_id, size_t size, 1172 void *sbuf) 1173 { 1174 struct twe_ccb *ccb; 1175 struct twe_cmd *tc; 1176 struct twe_param *tp; 1177 int rv, s; 1178 1179 tp = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_NOWAIT); 1180 if (tp == NULL) 1181 return ENOMEM; 1182 1183 ccb = twe_ccb_alloc_wait(sc, TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1184 KASSERT(ccb != NULL); 1185 1186 ccb->ccb_data = tp; 1187 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1188 ccb->ccb_tx.tx_handler = 0; 1189 ccb->ccb_tx.tx_context = tp; 1190 ccb->ccb_tx.tx_dv = sc->sc_dev; 1191 1192 tc = ccb->ccb_cmd; 1193 tc->tc_size = 2; 1194 tc->tc_opcode = TWE_OP_SET_PARAM | (tc->tc_size << 5); 1195 tc->tc_unit = 0; 1196 tc->tc_count = htole16(1); 1197 1198 /* Fill in the outbound parameter data. */ 1199 tp->tp_table_id = htole16(table_id); 1200 tp->tp_param_id = param_id; 1201 tp->tp_param_size = size; 1202 memcpy(tp->tp_data, sbuf, size); 1203 1204 /* Map the transfer. */ 1205 if ((rv = twe_ccb_map(sc, ccb)) != 0) { 1206 twe_ccb_free(sc, ccb); 1207 goto done; 1208 } 1209 1210 /* Submit the command and wait. */ 1211 s = splbio(); 1212 rv = twe_ccb_poll(sc, ccb, 5); 1213 twe_ccb_unmap(sc, ccb); 1214 twe_ccb_free(sc, ccb); 1215 splx(s); 1216 done: 1217 free(tp, M_DEVBUF); 1218 return (rv); 1219 } 1220 1221 /* 1222 * Execute a TWE_OP_INIT_CONNECTION command. Return non-zero on error. 1223 * Must be called with interrupts blocked. 1224 */ 1225 static int 1226 twe_init_connection(struct twe_softc *sc) 1227 { 1228 struct twe_ccb *ccb; 1229 struct twe_cmd *tc; 1230 int rv; 1231 1232 if ((ccb = twe_ccb_alloc(sc, 0)) == NULL) 1233 return (EAGAIN); 1234 1235 /* Build the command. */ 1236 tc = ccb->ccb_cmd; 1237 tc->tc_size = 3; 1238 tc->tc_opcode = TWE_OP_INIT_CONNECTION; 1239 tc->tc_unit = 0; 1240 tc->tc_count = htole16(TWE_MAX_CMDS); 1241 tc->tc_args.init_connection.response_queue_pointer = 0; 1242 1243 /* Submit the command for immediate execution. */ 1244 rv = twe_ccb_poll(sc, ccb, 5); 1245 twe_ccb_free(sc, ccb); 1246 return (rv); 1247 } 1248 1249 /* 1250 * Poll the controller for completed commands. Must be called with 1251 * interrupts blocked. 1252 */ 1253 static void 1254 twe_poll(struct twe_softc *sc) 1255 { 1256 struct twe_ccb *ccb; 1257 int found; 1258 u_int status, cmdid; 1259 1260 found = 0; 1261 1262 for (;;) { 1263 status = twe_inl(sc, TWE_REG_STS); 1264 twe_status_check(sc, status); 1265 1266 if ((status & TWE_STS_RESP_QUEUE_EMPTY)) 1267 break; 1268 1269 found = 1; 1270 cmdid = twe_inl(sc, TWE_REG_RESP_QUEUE); 1271 cmdid = (cmdid & TWE_RESP_MASK) >> TWE_RESP_SHIFT; 1272 if (cmdid >= TWE_MAX_QUEUECNT) { 1273 aprint_error_dev(sc->sc_dev, "bad cmdid %d\n", cmdid); 1274 continue; 1275 } 1276 1277 ccb = sc->sc_ccbs + cmdid; 1278 if ((ccb->ccb_flags & TWE_CCB_ACTIVE) == 0) { 1279 printf("%s: CCB for cmdid %d not active\n", 1280 device_xname(sc->sc_dev), cmdid); 1281 continue; 1282 } 1283 ccb->ccb_flags ^= TWE_CCB_COMPLETE | TWE_CCB_ACTIVE; 1284 1285 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1286 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1287 sizeof(struct twe_cmd), 1288 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1289 1290 /* Pass notification to upper layers. */ 1291 if (ccb->ccb_tx.tx_handler != NULL) 1292 (*ccb->ccb_tx.tx_handler)(ccb, 1293 ccb->ccb_cmd->tc_status != 0 ? EIO : 0); 1294 } 1295 1296 /* If any commands have completed, run the software queue. */ 1297 if (found) 1298 twe_ccb_enqueue(sc, NULL); 1299 } 1300 1301 /* 1302 * Wait for `status' to be set in the controller status register. Return 1303 * zero if found, non-zero if the operation timed out. 1304 */ 1305 static int 1306 twe_status_wait(struct twe_softc *sc, u_int32_t status, int timo) 1307 { 1308 1309 for (timo *= 10; timo != 0; timo--) { 1310 if ((twe_inl(sc, TWE_REG_STS) & status) == status) 1311 break; 1312 delay(100000); 1313 } 1314 1315 return (timo == 0); 1316 } 1317 1318 /* 1319 * Clear a PCI parity error. 1320 */ 1321 static void 1322 twe_clear_pci_parity_error(struct twe_softc *sc) 1323 { 1324 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PARITY_ERROR); 1325 1326 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 1327 } 1328 1329 1330 /* 1331 * Clear a PCI abort. 1332 */ 1333 static void 1334 twe_clear_pci_abort(struct twe_softc *sc) 1335 { 1336 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 0x0, TWE_CTL_CLEAR_PCI_ABORT); 1337 1338 //FreeBSD: pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 1339 } 1340 1341 /* 1342 * Complain if the status bits aren't what we expect. 1343 */ 1344 static int 1345 twe_status_check(struct twe_softc *sc, u_int status) 1346 { 1347 int rv; 1348 1349 rv = 0; 1350 1351 if ((status & TWE_STS_EXPECTED_BITS) != TWE_STS_EXPECTED_BITS) { 1352 aprint_error_dev(sc->sc_dev, "missing status bits: 0x%08x\n", 1353 status & ~TWE_STS_EXPECTED_BITS); 1354 rv = -1; 1355 } 1356 1357 if ((status & TWE_STS_UNEXPECTED_BITS) != 0) { 1358 aprint_error_dev(sc->sc_dev, "unexpected status bits: 0x%08x\n", 1359 status & TWE_STS_UNEXPECTED_BITS); 1360 rv = -1; 1361 if (status & TWE_STS_PCI_PARITY_ERROR) { 1362 aprint_error_dev(sc->sc_dev, "PCI parity error: Reseat card, move card " 1363 "or buggy device present.\n"); 1364 twe_clear_pci_parity_error(sc); 1365 } 1366 if (status & TWE_STS_PCI_ABORT) { 1367 aprint_error_dev(sc->sc_dev, "PCI abort, clearing.\n"); 1368 twe_clear_pci_abort(sc); 1369 } 1370 } 1371 1372 return (rv); 1373 } 1374 1375 /* 1376 * Allocate and initialise a CCB. 1377 */ 1378 static inline void 1379 twe_ccb_init(struct twe_softc *sc, struct twe_ccb *ccb, int flags) 1380 { 1381 struct twe_cmd *tc; 1382 1383 ccb->ccb_tx.tx_handler = NULL; 1384 ccb->ccb_flags = flags; 1385 tc = ccb->ccb_cmd; 1386 tc->tc_status = 0; 1387 tc->tc_flags = 0; 1388 tc->tc_cmdid = ccb->ccb_cmdid; 1389 } 1390 1391 struct twe_ccb * 1392 twe_ccb_alloc(struct twe_softc *sc, int flags) 1393 { 1394 struct twe_ccb *ccb; 1395 int s; 1396 1397 s = splbio(); 1398 if (__predict_false((flags & TWE_CCB_AEN) != 0)) { 1399 /* Use the reserved CCB. */ 1400 ccb = sc->sc_ccbs; 1401 } else { 1402 /* Allocate a CCB and command block. */ 1403 if (__predict_false((ccb = 1404 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1405 splx(s); 1406 return (NULL); 1407 } 1408 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1409 } 1410 #ifdef DIAGNOSTIC 1411 if ((long)(ccb - sc->sc_ccbs) == 0 && (flags & TWE_CCB_AEN) == 0) 1412 panic("twe_ccb_alloc: got reserved CCB for non-AEN"); 1413 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1414 panic("twe_ccb_alloc: CCB %ld already allocated", 1415 (long)(ccb - sc->sc_ccbs)); 1416 flags |= TWE_CCB_ALLOCED; 1417 #endif 1418 splx(s); 1419 1420 twe_ccb_init(sc, ccb, flags); 1421 return (ccb); 1422 } 1423 1424 struct twe_ccb * 1425 twe_ccb_alloc_wait(struct twe_softc *sc, int flags) 1426 { 1427 struct twe_ccb *ccb; 1428 int s; 1429 1430 KASSERT((flags & TWE_CCB_AEN) == 0); 1431 1432 s = splbio(); 1433 while (__predict_false((ccb = 1434 SLIST_FIRST(&sc->sc_ccb_freelist)) == NULL)) { 1435 sc->sc_flags |= TWEF_WAIT_CCB; 1436 (void) tsleep(&sc->sc_ccb_freelist, PRIBIO, "tweccb", 0); 1437 } 1438 SLIST_REMOVE_HEAD(&sc->sc_ccb_freelist, ccb_chain.slist); 1439 #ifdef DIAGNOSTIC 1440 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) != 0) 1441 panic("twe_ccb_alloc_wait: CCB %ld already allocated", 1442 (long)(ccb - sc->sc_ccbs)); 1443 flags |= TWE_CCB_ALLOCED; 1444 #endif 1445 splx(s); 1446 1447 twe_ccb_init(sc, ccb, flags); 1448 return (ccb); 1449 } 1450 1451 /* 1452 * Free a CCB. 1453 */ 1454 void 1455 twe_ccb_free(struct twe_softc *sc, struct twe_ccb *ccb) 1456 { 1457 int s; 1458 1459 s = splbio(); 1460 if ((ccb->ccb_flags & TWE_CCB_AEN) == 0) { 1461 SLIST_INSERT_HEAD(&sc->sc_ccb_freelist, ccb, ccb_chain.slist); 1462 if (__predict_false((sc->sc_flags & TWEF_WAIT_CCB) != 0)) { 1463 sc->sc_flags &= ~TWEF_WAIT_CCB; 1464 wakeup(&sc->sc_ccb_freelist); 1465 } 1466 } 1467 ccb->ccb_flags = 0; 1468 splx(s); 1469 } 1470 1471 /* 1472 * Map the specified CCB's command block and data buffer (if any) into 1473 * controller visible space. Perform DMA synchronisation. 1474 */ 1475 int 1476 twe_ccb_map(struct twe_softc *sc, struct twe_ccb *ccb) 1477 { 1478 struct twe_cmd *tc; 1479 int flags, nsegs, i, s, rv, rc; 1480 void *data; 1481 1482 /* 1483 * The data as a whole must be 512-byte aligned. 1484 */ 1485 if (((u_long)ccb->ccb_data & (TWE_ALIGNMENT - 1)) != 0) { 1486 s = splvm(); 1487 /* XXX */ 1488 rc = uvm_km_kmem_alloc(kmem_va_arena, 1489 ccb->ccb_datasize, (VM_NOSLEEP | VM_INSTANTFIT), 1490 (vmem_addr_t *)&ccb->ccb_abuf); 1491 splx(s); 1492 data = (void *)ccb->ccb_abuf; 1493 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1494 memcpy(data, ccb->ccb_data, ccb->ccb_datasize); 1495 } else { 1496 ccb->ccb_abuf = (vaddr_t)0; 1497 data = ccb->ccb_data; 1498 } 1499 1500 /* 1501 * Map the data buffer into bus space and build the S/G list. 1502 */ 1503 rv = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, data, 1504 ccb->ccb_datasize, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1505 ((ccb->ccb_flags & TWE_CCB_DATA_IN) ? 1506 BUS_DMA_READ : BUS_DMA_WRITE)); 1507 if (rv != 0) { 1508 if (ccb->ccb_abuf != (vaddr_t)0) { 1509 s = splvm(); 1510 /* XXX */ 1511 uvm_km_kmem_free(kmem_va_arena, ccb->ccb_abuf, 1512 ccb->ccb_datasize); 1513 splx(s); 1514 } 1515 return (rv); 1516 } 1517 1518 nsegs = ccb->ccb_dmamap_xfer->dm_nsegs; 1519 tc = ccb->ccb_cmd; 1520 tc->tc_size += 2 * nsegs; 1521 1522 /* The location of the S/G list is dependent upon command type. */ 1523 switch (tc->tc_opcode >> 5) { 1524 case 2: 1525 for (i = 0; i < nsegs; i++) { 1526 tc->tc_args.param.sgl[i].tsg_address = 1527 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1528 tc->tc_args.param.sgl[i].tsg_length = 1529 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1530 } 1531 /* XXX Needed? */ 1532 for (; i < TWE_SG_SIZE; i++) { 1533 tc->tc_args.param.sgl[i].tsg_address = 0; 1534 tc->tc_args.param.sgl[i].tsg_length = 0; 1535 } 1536 break; 1537 case 3: 1538 for (i = 0; i < nsegs; i++) { 1539 tc->tc_args.io.sgl[i].tsg_address = 1540 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 1541 tc->tc_args.io.sgl[i].tsg_length = 1542 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 1543 } 1544 /* XXX Needed? */ 1545 for (; i < TWE_SG_SIZE; i++) { 1546 tc->tc_args.io.sgl[i].tsg_address = 0; 1547 tc->tc_args.io.sgl[i].tsg_length = 0; 1548 } 1549 break; 1550 default: 1551 /* 1552 * In all likelihood, this is a command passed from 1553 * management tools in userspace where no S/G list is 1554 * necessary because no data is being passed. 1555 */ 1556 break; 1557 } 1558 1559 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1560 flags = BUS_DMASYNC_PREREAD; 1561 else 1562 flags = 0; 1563 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1564 flags |= BUS_DMASYNC_PREWRITE; 1565 1566 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1567 ccb->ccb_datasize, flags); 1568 return (0); 1569 } 1570 1571 /* 1572 * Unmap the specified CCB's command block and data buffer (if any) and 1573 * perform DMA synchronisation. 1574 */ 1575 void 1576 twe_ccb_unmap(struct twe_softc *sc, struct twe_ccb *ccb) 1577 { 1578 int flags, s; 1579 1580 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1581 flags = BUS_DMASYNC_POSTREAD; 1582 else 1583 flags = 0; 1584 if ((ccb->ccb_flags & TWE_CCB_DATA_OUT) != 0) 1585 flags |= BUS_DMASYNC_POSTWRITE; 1586 1587 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 1588 ccb->ccb_datasize, flags); 1589 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 1590 1591 if (ccb->ccb_abuf != (vaddr_t)0) { 1592 if ((ccb->ccb_flags & TWE_CCB_DATA_IN) != 0) 1593 memcpy(ccb->ccb_data, (void *)ccb->ccb_abuf, 1594 ccb->ccb_datasize); 1595 s = splvm(); 1596 /* XXX */ 1597 uvm_km_kmem_free(kmem_va_arena, ccb->ccb_abuf, 1598 ccb->ccb_datasize); 1599 splx(s); 1600 } 1601 } 1602 1603 /* 1604 * Submit a command to the controller and poll on completion. Return 1605 * non-zero on timeout (but don't check status, as some command types don't 1606 * return status). Must be called with interrupts blocked. 1607 */ 1608 int 1609 twe_ccb_poll(struct twe_softc *sc, struct twe_ccb *ccb, int timo) 1610 { 1611 int rv; 1612 1613 if ((rv = twe_ccb_submit(sc, ccb)) != 0) 1614 return (rv); 1615 1616 for (timo *= 1000; timo != 0; timo--) { 1617 twe_poll(sc); 1618 if ((ccb->ccb_flags & TWE_CCB_COMPLETE) != 0) 1619 break; 1620 DELAY(100); 1621 } 1622 1623 return (timo == 0); 1624 } 1625 1626 /* 1627 * If a CCB is specified, enqueue it. Pull CCBs off the software queue in 1628 * the order that they were enqueued and try to submit their command blocks 1629 * to the controller for execution. 1630 */ 1631 void 1632 twe_ccb_enqueue(struct twe_softc *sc, struct twe_ccb *ccb) 1633 { 1634 int s; 1635 1636 s = splbio(); 1637 1638 if (ccb != NULL) 1639 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain.simpleq); 1640 1641 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 1642 if (twe_ccb_submit(sc, ccb)) 1643 break; 1644 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain.simpleq); 1645 } 1646 1647 splx(s); 1648 } 1649 1650 /* 1651 * Submit the command block associated with the specified CCB to the 1652 * controller for execution. Must be called with interrupts blocked. 1653 */ 1654 int 1655 twe_ccb_submit(struct twe_softc *sc, struct twe_ccb *ccb) 1656 { 1657 bus_addr_t pa; 1658 int rv; 1659 u_int status; 1660 1661 /* Check to see if we can post a command. */ 1662 status = twe_inl(sc, TWE_REG_STS); 1663 twe_status_check(sc, status); 1664 1665 if ((status & TWE_STS_CMD_QUEUE_FULL) == 0) { 1666 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1667 (char *)ccb->ccb_cmd - (char *)sc->sc_cmds, 1668 sizeof(struct twe_cmd), 1669 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1670 #ifdef DIAGNOSTIC 1671 if ((ccb->ccb_flags & TWE_CCB_ALLOCED) == 0) 1672 panic("%s: CCB %ld not ALLOCED\n", 1673 device_xname(sc->sc_dev), (long)(ccb - sc->sc_ccbs)); 1674 #endif 1675 ccb->ccb_flags |= TWE_CCB_ACTIVE; 1676 pa = sc->sc_cmds_paddr + 1677 ccb->ccb_cmdid * sizeof(struct twe_cmd); 1678 twe_outl(sc, TWE_REG_CMD_QUEUE, (u_int32_t)pa); 1679 rv = 0; 1680 } else 1681 rv = EBUSY; 1682 1683 return (rv); 1684 } 1685 1686 1687 /* 1688 * Accept an open operation on the control device. 1689 */ 1690 static int 1691 tweopen(dev_t dev, int flag, int mode, struct lwp *l) 1692 { 1693 struct twe_softc *twe; 1694 1695 if ((twe = device_lookup_private(&twe_cd, minor(dev))) == NULL) 1696 return (ENXIO); 1697 if ((twe->sc_flags & TWEF_OPEN) != 0) 1698 return (EBUSY); 1699 1700 twe->sc_flags |= TWEF_OPEN; 1701 return (0); 1702 } 1703 1704 /* 1705 * Accept the last close on the control device. 1706 */ 1707 static int 1708 tweclose(dev_t dev, int flag, int mode, 1709 struct lwp *l) 1710 { 1711 struct twe_softc *twe; 1712 1713 twe = device_lookup_private(&twe_cd, minor(dev)); 1714 twe->sc_flags &= ~TWEF_OPEN; 1715 return (0); 1716 } 1717 1718 void 1719 twe_ccb_wait_handler(struct twe_ccb *ccb, int error) 1720 { 1721 1722 /* Just wake up the sleeper. */ 1723 wakeup(ccb); 1724 } 1725 1726 /* 1727 * Handle control operations. 1728 */ 1729 static int 1730 tweioctl(dev_t dev, u_long cmd, void *data, int flag, 1731 struct lwp *l) 1732 { 1733 struct twe_softc *twe; 1734 struct twe_ccb *ccb; 1735 struct twe_param *param; 1736 struct twe_usercommand *tu; 1737 struct twe_paramcommand *tp; 1738 struct twe_drivecommand *td; 1739 void *pdata = NULL; 1740 int s, error = 0; 1741 u_int8_t cmdid; 1742 1743 twe = device_lookup_private(&twe_cd, minor(dev)); 1744 tu = (struct twe_usercommand *)data; 1745 tp = (struct twe_paramcommand *)data; 1746 td = (struct twe_drivecommand *)data; 1747 1748 /* This is intended to be compatible with the FreeBSD interface. */ 1749 switch (cmd) { 1750 case TWEIO_COMMAND: 1751 error = kauth_authorize_device_passthru(l->l_cred, dev, 1752 KAUTH_REQ_DEVICE_RAWIO_PASSTHRU_ALL, data); 1753 if (error) 1754 return (error); 1755 1756 /* XXX mutex */ 1757 if (tu->tu_size > 0) { 1758 /* 1759 * XXX Handle > TWE_SECTOR_SIZE? Let's see if 1760 * it's really necessary, first. 1761 */ 1762 if (tu->tu_size > TWE_SECTOR_SIZE) { 1763 #ifdef TWE_DEBUG 1764 printf("%s: TWEIO_COMMAND: tu_size = %zu\n", 1765 device_xname(twe->sc_dev), tu->tu_size); 1766 #endif 1767 return EINVAL; 1768 } 1769 pdata = malloc(TWE_SECTOR_SIZE, M_DEVBUF, M_WAITOK); 1770 error = copyin(tu->tu_data, pdata, tu->tu_size); 1771 if (error != 0) 1772 goto done; 1773 ccb = twe_ccb_alloc_wait(twe, 1774 TWE_CCB_DATA_IN | TWE_CCB_DATA_OUT); 1775 KASSERT(ccb != NULL); 1776 ccb->ccb_data = pdata; 1777 ccb->ccb_datasize = TWE_SECTOR_SIZE; 1778 } else { 1779 ccb = twe_ccb_alloc_wait(twe, 0); 1780 KASSERT(ccb != NULL); 1781 } 1782 1783 ccb->ccb_tx.tx_handler = twe_ccb_wait_handler; 1784 ccb->ccb_tx.tx_context = NULL; 1785 ccb->ccb_tx.tx_dv = twe->sc_dev; 1786 1787 cmdid = ccb->ccb_cmdid; 1788 memcpy(ccb->ccb_cmd, &tu->tu_cmd, sizeof(struct twe_cmd)); 1789 ccb->ccb_cmd->tc_cmdid = cmdid; 1790 1791 /* Map the transfer. */ 1792 if ((error = twe_ccb_map(twe, ccb)) != 0) { 1793 twe_ccb_free(twe, ccb); 1794 goto done; 1795 } 1796 1797 /* Submit the command and wait up to 1 minute. */ 1798 error = 0; 1799 twe_ccb_enqueue(twe, ccb); 1800 s = splbio(); 1801 while ((ccb->ccb_flags & TWE_CCB_COMPLETE) == 0) 1802 if ((error = tsleep(ccb, PRIBIO, "tweioctl", 1803 60 * hz)) != 0) 1804 break; 1805 splx(s); 1806 1807 /* Copy the command back to the ioctl argument. */ 1808 memcpy(&tu->tu_cmd, ccb->ccb_cmd, sizeof(struct twe_cmd)); 1809 #ifdef TWE_DEBUG 1810 printf("%s: TWEIO_COMMAND: tc_opcode = 0x%02x, " 1811 "tc_status = 0x%02x\n", device_xname(twe->sc_dev), 1812 tu->tu_cmd.tc_opcode, tu->tu_cmd.tc_status); 1813 #endif 1814 1815 s = splbio(); 1816 twe_ccb_free(twe, ccb); 1817 splx(s); 1818 1819 if (tu->tu_size > 0) 1820 error = copyout(pdata, tu->tu_data, tu->tu_size); 1821 goto done; 1822 1823 case TWEIO_STATS: 1824 return (ENOENT); 1825 1826 case TWEIO_AEN_POLL: 1827 s = splbio(); 1828 *(u_int *)data = twe_aen_dequeue(twe); 1829 splx(s); 1830 return (0); 1831 1832 case TWEIO_AEN_WAIT: 1833 s = splbio(); 1834 while ((*(u_int *)data = 1835 twe_aen_dequeue(twe)) == TWE_AEN_QUEUE_EMPTY) { 1836 twe->sc_flags |= TWEF_AENQ_WAIT; 1837 error = tsleep(&twe->sc_aen_queue, PRIBIO | PCATCH, 1838 "tweaen", 0); 1839 if (error == EINTR) { 1840 splx(s); 1841 return (error); 1842 } 1843 } 1844 splx(s); 1845 return (0); 1846 1847 case TWEIO_GET_PARAM: 1848 error = twe_param_get(twe, tp->tp_table_id, tp->tp_param_id, 1849 tp->tp_size, 0, ¶m); 1850 if (error != 0) 1851 return (error); 1852 if (param->tp_param_size > tp->tp_size) { 1853 error = EFAULT; 1854 goto done; 1855 } 1856 error = copyout(param->tp_data, tp->tp_data, 1857 param->tp_param_size); 1858 free(param, M_DEVBUF); 1859 goto done; 1860 1861 case TWEIO_SET_PARAM: 1862 pdata = malloc(tp->tp_size, M_DEVBUF, M_WAITOK); 1863 if ((error = copyin(tp->tp_data, pdata, tp->tp_size)) != 0) 1864 goto done; 1865 error = twe_param_set(twe, tp->tp_table_id, tp->tp_param_id, 1866 tp->tp_size, pdata); 1867 goto done; 1868 1869 case TWEIO_RESET: 1870 s = splbio(); 1871 twe_reset(twe); 1872 splx(s); 1873 return (0); 1874 1875 case TWEIO_ADD_UNIT: 1876 /* XXX mutex */ 1877 return (twe_add_unit(twe, td->td_unit)); 1878 1879 case TWEIO_DEL_UNIT: 1880 /* XXX mutex */ 1881 return (twe_del_unit(twe, td->td_unit)); 1882 1883 default: 1884 return EINVAL; 1885 } 1886 done: 1887 if (pdata) 1888 free(pdata, M_DEVBUF); 1889 return error; 1890 } 1891 1892 const struct cdevsw twe_cdevsw = { 1893 tweopen, tweclose, noread, nowrite, tweioctl, 1894 nostop, notty, nopoll, nommap, nokqfilter, D_OTHER, 1895 }; 1896 1897 /* 1898 * Print some information about the controller 1899 */ 1900 static void 1901 twe_describe_controller(struct twe_softc *sc) 1902 { 1903 struct twe_param *p[6]; 1904 int i, rv = 0; 1905 uint32_t dsize; 1906 uint8_t ports; 1907 1908 ports = 0; 1909 1910 /* get the port count */ 1911 rv |= twe_param_get_1(sc, TWE_PARAM_CONTROLLER, 1912 TWE_PARAM_CONTROLLER_PortCount, &ports); 1913 1914 /* get version strings */ 1915 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_Mon, 1916 16, NULL, &p[0]); 1917 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_FW, 1918 16, NULL, &p[1]); 1919 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_BIOS, 1920 16, NULL, &p[2]); 1921 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCB, 1922 8, NULL, &p[3]); 1923 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_ATA, 1924 8, NULL, &p[4]); 1925 rv |= twe_param_get(sc, TWE_PARAM_VERSION, TWE_PARAM_VERSION_PCI, 1926 8, NULL, &p[5]); 1927 1928 if (rv) { 1929 /* some error occurred */ 1930 aprint_error_dev(sc->sc_dev, "failed to fetch version information\n"); 1931 return; 1932 } 1933 1934 aprint_normal_dev(sc->sc_dev, "%d ports, Firmware %.16s, BIOS %.16s\n", 1935 ports, p[1]->tp_data, p[2]->tp_data); 1936 1937 aprint_verbose_dev(sc->sc_dev, "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n", 1938 p[0]->tp_data, p[3]->tp_data, 1939 p[4]->tp_data, p[5]->tp_data); 1940 1941 free(p[0], M_DEVBUF); 1942 free(p[1], M_DEVBUF); 1943 free(p[2], M_DEVBUF); 1944 free(p[3], M_DEVBUF); 1945 free(p[4], M_DEVBUF); 1946 free(p[5], M_DEVBUF); 1947 1948 rv = twe_param_get(sc, TWE_PARAM_DRIVESUMMARY, 1949 TWE_PARAM_DRIVESUMMARY_Status, 16, NULL, &p[0]); 1950 if (rv) { 1951 aprint_error_dev(sc->sc_dev, "failed to get drive status summary\n"); 1952 return; 1953 } 1954 for (i = 0; i < ports; i++) { 1955 if (p[0]->tp_data[i] != TWE_PARAM_DRIVESTATUS_Present) 1956 continue; 1957 rv = twe_param_get_4(sc, TWE_PARAM_DRIVEINFO + i, 1958 TWE_PARAM_DRIVEINFO_Size, &dsize); 1959 if (rv) { 1960 aprint_error_dev(sc->sc_dev, 1961 "unable to get drive size for port %d\n", i); 1962 continue; 1963 } 1964 rv = twe_param_get(sc, TWE_PARAM_DRIVEINFO + i, 1965 TWE_PARAM_DRIVEINFO_Model, 40, NULL, &p[1]); 1966 if (rv) { 1967 aprint_error_dev(sc->sc_dev, 1968 "unable to get drive model for port %d\n", i); 1969 continue; 1970 } 1971 aprint_verbose_dev(sc->sc_dev, "port %d: %.40s %d MB\n", 1972 i, p[1]->tp_data, dsize / 2048); 1973 free(p[1], M_DEVBUF); 1974 } 1975 free(p[0], M_DEVBUF); 1976 } 1977
Indexes created Wed Oct 01 07:09:59 GMT 2025