universe_pci.c revision 1.11.26.1
1 /* $NetBSD: universe_pci.c,v 1.11.26.1 2014/05/18 17:45:44 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Common functions for PCI-VME-interfaces using the 31 * Newbridge/Tundra Universe II chip (CA91C142). 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: universe_pci.c,v 1.11.26.1 2014/05/18 17:45:44 rmind Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 /*#include <dev/pci/pcidevs.h>*/ 44 45 #include <sys/bus.h> 46 47 #include <dev/vme/vmereg.h> 48 #include <dev/vme/vmevar.h> 49 50 #include <dev/ic/universereg.h> 51 #include <dev/pci/universe_pci_var.h> 52 53 int univ_pci_intr(void *); 54 55 #define read_csr_4(d, reg) \ 56 bus_space_read_4(d->csrt, d->csrh, offsetof(struct universereg, reg)) 57 #define write_csr_4(d, reg, val) \ 58 bus_space_write_4(d->csrt, d->csrh, offsetof(struct universereg, reg), val) 59 60 #define _pso(i) offsetof(struct universereg, __CONCAT(pcislv, i)) 61 static int pcislvoffsets[8] = { 62 _pso(0), _pso(1), _pso(2), _pso(3), 63 _pso(4), _pso(5), _pso(6), _pso(7) 64 }; 65 #undef _pso 66 67 #define read_pcislv(d, idx, reg) \ 68 bus_space_read_4(d->csrt, d->csrh, \ 69 pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg)) 70 #define write_pcislv(d, idx, reg, val) \ 71 bus_space_write_4(d->csrt, d->csrh, \ 72 pcislvoffsets[idx] + offsetof(struct universe_pcislvimg, reg), val) 73 74 75 #define _vso(i) offsetof(struct universereg, __CONCAT(vmeslv, i)) 76 static int vmeslvoffsets[8] = { 77 _vso(0), _vso(1), _vso(2), _vso(3), 78 _vso(4), _vso(5), _vso(6), _vso(7) 79 }; 80 #undef _vso 81 82 #define read_vmeslv(d, idx, reg) \ 83 bus_space_read_4(d->csrt, d->csrh, \ 84 vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg)) 85 #define write_vmeslv(d, idx, reg, val) \ 86 bus_space_write_4(d->csrt, d->csrh, \ 87 vmeslvoffsets[idx] + offsetof(struct universe_vmeslvimg, reg), val) 88 89 int 90 univ_pci_attach(struct univ_pci_data *d, struct pci_attach_args *pa, const char *name, void (*inthdl)(void *, int, int), void *intcookie) 91 { 92 pci_chipset_tag_t pc = pa->pa_pc; 93 pci_intr_handle_t ih; 94 const char *intrstr = NULL; 95 u_int32_t reg; 96 int i; 97 char intrbuf[PCI_INTRSTR_LEN]; 98 99 d->pc = pc; 100 strncpy(d->devname, name, sizeof(d->devname)); 101 d->devname[sizeof(d->devname) - 1] = '\0'; 102 103 if (pci_mapreg_map(pa, 0x10, 104 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 105 0, &d->csrt, &d->csrh, NULL, NULL) && 106 pci_mapreg_map(pa, 0x14, 107 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 108 0, &d->csrt, &d->csrh, NULL, NULL) && 109 pci_mapreg_map(pa, 0x10, 110 PCI_MAPREG_TYPE_IO, 111 0, &d->csrt, &d->csrh, NULL, NULL) && 112 pci_mapreg_map(pa, 0x14, 113 PCI_MAPREG_TYPE_IO, 114 0, &d->csrt, &d->csrh, NULL, NULL)) 115 return (-1); 116 117 /* name sure the chip is in a sane state */ 118 write_csr_4(d, lint_en, 0); /* mask all PCI interrupts */ 119 write_csr_4(d, vint_en, 0); /* mask all VME interrupts */ 120 write_csr_4(d, dgcs, 0x40000000); /* stop DMA activity */ 121 for (i = 0; i < 8; i++) { 122 univ_pci_unmapvme(d, i); 123 univ_pci_unmappci(d, i); 124 } 125 write_csr_4(d, slsi, 0); /* disable "special PCI slave image" */ 126 127 /* enable DMA */ 128 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 129 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 130 PCI_COMMAND_MASTER_ENABLE); 131 132 reg = read_csr_4(d, misc_ctl); 133 aprint_normal("%s: ", name); 134 if (reg & 0x00020000) /* SYSCON */ 135 aprint_normal("VME bus controller, "); 136 reg = read_csr_4(d, mast_ctl); 137 aprint_normal("requesting at VME bus level %d\n", (reg >> 22) & 3); 138 139 /* Map and establish the PCI interrupt. */ 140 if (pci_intr_map(pa, &ih)) { 141 aprint_error("%s: couldn't map interrupt\n", name); 142 return (-1); 143 } 144 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 145 /* 146 * Use a low interrupt level (the lowest?). 147 * We will raise before calling a subdevice's handler. 148 */ 149 d->ih = pci_intr_establish(pc, ih, IPL_BIO, univ_pci_intr, d); 150 if (d->ih == NULL) { 151 aprint_error("%s: couldn't establish interrupt", name); 152 if (intrstr != NULL) 153 aprint_error(" at %s", intrstr); 154 aprint_error("\n"); 155 return (-1); 156 } 157 aprint_normal("%s: interrupting at %s\n", name, intrstr); 158 159 /* handle all VME interrupts (XXX should be configurable) */ 160 d->vmeinthandler = inthdl; 161 d->vmeintcookie = intcookie; 162 write_csr_4(d, lint_stat, 0x00ff37ff); /* ack all pending IRQs */ 163 write_csr_4(d, lint_en, 0x000000fe); /* enable VME IRQ 1..7 */ 164 165 return (0); 166 } 167 168 int 169 univ_pci_mapvme(struct univ_pci_data *d, int wnd, vme_addr_t vmebase, u_int32_t len, vme_am_t am, vme_datasize_t datawidth, u_int32_t pcibase) 170 { 171 u_int32_t ctl = 0x80000000; 172 173 switch (am & VME_AM_ADRSIZEMASK) { 174 case VME_AM_A32: 175 ctl |= 0x00020000; 176 break; 177 case VME_AM_A24: 178 ctl |= 0x00010000; 179 break; 180 case VME_AM_A16: 181 break; 182 default: 183 return (EINVAL); 184 } 185 if (am & VME_AM_SUPER) 186 ctl |= 0x00001000; 187 if ((am & VME_AM_MODEMASK) == VME_AM_PRG) 188 ctl |= 0x00004000; 189 if (datawidth & VME_D32) 190 ctl |= 0x00800000; 191 else if (datawidth & VME_D16) 192 ctl |= 0x00400000; 193 else if (!(datawidth & VME_D8)) 194 return (EINVAL); 195 196 #ifdef UNIV_DEBUG 197 printf("%s: wnd %d, map VME %x-%x to %x, ctl=%x\n", 198 d->devname, wnd, vmebase, vmebase + len, pcibase, ctl); 199 #endif 200 201 write_pcislv(d, wnd, lsi_bs, pcibase); 202 write_pcislv(d, wnd, lsi_bd, pcibase + len); 203 write_pcislv(d, wnd, lsi_to, vmebase - pcibase); 204 write_pcislv(d, wnd, lsi_ctl, ctl); 205 return (0); 206 } 207 208 void 209 univ_pci_unmapvme(struct univ_pci_data *d, int wnd) 210 { 211 #ifdef UNIV_DEBUG 212 printf("%s: unmap VME wnd %d\n", d->devname, wnd); 213 #endif 214 write_pcislv(d, wnd, lsi_ctl, 0); 215 } 216 217 218 int 219 univ_pci_mappci(struct univ_pci_data *d, int wnd, u_int32_t pcibase, u_int32_t len, vme_addr_t vmebase, vme_am_t am) 220 { 221 u_int32_t ctl = 0x80000000; 222 223 switch (am & VME_AM_ADRSIZEMASK) { 224 case VME_AM_A32: 225 ctl |= 0x00020000; 226 break; 227 case VME_AM_A24: 228 ctl |= 0x00010000; 229 break; 230 case VME_AM_A16: 231 break; 232 default: 233 return (EINVAL); 234 } 235 if (am & VME_AM_SUPER) 236 ctl |= 0x00200000; 237 else 238 ctl |= 0x00300000; /* both */ 239 if ((am & VME_AM_MODEMASK) == VME_AM_PRG) 240 ctl |= 0x00800000; 241 else 242 ctl |= 0x00c00000; /* both */ 243 244 #ifdef UNIV_DEBUG 245 printf("%s: wnd %d, map PCI %x-%x to %x, ctl=%x\n", 246 d->devname, wnd, pcibase, pcibase + len, vmebase, ctl); 247 #endif 248 249 write_vmeslv(d, wnd, vsi_bs, vmebase); 250 write_vmeslv(d, wnd, vsi_bd, vmebase + len); 251 write_vmeslv(d, wnd, vsi_to, pcibase - vmebase); 252 write_vmeslv(d, wnd, vsi_ctl, ctl); 253 return (0); 254 } 255 256 void 257 univ_pci_unmappci(struct univ_pci_data *d, int wnd) 258 { 259 #ifdef UNIV_DEBUG 260 printf("%s: unmap PCI wnd %d\n", d->devname, wnd); 261 #endif 262 write_vmeslv(d, wnd, vsi_ctl, 0); 263 } 264 265 int 266 univ_pci_vmebuserr(struct univ_pci_data *d, int clear) 267 { 268 u_int32_t pcicsr; 269 270 pcicsr = read_csr_4(d, pci_csr); 271 if ((pcicsr & 0xf8000000) && clear) 272 write_csr_4(d, pci_csr, pcicsr | 0xf8000000); 273 return (pcicsr & 0x08000000); /* target abort */ 274 } 275 276 int 277 univ_pci_intr(void *v) 278 { 279 struct univ_pci_data *d = v; 280 u_int32_t intcsr; 281 int i, vec; 282 283 intcsr = read_csr_4(d, lint_stat) & 0xffffff; 284 if (!intcsr) 285 return (0); 286 287 /* ack everything */ 288 write_csr_4(d, lint_stat, intcsr); 289 #ifdef UNIV_DEBUG 290 printf("%s: intr, lint_stat=%x\n", d->devname, intcsr); 291 #endif 292 if (intcsr & 0x000000fe) { /* VME interrupt */ 293 for (i = 7; i >= 1; i--) { 294 if (!(intcsr & (1 << i))) 295 continue; 296 vec = read_csr_4(d, v_statid[i - 1]); 297 if (vec & 0x100) { 298 printf("%s: err irq %d\n", d->devname, i); 299 continue; 300 } 301 if (d->vmeinthandler) 302 (*d->vmeinthandler)(d->vmeintcookie, i, vec); 303 } 304 } 305 306 return (1); 307 } 308
Indexes created Thu Oct 02 14:10:14 GMT 2025