vga_pci.c revision 1.4.2.7 1 1.4.2.6 nathanw /* $NetBSD: vga_pci.c,v 1.4.2.7 2002/10/18 02:43:23 nathanw Exp $ */
2 1.1 drochner
3 1.1 drochner /*
4 1.1 drochner * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 1.1 drochner * All rights reserved.
6 1.1 drochner *
7 1.1 drochner * Author: Chris G. Demetriou
8 1.1 drochner *
9 1.1 drochner * Permission to use, copy, modify and distribute this software and
10 1.1 drochner * its documentation is hereby granted, provided that both the copyright
11 1.1 drochner * notice and this permission notice appear in all copies of the
12 1.1 drochner * software, derivative works or modified versions, and any portions
13 1.1 drochner * thereof, and that both notices appear in supporting documentation.
14 1.1 drochner *
15 1.1 drochner * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1 drochner * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1 drochner * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1 drochner *
19 1.1 drochner * Carnegie Mellon requests users of this software to return to
20 1.1 drochner *
21 1.1 drochner * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1 drochner * School of Computer Science
23 1.1 drochner * Carnegie Mellon University
24 1.1 drochner * Pittsburgh PA 15213-3890
25 1.1 drochner *
26 1.1 drochner * any improvements or extensions that they make and grant Carnegie the
27 1.1 drochner * rights to redistribute these changes.
28 1.1 drochner */
29 1.4.2.2 nathanw
30 1.4.2.2 nathanw #include <sys/cdefs.h>
31 1.4.2.6 nathanw __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.4.2.7 2002/10/18 02:43:23 nathanw Exp $");
32 1.1 drochner
33 1.1 drochner #include <sys/param.h>
34 1.1 drochner #include <sys/systm.h>
35 1.1 drochner #include <sys/kernel.h>
36 1.1 drochner #include <sys/device.h>
37 1.1 drochner #include <sys/malloc.h>
38 1.1 drochner
39 1.1 drochner #include <dev/pci/pcireg.h>
40 1.1 drochner #include <dev/pci/pcivar.h>
41 1.1 drochner #include <dev/pci/pcidevs.h>
42 1.4.2.1 nathanw #include <dev/pci/pciio.h>
43 1.1 drochner
44 1.2 drochner #include <dev/ic/mc6845reg.h>
45 1.2 drochner #include <dev/ic/pcdisplayvar.h>
46 1.1 drochner #include <dev/ic/vgareg.h>
47 1.1 drochner #include <dev/ic/vgavar.h>
48 1.1 drochner #include <dev/pci/vga_pcivar.h>
49 1.1 drochner
50 1.4.2.1 nathanw #include <dev/isa/isareg.h> /* For legacy VGA address ranges */
51 1.4.2.1 nathanw
52 1.1 drochner #include <dev/wscons/wsconsio.h>
53 1.1 drochner #include <dev/wscons/wsdisplayvar.h>
54 1.1 drochner
55 1.4.2.1 nathanw #define NBARS 6 /* number of PCI BARs */
56 1.4.2.1 nathanw
57 1.4.2.1 nathanw struct vga_bar {
58 1.4.2.1 nathanw bus_addr_t vb_base;
59 1.4.2.1 nathanw bus_size_t vb_size;
60 1.4.2.1 nathanw pcireg_t vb_type;
61 1.4.2.1 nathanw int vb_flags;
62 1.4.2.1 nathanw };
63 1.4.2.1 nathanw
64 1.1 drochner struct vga_pci_softc {
65 1.4.2.1 nathanw struct vga_softc sc_vga;
66 1.4.2.1 nathanw
67 1.4.2.1 nathanw pci_chipset_tag_t sc_pc;
68 1.4.2.1 nathanw pcitag_t sc_pcitag;
69 1.4.2.1 nathanw
70 1.4.2.1 nathanw struct vga_bar sc_bars[NBARS];
71 1.4.2.1 nathanw struct vga_bar sc_rom;
72 1.1 drochner };
73 1.1 drochner
74 1.4.2.3 nathanw int vga_pci_match(struct device *, struct cfdata *, void *);
75 1.4.2.3 nathanw void vga_pci_attach(struct device *, struct device *, void *);
76 1.4.2.6 nathanw static int vga_pci_lookup_quirks(struct pci_attach_args *);
77 1.1 drochner
78 1.4.2.7 nathanw CFATTACH_DECL(vga_pci, sizeof(struct vga_pci_softc),
79 1.4.2.7 nathanw vga_pci_match, vga_pci_attach, NULL, NULL);
80 1.1 drochner
81 1.4.2.1 nathanw int vga_pci_ioctl(void *, u_long, caddr_t, int, struct proc *);
82 1.4.2.1 nathanw paddr_t vga_pci_mmap(void *, off_t, int);
83 1.4.2.1 nathanw
84 1.4.2.1 nathanw const struct vga_funcs vga_pci_funcs = {
85 1.4.2.1 nathanw vga_pci_ioctl,
86 1.4.2.1 nathanw vga_pci_mmap,
87 1.4.2.1 nathanw };
88 1.4.2.1 nathanw
89 1.4.2.6 nathanw static const struct {
90 1.4.2.6 nathanw int id;
91 1.4.2.6 nathanw int quirks;
92 1.4.2.6 nathanw } vga_pci_quirks[] = {
93 1.4.2.6 nathanw {PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_LYNX_EMP),
94 1.4.2.6 nathanw VGA_QUIRK_NOFASTSCROLL},
95 1.4.2.6 nathanw };
96 1.4.2.6 nathanw
97 1.4.2.6 nathanw static const struct {
98 1.4.2.6 nathanw int vid;
99 1.4.2.6 nathanw int quirks;
100 1.4.2.6 nathanw } vga_pci_vquirks[] = {
101 1.4.2.6 nathanw {PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT},
102 1.4.2.6 nathanw };
103 1.4.2.6 nathanw
104 1.4.2.6 nathanw static int
105 1.4.2.6 nathanw vga_pci_lookup_quirks(pa)
106 1.4.2.6 nathanw struct pci_attach_args *pa;
107 1.4.2.6 nathanw {
108 1.4.2.6 nathanw int i;
109 1.4.2.6 nathanw
110 1.4.2.6 nathanw for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]);
111 1.4.2.6 nathanw i++) {
112 1.4.2.6 nathanw if (vga_pci_quirks[i].id == pa->pa_id)
113 1.4.2.6 nathanw return (vga_pci_quirks[i].quirks);
114 1.4.2.6 nathanw }
115 1.4.2.6 nathanw for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]);
116 1.4.2.6 nathanw i++) {
117 1.4.2.6 nathanw if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id))
118 1.4.2.6 nathanw return (vga_pci_vquirks[i].quirks);
119 1.4.2.6 nathanw }
120 1.4.2.6 nathanw return (0);
121 1.4.2.6 nathanw }
122 1.4.2.6 nathanw
123 1.1 drochner int
124 1.4.2.3 nathanw vga_pci_match(struct device *parent, struct cfdata *match, void *aux)
125 1.1 drochner {
126 1.1 drochner struct pci_attach_args *pa = aux;
127 1.1 drochner int potential;
128 1.1 drochner
129 1.1 drochner potential = 0;
130 1.1 drochner
131 1.1 drochner /*
132 1.1 drochner * If it's prehistoric/vga or display/vga, we might match.
133 1.1 drochner * For the console device, this is jut a sanity check.
134 1.1 drochner */
135 1.1 drochner if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
136 1.1 drochner PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
137 1.1 drochner potential = 1;
138 1.1 drochner if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
139 1.1 drochner PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
140 1.1 drochner potential = 1;
141 1.1 drochner
142 1.1 drochner if (!potential)
143 1.1 drochner return (0);
144 1.1 drochner
145 1.1 drochner /* check whether it is disabled by firmware */
146 1.1 drochner if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
147 1.1 drochner & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
148 1.1 drochner != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
149 1.1 drochner return (0);
150 1.1 drochner
151 1.1 drochner /* If it's the console, we have a winner! */
152 1.1 drochner if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
153 1.1 drochner return (1);
154 1.1 drochner
155 1.1 drochner /*
156 1.1 drochner * If we might match, make sure that the card actually looks OK.
157 1.1 drochner */
158 1.1 drochner if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
159 1.1 drochner return (0);
160 1.1 drochner
161 1.1 drochner return (1);
162 1.1 drochner }
163 1.1 drochner
164 1.1 drochner void
165 1.4.2.3 nathanw vga_pci_attach(struct device *parent, struct device *self, void *aux)
166 1.1 drochner {
167 1.4.2.1 nathanw struct vga_pci_softc *psc = (void *) self;
168 1.4.2.1 nathanw struct vga_softc *sc = &psc->sc_vga;
169 1.1 drochner struct pci_attach_args *pa = aux;
170 1.1 drochner char devinfo[256];
171 1.4.2.1 nathanw int bar, reg;
172 1.1 drochner
173 1.4.2.1 nathanw psc->sc_pc = pa->pa_pc;
174 1.4.2.1 nathanw psc->sc_pcitag = pa->pa_tag;
175 1.1 drochner
176 1.1 drochner pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
177 1.1 drochner printf(": %s (rev. 0x%02x)\n", devinfo,
178 1.1 drochner PCI_REVISION(pa->pa_class));
179 1.1 drochner
180 1.4.2.1 nathanw /*
181 1.4.2.1 nathanw * Gather info about all the BARs. These are used to allow
182 1.4.2.1 nathanw * the X server to map the VGA device.
183 1.4.2.1 nathanw */
184 1.4.2.1 nathanw for (bar = 0; bar < NBARS; bar++) {
185 1.4.2.1 nathanw reg = PCI_MAPREG_START + (bar * 4);
186 1.4.2.5 nathanw if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg,
187 1.4.2.5 nathanw &psc->sc_bars[bar].vb_type)) {
188 1.4.2.5 nathanw /* there is no valid mapping register */
189 1.4.2.5 nathanw continue;
190 1.4.2.5 nathanw }
191 1.4.2.1 nathanw if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
192 1.4.2.1 nathanw PCI_MAPREG_TYPE_IO) {
193 1.4.2.1 nathanw /* Don't bother fetching I/O BARs. */
194 1.4.2.1 nathanw continue;
195 1.4.2.1 nathanw }
196 1.4.2.1 nathanw if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
197 1.4.2.1 nathanw PCI_MAPREG_MEM_TYPE_64BIT) {
198 1.4.2.1 nathanw /* XXX */
199 1.4.2.1 nathanw printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n",
200 1.4.2.1 nathanw sc->sc_dev.dv_xname, reg);
201 1.4.2.5 nathanw bar++;
202 1.4.2.1 nathanw continue;
203 1.4.2.1 nathanw }
204 1.4.2.5 nathanw if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
205 1.4.2.1 nathanw psc->sc_bars[bar].vb_type,
206 1.4.2.1 nathanw &psc->sc_bars[bar].vb_base,
207 1.4.2.1 nathanw &psc->sc_bars[bar].vb_size,
208 1.4.2.5 nathanw &psc->sc_bars[bar].vb_flags))
209 1.4.2.5 nathanw printf("%s: WARNING: strange BAR @ 0x%02x\n",
210 1.4.2.5 nathanw sc->sc_dev.dv_xname, reg);
211 1.4.2.1 nathanw }
212 1.4.2.1 nathanw
213 1.4.2.1 nathanw /* XXX Expansion ROM? */
214 1.4.2.1 nathanw
215 1.4.2.1 nathanw vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
216 1.4.2.6 nathanw vga_pci_lookup_quirks(pa), &vga_pci_funcs);
217 1.1 drochner }
218 1.1 drochner
219 1.1 drochner int
220 1.4.2.3 nathanw vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt,
221 1.4.2.3 nathanw pci_chipset_tag_t pc, int bus, int device, int function)
222 1.1 drochner {
223 1.4.2.6 nathanw
224 1.1 drochner return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
225 1.4.2.1 nathanw }
226 1.4.2.1 nathanw
227 1.4.2.1 nathanw int
228 1.4.2.1 nathanw vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
229 1.4.2.1 nathanw {
230 1.4.2.1 nathanw struct vga_config *vc = v;
231 1.4.2.1 nathanw struct vga_pci_softc *psc = (void *) vc->softc;
232 1.4.2.1 nathanw
233 1.4.2.1 nathanw switch (cmd) {
234 1.4.2.1 nathanw /* PCI config read/write passthrough. */
235 1.4.2.1 nathanw case PCI_IOC_CFGREAD:
236 1.4.2.1 nathanw case PCI_IOC_CFGWRITE:
237 1.4.2.1 nathanw return (pci_devioctl(psc->sc_pc, psc->sc_pcitag,
238 1.4.2.1 nathanw cmd, data, flag, p));
239 1.4.2.1 nathanw
240 1.4.2.1 nathanw default:
241 1.4.2.4 nathanw return (EPASSTHROUGH);
242 1.4.2.1 nathanw }
243 1.4.2.1 nathanw }
244 1.4.2.1 nathanw
245 1.4.2.1 nathanw paddr_t
246 1.4.2.1 nathanw vga_pci_mmap(void *v, off_t offset, int prot)
247 1.4.2.1 nathanw {
248 1.4.2.1 nathanw struct vga_config *vc = v;
249 1.4.2.1 nathanw struct vga_pci_softc *psc = (void *) vc->softc;
250 1.4.2.1 nathanw struct vga_bar *vb;
251 1.4.2.1 nathanw int bar;
252 1.4.2.1 nathanw
253 1.4.2.1 nathanw for (bar = 0; bar < NBARS; bar++) {
254 1.4.2.1 nathanw vb = &psc->sc_bars[bar];
255 1.4.2.1 nathanw if (vb->vb_size == 0)
256 1.4.2.1 nathanw continue;
257 1.4.2.1 nathanw if (offset >= vb->vb_base &&
258 1.4.2.1 nathanw offset < (vb->vb_base + vb->vb_size)) {
259 1.4.2.1 nathanw /* XXX This the right thing to do with flags? */
260 1.4.2.1 nathanw return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
261 1.4.2.1 nathanw (offset - vb->vb_base), prot, vb->vb_flags));
262 1.4.2.1 nathanw }
263 1.4.2.1 nathanw }
264 1.4.2.1 nathanw
265 1.4.2.1 nathanw /* XXX Expansion ROM? */
266 1.4.2.1 nathanw
267 1.4.2.1 nathanw /*
268 1.4.2.1 nathanw * Allow mmap access to the legacy ISA hole. This is where
269 1.4.2.1 nathanw * the legacy video BIOS will be located, and also where
270 1.4.2.1 nathanw * the legacy VGA display buffer is located.
271 1.4.2.1 nathanw *
272 1.4.2.1 nathanw * XXX Security implications, here?
273 1.4.2.1 nathanw */
274 1.4.2.1 nathanw if (offset >= IOM_BEGIN && offset < IOM_END)
275 1.4.2.1 nathanw return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
276 1.4.2.1 nathanw (offset - IOM_BEGIN), prot, 0));
277 1.4.2.1 nathanw
278 1.4.2.1 nathanw /* Range not found. */
279 1.4.2.1 nathanw return (-1);
280 1.1 drochner }
281