vga_pci.c revision 1.14 1 /* $NetBSD: vga_pci.c,v 1.14 2002/06/27 06:44:17 junyoung Exp $ */
2
3 /*
4 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.14 2002/06/27 06:44:17 junyoung Exp $");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcidevs.h>
42 #include <dev/pci/pciio.h>
43
44 #include <dev/ic/mc6845reg.h>
45 #include <dev/ic/pcdisplayvar.h>
46 #include <dev/ic/vgareg.h>
47 #include <dev/ic/vgavar.h>
48 #include <dev/pci/vga_pcivar.h>
49
50 #include <dev/isa/isareg.h> /* For legacy VGA address ranges */
51
52 #include <dev/wscons/wsconsio.h>
53 #include <dev/wscons/wsdisplayvar.h>
54
55 #define NBARS 6 /* number of PCI BARs */
56
57 struct vga_bar {
58 bus_addr_t vb_base;
59 bus_size_t vb_size;
60 pcireg_t vb_type;
61 int vb_flags;
62 };
63
64 struct vga_pci_softc {
65 struct vga_softc sc_vga;
66
67 pci_chipset_tag_t sc_pc;
68 pcitag_t sc_pcitag;
69
70 struct vga_bar sc_bars[NBARS];
71 struct vga_bar sc_rom;
72 };
73
74 int vga_pci_match(struct device *, struct cfdata *, void *);
75 void vga_pci_attach(struct device *, struct device *, void *);
76
77 struct cfattach vga_pci_ca = {
78 sizeof(struct vga_pci_softc),
79 vga_pci_match,
80 vga_pci_attach,
81 };
82
83 int vga_pci_ioctl(void *, u_long, caddr_t, int, struct proc *);
84 paddr_t vga_pci_mmap(void *, off_t, int);
85
86 const struct vga_funcs vga_pci_funcs = {
87 vga_pci_ioctl,
88 vga_pci_mmap,
89 };
90
91 int
92 vga_pci_match(struct device *parent, struct cfdata *match, void *aux)
93 {
94 struct pci_attach_args *pa = aux;
95 int potential;
96
97 potential = 0;
98
99 /*
100 * If it's prehistoric/vga or display/vga, we might match.
101 * For the console device, this is jut a sanity check.
102 */
103 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
104 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
105 potential = 1;
106 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
107 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
108 potential = 1;
109
110 if (!potential)
111 return (0);
112
113 /* check whether it is disabled by firmware */
114 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
115 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
116 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
117 return (0);
118
119 /* If it's the console, we have a winner! */
120 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
121 return (1);
122
123 /*
124 * If we might match, make sure that the card actually looks OK.
125 */
126 if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
127 return (0);
128
129 return (1);
130 }
131
132 void
133 vga_pci_attach(struct device *parent, struct device *self, void *aux)
134 {
135 struct vga_pci_softc *psc = (void *) self;
136 struct vga_softc *sc = &psc->sc_vga;
137 struct pci_attach_args *pa = aux;
138 char devinfo[256];
139 int bar, reg;
140
141 psc->sc_pc = pa->pa_pc;
142 psc->sc_pcitag = pa->pa_tag;
143
144 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
145 printf(": %s (rev. 0x%02x)\n", devinfo,
146 PCI_REVISION(pa->pa_class));
147
148 /*
149 * Gather info about all the BARs. These are used to allow
150 * the X server to map the VGA device.
151 */
152 for (bar = 0; bar < NBARS; bar++) {
153 reg = PCI_MAPREG_START + (bar * 4);
154 if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg,
155 &psc->sc_bars[bar].vb_type)) {
156 /* there is no valid mapping register */
157 continue;
158 }
159 if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
160 PCI_MAPREG_TYPE_IO) {
161 /* Don't bother fetching I/O BARs. */
162 continue;
163 }
164 if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
165 PCI_MAPREG_MEM_TYPE_64BIT) {
166 /* XXX */
167 printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n",
168 sc->sc_dev.dv_xname, reg);
169 bar++;
170 continue;
171 }
172 if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
173 psc->sc_bars[bar].vb_type,
174 &psc->sc_bars[bar].vb_base,
175 &psc->sc_bars[bar].vb_size,
176 &psc->sc_bars[bar].vb_flags))
177 printf("%s: WARNING: strange BAR @ 0x%02x\n",
178 sc->sc_dev.dv_xname, reg);
179 }
180
181 /* XXX Expansion ROM? */
182
183 vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
184 &vga_pci_funcs);
185 }
186
187 int
188 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt,
189 pci_chipset_tag_t pc, int bus, int device, int function)
190 {
191
192 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
193 }
194
195 int
196 vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
197 {
198 struct vga_config *vc = v;
199 struct vga_pci_softc *psc = (void *) vc->softc;
200
201 switch (cmd) {
202 /* PCI config read/write passthrough. */
203 case PCI_IOC_CFGREAD:
204 case PCI_IOC_CFGWRITE:
205 return (pci_devioctl(psc->sc_pc, psc->sc_pcitag,
206 cmd, data, flag, p));
207
208 default:
209 return (EPASSTHROUGH);
210 }
211 }
212
213 paddr_t
214 vga_pci_mmap(void *v, off_t offset, int prot)
215 {
216 struct vga_config *vc = v;
217 struct vga_pci_softc *psc = (void *) vc->softc;
218 struct vga_bar *vb;
219 int bar;
220
221 for (bar = 0; bar < NBARS; bar++) {
222 vb = &psc->sc_bars[bar];
223 if (vb->vb_size == 0)
224 continue;
225 if (offset >= vb->vb_base &&
226 offset < (vb->vb_base + vb->vb_size)) {
227 /* XXX This the right thing to do with flags? */
228 return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
229 (offset - vb->vb_base), prot, vb->vb_flags));
230 }
231 }
232
233 /* XXX Expansion ROM? */
234
235 /*
236 * Allow mmap access to the legacy ISA hole. This is where
237 * the legacy video BIOS will be located, and also where
238 * the legacy VGA display buffer is located.
239 *
240 * XXX Security implications, here?
241 */
242 if (offset >= IOM_BEGIN && offset < IOM_END)
243 return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
244 (offset - IOM_BEGIN), prot, 0));
245
246 /* Range not found. */
247 return (-1);
248 }
249