vga_pci.c revision 1.16 1 /* $NetBSD: vga_pci.c,v 1.16 2002/07/02 18:17:30 drochner Exp $ */
2
3 /*
4 * Copyright (c) 1995, 1996 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Chris G. Demetriou
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.16 2002/07/02 18:17:30 drochner Exp $");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38
39 #include <dev/pci/pcireg.h>
40 #include <dev/pci/pcivar.h>
41 #include <dev/pci/pcidevs.h>
42 #include <dev/pci/pciio.h>
43
44 #include <dev/ic/mc6845reg.h>
45 #include <dev/ic/pcdisplayvar.h>
46 #include <dev/ic/vgareg.h>
47 #include <dev/ic/vgavar.h>
48 #include <dev/pci/vga_pcivar.h>
49
50 #include <dev/isa/isareg.h> /* For legacy VGA address ranges */
51
52 #include <dev/wscons/wsconsio.h>
53 #include <dev/wscons/wsdisplayvar.h>
54
55 #define NBARS 6 /* number of PCI BARs */
56
57 struct vga_bar {
58 bus_addr_t vb_base;
59 bus_size_t vb_size;
60 pcireg_t vb_type;
61 int vb_flags;
62 };
63
64 struct vga_pci_softc {
65 struct vga_softc sc_vga;
66
67 pci_chipset_tag_t sc_pc;
68 pcitag_t sc_pcitag;
69
70 struct vga_bar sc_bars[NBARS];
71 struct vga_bar sc_rom;
72 };
73
74 int vga_pci_match(struct device *, struct cfdata *, void *);
75 void vga_pci_attach(struct device *, struct device *, void *);
76 static int vga_pci_lookup_quirks(struct pci_attach_args *);
77
78 struct cfattach vga_pci_ca = {
79 sizeof(struct vga_pci_softc),
80 vga_pci_match,
81 vga_pci_attach,
82 };
83
84 int vga_pci_ioctl(void *, u_long, caddr_t, int, struct proc *);
85 paddr_t vga_pci_mmap(void *, off_t, int);
86
87 const struct vga_funcs vga_pci_funcs = {
88 vga_pci_ioctl,
89 vga_pci_mmap,
90 };
91
92 #if 0 /* caught by the more general rule below */
93 static const struct {
94 int id;
95 int quirks;
96 } vga_pci_quirks[] = {
97 {PCI_ID_CODE(PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XL_AGP),
98 VGA_QUIRK_ONEFONT},
99 };
100 #endif
101
102 static const struct {
103 int vid;
104 int quirks;
105 } vga_pci_vquirks[] = {
106 {PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT},
107 };
108
109 static int
110 vga_pci_lookup_quirks(pa)
111 struct pci_attach_args *pa;
112 {
113 int i;
114
115 #if 0
116 for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]);
117 i++) {
118 if (vga_pci_quirks[i].id == pa->pa_id)
119 return (vga_pci_quirks[i].quirks);
120 }
121 #endif
122 for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]);
123 i++) {
124 if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id))
125 return (vga_pci_vquirks[i].quirks);
126 }
127 return (0);
128 }
129
130 int
131 vga_pci_match(struct device *parent, struct cfdata *match, void *aux)
132 {
133 struct pci_attach_args *pa = aux;
134 int potential;
135
136 potential = 0;
137
138 /*
139 * If it's prehistoric/vga or display/vga, we might match.
140 * For the console device, this is jut a sanity check.
141 */
142 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC &&
143 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA)
144 potential = 1;
145 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY &&
146 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA)
147 potential = 1;
148
149 if (!potential)
150 return (0);
151
152 /* check whether it is disabled by firmware */
153 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
154 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
155 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE))
156 return (0);
157
158 /* If it's the console, we have a winner! */
159 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA))
160 return (1);
161
162 /*
163 * If we might match, make sure that the card actually looks OK.
164 */
165 if (!vga_common_probe(pa->pa_iot, pa->pa_memt))
166 return (0);
167
168 return (1);
169 }
170
171 void
172 vga_pci_attach(struct device *parent, struct device *self, void *aux)
173 {
174 struct vga_pci_softc *psc = (void *) self;
175 struct vga_softc *sc = &psc->sc_vga;
176 struct pci_attach_args *pa = aux;
177 char devinfo[256];
178 int bar, reg;
179
180 psc->sc_pc = pa->pa_pc;
181 psc->sc_pcitag = pa->pa_tag;
182
183 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
184 printf(": %s (rev. 0x%02x)\n", devinfo,
185 PCI_REVISION(pa->pa_class));
186
187 /*
188 * Gather info about all the BARs. These are used to allow
189 * the X server to map the VGA device.
190 */
191 for (bar = 0; bar < NBARS; bar++) {
192 reg = PCI_MAPREG_START + (bar * 4);
193 if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg,
194 &psc->sc_bars[bar].vb_type)) {
195 /* there is no valid mapping register */
196 continue;
197 }
198 if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) ==
199 PCI_MAPREG_TYPE_IO) {
200 /* Don't bother fetching I/O BARs. */
201 continue;
202 }
203 if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) ==
204 PCI_MAPREG_MEM_TYPE_64BIT) {
205 /* XXX */
206 printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n",
207 sc->sc_dev.dv_xname, reg);
208 bar++;
209 continue;
210 }
211 if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg,
212 psc->sc_bars[bar].vb_type,
213 &psc->sc_bars[bar].vb_base,
214 &psc->sc_bars[bar].vb_size,
215 &psc->sc_bars[bar].vb_flags))
216 printf("%s: WARNING: strange BAR @ 0x%02x\n",
217 sc->sc_dev.dv_xname, reg);
218 }
219
220 /* XXX Expansion ROM? */
221
222 vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA,
223 vga_pci_lookup_quirks(pa), &vga_pci_funcs);
224 }
225
226 int
227 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt,
228 pci_chipset_tag_t pc, int bus, int device, int function)
229 {
230
231 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0));
232 }
233
234 int
235 vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct proc *p)
236 {
237 struct vga_config *vc = v;
238 struct vga_pci_softc *psc = (void *) vc->softc;
239
240 switch (cmd) {
241 /* PCI config read/write passthrough. */
242 case PCI_IOC_CFGREAD:
243 case PCI_IOC_CFGWRITE:
244 return (pci_devioctl(psc->sc_pc, psc->sc_pcitag,
245 cmd, data, flag, p));
246
247 default:
248 return (EPASSTHROUGH);
249 }
250 }
251
252 paddr_t
253 vga_pci_mmap(void *v, off_t offset, int prot)
254 {
255 struct vga_config *vc = v;
256 struct vga_pci_softc *psc = (void *) vc->softc;
257 struct vga_bar *vb;
258 int bar;
259
260 for (bar = 0; bar < NBARS; bar++) {
261 vb = &psc->sc_bars[bar];
262 if (vb->vb_size == 0)
263 continue;
264 if (offset >= vb->vb_base &&
265 offset < (vb->vb_base + vb->vb_size)) {
266 /* XXX This the right thing to do with flags? */
267 return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base,
268 (offset - vb->vb_base), prot, vb->vb_flags));
269 }
270 }
271
272 /* XXX Expansion ROM? */
273
274 /*
275 * Allow mmap access to the legacy ISA hole. This is where
276 * the legacy video BIOS will be located, and also where
277 * the legacy VGA display buffer is located.
278 *
279 * XXX Security implications, here?
280 */
281 if (offset >= IOM_BEGIN && offset < IOM_END)
282 return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN,
283 (offset - IOM_BEGIN), prot, 0));
284
285 /* Range not found. */
286 return (-1);
287 }
288