vga_pci.c revision 1.28
1 /* $NetBSD: vga_pci.c,v 1.28 2005/12/11 12:22:51 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.28 2005/12/11 12:22:51 christos Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcidevs.h> 42 #include <dev/pci/pciio.h> 43 44 #include <dev/ic/mc6845reg.h> 45 #include <dev/ic/pcdisplayvar.h> 46 #include <dev/ic/vgareg.h> 47 #include <dev/ic/vgavar.h> 48 #include <dev/pci/vga_pcivar.h> 49 50 #include <dev/isa/isareg.h> /* For legacy VGA address ranges */ 51 52 #include <dev/wscons/wsconsio.h> 53 #include <dev/wscons/wsdisplayvar.h> 54 55 #define NBARS 6 /* number of PCI BARs */ 56 57 struct vga_bar { 58 bus_addr_t vb_base; 59 bus_size_t vb_size; 60 pcireg_t vb_type; 61 int vb_flags; 62 }; 63 64 struct vga_pci_softc { 65 struct vga_softc sc_vga; 66 67 pci_chipset_tag_t sc_pc; 68 pcitag_t sc_pcitag; 69 70 struct vga_bar sc_bars[NBARS]; 71 struct vga_bar sc_rom; 72 }; 73 74 static int vga_pci_match(struct device *, struct cfdata *, void *); 75 static void vga_pci_attach(struct device *, struct device *, void *); 76 static int vga_pci_lookup_quirks(struct pci_attach_args *); 77 78 CFATTACH_DECL(vga_pci, sizeof(struct vga_pci_softc), 79 vga_pci_match, vga_pci_attach, NULL, NULL); 80 81 static int vga_pci_ioctl(void *, u_long, caddr_t, int, struct lwp *); 82 static paddr_t vga_pci_mmap(void *, off_t, int); 83 84 static const struct vga_funcs vga_pci_funcs = { 85 vga_pci_ioctl, 86 vga_pci_mmap, 87 }; 88 89 static const struct { 90 int id; 91 int quirks; 92 } vga_pci_quirks[] = { 93 {PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM712), 94 VGA_QUIRK_NOFASTSCROLL}, 95 }; 96 97 static const struct { 98 int vid; 99 int quirks; 100 } vga_pci_vquirks[] = { 101 {PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT}, 102 }; 103 104 static int 105 vga_pci_lookup_quirks(struct pci_attach_args *pa) 106 { 107 int i; 108 109 for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]); 110 i++) { 111 if (vga_pci_quirks[i].id == pa->pa_id) 112 return (vga_pci_quirks[i].quirks); 113 } 114 for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]); 115 i++) { 116 if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id)) 117 return (vga_pci_vquirks[i].quirks); 118 } 119 return (0); 120 } 121 122 static int 123 vga_pci_match(struct device *parent, struct cfdata *match, void *aux) 124 { 125 struct pci_attach_args *pa = aux; 126 int potential; 127 128 potential = 0; 129 130 /* 131 * If it's prehistoric/vga or display/vga, we might match. 132 * For the console device, this is just a sanity check. 133 */ 134 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC && 135 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA) 136 potential = 1; 137 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 138 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 139 potential = 1; 140 141 if (!potential) 142 return (0); 143 144 /* check whether it is disabled by firmware */ 145 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) 146 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 147 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 148 return (0); 149 150 /* If it's the console, we have a winner! */ 151 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA)) 152 return (1); 153 154 /* 155 * If we might match, make sure that the card actually looks OK. 156 */ 157 if (!vga_common_probe(pa->pa_iot, pa->pa_memt)) 158 return (0); 159 160 return (1); 161 } 162 163 static void 164 vga_pci_attach(struct device *parent, struct device *self, void *aux) 165 { 166 struct vga_pci_softc *psc = (void *) self; 167 struct vga_softc *sc = &psc->sc_vga; 168 struct pci_attach_args *pa = aux; 169 char devinfo[256]; 170 int bar, reg; 171 172 psc->sc_pc = pa->pa_pc; 173 psc->sc_pcitag = pa->pa_tag; 174 175 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 176 printf(": %s (rev. 0x%02x)\n", devinfo, 177 PCI_REVISION(pa->pa_class)); 178 179 /* 180 * Gather info about all the BARs. These are used to allow 181 * the X server to map the VGA device. 182 */ 183 for (bar = 0; bar < NBARS; bar++) { 184 reg = PCI_MAPREG_START + (bar * 4); 185 if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg, 186 &psc->sc_bars[bar].vb_type)) { 187 /* there is no valid mapping register */ 188 continue; 189 } 190 if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) == 191 PCI_MAPREG_TYPE_IO) { 192 /* Don't bother fetching I/O BARs. */ 193 continue; 194 } 195 if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) == 196 PCI_MAPREG_MEM_TYPE_64BIT) { 197 /* XXX */ 198 printf("%s: WARNING: ignoring 64-bit BAR @ 0x%02x\n", 199 sc->sc_dev.dv_xname, reg); 200 bar++; 201 continue; 202 } 203 if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg, 204 psc->sc_bars[bar].vb_type, 205 &psc->sc_bars[bar].vb_base, 206 &psc->sc_bars[bar].vb_size, 207 &psc->sc_bars[bar].vb_flags)) 208 printf("%s: WARNING: strange BAR @ 0x%02x\n", 209 sc->sc_dev.dv_xname, reg); 210 } 211 212 /* XXX Expansion ROM? */ 213 214 vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA, 215 vga_pci_lookup_quirks(pa), &vga_pci_funcs); 216 } 217 218 int 219 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt, 220 pci_chipset_tag_t pc, int bus, int device, int function) 221 { 222 223 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0)); 224 } 225 226 static int 227 vga_pci_ioctl(void *v, u_long cmd, caddr_t data, int flag, struct lwp *l) 228 { 229 struct vga_config *vc = v; 230 struct vga_pci_softc *psc = (void *) vc->softc; 231 232 switch (cmd) { 233 /* PCI config read/write passthrough. */ 234 case PCI_IOC_CFGREAD: 235 case PCI_IOC_CFGWRITE: 236 return (pci_devioctl(psc->sc_pc, psc->sc_pcitag, 237 cmd, data, flag, l)); 238 239 default: 240 return (EPASSTHROUGH); 241 } 242 } 243 244 static paddr_t 245 vga_pci_mmap(void *v, off_t offset, int prot) 246 { 247 struct vga_config *vc = v; 248 struct vga_pci_softc *psc = (void *) vc->softc; 249 struct vga_bar *vb; 250 int bar; 251 252 for (bar = 0; bar < NBARS; bar++) { 253 vb = &psc->sc_bars[bar]; 254 if (vb->vb_size == 0) 255 continue; 256 if (offset >= vb->vb_base && 257 offset < (vb->vb_base + vb->vb_size)) { 258 /* XXX This the right thing to do with flags? */ 259 return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base, 260 (offset - vb->vb_base), prot, vb->vb_flags)); 261 } 262 } 263 264 /* XXX Expansion ROM? */ 265 266 /* 267 * Allow mmap access to the legacy ISA hole. This is where 268 * the legacy video BIOS will be located, and also where 269 * the legacy VGA display buffer is located. 270 * 271 * XXX Security implications, here? 272 */ 273 if (offset >= IOM_BEGIN && offset < IOM_END) 274 return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN, 275 (offset - IOM_BEGIN), prot, 0)); 276 277 /* Range not found. */ 278 return (-1); 279 } 280
Indexes created Thu Sep 25 16:09:42 GMT 2025