vga_pci.c revision 1.43
1 /* $NetBSD: vga_pci.c,v 1.43 2008/07/31 14:05:05 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.43 2008/07/31 14:05:05 joerg Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcidevs.h> 42 #include <dev/pci/pciio.h> 43 44 #include <dev/ic/mc6845reg.h> 45 #include <dev/ic/pcdisplayvar.h> 46 #include <dev/ic/vgareg.h> 47 #include <dev/ic/vgavar.h> 48 #include <dev/pci/vga_pcivar.h> 49 50 #include <dev/isa/isareg.h> /* For legacy VGA address ranges */ 51 52 #include <dev/wscons/wsconsio.h> 53 #include <dev/wscons/wsdisplayvar.h> 54 55 #include "opt_vga.h" 56 57 #ifdef VGA_POST 58 #include <x86/vga_post.h> 59 #endif 60 61 #define NBARS 6 /* number of PCI BARs */ 62 63 struct vga_bar { 64 bus_addr_t vb_base; 65 bus_size_t vb_size; 66 pcireg_t vb_type; 67 int vb_flags; 68 }; 69 70 struct vga_pci_softc { 71 struct vga_softc sc_vga; 72 73 pci_chipset_tag_t sc_pc; 74 pcitag_t sc_pcitag; 75 76 struct vga_bar sc_bars[NBARS]; 77 struct vga_bar sc_rom; 78 79 #ifdef VGA_POST 80 struct vga_post *sc_posth; 81 #endif 82 83 struct pci_attach_args sc_paa; 84 }; 85 86 static int vga_pci_match(struct device *, struct cfdata *, void *); 87 static void vga_pci_attach(struct device *, struct device *, void *); 88 static int vga_pci_rescan(struct device *, const char *, const int *); 89 static int vga_pci_lookup_quirks(struct pci_attach_args *); 90 static bool vga_pci_resume(device_t dv PMF_FN_PROTO); 91 92 CFATTACH_DECL2_NEW(vga_pci, sizeof(struct vga_pci_softc), 93 vga_pci_match, vga_pci_attach, NULL, NULL, vga_pci_rescan, NULL); 94 95 static int vga_pci_ioctl(void *, u_long, void *, int, struct lwp *); 96 static paddr_t vga_pci_mmap(void *, off_t, int); 97 98 static const struct vga_funcs vga_pci_funcs = { 99 vga_pci_ioctl, 100 vga_pci_mmap, 101 }; 102 103 static const struct { 104 int id; 105 int quirks; 106 } vga_pci_quirks[] = { 107 {PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM712), 108 VGA_QUIRK_NOFASTSCROLL}, 109 }; 110 111 static const struct { 112 int vid; 113 int quirks; 114 } vga_pci_vquirks[] = { 115 {PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT}, 116 }; 117 118 static int 119 vga_pci_lookup_quirks(struct pci_attach_args *pa) 120 { 121 int i; 122 123 for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]); 124 i++) { 125 if (vga_pci_quirks[i].id == pa->pa_id) 126 return (vga_pci_quirks[i].quirks); 127 } 128 for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]); 129 i++) { 130 if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id)) 131 return (vga_pci_vquirks[i].quirks); 132 } 133 return (0); 134 } 135 136 static int 137 vga_pci_match(struct device *parent, struct cfdata *match, 138 void *aux) 139 { 140 struct pci_attach_args *pa = aux; 141 int potential; 142 143 potential = 0; 144 145 /* 146 * If it's prehistoric/vga or display/vga, we might match. 147 * For the console device, this is just a sanity check. 148 */ 149 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC && 150 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA) 151 potential = 1; 152 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 153 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 154 potential = 1; 155 156 if (!potential) 157 return (0); 158 159 /* check whether it is disabled by firmware */ 160 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) 161 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 162 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 163 return (0); 164 165 /* If it's the console, we have a winner! */ 166 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA)) 167 return (1); 168 169 /* 170 * If we might match, make sure that the card actually looks OK. 171 */ 172 if (!vga_common_probe(pa->pa_iot, pa->pa_memt)) 173 return (0); 174 175 return (1); 176 } 177 178 static void 179 vga_pci_attach(struct device *parent, struct device *self, void *aux) 180 { 181 struct vga_pci_softc *psc = device_private(self); 182 struct vga_softc *sc = &psc->sc_vga; 183 struct pci_attach_args *pa = aux; 184 char devinfo[256]; 185 int bar, reg; 186 187 sc->sc_dev = self; 188 psc->sc_pc = pa->pa_pc; 189 psc->sc_pcitag = pa->pa_tag; 190 psc->sc_paa = *pa; 191 192 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 193 aprint_naive("\n"); 194 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 195 PCI_REVISION(pa->pa_class)); 196 197 /* 198 * Gather info about all the BARs. These are used to allow 199 * the X server to map the VGA device. 200 */ 201 for (bar = 0; bar < NBARS; bar++) { 202 reg = PCI_MAPREG_START + (bar * 4); 203 if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg, 204 &psc->sc_bars[bar].vb_type)) { 205 /* there is no valid mapping register */ 206 continue; 207 } 208 if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) == 209 PCI_MAPREG_TYPE_IO) { 210 /* Don't bother fetching I/O BARs. */ 211 continue; 212 } 213 #ifndef __LP64__ 214 if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) == 215 PCI_MAPREG_MEM_TYPE_64BIT) { 216 /* XXX */ 217 aprint_error_dev(self, 218 "WARNING: ignoring 64-bit BAR @ 0x%02x\n", reg); 219 bar++; 220 continue; 221 } 222 #endif 223 if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg, 224 psc->sc_bars[bar].vb_type, 225 &psc->sc_bars[bar].vb_base, 226 &psc->sc_bars[bar].vb_size, 227 &psc->sc_bars[bar].vb_flags)) 228 aprint_error_dev(self, 229 "WARNING: strange BAR @ 0x%02x\n", reg); 230 } 231 232 /* XXX Expansion ROM? */ 233 234 vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA, 235 vga_pci_lookup_quirks(pa), &vga_pci_funcs); 236 237 #ifdef VGA_POST 238 psc->sc_posth = vga_post_init(pa->pa_bus, pa->pa_device, pa->pa_function); 239 if (psc->sc_posth == NULL) 240 aprint_error_dev(self, "WARNING: could not prepare POST handler\n"); 241 #endif 242 243 /* 244 * XXX Do not use the generic PCI framework for now as 245 * XXX it would power down the device when the console 246 * XXX is still using it. 247 */ 248 if (!pmf_device_register(self, NULL, vga_pci_resume)) 249 aprint_error_dev(self, "couldn't establish power handler\n"); 250 config_found_ia(self, "drm", aux, vga_drm_print); 251 } 252 253 static int 254 vga_pci_rescan(struct device *self, const char *ifattr, const int *locators) 255 { 256 struct vga_pci_softc *psc = device_private(self); 257 258 config_found_ia(self, "drm", &psc->sc_paa, vga_drm_print); 259 260 return 0; 261 } 262 263 static bool 264 vga_pci_resume(device_t dv PMF_FN_ARGS) 265 { 266 #ifdef VGA_POST 267 extern int acpi_md_vbios_reset; 268 #endif 269 struct vga_pci_softc *sc = device_private(dv); 270 271 vga_resume(&sc->sc_vga); 272 273 #ifdef VGA_POST 274 if (sc->sc_posth != NULL && acpi_md_vbios_reset == 2) 275 vga_post_call(sc->sc_posth); 276 #endif 277 278 return true; 279 } 280 281 int 282 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt, 283 pci_chipset_tag_t pc, int bus, int device, 284 int function) 285 { 286 287 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0)); 288 } 289 290 int 291 vga_drm_print(void *aux, const char *pnp) 292 { 293 if (pnp) 294 aprint_normal("drm at %s", pnp); 295 return (UNCONF); 296 } 297 298 299 static int 300 vga_pci_ioctl(void *v, u_long cmd, void *data, int flag, struct lwp *l) 301 { 302 struct vga_config *vc = v; 303 struct vga_pci_softc *psc = (void *) vc->softc; 304 305 switch (cmd) { 306 /* PCI config read/write passthrough. */ 307 case PCI_IOC_CFGREAD: 308 case PCI_IOC_CFGWRITE: 309 return (pci_devioctl(psc->sc_pc, psc->sc_pcitag, 310 cmd, data, flag, l)); 311 312 default: 313 return (EPASSTHROUGH); 314 } 315 } 316 317 static paddr_t 318 vga_pci_mmap(void *v, off_t offset, int prot) 319 { 320 struct vga_config *vc = v; 321 struct vga_pci_softc *psc = (void *) vc->softc; 322 struct vga_bar *vb; 323 int bar; 324 325 for (bar = 0; bar < NBARS; bar++) { 326 vb = &psc->sc_bars[bar]; 327 if (vb->vb_size == 0) 328 continue; 329 if (offset >= vb->vb_base && 330 offset < (vb->vb_base + vb->vb_size)) { 331 /* XXX This the right thing to do with flags? */ 332 return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base, 333 (offset - vb->vb_base), prot, vb->vb_flags)); 334 } 335 } 336 337 /* XXX Expansion ROM? */ 338 339 /* 340 * Allow mmap access to the legacy ISA hole. This is where 341 * the legacy video BIOS will be located, and also where 342 * the legacy VGA display buffer is located. 343 * 344 * XXX Security implications, here? 345 */ 346 if (offset >= IOM_BEGIN && offset < IOM_END) 347 return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN, 348 (offset - IOM_BEGIN), prot, 0)); 349 350 /* Range not found. */ 351 return (-1); 352 } 353
Indexes created Fri Oct 03 02:09:57 GMT 2025