vga_pci.c revision 1.49
1 /* $NetBSD: vga_pci.c,v 1.49 2010/02/24 22:38:01 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Chris G. Demetriou 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: vga_pci.c,v 1.49 2010/02/24 22:38:01 dyoung Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcidevs.h> 42 #include <dev/pci/pciio.h> 43 44 #include <dev/ic/mc6845reg.h> 45 #include <dev/ic/pcdisplayvar.h> 46 #include <dev/ic/vgareg.h> 47 #include <dev/ic/vgavar.h> 48 #include <dev/pci/vga_pcivar.h> 49 50 #include <dev/isa/isareg.h> /* For legacy VGA address ranges */ 51 52 #include <dev/wscons/wsconsio.h> 53 #include <dev/wscons/wsdisplayvar.h> 54 55 #include "opt_vga.h" 56 57 #ifdef VGA_POST 58 # if defined(__i386__) || defined(__amd64__) 59 # include "acpica.h" 60 # endif 61 #include <x86/vga_post.h> 62 #endif 63 64 #define NBARS 6 /* number of PCI BARs */ 65 66 struct vga_bar { 67 bus_addr_t vb_base; 68 bus_size_t vb_size; 69 pcireg_t vb_type; 70 int vb_flags; 71 }; 72 73 struct vga_pci_softc { 74 struct vga_softc sc_vga; 75 76 pci_chipset_tag_t sc_pc; 77 pcitag_t sc_pcitag; 78 79 struct vga_bar sc_bars[NBARS]; 80 struct vga_bar sc_rom; 81 82 #ifdef VGA_POST 83 struct vga_post *sc_posth; 84 #endif 85 86 struct pci_attach_args sc_paa; 87 }; 88 89 static int vga_pci_match(device_t, cfdata_t, void *); 90 static void vga_pci_attach(device_t, device_t, void *); 91 static int vga_pci_rescan(device_t, const char *, const int *); 92 static int vga_pci_lookup_quirks(struct pci_attach_args *); 93 static bool vga_pci_resume(device_t dv, const pmf_qual_t *); 94 95 CFATTACH_DECL2_NEW(vga_pci, sizeof(struct vga_pci_softc), 96 vga_pci_match, vga_pci_attach, NULL, NULL, vga_pci_rescan, NULL); 97 98 static int vga_pci_ioctl(void *, u_long, void *, int, struct lwp *); 99 static paddr_t vga_pci_mmap(void *, off_t, int); 100 101 static const struct vga_funcs vga_pci_funcs = { 102 vga_pci_ioctl, 103 vga_pci_mmap, 104 }; 105 106 static const struct { 107 int id; 108 int quirks; 109 } vga_pci_quirks[] = { 110 {PCI_ID_CODE(PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM712), 111 VGA_QUIRK_NOFASTSCROLL}, 112 }; 113 114 static const struct { 115 int vid; 116 int quirks; 117 } vga_pci_vquirks[] = { 118 {PCI_VENDOR_ATI, VGA_QUIRK_ONEFONT}, 119 }; 120 121 static int 122 vga_pci_lookup_quirks(struct pci_attach_args *pa) 123 { 124 int i; 125 126 for (i = 0; i < sizeof(vga_pci_quirks) / sizeof (vga_pci_quirks[0]); 127 i++) { 128 if (vga_pci_quirks[i].id == pa->pa_id) 129 return (vga_pci_quirks[i].quirks); 130 } 131 for (i = 0; i < sizeof(vga_pci_vquirks) / sizeof (vga_pci_vquirks[0]); 132 i++) { 133 if (vga_pci_vquirks[i].vid == PCI_VENDOR(pa->pa_id)) 134 return (vga_pci_vquirks[i].quirks); 135 } 136 return (0); 137 } 138 139 static int 140 vga_pci_match(device_t parent, cfdata_t match, void *aux) 141 { 142 struct pci_attach_args *pa = aux; 143 int potential; 144 145 potential = 0; 146 147 /* 148 * If it's prehistoric/vga or display/vga, we might match. 149 * For the console device, this is just a sanity check. 150 */ 151 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PREHISTORIC && 152 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PREHISTORIC_VGA) 153 potential = 1; 154 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY && 155 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_DISPLAY_VGA) 156 potential = 1; 157 158 if (!potential) 159 return (0); 160 161 /* check whether it is disabled by firmware */ 162 if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) 163 & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 164 != (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) 165 return (0); 166 167 /* If it's the console, we have a winner! */ 168 if (vga_is_console(pa->pa_iot, WSDISPLAY_TYPE_PCIVGA)) 169 return (1); 170 171 /* 172 * If we might match, make sure that the card actually looks OK. 173 */ 174 if (!vga_common_probe(pa->pa_iot, pa->pa_memt)) 175 return (0); 176 177 return (1); 178 } 179 180 static void 181 vga_pci_attach(device_t parent, device_t self, void *aux) 182 { 183 struct vga_pci_softc *psc = device_private(self); 184 struct vga_softc *sc = &psc->sc_vga; 185 struct pci_attach_args *pa = aux; 186 char devinfo[256]; 187 int bar, reg; 188 189 sc->sc_dev = self; 190 psc->sc_pc = pa->pa_pc; 191 psc->sc_pcitag = pa->pa_tag; 192 psc->sc_paa = *pa; 193 194 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 195 aprint_naive("\n"); 196 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 197 PCI_REVISION(pa->pa_class)); 198 199 /* 200 * Gather info about all the BARs. These are used to allow 201 * the X server to map the VGA device. 202 */ 203 for (bar = 0; bar < NBARS; bar++) { 204 reg = PCI_MAPREG_START + (bar * 4); 205 if (!pci_mapreg_probe(psc->sc_pc, psc->sc_pcitag, reg, 206 &psc->sc_bars[bar].vb_type)) { 207 /* there is no valid mapping register */ 208 continue; 209 } 210 if (PCI_MAPREG_TYPE(psc->sc_bars[bar].vb_type) == 211 PCI_MAPREG_TYPE_IO) { 212 /* Don't bother fetching I/O BARs. */ 213 continue; 214 } 215 #ifndef __LP64__ 216 if (PCI_MAPREG_MEM_TYPE(psc->sc_bars[bar].vb_type) == 217 PCI_MAPREG_MEM_TYPE_64BIT) { 218 /* XXX */ 219 aprint_error_dev(self, 220 "WARNING: ignoring 64-bit BAR @ 0x%02x\n", reg); 221 bar++; 222 continue; 223 } 224 #endif 225 if (pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, reg, 226 psc->sc_bars[bar].vb_type, 227 &psc->sc_bars[bar].vb_base, 228 &psc->sc_bars[bar].vb_size, 229 &psc->sc_bars[bar].vb_flags)) 230 aprint_error_dev(self, 231 "WARNING: strange BAR @ 0x%02x\n", reg); 232 } 233 234 /* XXX Expansion ROM? */ 235 236 vga_common_attach(sc, pa->pa_iot, pa->pa_memt, WSDISPLAY_TYPE_PCIVGA, 237 vga_pci_lookup_quirks(pa), &vga_pci_funcs); 238 239 #ifdef VGA_POST 240 psc->sc_posth = vga_post_init(pa->pa_bus, pa->pa_device, pa->pa_function); 241 if (psc->sc_posth == NULL) 242 aprint_error_dev(self, "WARNING: could not prepare POST handler\n"); 243 #endif 244 245 /* 246 * XXX Do not use the generic PCI framework for now as 247 * XXX it would power down the device when the console 248 * XXX is still using it. 249 */ 250 if (!pmf_device_register(self, NULL, vga_pci_resume)) 251 aprint_error_dev(self, "couldn't establish power handler\n"); 252 config_found_ia(self, "drm", aux, vga_drm_print); 253 } 254 255 static int 256 vga_pci_rescan(device_t self, const char *ifattr, const int *locators) 257 { 258 struct vga_pci_softc *psc = device_private(self); 259 260 config_found_ia(self, "drm", &psc->sc_paa, vga_drm_print); 261 262 return 0; 263 } 264 265 static bool 266 vga_pci_resume(device_t dv, const pmf_qual_t *qual) 267 { 268 #if defined(VGA_POST) && NACPICA > 0 269 extern int acpi_md_vbios_reset; 270 #endif 271 struct vga_pci_softc *sc = device_private(dv); 272 273 vga_resume(&sc->sc_vga); 274 275 #if defined(VGA_POST) && NACPICA > 0 276 if (sc->sc_posth != NULL && acpi_md_vbios_reset == 2) 277 vga_post_call(sc->sc_posth); 278 #endif 279 280 return true; 281 } 282 283 int 284 vga_pci_cnattach(bus_space_tag_t iot, bus_space_tag_t memt, 285 pci_chipset_tag_t pc, int bus, int device, 286 int function) 287 { 288 289 return (vga_cnattach(iot, memt, WSDISPLAY_TYPE_PCIVGA, 0)); 290 } 291 292 int 293 vga_drm_print(void *aux, const char *pnp) 294 { 295 if (pnp) 296 aprint_normal("drm at %s", pnp); 297 return (UNCONF); 298 } 299 300 301 static int 302 vga_pci_ioctl(void *v, u_long cmd, void *data, int flag, struct lwp *l) 303 { 304 struct vga_config *vc = v; 305 struct vga_pci_softc *psc = (void *) vc->softc; 306 307 switch (cmd) { 308 /* PCI config read/write passthrough. */ 309 case PCI_IOC_CFGREAD: 310 case PCI_IOC_CFGWRITE: 311 return (pci_devioctl(psc->sc_pc, psc->sc_pcitag, 312 cmd, data, flag, l)); 313 314 default: 315 return (EPASSTHROUGH); 316 } 317 } 318 319 static paddr_t 320 vga_pci_mmap(void *v, off_t offset, int prot) 321 { 322 struct vga_config *vc = v; 323 struct vga_pci_softc *psc = (void *) vc->softc; 324 struct vga_bar *vb; 325 int bar; 326 327 for (bar = 0; bar < NBARS; bar++) { 328 vb = &psc->sc_bars[bar]; 329 if (vb->vb_size == 0) 330 continue; 331 if (offset >= vb->vb_base && 332 offset < (vb->vb_base + vb->vb_size)) { 333 /* XXX This the right thing to do with flags? */ 334 return (bus_space_mmap(vc->hdl.vh_memt, vb->vb_base, 335 (offset - vb->vb_base), prot, vb->vb_flags)); 336 } 337 } 338 339 /* XXX Expansion ROM? */ 340 341 /* 342 * Allow mmap access to the legacy ISA hole. This is where 343 * the legacy video BIOS will be located, and also where 344 * the legacy VGA display buffer is located. 345 * 346 * XXX Security implications, here? 347 */ 348 if (offset >= IOM_BEGIN && offset < IOM_END) 349 return (bus_space_mmap(vc->hdl.vh_memt, IOM_BEGIN, 350 (offset - IOM_BEGIN), prot, 0)); 351 352 /* Range not found. */ 353 return (-1); 354 } 355
Indexes created Tue Sep 23 14:10:03 GMT 2025