virtio_pci.c revision 1.2.2.1
1 /* $NetBSD: virtio_pci.c,v 1.2.2.1 2018/06/25 07:26:01 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 2010 Minoura Makoto. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: virtio_pci.c,v 1.2.2.1 2018/06/25 07:26:01 pgoyette Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kmem.h> 34 #include <sys/module.h> 35 36 #include <sys/device.h> 37 38 #include <dev/pci/pcidevs.h> 39 #include <dev/pci/pcireg.h> 40 #include <dev/pci/pcivar.h> 41 42 #define VIRTIO_PRIVATE 43 44 #include <dev/pci/virtioreg.h> /* XXX: move to non-pci */ 45 #include <dev/pci/virtiovar.h> /* XXX: move to non-pci */ 46 47 static int virtio_pci_match(device_t, cfdata_t, void *); 48 static void virtio_pci_attach(device_t, device_t, void *); 49 static int virtio_pci_rescan(device_t, const char *, const int *); 50 static int virtio_pci_detach(device_t, int); 51 52 struct virtio_pci_softc { 53 struct virtio_softc sc_sc; 54 bus_space_tag_t sc_iot; 55 bus_space_handle_t sc_ioh; 56 bus_size_t sc_iosize; 57 struct pci_attach_args sc_pa; 58 pci_intr_handle_t *sc_ihp; 59 void **sc_ihs; 60 int sc_ihs_num; 61 int sc_config_offset; 62 }; 63 64 static void virtio_pci_kick(struct virtio_softc *, uint16_t); 65 static uint8_t virtio_pci_read_device_config_1(struct virtio_softc *, int); 66 static uint16_t virtio_pci_read_device_config_2(struct virtio_softc *, int); 67 static uint32_t virtio_pci_read_device_config_4(struct virtio_softc *, int); 68 static uint64_t virtio_pci_read_device_config_8(struct virtio_softc *, int); 69 static void virtio_pci_write_device_config_1(struct virtio_softc *, int, uint8_t); 70 static void virtio_pci_write_device_config_2(struct virtio_softc *, int, uint16_t); 71 static void virtio_pci_write_device_config_4(struct virtio_softc *, int, uint32_t); 72 static void virtio_pci_write_device_config_8(struct virtio_softc *, int, uint64_t); 73 static uint16_t virtio_pci_read_queue_size(struct virtio_softc *, uint16_t); 74 static void virtio_pci_setup_queue(struct virtio_softc *, uint16_t, uint32_t); 75 static void virtio_pci_set_status(struct virtio_softc *, int); 76 static uint32_t virtio_pci_negotiate_features(struct virtio_softc *, uint32_t); 77 static int virtio_pci_setup_interrupts(struct virtio_softc *); 78 static void virtio_pci_free_interrupts(struct virtio_softc *); 79 80 static int virtio_pci_intr(void *arg); 81 static int virtio_pci_msix_queue_intr(void *); 82 static int virtio_pci_msix_config_intr(void *); 83 static int virtio_pci_setup_msix_vectors(struct virtio_softc *); 84 static int virtio_pci_setup_msix_interrupts(struct virtio_softc *, 85 struct pci_attach_args *); 86 static int virtio_pci_setup_intx_interrupt(struct virtio_softc *, 87 struct pci_attach_args *); 88 89 #define VIRTIO_MSIX_CONFIG_VECTOR_INDEX 0 90 #define VIRTIO_MSIX_QUEUE_VECTOR_INDEX 1 91 92 /* we use the legacy virtio spec, so the PCI registers are host native 93 * byte order, not PCI (i.e. LE) byte order */ 94 #if BYTE_ORDER == BIG_ENDIAN 95 #define REG_HI_OFF 0 96 #define REG_LO_OFF 4 97 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 98 #define bus_space_read_stream_1 bus_space_read_1 99 #define bus_space_write_stream_1 bus_space_write_1 100 static inline uint16_t 101 bus_space_read_stream_2(bus_space_tag_t t, bus_space_handle_t h, 102 bus_size_t o) 103 { 104 return le16toh(bus_space_read_2(t, h, o)); 105 } 106 static inline void 107 bus_space_write_stream_2(bus_space_tag_t t, bus_space_handle_t h, 108 bus_size_t o, uint16_t v) 109 { 110 bus_space_write_2(t, h, o, htole16(v)); 111 } 112 static inline uint32_t 113 bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, 114 bus_size_t o) 115 { 116 return le32toh(bus_space_read_4(t, h, o)); 117 } 118 static inline void 119 bus_space_write_stream_4(bus_space_tag_t t, bus_space_handle_t h, 120 bus_size_t o, uint32_t v) 121 { 122 bus_space_write_4(t, h, o, htole32(v)); 123 } 124 #endif 125 #else 126 #define REG_HI_OFF 4 127 #define REG_LO_OFF 0 128 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 129 #define bus_space_read_stream_1 bus_space_read_1 130 #define bus_space_read_stream_2 bus_space_read_2 131 #define bus_space_read_stream_4 bus_space_read_4 132 #define bus_space_write_stream_1 bus_space_write_1 133 #define bus_space_write_stream_2 bus_space_write_2 134 #define bus_space_write_stream_4 bus_space_write_4 135 #endif 136 #endif 137 138 139 static const char *virtio_device_name[] = { 140 "Unknown (0)", /* 0 */ 141 "Network", /* 1 */ 142 "Block", /* 2 */ 143 "Console", /* 3 */ 144 "Entropy", /* 4 */ 145 "Memory Balloon", /* 5 */ 146 "I/O Memory", /* 6 */ 147 "Remote Processor Messaging", /* 7 */ 148 "SCSI", /* 8 */ 149 "9P Transport", /* 9 */ 150 "mac80211 wlan", /* 10 */ 151 }; 152 #define NDEVNAMES __arraycount(virtio_device_name) 153 154 CFATTACH_DECL3_NEW(virtio_pci, sizeof(struct virtio_pci_softc), 155 virtio_pci_match, virtio_pci_attach, virtio_pci_detach, NULL, 156 virtio_pci_rescan, NULL, DVF_DETACH_SHUTDOWN); 157 158 static const struct virtio_ops virtio_pci_ops = { 159 .kick = virtio_pci_kick, 160 .read_dev_cfg_1 = virtio_pci_read_device_config_1, 161 .read_dev_cfg_2 = virtio_pci_read_device_config_2, 162 .read_dev_cfg_4 = virtio_pci_read_device_config_4, 163 .read_dev_cfg_8 = virtio_pci_read_device_config_8, 164 .write_dev_cfg_1 = virtio_pci_write_device_config_1, 165 .write_dev_cfg_2 = virtio_pci_write_device_config_2, 166 .write_dev_cfg_4 = virtio_pci_write_device_config_4, 167 .write_dev_cfg_8 = virtio_pci_write_device_config_8, 168 .read_queue_size = virtio_pci_read_queue_size, 169 .setup_queue = virtio_pci_setup_queue, 170 .set_status = virtio_pci_set_status, 171 .neg_features = virtio_pci_negotiate_features, 172 .setup_interrupts = virtio_pci_setup_interrupts, 173 .free_interrupts = virtio_pci_free_interrupts, 174 }; 175 176 static int 177 virtio_pci_match(device_t parent, cfdata_t match, void *aux) 178 { 179 struct pci_attach_args *pa; 180 181 pa = (struct pci_attach_args *)aux; 182 switch (PCI_VENDOR(pa->pa_id)) { 183 case PCI_VENDOR_QUMRANET: 184 if ((PCI_PRODUCT_QUMRANET_VIRTIO_1000 <= 185 PCI_PRODUCT(pa->pa_id)) && 186 (PCI_PRODUCT(pa->pa_id) <= 187 PCI_PRODUCT_QUMRANET_VIRTIO_103F)) 188 return 1; 189 break; 190 } 191 192 return 0; 193 } 194 195 static void 196 virtio_pci_attach(device_t parent, device_t self, void *aux) 197 { 198 struct virtio_pci_softc * const psc = device_private(self); 199 struct virtio_softc * const sc = &psc->sc_sc; 200 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 201 pci_chipset_tag_t pc = pa->pa_pc; 202 pcitag_t tag = pa->pa_tag; 203 int revision; 204 pcireg_t id; 205 pcireg_t csr; 206 207 revision = PCI_REVISION(pa->pa_class); 208 if (revision != 0) { 209 aprint_normal(": unknown revision 0x%02x; giving up\n", 210 revision); 211 return; 212 } 213 aprint_normal("\n"); 214 aprint_naive("\n"); 215 216 /* subsystem ID shows what I am */ 217 id = pci_conf_read(pc, tag, PCI_SUBSYS_ID_REG); 218 aprint_normal_dev(self, "Virtio %s Device (rev. 0x%02x)\n", 219 (PCI_SUBSYS_ID(id) < NDEVNAMES? 220 virtio_device_name[PCI_SUBSYS_ID(id)] : "Unknown"), 221 revision); 222 223 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 224 csr |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE; 225 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 226 227 sc->sc_dev = self; 228 sc->sc_ops = &virtio_pci_ops; 229 psc->sc_pa = *pa; 230 psc->sc_iot = pa->pa_iot; 231 if (pci_dma64_available(pa)) 232 sc->sc_dmat = pa->pa_dmat64; 233 else 234 sc->sc_dmat = pa->pa_dmat; 235 psc->sc_config_offset = VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI; 236 237 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0, 238 &psc->sc_iot, &psc->sc_ioh, NULL, &psc->sc_iosize)) { 239 aprint_error_dev(self, "can't map i/o space\n"); 240 return; 241 } 242 243 virtio_device_reset(sc); 244 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_ACK); 245 virtio_set_status(sc, VIRTIO_CONFIG_DEVICE_STATUS_DRIVER); 246 247 sc->sc_childdevid = PCI_SUBSYS_ID(id); 248 sc->sc_child = NULL; 249 virtio_pci_rescan(self, "virtio", 0); 250 return; 251 } 252 253 /* ARGSUSED */ 254 static int 255 virtio_pci_rescan(device_t self, const char *attr, const int *scan_flags) 256 { 257 struct virtio_pci_softc * const psc = device_private(self); 258 struct virtio_softc * const sc = &psc->sc_sc; 259 struct virtio_attach_args va; 260 261 if (sc->sc_child) /* Child already attached? */ 262 return 0; 263 264 memset(&va, 0, sizeof(va)); 265 va.sc_childdevid = sc->sc_childdevid; 266 267 config_found_ia(self, attr, &va, NULL); 268 269 if (sc->sc_child == NULL) { 270 aprint_error_dev(self, 271 "no matching child driver; not configured\n"); 272 return 0; 273 } 274 275 if (sc->sc_child == VIRTIO_CHILD_FAILED) { 276 aprint_error_dev(self, 277 "virtio configuration failed\n"); 278 return 0; 279 } 280 281 /* 282 * Make sure child drivers initialize interrupts via call 283 * to virtio_child_attach_finish(). 284 */ 285 KASSERT(psc->sc_ihs_num != 0); 286 287 return 0; 288 } 289 290 291 static int 292 virtio_pci_detach(device_t self, int flags) 293 { 294 struct virtio_pci_softc * const psc = device_private(self); 295 struct virtio_softc * const sc = &psc->sc_sc; 296 int r; 297 298 if (sc->sc_child != NULL) { 299 r = config_detach(sc->sc_child, flags); 300 if (r) 301 return r; 302 } 303 304 /* Check that child detached properly */ 305 KASSERT(sc->sc_child == NULL); 306 KASSERT(sc->sc_vqs == NULL); 307 KASSERT(psc->sc_ihs_num == 0); 308 309 if (psc->sc_iosize) 310 bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_iosize); 311 psc->sc_iosize = 0; 312 313 return 0; 314 } 315 316 static void 317 virtio_pci_kick(struct virtio_softc *sc, uint16_t idx) 318 { 319 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 320 321 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, 322 VIRTIO_CONFIG_QUEUE_NOTIFY, idx); 323 } 324 325 static uint8_t 326 virtio_pci_read_device_config_1(struct virtio_softc *sc, int index) 327 { 328 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 329 return bus_space_read_stream_1(psc->sc_iot, psc->sc_ioh, 330 psc->sc_config_offset + index); 331 } 332 333 static uint16_t 334 virtio_pci_read_device_config_2(struct virtio_softc *sc, int index) 335 { 336 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 337 return bus_space_read_stream_2(psc->sc_iot, psc->sc_ioh, 338 psc->sc_config_offset + index); 339 } 340 341 static uint32_t 342 virtio_pci_read_device_config_4(struct virtio_softc *sc, int index) 343 { 344 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 345 return bus_space_read_stream_4(psc->sc_iot, psc->sc_ioh, 346 psc->sc_config_offset + index); 347 } 348 349 static uint64_t 350 virtio_pci_read_device_config_8(struct virtio_softc *sc, int index) 351 { 352 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 353 uint64_t r; 354 355 r = bus_space_read_stream_4(psc->sc_iot, psc->sc_ioh, 356 psc->sc_config_offset + index + REG_HI_OFF); 357 r <<= 32; 358 r |= bus_space_read_stream_4(psc->sc_iot, psc->sc_ioh, 359 psc->sc_config_offset + index + REG_LO_OFF); 360 361 return r; 362 } 363 364 static void 365 virtio_pci_write_device_config_1(struct virtio_softc *sc, int index, 366 uint8_t value) 367 { 368 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 369 370 bus_space_write_stream_1(psc->sc_iot, psc->sc_ioh, 371 psc->sc_config_offset + index, value); 372 } 373 374 static void 375 virtio_pci_write_device_config_2(struct virtio_softc *sc, int index, 376 uint16_t value) 377 { 378 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 379 380 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, 381 psc->sc_config_offset + index, value); 382 } 383 384 static void 385 virtio_pci_write_device_config_4(struct virtio_softc *sc, int index, 386 uint32_t value) 387 { 388 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 389 390 bus_space_write_stream_4(psc->sc_iot, psc->sc_ioh, 391 psc->sc_config_offset + index, value); 392 } 393 394 static void 395 virtio_pci_write_device_config_8(struct virtio_softc *sc, int index, 396 uint64_t value) 397 { 398 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 399 400 bus_space_write_stream_4(psc->sc_iot, psc->sc_ioh, 401 psc->sc_config_offset + index + REG_LO_OFF, 402 value & 0xffffffff); 403 bus_space_write_stream_4(psc->sc_iot, psc->sc_ioh, 404 psc->sc_config_offset + index + REG_HI_OFF, 405 value >> 32); 406 } 407 408 static uint16_t 409 virtio_pci_read_queue_size(struct virtio_softc *sc, uint16_t idx) 410 { 411 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 412 413 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, 414 VIRTIO_CONFIG_QUEUE_SELECT, idx); 415 return bus_space_read_stream_2(psc->sc_iot, psc->sc_ioh, 416 VIRTIO_CONFIG_QUEUE_SIZE); 417 } 418 419 static void 420 virtio_pci_setup_queue(struct virtio_softc *sc, uint16_t idx, uint32_t addr) 421 { 422 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 423 424 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, 425 VIRTIO_CONFIG_QUEUE_SELECT, idx); 426 bus_space_write_stream_4(psc->sc_iot, psc->sc_ioh, 427 VIRTIO_CONFIG_QUEUE_ADDRESS, addr); 428 429 if (psc->sc_ihs_num > 1) { 430 int vec = VIRTIO_MSIX_QUEUE_VECTOR_INDEX; 431 if (false) /* (for per-vq vectors) */ 432 vec += idx; 433 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, 434 VIRTIO_CONFIG_MSI_QUEUE_VECTOR, vec); 435 } 436 } 437 438 static void 439 virtio_pci_set_status(struct virtio_softc *sc, int status) 440 { 441 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 442 int old = 0; 443 444 if (status != 0) { 445 old = bus_space_read_stream_1(psc->sc_iot, psc->sc_ioh, 446 VIRTIO_CONFIG_DEVICE_STATUS); 447 } 448 bus_space_write_stream_1(psc->sc_iot, psc->sc_ioh, 449 VIRTIO_CONFIG_DEVICE_STATUS, status|old); 450 } 451 452 static uint32_t 453 virtio_pci_negotiate_features(struct virtio_softc *sc, uint32_t guest_features) 454 { 455 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 456 uint32_t r; 457 458 r = bus_space_read_stream_4(psc->sc_iot, psc->sc_ioh, 459 VIRTIO_CONFIG_DEVICE_FEATURES); 460 r &= guest_features; 461 bus_space_write_stream_4(psc->sc_iot, psc->sc_ioh, 462 VIRTIO_CONFIG_GUEST_FEATURES, r); 463 464 return r; 465 } 466 467 468 static int 469 virtio_pci_setup_msix_vectors(struct virtio_softc *sc) 470 { 471 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 472 int offset, vector, ret, qid; 473 474 offset = VIRTIO_CONFIG_MSI_CONFIG_VECTOR; 475 vector = VIRTIO_MSIX_CONFIG_VECTOR_INDEX; 476 477 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, offset, vector); 478 ret = bus_space_read_stream_2(psc->sc_iot, psc->sc_ioh, offset); 479 aprint_debug_dev(sc->sc_dev, "expected=%d, actual=%d\n", 480 vector, ret); 481 if (ret != vector) 482 return -1; 483 484 for (qid = 0; qid < sc->sc_nvqs; qid++) { 485 offset = VIRTIO_CONFIG_QUEUE_SELECT; 486 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, offset, qid); 487 488 offset = VIRTIO_CONFIG_MSI_QUEUE_VECTOR; 489 vector = VIRTIO_MSIX_QUEUE_VECTOR_INDEX; 490 491 bus_space_write_stream_2(psc->sc_iot, psc->sc_ioh, offset, vector); 492 ret = bus_space_read_stream_2(psc->sc_iot, psc->sc_ioh, offset); 493 aprint_debug_dev(sc->sc_dev, "expected=%d, actual=%d\n", 494 vector, ret); 495 if (ret != vector) 496 return -1; 497 } 498 499 return 0; 500 } 501 502 static int 503 virtio_pci_setup_msix_interrupts(struct virtio_softc *sc, 504 struct pci_attach_args *pa) 505 { 506 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 507 device_t self = sc->sc_dev; 508 pci_chipset_tag_t pc = pa->pa_pc; 509 char intrbuf[PCI_INTRSTR_LEN]; 510 char const *intrstr; 511 int idx; 512 513 idx = VIRTIO_MSIX_CONFIG_VECTOR_INDEX; 514 if (sc->sc_flags & VIRTIO_F_PCI_INTR_MPSAFE) 515 pci_intr_setattr(pc, &psc->sc_ihp[idx], PCI_INTR_MPSAFE, true); 516 517 psc->sc_ihs[idx] = pci_intr_establish_xname(pc, psc->sc_ihp[idx], 518 sc->sc_ipl, virtio_pci_msix_config_intr, sc, device_xname(sc->sc_dev)); 519 if (psc->sc_ihs[idx] == NULL) { 520 aprint_error_dev(self, "couldn't establish MSI-X for config\n"); 521 goto error; 522 } 523 524 idx = VIRTIO_MSIX_QUEUE_VECTOR_INDEX; 525 if (sc->sc_flags & VIRTIO_F_PCI_INTR_MPSAFE) 526 pci_intr_setattr(pc, &psc->sc_ihp[idx], PCI_INTR_MPSAFE, true); 527 528 psc->sc_ihs[idx] = pci_intr_establish_xname(pc, psc->sc_ihp[idx], 529 sc->sc_ipl, virtio_pci_msix_queue_intr, sc, device_xname(sc->sc_dev)); 530 if (psc->sc_ihs[idx] == NULL) { 531 aprint_error_dev(self, "couldn't establish MSI-X for queues\n"); 532 goto error; 533 } 534 535 if (virtio_pci_setup_msix_vectors(sc) != 0) { 536 aprint_error_dev(self, "couldn't setup MSI-X vectors\n"); 537 goto error; 538 } 539 540 idx = VIRTIO_MSIX_CONFIG_VECTOR_INDEX; 541 intrstr = pci_intr_string(pc, psc->sc_ihp[idx], intrbuf, sizeof(intrbuf)); 542 aprint_normal_dev(self, "config interrupting at %s\n", intrstr); 543 idx = VIRTIO_MSIX_QUEUE_VECTOR_INDEX; 544 intrstr = pci_intr_string(pc, psc->sc_ihp[idx], intrbuf, sizeof(intrbuf)); 545 aprint_normal_dev(self, "queues interrupting at %s\n", intrstr); 546 547 return 0; 548 549 error: 550 idx = VIRTIO_MSIX_CONFIG_VECTOR_INDEX; 551 if (psc->sc_ihs[idx] != NULL) 552 pci_intr_disestablish(psc->sc_pa.pa_pc, psc->sc_ihs[idx]); 553 idx = VIRTIO_MSIX_QUEUE_VECTOR_INDEX; 554 if (psc->sc_ihs[idx] != NULL) 555 pci_intr_disestablish(psc->sc_pa.pa_pc, psc->sc_ihs[idx]); 556 557 return -1; 558 } 559 560 static int 561 virtio_pci_setup_intx_interrupt(struct virtio_softc *sc, 562 struct pci_attach_args *pa) 563 { 564 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 565 device_t self = sc->sc_dev; 566 pci_chipset_tag_t pc = pa->pa_pc; 567 char intrbuf[PCI_INTRSTR_LEN]; 568 char const *intrstr; 569 570 if (sc->sc_flags & VIRTIO_F_PCI_INTR_MPSAFE) 571 pci_intr_setattr(pc, &psc->sc_ihp[0], PCI_INTR_MPSAFE, true); 572 573 psc->sc_ihs[0] = pci_intr_establish_xname(pc, psc->sc_ihp[0], 574 sc->sc_ipl, virtio_pci_intr, sc, device_xname(sc->sc_dev)); 575 if (psc->sc_ihs[0] == NULL) { 576 aprint_error_dev(self, "couldn't establish INTx\n"); 577 return -1; 578 } 579 580 intrstr = pci_intr_string(pc, psc->sc_ihp[0], intrbuf, sizeof(intrbuf)); 581 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 582 583 return 0; 584 } 585 586 static int 587 virtio_pci_setup_interrupts(struct virtio_softc *sc) 588 { 589 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 590 device_t self = sc->sc_dev; 591 pci_chipset_tag_t pc = psc->sc_pa.pa_pc; 592 int error; 593 int nmsix; 594 int counts[PCI_INTR_TYPE_SIZE]; 595 pci_intr_type_t max_type; 596 597 nmsix = pci_msix_count(psc->sc_pa.pa_pc, psc->sc_pa.pa_tag); 598 aprint_debug_dev(self, "pci_msix_count=%d\n", nmsix); 599 600 /* We need at least two: one for config and the other for queues */ 601 if ((sc->sc_flags & VIRTIO_F_PCI_INTR_MSIX) == 0 || nmsix < 2) { 602 /* Try INTx only */ 603 max_type = PCI_INTR_TYPE_INTX; 604 counts[PCI_INTR_TYPE_INTX] = 1; 605 } else { 606 /* Try MSI-X first and INTx second */ 607 max_type = PCI_INTR_TYPE_MSIX; 608 counts[PCI_INTR_TYPE_MSIX] = 2; 609 counts[PCI_INTR_TYPE_MSI] = 0; 610 counts[PCI_INTR_TYPE_INTX] = 1; 611 } 612 613 retry: 614 error = pci_intr_alloc(&psc->sc_pa, &psc->sc_ihp, counts, max_type); 615 if (error != 0) { 616 aprint_error_dev(self, "couldn't map interrupt\n"); 617 return -1; 618 } 619 620 if (pci_intr_type(pc, psc->sc_ihp[0]) == PCI_INTR_TYPE_MSIX) { 621 psc->sc_ihs = kmem_alloc(sizeof(*psc->sc_ihs) * 2, 622 KM_SLEEP); 623 624 error = virtio_pci_setup_msix_interrupts(sc, &psc->sc_pa); 625 if (error != 0) { 626 kmem_free(psc->sc_ihs, sizeof(*psc->sc_ihs) * 2); 627 pci_intr_release(pc, psc->sc_ihp, 2); 628 629 /* Retry INTx */ 630 max_type = PCI_INTR_TYPE_INTX; 631 counts[PCI_INTR_TYPE_INTX] = 1; 632 goto retry; 633 } 634 635 psc->sc_ihs_num = 2; 636 psc->sc_config_offset = VIRTIO_CONFIG_DEVICE_CONFIG_MSI; 637 } else if (pci_intr_type(pc, psc->sc_ihp[0]) == PCI_INTR_TYPE_INTX) { 638 psc->sc_ihs = kmem_alloc(sizeof(*psc->sc_ihs) * 1, 639 KM_SLEEP); 640 641 error = virtio_pci_setup_intx_interrupt(sc, &psc->sc_pa); 642 if (error != 0) { 643 kmem_free(psc->sc_ihs, sizeof(*psc->sc_ihs) * 1); 644 pci_intr_release(pc, psc->sc_ihp, 1); 645 return -1; 646 } 647 648 psc->sc_ihs_num = 1; 649 psc->sc_config_offset = VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI; 650 } 651 652 return 0; 653 } 654 655 static void 656 virtio_pci_free_interrupts(struct virtio_softc *sc) 657 { 658 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 659 660 for (int i = 0; i < psc->sc_ihs_num; i++) { 661 if (psc->sc_ihs[i] == NULL) 662 continue; 663 pci_intr_disestablish(psc->sc_pa.pa_pc, psc->sc_ihs[i]); 664 psc->sc_ihs[i] = NULL; 665 } 666 667 if (psc->sc_ihs_num > 0) 668 pci_intr_release(psc->sc_pa.pa_pc, psc->sc_ihp, psc->sc_ihs_num); 669 670 if (psc->sc_ihs != NULL) { 671 kmem_free(psc->sc_ihs, sizeof(*psc->sc_ihs) * psc->sc_ihs_num); 672 psc->sc_ihs = NULL; 673 } 674 psc->sc_ihs_num = 0; 675 } 676 677 /* 678 * Interrupt handler. 679 */ 680 static int 681 virtio_pci_intr(void *arg) 682 { 683 struct virtio_softc *sc = arg; 684 struct virtio_pci_softc * const psc = (struct virtio_pci_softc *)sc; 685 int isr, r = 0; 686 687 /* check and ack the interrupt */ 688 isr = bus_space_read_stream_1(psc->sc_iot, psc->sc_ioh, 689 VIRTIO_CONFIG_ISR_STATUS); 690 if (isr == 0) 691 return 0; 692 if ((isr & VIRTIO_CONFIG_ISR_CONFIG_CHANGE) && 693 (sc->sc_config_change != NULL)) 694 r = (sc->sc_config_change)(sc); 695 if (sc->sc_intrhand != NULL) { 696 if (sc->sc_soft_ih != NULL) 697 softint_schedule(sc->sc_soft_ih); 698 else 699 r |= (sc->sc_intrhand)(sc); 700 } 701 702 return r; 703 } 704 705 static int 706 virtio_pci_msix_queue_intr(void *arg) 707 { 708 struct virtio_softc *sc = arg; 709 int r = 0; 710 711 if (sc->sc_intrhand != NULL) { 712 if (sc->sc_soft_ih != NULL) 713 softint_schedule(sc->sc_soft_ih); 714 else 715 r |= (sc->sc_intrhand)(sc); 716 } 717 718 return r; 719 } 720 721 static int 722 virtio_pci_msix_config_intr(void *arg) 723 { 724 struct virtio_softc *sc = arg; 725 int r = 0; 726 727 if (sc->sc_config_change != NULL) 728 r = (sc->sc_config_change)(sc); 729 return r; 730 } 731 732 MODULE(MODULE_CLASS_DRIVER, virtio_pci, "pci,virtio"); 733 734 #ifdef _MODULE 735 #include "ioconf.c" 736 #endif 737 738 static int 739 virtio_pci_modcmd(modcmd_t cmd, void *opaque) 740 { 741 int error = 0; 742 743 #ifdef _MODULE 744 switch (cmd) { 745 case MODULE_CMD_INIT: 746 error = config_init_component(cfdriver_ioconf_virtio_pci, 747 cfattach_ioconf_virtio_pci, cfdata_ioconf_virtio_pci); 748 break; 749 case MODULE_CMD_FINI: 750 error = config_fini_component(cfdriver_ioconf_virtio_pci, 751 cfattach_ioconf_virtio_pci, cfdata_ioconf_virtio_pci); 752 break; 753 default: 754 error = ENOTTY; 755 break; 756 } 757 #endif 758 759 return error; 760 } 761 762
Indexes created Tue Sep 30 20:09:53 GMT 2025