virtioreg.h revision 1.1.8.2 1 1.1.8.2 riz /* $NetBSD: virtioreg.h,v 1.1.8.2 2012/01/25 21:18:15 riz Exp $ */
2 1.1.8.2 riz
3 1.1.8.2 riz /*
4 1.1.8.2 riz * Copyright (c) 2010 Minoura Makoto.
5 1.1.8.2 riz * All rights reserved.
6 1.1.8.2 riz *
7 1.1.8.2 riz * Redistribution and use in source and binary forms, with or without
8 1.1.8.2 riz * modification, are permitted provided that the following conditions
9 1.1.8.2 riz * are met:
10 1.1.8.2 riz * 1. Redistributions of source code must retain the above copyright
11 1.1.8.2 riz * notice, this list of conditions and the following disclaimer.
12 1.1.8.2 riz * 2. Redistributions in binary form must reproduce the above copyright
13 1.1.8.2 riz * notice, this list of conditions and the following disclaimer in the
14 1.1.8.2 riz * documentation and/or other materials provided with the distribution.
15 1.1.8.2 riz *
16 1.1.8.2 riz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1.8.2 riz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1.8.2 riz * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1.8.2 riz * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1.8.2 riz * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 1.1.8.2 riz * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 1.1.8.2 riz * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 1.1.8.2 riz * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 1.1.8.2 riz * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 1.1.8.2 riz * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 1.1.8.2 riz */
27 1.1.8.2 riz
28 1.1.8.2 riz /*
29 1.1.8.2 riz * Part of the file derived from `Virtio PCI Card Specification v0.8.6 DRAFT'
30 1.1.8.2 riz * Appendix A.
31 1.1.8.2 riz */
32 1.1.8.2 riz /* An interface for efficient virtio implementation.
33 1.1.8.2 riz *
34 1.1.8.2 riz * This header is BSD licensed so anyone can use the definitions
35 1.1.8.2 riz * to implement compatible drivers/servers.
36 1.1.8.2 riz *
37 1.1.8.2 riz * Copyright 2007, 2009, IBM Corporation
38 1.1.8.2 riz * All rights reserved.
39 1.1.8.2 riz *
40 1.1.8.2 riz * Redistribution and use in source and binary forms, with or without
41 1.1.8.2 riz * modification, are permitted provided that the following conditions
42 1.1.8.2 riz * are met:
43 1.1.8.2 riz * 1. Redistributions of source code must retain the above copyright
44 1.1.8.2 riz * notice, this list of conditions and the following disclaimer.
45 1.1.8.2 riz * 2. Redistributions in binary form must reproduce the above copyright
46 1.1.8.2 riz * notice, this list of conditions and the following disclaimer in the
47 1.1.8.2 riz * documentation and/or other materials provided with the distribution.
48 1.1.8.2 riz * 3. Neither the name of IBM nor the names of its contributors
49 1.1.8.2 riz * may be used to endorse or promote products derived from this software
50 1.1.8.2 riz * without specific prior written permission.
51 1.1.8.2 riz * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND
52 1.1.8.2 riz * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
53 1.1.8.2 riz * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
54 1.1.8.2 riz * ARE DISCLAIMED. IN NO EVENT SHALL IBM OR CONTRIBUTORS BE LIABLE
55 1.1.8.2 riz * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
56 1.1.8.2 riz * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
57 1.1.8.2 riz * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
58 1.1.8.2 riz * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
59 1.1.8.2 riz * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
60 1.1.8.2 riz * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
61 1.1.8.2 riz * SUCH DAMAGE.
62 1.1.8.2 riz */
63 1.1.8.2 riz
64 1.1.8.2 riz
65 1.1.8.2 riz #ifndef _DEV_PCI_VIRTIOREG_H_
66 1.1.8.2 riz #define _DEV_PCI_VIRTIOREG_H_
67 1.1.8.2 riz
68 1.1.8.2 riz #include <sys/types.h>
69 1.1.8.2 riz
70 1.1.8.2 riz /* Virtio product id (subsystem) */
71 1.1.8.2 riz #define PCI_PRODUCT_VIRTIO_NETWORK 1
72 1.1.8.2 riz #define PCI_PRODUCT_VIRTIO_BLOCK 2
73 1.1.8.2 riz #define PCI_PRODUCT_VIRTIO_CONSOLE 3
74 1.1.8.2 riz #define PCI_PRODUCT_VIRTIO_ENTROPY 4
75 1.1.8.2 riz #define PCI_PRODUCT_VIRTIO_BALLOON 5
76 1.1.8.2 riz #define PCI_PRODUCT_VIRTIO_9P 9
77 1.1.8.2 riz
78 1.1.8.2 riz /* Virtio header */
79 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_FEATURES 0 /* 32bit */
80 1.1.8.2 riz #define VIRTIO_CONFIG_GUEST_FEATURES 4 /* 32bit */
81 1.1.8.2 riz #define VIRTIO_F_NOTIFY_ON_EMPTY (1<<24)
82 1.1.8.2 riz #define VIRTIO_F_RING_INDIRECT_DESC (1<<28)
83 1.1.8.2 riz #define VIRTIO_F_BAD_FEATURE (1<<30)
84 1.1.8.2 riz #define VIRTIO_CONFIG_QUEUE_ADDRESS 8 /* 32bit */
85 1.1.8.2 riz #define VIRTIO_CONFIG_QUEUE_SIZE 12 /* 16bit */
86 1.1.8.2 riz #define VIRTIO_CONFIG_QUEUE_SELECT 14 /* 16bit */
87 1.1.8.2 riz #define VIRTIO_CONFIG_QUEUE_NOTIFY 16 /* 16bit */
88 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_STATUS 18 /* 8bit */
89 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_STATUS_RESET 0
90 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_STATUS_ACK 1
91 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_STATUS_DRIVER 2
92 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_STATUS_DRIVER_OK 4
93 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_STATUS_FAILED 128
94 1.1.8.2 riz #define VIRTIO_CONFIG_ISR_STATUS 19 /* 8bit */
95 1.1.8.2 riz #define VIRTIO_CONFIG_ISR_CONFIG_CHANGE 2
96 1.1.8.2 riz #define VIRTIO_CONFIG_CONFIG_VECTOR 20 /* 16bit, optional */
97 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_CONFIG_NOMSI 20
98 1.1.8.2 riz #define VIRTIO_CONFIG_DEVICE_CONFIG_MSI 22
99 1.1.8.2 riz
100 1.1.8.2 riz /* Virtqueue */
101 1.1.8.2 riz /* This marks a buffer as continuing via the next field. */
102 1.1.8.2 riz #define VRING_DESC_F_NEXT 1
103 1.1.8.2 riz /* This marks a buffer as write-only (otherwise read-only). */
104 1.1.8.2 riz #define VRING_DESC_F_WRITE 2
105 1.1.8.2 riz /* This means the buffer contains a list of buffer descriptors. */
106 1.1.8.2 riz #define VRING_DESC_F_INDIRECT 4
107 1.1.8.2 riz
108 1.1.8.2 riz /* The Host uses this in used->flags to advise the Guest: don't kick me
109 1.1.8.2 riz * when you add a buffer. It's unreliable, so it's simply an
110 1.1.8.2 riz * optimization. Guest will still kick if it's out of buffers. */
111 1.1.8.2 riz #define VRING_USED_F_NO_NOTIFY 1
112 1.1.8.2 riz /* The Guest uses this in avail->flags to advise the Host: don't
113 1.1.8.2 riz * interrupt me when you consume a buffer. It's unreliable, so it's
114 1.1.8.2 riz * simply an optimization. */
115 1.1.8.2 riz #define VRING_AVAIL_F_NO_INTERRUPT 1
116 1.1.8.2 riz
117 1.1.8.2 riz /* Virtio ring descriptors: 16 bytes.
118 1.1.8.2 riz * These can chain together via "next". */
119 1.1.8.2 riz struct vring_desc {
120 1.1.8.2 riz /* Address (guest-physical). */
121 1.1.8.2 riz uint64_t addr;
122 1.1.8.2 riz /* Length. */
123 1.1.8.2 riz uint32_t len;
124 1.1.8.2 riz /* The flags as indicated above. */
125 1.1.8.2 riz uint16_t flags;
126 1.1.8.2 riz /* We chain unused descriptors via this, too */
127 1.1.8.2 riz uint16_t next;
128 1.1.8.2 riz } __packed;
129 1.1.8.2 riz
130 1.1.8.2 riz struct vring_avail {
131 1.1.8.2 riz uint16_t flags;
132 1.1.8.2 riz uint16_t idx;
133 1.1.8.2 riz uint16_t ring[0];
134 1.1.8.2 riz } __packed;
135 1.1.8.2 riz
136 1.1.8.2 riz /* u32 is used here for ids for padding reasons. */
137 1.1.8.2 riz struct vring_used_elem {
138 1.1.8.2 riz /* Index of start of used descriptor chain. */
139 1.1.8.2 riz uint32_t id;
140 1.1.8.2 riz /* Total length of the descriptor chain which was written to. */
141 1.1.8.2 riz uint32_t len;
142 1.1.8.2 riz } __packed;
143 1.1.8.2 riz
144 1.1.8.2 riz struct vring_used {
145 1.1.8.2 riz uint16_t flags;
146 1.1.8.2 riz uint16_t idx;
147 1.1.8.2 riz struct vring_used_elem ring[0];
148 1.1.8.2 riz } __packed;
149 1.1.8.2 riz
150 1.1.8.2 riz #define VIRTIO_PAGE_SIZE (4096)
151 1.1.8.2 riz
152 1.1.8.2 riz #endif /* _DEV_PCI_VIRTIOREG_H_ */
153