yds.c revision 1.3.2.8
1 1.3.2.8 nathanw /* $NetBSD: yds.c,v 1.3.2.8 2002/01/11 23:39:28 nathanw Exp $ */ 2 1.3.2.2 nathanw 3 1.3.2.2 nathanw /* 4 1.3.2.2 nathanw * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto. 5 1.3.2.2 nathanw * All rights reserved. 6 1.3.2.2 nathanw * 7 1.3.2.2 nathanw * Redistribution and use in source and binary forms, with or without 8 1.3.2.2 nathanw * modification, are permitted provided that the following conditions 9 1.3.2.2 nathanw * are met: 10 1.3.2.2 nathanw * 1. Redistributions of source code must retain the above copyright 11 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer. 12 1.3.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 13 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer in the 14 1.3.2.2 nathanw * documentation and/or other materials provided with the distribution. 15 1.3.2.2 nathanw * 16 1.3.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.3.2.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.3.2.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.3.2.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.3.2.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 1.3.2.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 1.3.2.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 1.3.2.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 1.3.2.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 1.3.2.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.3.2.2 nathanw */ 27 1.3.2.2 nathanw 28 1.3.2.2 nathanw /* 29 1.3.2.2 nathanw * Yamaha YMF724[B-F]/740[B-C]/744/754 30 1.3.2.2 nathanw * 31 1.3.2.2 nathanw * Documentation links: 32 1.3.2.2 nathanw * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/ 33 1.3.2.2 nathanw * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/pci/ 34 1.3.2.2 nathanw * 35 1.3.2.2 nathanw * TODO: 36 1.3.2.2 nathanw * - FM synth volume (difficult: mixed before ac97) 37 1.3.2.2 nathanw * - Digital in/out (SPDIF) support 38 1.3.2.2 nathanw * - Effect?? 39 1.3.2.2 nathanw */ 40 1.3.2.2 nathanw 41 1.3.2.6 nathanw #include <sys/cdefs.h> 42 1.3.2.8 nathanw __KERNEL_RCSID(0, "$NetBSD: yds.c,v 1.3.2.8 2002/01/11 23:39:28 nathanw Exp $"); 43 1.3.2.6 nathanw 44 1.3.2.2 nathanw #include "mpu.h" 45 1.3.2.2 nathanw 46 1.3.2.2 nathanw #include <sys/param.h> 47 1.3.2.2 nathanw #include <sys/systm.h> 48 1.3.2.2 nathanw #include <sys/kernel.h> 49 1.3.2.2 nathanw #include <sys/fcntl.h> 50 1.3.2.2 nathanw #include <sys/malloc.h> 51 1.3.2.2 nathanw #include <sys/device.h> 52 1.3.2.2 nathanw #include <sys/proc.h> 53 1.3.2.2 nathanw 54 1.3.2.2 nathanw #include <dev/pci/pcidevs.h> 55 1.3.2.2 nathanw #include <dev/pci/pcireg.h> 56 1.3.2.2 nathanw #include <dev/pci/pcivar.h> 57 1.3.2.2 nathanw 58 1.3.2.2 nathanw #include <sys/audioio.h> 59 1.3.2.2 nathanw #include <dev/audio_if.h> 60 1.3.2.2 nathanw #include <dev/mulaw.h> 61 1.3.2.2 nathanw #include <dev/auconv.h> 62 1.3.2.2 nathanw #include <dev/ic/ac97reg.h> 63 1.3.2.2 nathanw #include <dev/ic/ac97var.h> 64 1.3.2.2 nathanw #include <dev/ic/mpuvar.h> 65 1.3.2.2 nathanw 66 1.3.2.2 nathanw #include <machine/bus.h> 67 1.3.2.2 nathanw #include <machine/intr.h> 68 1.3.2.2 nathanw 69 1.3.2.2 nathanw #include <dev/microcode/yds/yds_hwmcode.h> 70 1.3.2.2 nathanw #include <dev/pci/ydsreg.h> 71 1.3.2.2 nathanw #include <dev/pci/ydsvar.h> 72 1.3.2.2 nathanw 73 1.3.2.2 nathanw /* Debug */ 74 1.3.2.2 nathanw #undef YDS_USE_REC_SLOT 75 1.3.2.2 nathanw #define YDS_USE_P44 76 1.3.2.2 nathanw 77 1.3.2.2 nathanw #ifdef AUDIO_DEBUG 78 1.3.2.2 nathanw # define DPRINTF(x) if (ydsdebug) printf x 79 1.3.2.2 nathanw # define DPRINTFN(n,x) if (ydsdebug>(n)) printf x 80 1.3.2.2 nathanw int ydsdebug = 0; 81 1.3.2.2 nathanw #else 82 1.3.2.2 nathanw # define DPRINTF(x) 83 1.3.2.2 nathanw # define DPRINTFN(n,x) 84 1.3.2.2 nathanw #endif 85 1.3.2.2 nathanw #ifdef YDS_USE_REC_SLOT 86 1.3.2.2 nathanw # define YDS_INPUT_SLOT 0 /* REC slot = ADC + loopbacks */ 87 1.3.2.2 nathanw #else 88 1.3.2.2 nathanw # define YDS_INPUT_SLOT 1 /* ADC slot */ 89 1.3.2.2 nathanw #endif 90 1.3.2.2 nathanw 91 1.3.2.2 nathanw int yds_match __P((struct device *, struct cfdata *, void *)); 92 1.3.2.2 nathanw void yds_attach __P((struct device *, struct device *, void *)); 93 1.3.2.2 nathanw int yds_intr __P((void *)); 94 1.3.2.2 nathanw 95 1.3.2.2 nathanw #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 96 1.3.2.2 nathanw #define KERNADDR(p) ((void *)((p)->addr)) 97 1.3.2.2 nathanw 98 1.3.2.2 nathanw int yds_allocmem __P((struct yds_softc *, size_t, size_t, 99 1.3.2.2 nathanw struct yds_dma *)); 100 1.3.2.2 nathanw int yds_freemem __P((struct yds_softc *, struct yds_dma *)); 101 1.3.2.2 nathanw 102 1.3.2.2 nathanw #ifndef AUDIO_DEBUG 103 1.3.2.2 nathanw #define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x)) 104 1.3.2.2 nathanw #define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x)) 105 1.3.2.2 nathanw #define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x)) 106 1.3.2.2 nathanw #define YREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r)) 107 1.3.2.2 nathanw #define YREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r)) 108 1.3.2.2 nathanw #define YREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r)) 109 1.3.2.2 nathanw #else 110 1.3.2.2 nathanw 111 1.3.2.2 nathanw u_int16_t YREAD2(struct yds_softc *sc,bus_size_t r); 112 1.3.2.2 nathanw u_int32_t YREAD4(struct yds_softc *sc,bus_size_t r); 113 1.3.2.2 nathanw void YWRITE1(struct yds_softc *sc,bus_size_t r,u_int8_t x); 114 1.3.2.2 nathanw void YWRITE2(struct yds_softc *sc,bus_size_t r,u_int16_t x); 115 1.3.2.2 nathanw void YWRITE4(struct yds_softc *sc,bus_size_t r,u_int32_t x); 116 1.3.2.2 nathanw 117 1.3.2.2 nathanw u_int16_t YREAD2(struct yds_softc *sc,bus_size_t r) 118 1.3.2.2 nathanw { 119 1.3.2.2 nathanw DPRINTFN(5, (" YREAD2(0x%lX)\n",(unsigned long)r)); 120 1.3.2.2 nathanw return bus_space_read_2(sc->memt,sc->memh,r); 121 1.3.2.2 nathanw } 122 1.3.2.2 nathanw u_int32_t YREAD4(struct yds_softc *sc,bus_size_t r) 123 1.3.2.2 nathanw { 124 1.3.2.2 nathanw DPRINTFN(5, (" YREAD4(0x%lX)\n",(unsigned long)r)); 125 1.3.2.2 nathanw return bus_space_read_4(sc->memt,sc->memh,r); 126 1.3.2.2 nathanw } 127 1.3.2.2 nathanw void YWRITE1(struct yds_softc *sc,bus_size_t r,u_int8_t x) 128 1.3.2.2 nathanw { 129 1.3.2.2 nathanw DPRINTFN(5, (" YWRITE1(0x%lX,0x%lX)\n",(unsigned long)r,(unsigned long)x)); 130 1.3.2.2 nathanw bus_space_write_1(sc->memt,sc->memh,r,x); 131 1.3.2.2 nathanw } 132 1.3.2.2 nathanw void YWRITE2(struct yds_softc *sc,bus_size_t r,u_int16_t x) 133 1.3.2.2 nathanw { 134 1.3.2.2 nathanw DPRINTFN(5, (" YWRITE2(0x%lX,0x%lX)\n",(unsigned long)r,(unsigned long)x)); 135 1.3.2.2 nathanw bus_space_write_2(sc->memt,sc->memh,r,x); 136 1.3.2.2 nathanw } 137 1.3.2.2 nathanw void YWRITE4(struct yds_softc *sc,bus_size_t r,u_int32_t x) 138 1.3.2.2 nathanw { 139 1.3.2.2 nathanw DPRINTFN(5, (" YWRITE4(0x%lX,0x%lX)\n",(unsigned long)r,(unsigned long)x)); 140 1.3.2.2 nathanw bus_space_write_4(sc->memt,sc->memh,r,x); 141 1.3.2.2 nathanw } 142 1.3.2.2 nathanw #endif 143 1.3.2.2 nathanw 144 1.3.2.2 nathanw #define YWRITEREGION4(sc, r, x, c) \ 145 1.3.2.2 nathanw bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4) 146 1.3.2.2 nathanw 147 1.3.2.2 nathanw struct cfattach yds_ca = { 148 1.3.2.2 nathanw sizeof(struct yds_softc), yds_match, yds_attach 149 1.3.2.2 nathanw }; 150 1.3.2.2 nathanw 151 1.3.2.2 nathanw int yds_open __P((void *, int)); 152 1.3.2.2 nathanw void yds_close __P((void *)); 153 1.3.2.2 nathanw int yds_query_encoding __P((void *, struct audio_encoding *)); 154 1.3.2.2 nathanw int yds_set_params __P((void *, int, int, 155 1.3.2.2 nathanw struct audio_params *, struct audio_params *)); 156 1.3.2.2 nathanw int yds_round_blocksize __P((void *, int)); 157 1.3.2.2 nathanw int yds_trigger_output __P((void *, void *, void *, int, void (*)(void *), 158 1.3.2.2 nathanw void *, struct audio_params *)); 159 1.3.2.2 nathanw int yds_trigger_input __P((void *, void *, void *, int, void (*)(void *), 160 1.3.2.2 nathanw void *, struct audio_params *)); 161 1.3.2.2 nathanw int yds_halt_output __P((void *)); 162 1.3.2.2 nathanw int yds_halt_input __P((void *)); 163 1.3.2.2 nathanw int yds_getdev __P((void *, struct audio_device *)); 164 1.3.2.2 nathanw int yds_mixer_set_port __P((void *, mixer_ctrl_t *)); 165 1.3.2.2 nathanw int yds_mixer_get_port __P((void *, mixer_ctrl_t *)); 166 1.3.2.2 nathanw void *yds_malloc __P((void *, int, size_t, int, int)); 167 1.3.2.2 nathanw void yds_free __P((void *, void *, int)); 168 1.3.2.2 nathanw size_t yds_round_buffersize __P((void *, int, size_t)); 169 1.3.2.2 nathanw paddr_t yds_mappage __P((void *, void *, off_t, int)); 170 1.3.2.2 nathanw int yds_get_props __P((void *)); 171 1.3.2.2 nathanw int yds_query_devinfo __P((void *addr, mixer_devinfo_t *dip)); 172 1.3.2.2 nathanw 173 1.3.2.2 nathanw int yds_attach_codec __P((void *sc, struct ac97_codec_if *)); 174 1.3.2.2 nathanw int yds_read_codec __P((void *sc, u_int8_t a, u_int16_t *d)); 175 1.3.2.2 nathanw int yds_write_codec __P((void *sc, u_int8_t a, u_int16_t d)); 176 1.3.2.2 nathanw void yds_reset_codec __P((void *sc)); 177 1.3.2.2 nathanw int yds_get_portnum_by_name __P((struct yds_softc *, char *, char *, 178 1.3.2.2 nathanw char *)); 179 1.3.2.2 nathanw 180 1.3.2.2 nathanw static u_int yds_get_dstype __P((int)); 181 1.3.2.2 nathanw static int yds_download_mcode __P((struct yds_softc *)); 182 1.3.2.2 nathanw static int yds_allocate_slots __P((struct yds_softc *)); 183 1.3.2.2 nathanw static void yds_configure_legacy __P((struct device *arg)); 184 1.3.2.2 nathanw static void yds_enable_dsp __P((struct yds_softc *)); 185 1.3.2.2 nathanw static int yds_disable_dsp __P((struct yds_softc *)); 186 1.3.2.2 nathanw static int yds_ready_codec __P((struct yds_codec_softc *)); 187 1.3.2.2 nathanw static int yds_halt __P((struct yds_softc *)); 188 1.3.2.2 nathanw static u_int32_t yds_get_lpfq __P((u_int)); 189 1.3.2.2 nathanw static u_int32_t yds_get_lpfk __P((u_int)); 190 1.3.2.2 nathanw static struct yds_dma *yds_find_dma __P((struct yds_softc *, void *)); 191 1.3.2.2 nathanw 192 1.3.2.7 nathanw static int yds_init __P((struct yds_softc *)); 193 1.3.2.7 nathanw static void yds_powerhook __P((int, void *)); 194 1.3.2.7 nathanw 195 1.3.2.2 nathanw #ifdef AUDIO_DEBUG 196 1.3.2.2 nathanw static void yds_dump_play_slot __P((struct yds_softc *, int)); 197 1.3.2.2 nathanw #define YDS_DUMP_PLAY_SLOT(n,sc,bank) \ 198 1.3.2.2 nathanw if (ydsdebug > (n)) yds_dump_play_slot(sc, bank) 199 1.3.2.2 nathanw #else 200 1.3.2.2 nathanw #define YDS_DUMP_PLAY_SLOT(n,sc,bank) 201 1.3.2.2 nathanw #endif /* AUDIO_DEBUG */ 202 1.3.2.2 nathanw 203 1.3.2.2 nathanw static struct audio_hw_if yds_hw_if = { 204 1.3.2.2 nathanw yds_open, 205 1.3.2.2 nathanw yds_close, 206 1.3.2.2 nathanw NULL, 207 1.3.2.2 nathanw yds_query_encoding, 208 1.3.2.2 nathanw yds_set_params, 209 1.3.2.2 nathanw yds_round_blocksize, 210 1.3.2.2 nathanw NULL, 211 1.3.2.2 nathanw NULL, 212 1.3.2.2 nathanw NULL, 213 1.3.2.2 nathanw NULL, 214 1.3.2.2 nathanw NULL, 215 1.3.2.2 nathanw yds_halt_output, 216 1.3.2.2 nathanw yds_halt_input, 217 1.3.2.2 nathanw NULL, 218 1.3.2.2 nathanw yds_getdev, 219 1.3.2.2 nathanw NULL, 220 1.3.2.2 nathanw yds_mixer_set_port, 221 1.3.2.2 nathanw yds_mixer_get_port, 222 1.3.2.2 nathanw yds_query_devinfo, 223 1.3.2.2 nathanw yds_malloc, 224 1.3.2.2 nathanw yds_free, 225 1.3.2.2 nathanw yds_round_buffersize, 226 1.3.2.2 nathanw yds_mappage, 227 1.3.2.2 nathanw yds_get_props, 228 1.3.2.2 nathanw yds_trigger_output, 229 1.3.2.2 nathanw yds_trigger_input, 230 1.3.2.5 nathanw NULL, 231 1.3.2.2 nathanw }; 232 1.3.2.2 nathanw 233 1.3.2.2 nathanw struct audio_device yds_device = { 234 1.3.2.2 nathanw "Yamaha DS-1", 235 1.3.2.2 nathanw "", 236 1.3.2.2 nathanw "yds" 237 1.3.2.2 nathanw }; 238 1.3.2.2 nathanw 239 1.3.2.2 nathanw const static struct { 240 1.3.2.2 nathanw u_int id; 241 1.3.2.2 nathanw u_int flags; 242 1.3.2.2 nathanw #define YDS_CAP_MCODE_1 0x0001 243 1.3.2.2 nathanw #define YDS_CAP_MCODE_1E 0x0002 244 1.3.2.2 nathanw #define YDS_CAP_LEGACY_SELECTABLE 0x0004 245 1.3.2.2 nathanw #define YDS_CAP_LEGACY_FLEXIBLE 0x0008 246 1.3.2.2 nathanw #define YDS_CAP_HAS_P44 0x0010 247 1.3.2.2 nathanw } yds_chip_capabliity_list[] = { 248 1.3.2.2 nathanw { PCI_PRODUCT_YAMAHA_YMF724, 249 1.3.2.2 nathanw YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE }, 250 1.3.2.2 nathanw /* 740[C] has only 32 slots. But anyway we use only 2 */ 251 1.3.2.2 nathanw { PCI_PRODUCT_YAMAHA_YMF740, 252 1.3.2.2 nathanw YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE }, /* XXX NOT TESTED */ 253 1.3.2.2 nathanw { PCI_PRODUCT_YAMAHA_YMF740C, 254 1.3.2.2 nathanw YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE }, 255 1.3.2.2 nathanw { PCI_PRODUCT_YAMAHA_YMF724F, 256 1.3.2.2 nathanw YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE }, 257 1.3.2.2 nathanw { PCI_PRODUCT_YAMAHA_YMF744B, 258 1.3.2.2 nathanw YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE }, 259 1.3.2.2 nathanw { PCI_PRODUCT_YAMAHA_YMF754, 260 1.3.2.2 nathanw YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE|YDS_CAP_HAS_P44 }, 261 1.3.2.2 nathanw { 0, 0 } 262 1.3.2.2 nathanw }; 263 1.3.2.2 nathanw #ifdef AUDIO_DEBUG 264 1.3.2.2 nathanw #define YDS_CAP_BITS "\020\005P44\004LEGFLEX\003LEGSEL\002MCODE1E\001MCODE1" 265 1.3.2.2 nathanw #endif 266 1.3.2.2 nathanw 267 1.3.2.2 nathanw #ifdef AUDIO_DEBUG 268 1.3.2.2 nathanw static void 269 1.3.2.2 nathanw yds_dump_play_slot(sc, bank) 270 1.3.2.2 nathanw struct yds_softc *sc; 271 1.3.2.2 nathanw int bank; 272 1.3.2.2 nathanw { 273 1.3.2.2 nathanw int i, j; 274 1.3.2.2 nathanw u_int32_t *p; 275 1.3.2.2 nathanw u_int32_t num; 276 1.3.2.2 nathanw char *pa; 277 1.3.2.2 nathanw 278 1.3.2.2 nathanw for (i = 0; i < N_PLAY_SLOTS; i++) { 279 1.3.2.2 nathanw printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]); 280 1.3.2.2 nathanw printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]); 281 1.3.2.2 nathanw } 282 1.3.2.2 nathanw 283 1.3.2.2 nathanw pa = (char *)DMAADDR(&sc->sc_ctrldata) + sc->pbankoff; 284 1.3.2.2 nathanw p = (u_int32_t *)sc->ptbl; 285 1.3.2.2 nathanw printf("ptbl + 0: %d\n", *p++); 286 1.3.2.2 nathanw for (i = 0; i < N_PLAY_SLOTS; i++) { 287 1.3.2.2 nathanw printf("ptbl + %d: 0x%x, should be %p\n", 288 1.3.2.2 nathanw i+1, *p, 289 1.3.2.2 nathanw pa + i * sizeof(struct play_slot_ctrl_bank) * 290 1.3.2.2 nathanw N_PLAY_SLOT_CTRL_BANK); 291 1.3.2.2 nathanw p++; 292 1.3.2.2 nathanw } 293 1.3.2.2 nathanw 294 1.3.2.2 nathanw num = *(u_int32_t*)sc->ptbl; 295 1.3.2.2 nathanw printf("numofplay = %d\n", num); 296 1.3.2.2 nathanw 297 1.3.2.2 nathanw for (i = 0; i < num; i++) { 298 1.3.2.2 nathanw p = (u_int32_t *)sc->pbankp[i*2]; 299 1.3.2.2 nathanw 300 1.3.2.2 nathanw printf(" pbankp[%d], bank 0 : %p\n", i*2, p); 301 1.3.2.2 nathanw for (j = 0; 302 1.3.2.2 nathanw j < sizeof(struct play_slot_ctrl_bank) / sizeof(u_int32_t); 303 1.3.2.2 nathanw j++) { 304 1.3.2.2 nathanw printf(" 0x%02x: 0x%08x\n", 305 1.3.2.2 nathanw (unsigned)(j * sizeof(u_int32_t)), 306 1.3.2.2 nathanw (unsigned)*p++); 307 1.3.2.2 nathanw } 308 1.3.2.2 nathanw 309 1.3.2.2 nathanw p = (u_int32_t *)sc->pbankp[i*2 + 1]; 310 1.3.2.2 nathanw printf(" pbankp[%d], bank 1 : %p\n", i*2 + 1, p); 311 1.3.2.2 nathanw for (j = 0; 312 1.3.2.2 nathanw j < sizeof(struct play_slot_ctrl_bank) / sizeof(u_int32_t); 313 1.3.2.2 nathanw j++) { 314 1.3.2.2 nathanw printf(" 0x%02x: 0x%08x\n", 315 1.3.2.2 nathanw (unsigned)(j * sizeof(u_int32_t)), 316 1.3.2.2 nathanw (unsigned)*p++); 317 1.3.2.2 nathanw } 318 1.3.2.2 nathanw } 319 1.3.2.2 nathanw } 320 1.3.2.2 nathanw #endif /* AUDIO_DEBUG */ 321 1.3.2.2 nathanw 322 1.3.2.2 nathanw static u_int 323 1.3.2.2 nathanw yds_get_dstype(id) 324 1.3.2.2 nathanw int id; 325 1.3.2.2 nathanw { 326 1.3.2.2 nathanw int i; 327 1.3.2.2 nathanw 328 1.3.2.2 nathanw for (i = 0; yds_chip_capabliity_list[i].id; i++) { 329 1.3.2.2 nathanw if (PCI_PRODUCT(id) == yds_chip_capabliity_list[i].id) 330 1.3.2.2 nathanw return yds_chip_capabliity_list[i].flags; 331 1.3.2.2 nathanw } 332 1.3.2.2 nathanw 333 1.3.2.2 nathanw return -1; 334 1.3.2.2 nathanw } 335 1.3.2.2 nathanw 336 1.3.2.2 nathanw static int 337 1.3.2.2 nathanw yds_download_mcode(sc) 338 1.3.2.2 nathanw struct yds_softc *sc; 339 1.3.2.2 nathanw { 340 1.3.2.2 nathanw u_int ctrl; 341 1.3.2.2 nathanw const u_int32_t *p; 342 1.3.2.2 nathanw size_t size; 343 1.3.2.2 nathanw int dstype; 344 1.3.2.2 nathanw 345 1.3.2.2 nathanw static struct { 346 1.3.2.2 nathanw const u_int32_t *mcode; 347 1.3.2.2 nathanw size_t size; 348 1.3.2.2 nathanw } ctrls[] = { 349 1.3.2.2 nathanw {yds_ds1_ctrl_mcode, sizeof(yds_ds1_ctrl_mcode)}, 350 1.3.2.2 nathanw {yds_ds1e_ctrl_mcode, sizeof(yds_ds1e_ctrl_mcode)}, 351 1.3.2.2 nathanw }; 352 1.3.2.2 nathanw 353 1.3.2.2 nathanw if (sc->sc_flags & YDS_CAP_MCODE_1) 354 1.3.2.2 nathanw dstype = YDS_DS_1; 355 1.3.2.2 nathanw else if (sc->sc_flags & YDS_CAP_MCODE_1E) 356 1.3.2.2 nathanw dstype = YDS_DS_1E; 357 1.3.2.2 nathanw else 358 1.3.2.2 nathanw return 1; /* unknown */ 359 1.3.2.2 nathanw 360 1.3.2.2 nathanw if (yds_disable_dsp(sc)) 361 1.3.2.2 nathanw return 1; 362 1.3.2.2 nathanw 363 1.3.2.2 nathanw /* Software reset */ 364 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, YDS_MODE_RESET); 365 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, 0); 366 1.3.2.2 nathanw 367 1.3.2.2 nathanw YWRITE4(sc, YDS_MAPOF_REC, 0); 368 1.3.2.2 nathanw YWRITE4(sc, YDS_MAPOF_EFFECT, 0); 369 1.3.2.2 nathanw YWRITE4(sc, YDS_PLAY_CTRLBASE, 0); 370 1.3.2.2 nathanw YWRITE4(sc, YDS_REC_CTRLBASE, 0); 371 1.3.2.2 nathanw YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0); 372 1.3.2.2 nathanw YWRITE4(sc, YDS_WORK_BASE, 0); 373 1.3.2.2 nathanw 374 1.3.2.2 nathanw ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL); 375 1.3.2.2 nathanw YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007); 376 1.3.2.2 nathanw 377 1.3.2.2 nathanw /* Download DSP microcode. */ 378 1.3.2.2 nathanw p = yds_dsp_mcode; 379 1.3.2.2 nathanw size = sizeof(yds_dsp_mcode); 380 1.3.2.2 nathanw YWRITEREGION4(sc, YDS_DSP_INSTRAM, p, size); 381 1.3.2.2 nathanw 382 1.3.2.2 nathanw /* Download CONTROL microcode. */ 383 1.3.2.2 nathanw p = ctrls[dstype].mcode; 384 1.3.2.2 nathanw size = ctrls[dstype].size; 385 1.3.2.2 nathanw YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size); 386 1.3.2.2 nathanw 387 1.3.2.2 nathanw yds_enable_dsp(sc); 388 1.3.2.2 nathanw delay(10 * 1000); /* nessesary on my 724F (??) */ 389 1.3.2.2 nathanw 390 1.3.2.2 nathanw return 0; 391 1.3.2.2 nathanw } 392 1.3.2.2 nathanw 393 1.3.2.2 nathanw static int 394 1.3.2.2 nathanw yds_allocate_slots(sc) 395 1.3.2.2 nathanw struct yds_softc *sc; 396 1.3.2.2 nathanw { 397 1.3.2.2 nathanw size_t pcs, rcs, ecs, ws, memsize; 398 1.3.2.2 nathanw void *mp; 399 1.3.2.2 nathanw u_int32_t da; /* DMA address */ 400 1.3.2.2 nathanw char *va; /* KVA */ 401 1.3.2.2 nathanw off_t cb; 402 1.3.2.2 nathanw int i; 403 1.3.2.2 nathanw struct yds_dma *p; 404 1.3.2.2 nathanw 405 1.3.2.2 nathanw /* Alloc DSP Control Data */ 406 1.3.2.2 nathanw pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(u_int32_t); 407 1.3.2.2 nathanw rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(u_int32_t); 408 1.3.2.2 nathanw ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(u_int32_t); 409 1.3.2.2 nathanw ws = WORK_SIZE; 410 1.3.2.2 nathanw YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(u_int32_t)); 411 1.3.2.2 nathanw 412 1.3.2.2 nathanw DPRINTF(("play control size : %d\n", (unsigned int)pcs)); 413 1.3.2.2 nathanw DPRINTF(("rec control size : %d\n", (unsigned int)rcs)); 414 1.3.2.2 nathanw DPRINTF(("eff control size : %d\n", (unsigned int)ecs)); 415 1.3.2.2 nathanw DPRINTF(("work size : %d\n", (unsigned int)ws)); 416 1.3.2.2 nathanw #ifdef DIAGNOSTIC 417 1.3.2.2 nathanw if (pcs != sizeof(struct play_slot_ctrl_bank)) { 418 1.3.2.2 nathanw printf("%s: invalid play slot ctrldata %d != %d\n", 419 1.3.2.2 nathanw sc->sc_dev.dv_xname, (unsigned int)pcs, 420 1.3.2.2 nathanw (unsigned int)sizeof(struct play_slot_ctrl_bank)); 421 1.3.2.2 nathanw if (rcs != sizeof(struct rec_slot_ctrl_bank)) 422 1.3.2.2 nathanw printf("%s: invalid rec slot ctrldata %d != %d\n", 423 1.3.2.2 nathanw sc->sc_dev.dv_xname, (unsigned int)rcs, 424 1.3.2.2 nathanw (unsigned int)sizeof(struct rec_slot_ctrl_bank)); 425 1.3.2.2 nathanw } 426 1.3.2.2 nathanw #endif 427 1.3.2.2 nathanw 428 1.3.2.2 nathanw memsize = N_PLAY_SLOTS*N_PLAY_SLOT_CTRL_BANK*pcs + 429 1.3.2.2 nathanw N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK*rcs + ws; 430 1.3.2.2 nathanw memsize += (N_PLAY_SLOTS+1)*sizeof(u_int32_t); 431 1.3.2.2 nathanw 432 1.3.2.2 nathanw p = &sc->sc_ctrldata; 433 1.3.2.7 nathanw if (KERNADDR(p) == NULL) { 434 1.3.2.7 nathanw i = yds_allocmem(sc, memsize, 16, p); 435 1.3.2.7 nathanw if (i) { 436 1.3.2.7 nathanw printf("%s: couldn't alloc/map DSP DMA buffer, reason %d\n", 437 1.3.2.7 nathanw sc->sc_dev.dv_xname, i); 438 1.3.2.7 nathanw free(p, M_DEVBUF); 439 1.3.2.7 nathanw return 1; 440 1.3.2.7 nathanw } 441 1.3.2.2 nathanw } 442 1.3.2.2 nathanw mp = KERNADDR(p); 443 1.3.2.2 nathanw da = DMAADDR(p); 444 1.3.2.2 nathanw 445 1.3.2.2 nathanw DPRINTF(("mp:%p, DMA addr:%p\n", 446 1.3.2.2 nathanw mp, (void *)sc->sc_ctrldata.map->dm_segs[0].ds_addr)); 447 1.3.2.2 nathanw 448 1.3.2.4 nathanw memset(mp, 0, memsize); 449 1.3.2.2 nathanw 450 1.3.2.2 nathanw /* Work space */ 451 1.3.2.2 nathanw cb = 0; 452 1.3.2.2 nathanw va = (u_int8_t *)mp; 453 1.3.2.2 nathanw YWRITE4(sc, YDS_WORK_BASE, da + cb); 454 1.3.2.2 nathanw cb += ws; 455 1.3.2.2 nathanw 456 1.3.2.2 nathanw /* Play control data table */ 457 1.3.2.2 nathanw sc->ptbl = (u_int32_t *)(va + cb); 458 1.3.2.2 nathanw sc->ptbloff = cb; 459 1.3.2.2 nathanw YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb); 460 1.3.2.2 nathanw cb += (N_PLAY_SLOT_CTRL + 1) * sizeof(u_int32_t); 461 1.3.2.2 nathanw 462 1.3.2.2 nathanw /* Record slot control data */ 463 1.3.2.2 nathanw sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb); 464 1.3.2.2 nathanw YWRITE4(sc, YDS_REC_CTRLBASE, da + cb); 465 1.3.2.2 nathanw sc->rbankoff = cb; 466 1.3.2.2 nathanw cb += N_REC_SLOT_CTRL * N_REC_SLOT_CTRL_BANK * rcs; 467 1.3.2.2 nathanw 468 1.3.2.2 nathanw #if 0 469 1.3.2.2 nathanw /* Effect slot control data -- unused */ 470 1.3.2.2 nathanw YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb); 471 1.3.2.2 nathanw cb += N_EFFECT_SLOT_CTRL * N_EFFECT_SLOT_CTRL_BANK * ecs; 472 1.3.2.2 nathanw #endif 473 1.3.2.2 nathanw 474 1.3.2.2 nathanw /* Play slot control data */ 475 1.3.2.2 nathanw sc->pbankoff = cb; 476 1.3.2.2 nathanw for (i=0; i < N_PLAY_SLOT_CTRL; i++) { 477 1.3.2.2 nathanw sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb); 478 1.3.2.2 nathanw *(sc->ptbl + i+1) = da + cb; 479 1.3.2.2 nathanw cb += pcs; 480 1.3.2.2 nathanw 481 1.3.2.2 nathanw sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb); 482 1.3.2.2 nathanw cb += pcs; 483 1.3.2.2 nathanw } 484 1.3.2.2 nathanw /* Sync play control data table */ 485 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, p->map, 486 1.3.2.2 nathanw sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(u_int32_t), 487 1.3.2.2 nathanw BUS_DMASYNC_PREWRITE); 488 1.3.2.2 nathanw 489 1.3.2.2 nathanw return 0; 490 1.3.2.2 nathanw } 491 1.3.2.2 nathanw 492 1.3.2.2 nathanw static void 493 1.3.2.2 nathanw yds_enable_dsp(sc) 494 1.3.2.2 nathanw struct yds_softc *sc; 495 1.3.2.2 nathanw { 496 1.3.2.2 nathanw YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP); 497 1.3.2.2 nathanw } 498 1.3.2.2 nathanw 499 1.3.2.2 nathanw static int 500 1.3.2.2 nathanw yds_disable_dsp(sc) 501 1.3.2.2 nathanw struct yds_softc *sc; 502 1.3.2.2 nathanw { 503 1.3.2.2 nathanw int to; 504 1.3.2.2 nathanw u_int32_t data; 505 1.3.2.2 nathanw 506 1.3.2.2 nathanw data = YREAD4(sc, YDS_CONFIG); 507 1.3.2.2 nathanw if (data) 508 1.3.2.2 nathanw YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE); 509 1.3.2.2 nathanw 510 1.3.2.2 nathanw for (to = 0; to < YDS_WORK_TIMEOUT; to++) { 511 1.3.2.2 nathanw if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0) 512 1.3.2.2 nathanw return 0; 513 1.3.2.2 nathanw delay(1); 514 1.3.2.2 nathanw } 515 1.3.2.2 nathanw 516 1.3.2.2 nathanw return 1; 517 1.3.2.2 nathanw } 518 1.3.2.2 nathanw 519 1.3.2.2 nathanw int 520 1.3.2.2 nathanw yds_match(parent, match, aux) 521 1.3.2.2 nathanw struct device *parent; 522 1.3.2.2 nathanw struct cfdata *match; 523 1.3.2.2 nathanw void *aux; 524 1.3.2.2 nathanw { 525 1.3.2.2 nathanw struct pci_attach_args *pa = (struct pci_attach_args *)aux; 526 1.3.2.2 nathanw 527 1.3.2.2 nathanw switch (PCI_VENDOR(pa->pa_id)) { 528 1.3.2.2 nathanw case PCI_VENDOR_YAMAHA: 529 1.3.2.2 nathanw switch (PCI_PRODUCT(pa->pa_id)) { 530 1.3.2.2 nathanw case PCI_PRODUCT_YAMAHA_YMF724: 531 1.3.2.2 nathanw case PCI_PRODUCT_YAMAHA_YMF740: 532 1.3.2.2 nathanw case PCI_PRODUCT_YAMAHA_YMF740C: 533 1.3.2.2 nathanw case PCI_PRODUCT_YAMAHA_YMF724F: 534 1.3.2.2 nathanw case PCI_PRODUCT_YAMAHA_YMF744B: 535 1.3.2.2 nathanw case PCI_PRODUCT_YAMAHA_YMF754: 536 1.3.2.2 nathanw return (1); 537 1.3.2.2 nathanw } 538 1.3.2.2 nathanw break; 539 1.3.2.2 nathanw } 540 1.3.2.2 nathanw 541 1.3.2.2 nathanw return (0); 542 1.3.2.2 nathanw } 543 1.3.2.2 nathanw 544 1.3.2.2 nathanw /* 545 1.3.2.2 nathanw * This routine is called after all the ISA devices are configured, 546 1.3.2.2 nathanw * to avoid conflict. 547 1.3.2.2 nathanw */ 548 1.3.2.2 nathanw static void 549 1.3.2.2 nathanw yds_configure_legacy (arg) 550 1.3.2.2 nathanw struct device *arg; 551 1.3.2.2 nathanw #define FLEXIBLE (sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE) 552 1.3.2.2 nathanw #define SELECTABLE (sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE) 553 1.3.2.2 nathanw { 554 1.3.2.2 nathanw struct yds_softc *sc = (struct yds_softc*) arg; 555 1.3.2.2 nathanw pcireg_t reg; 556 1.3.2.2 nathanw struct device *dev; 557 1.3.2.2 nathanw int i; 558 1.3.2.2 nathanw bus_addr_t opl_addrs[] = {0x388, 0x398, 0x3A0, 0x3A8}; 559 1.3.2.2 nathanw bus_addr_t mpu_addrs[] = {0x330, 0x300, 0x332, 0x334}; 560 1.3.2.2 nathanw 561 1.3.2.2 nathanw if (!FLEXIBLE && !SELECTABLE) 562 1.3.2.2 nathanw return; 563 1.3.2.2 nathanw 564 1.3.2.2 nathanw reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY); 565 1.3.2.2 nathanw reg &= ~0x8133c03f; /* these bits are out of interest */ 566 1.3.2.2 nathanw reg |= ((YDS_PCI_EX_LEGACY_IMOD) | 567 1.3.2.2 nathanw (YDS_PCI_LEGACY_FMEN | 568 1.3.2.2 nathanw YDS_PCI_LEGACY_MEN /*| YDS_PCI_LEGACY_MIEN*/)); 569 1.3.2.2 nathanw if (FLEXIBLE) { 570 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg); 571 1.3.2.2 nathanw delay(100*1000); 572 1.3.2.2 nathanw } 573 1.3.2.2 nathanw 574 1.3.2.2 nathanw /* Look for OPL */ 575 1.3.2.2 nathanw dev = 0; 576 1.3.2.2 nathanw for (i = 0; i < sizeof(opl_addrs) / sizeof(bus_addr_t); i++) { 577 1.3.2.2 nathanw if (SELECTABLE) { 578 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 579 1.3.2.2 nathanw YDS_PCI_LEGACY, reg | (i << (0+16))); 580 1.3.2.2 nathanw delay(100*1000); /* wait 100ms */ 581 1.3.2.2 nathanw } else 582 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 583 1.3.2.2 nathanw YDS_PCI_FM_BA, opl_addrs[i]); 584 1.3.2.2 nathanw if (bus_space_map(sc->sc_opl_iot, 585 1.3.2.2 nathanw opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) { 586 1.3.2.2 nathanw struct audio_attach_args aa; 587 1.3.2.2 nathanw 588 1.3.2.2 nathanw aa.type = AUDIODEV_TYPE_OPL; 589 1.3.2.2 nathanw aa.hwif = aa.hdl = NULL; 590 1.3.2.2 nathanw dev = config_found(&sc->sc_dev, &aa, audioprint); 591 1.3.2.2 nathanw if (dev == 0) 592 1.3.2.2 nathanw bus_space_unmap(sc->sc_opl_iot, 593 1.3.2.2 nathanw sc->sc_opl_ioh, 4); 594 1.3.2.2 nathanw else { 595 1.3.2.2 nathanw if (SELECTABLE) 596 1.3.2.2 nathanw reg |= (i << (0+16)); 597 1.3.2.2 nathanw break; 598 1.3.2.2 nathanw } 599 1.3.2.2 nathanw } 600 1.3.2.2 nathanw } 601 1.3.2.2 nathanw if (dev == 0) { 602 1.3.2.2 nathanw reg &= ~YDS_PCI_LEGACY_FMEN; 603 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 604 1.3.2.2 nathanw YDS_PCI_LEGACY, reg); 605 1.3.2.2 nathanw } else { 606 1.3.2.2 nathanw /* Max. volume */ 607 1.3.2.2 nathanw YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff); 608 1.3.2.2 nathanw YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff); 609 1.3.2.2 nathanw } 610 1.3.2.2 nathanw 611 1.3.2.2 nathanw /* Look for MPU */ 612 1.3.2.2 nathanw dev = 0; 613 1.3.2.2 nathanw for (i = 0; i < sizeof(mpu_addrs) / sizeof(bus_addr_t); i++) { 614 1.3.2.2 nathanw if (SELECTABLE) 615 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 616 1.3.2.2 nathanw YDS_PCI_LEGACY, reg | (i << (4+16))); 617 1.3.2.2 nathanw else 618 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 619 1.3.2.2 nathanw YDS_PCI_MPU_BA, mpu_addrs[i]); 620 1.3.2.2 nathanw if (bus_space_map(sc->sc_mpu_iot, 621 1.3.2.2 nathanw mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) { 622 1.3.2.2 nathanw struct audio_attach_args aa; 623 1.3.2.2 nathanw 624 1.3.2.2 nathanw aa.type = AUDIODEV_TYPE_MPU; 625 1.3.2.2 nathanw aa.hwif = aa.hdl = NULL; 626 1.3.2.2 nathanw dev = config_found(&sc->sc_dev, &aa, audioprint); 627 1.3.2.2 nathanw if (dev == 0) 628 1.3.2.2 nathanw bus_space_unmap(sc->sc_mpu_iot, 629 1.3.2.2 nathanw sc->sc_mpu_ioh, 2); 630 1.3.2.2 nathanw else { 631 1.3.2.2 nathanw if (SELECTABLE) 632 1.3.2.2 nathanw reg |= (i << (4+16)); 633 1.3.2.2 nathanw break; 634 1.3.2.2 nathanw } 635 1.3.2.2 nathanw } 636 1.3.2.2 nathanw } 637 1.3.2.2 nathanw if (dev == 0) { 638 1.3.2.2 nathanw reg &= ~(YDS_PCI_LEGACY_MEN | YDS_PCI_LEGACY_MIEN); 639 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg); 640 1.3.2.2 nathanw } 641 1.3.2.2 nathanw sc->sc_mpu = dev; 642 1.3.2.2 nathanw } 643 1.3.2.2 nathanw #undef FLEXIBLE 644 1.3.2.2 nathanw #undef SELECTABLE 645 1.3.2.2 nathanw 646 1.3.2.7 nathanw static int 647 1.3.2.7 nathanw yds_init(sc) 648 1.3.2.7 nathanw struct yds_softc *sc; 649 1.3.2.7 nathanw { 650 1.3.2.7 nathanw u_int32_t reg; 651 1.3.2.7 nathanw 652 1.3.2.7 nathanw DPRINTF(("yds_init()\n")); 653 1.3.2.7 nathanw 654 1.3.2.7 nathanw /* Download microcode */ 655 1.3.2.7 nathanw if (yds_download_mcode(sc)) { 656 1.3.2.7 nathanw printf("%s: download microcode failed\n", sc->sc_dev.dv_xname); 657 1.3.2.7 nathanw return 1; 658 1.3.2.7 nathanw } 659 1.3.2.7 nathanw 660 1.3.2.7 nathanw /* Allocate DMA buffers */ 661 1.3.2.7 nathanw if (yds_allocate_slots(sc)) { 662 1.3.2.7 nathanw printf("%s: could not allocate slots\n", sc->sc_dev.dv_xname); 663 1.3.2.7 nathanw return 1; 664 1.3.2.7 nathanw } 665 1.3.2.7 nathanw 666 1.3.2.7 nathanw /* Warm reset */ 667 1.3.2.7 nathanw reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL); 668 1.3.2.7 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL, 669 1.3.2.7 nathanw reg | YDS_DSCTRL_WRST); 670 1.3.2.7 nathanw delay(50000); 671 1.3.2.7 nathanw 672 1.3.2.7 nathanw return 0; 673 1.3.2.7 nathanw } 674 1.3.2.7 nathanw 675 1.3.2.7 nathanw static void 676 1.3.2.7 nathanw yds_powerhook(why, addr) 677 1.3.2.7 nathanw int why; 678 1.3.2.7 nathanw void *addr; 679 1.3.2.7 nathanw { 680 1.3.2.7 nathanw struct yds_softc *sc = addr; 681 1.3.2.7 nathanw 682 1.3.2.7 nathanw if (why == PWR_RESUME) { 683 1.3.2.7 nathanw if (yds_init(sc)) { 684 1.3.2.7 nathanw printf("%s: reinitialize failed\n", 685 1.3.2.7 nathanw sc->sc_dev.dv_xname); 686 1.3.2.7 nathanw return; 687 1.3.2.7 nathanw } 688 1.3.2.7 nathanw sc->sc_codec[0].codec_if->vtbl->restore_ports(sc->sc_codec[0].codec_if); 689 1.3.2.7 nathanw } 690 1.3.2.7 nathanw } 691 1.3.2.7 nathanw 692 1.3.2.2 nathanw void 693 1.3.2.2 nathanw yds_attach(parent, self, aux) 694 1.3.2.2 nathanw struct device *parent; 695 1.3.2.2 nathanw struct device *self; 696 1.3.2.2 nathanw void *aux; 697 1.3.2.2 nathanw { 698 1.3.2.2 nathanw struct yds_softc *sc = (struct yds_softc *)self; 699 1.3.2.2 nathanw struct pci_attach_args *pa = (struct pci_attach_args *)aux; 700 1.3.2.2 nathanw pci_chipset_tag_t pc = pa->pa_pc; 701 1.3.2.2 nathanw char const *intrstr; 702 1.3.2.2 nathanw pci_intr_handle_t ih; 703 1.3.2.2 nathanw pcireg_t reg; 704 1.3.2.2 nathanw struct yds_codec_softc *codec; 705 1.3.2.2 nathanw char devinfo[256]; 706 1.3.2.2 nathanw mixer_ctrl_t ctl; 707 1.3.2.2 nathanw int i, r, to; 708 1.3.2.2 nathanw int revision; 709 1.3.2.2 nathanw int ac97_id2; 710 1.3.2.2 nathanw 711 1.3.2.2 nathanw pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 712 1.3.2.2 nathanw revision = PCI_REVISION(pa->pa_class); 713 1.3.2.2 nathanw printf(": %s (rev. 0x%02x)\n", devinfo, revision); 714 1.3.2.2 nathanw 715 1.3.2.2 nathanw /* Map register to memory */ 716 1.3.2.2 nathanw if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0, 717 1.3.2.2 nathanw &sc->memt, &sc->memh, NULL, NULL)) { 718 1.3.2.2 nathanw printf("%s: can't map memory space\n", sc->sc_dev.dv_xname); 719 1.3.2.2 nathanw return; 720 1.3.2.2 nathanw } 721 1.3.2.2 nathanw 722 1.3.2.2 nathanw /* Map and establish the interrupt. */ 723 1.3.2.2 nathanw if (pci_intr_map(pa, &ih)) { 724 1.3.2.2 nathanw printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 725 1.3.2.2 nathanw return; 726 1.3.2.2 nathanw } 727 1.3.2.2 nathanw intrstr = pci_intr_string(pc, ih); 728 1.3.2.2 nathanw sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, yds_intr, sc); 729 1.3.2.2 nathanw if (sc->sc_ih == NULL) { 730 1.3.2.2 nathanw printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname); 731 1.3.2.2 nathanw if (intrstr != NULL) 732 1.3.2.2 nathanw printf(" at %s", intrstr); 733 1.3.2.2 nathanw printf("\n"); 734 1.3.2.2 nathanw return; 735 1.3.2.2 nathanw } 736 1.3.2.2 nathanw printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 737 1.3.2.2 nathanw 738 1.3.2.2 nathanw sc->sc_dmatag = pa->pa_dmat; 739 1.3.2.2 nathanw sc->sc_pc = pc; 740 1.3.2.2 nathanw sc->sc_pcitag = pa->pa_tag; 741 1.3.2.2 nathanw sc->sc_id = pa->pa_id; 742 1.3.2.7 nathanw sc->sc_revision = revision; 743 1.3.2.2 nathanw sc->sc_flags = yds_get_dstype(sc->sc_id); 744 1.3.2.2 nathanw #ifdef AUDIO_DEBUG 745 1.3.2.2 nathanw if (ydsdebug) { 746 1.3.2.2 nathanw char bits[80]; 747 1.3.2.2 nathanw 748 1.3.2.2 nathanw printf("%s: chip has %s\n", sc->sc_dev.dv_xname, 749 1.3.2.2 nathanw bitmask_snprintf(sc->sc_flags, YDS_CAP_BITS, bits, 750 1.3.2.2 nathanw sizeof(bits))); 751 1.3.2.2 nathanw } 752 1.3.2.2 nathanw #endif 753 1.3.2.2 nathanw 754 1.3.2.2 nathanw /* Disable legacy mode */ 755 1.3.2.2 nathanw reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY); 756 1.3.2.2 nathanw pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY, 757 1.3.2.2 nathanw reg & YDS_PCI_LEGACY_LAD); 758 1.3.2.2 nathanw 759 1.3.2.2 nathanw /* Enable the device. */ 760 1.3.2.2 nathanw reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 761 1.3.2.2 nathanw reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 762 1.3.2.2 nathanw PCI_COMMAND_MASTER_ENABLE); 763 1.3.2.2 nathanw pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 764 1.3.2.2 nathanw reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 765 1.3.2.2 nathanw 766 1.3.2.2 nathanw /* Mute all volumes */ 767 1.3.2.2 nathanw for (i = 0x80; i < 0xc0; i += 2) 768 1.3.2.2 nathanw YWRITE2(sc, i, 0); 769 1.3.2.2 nathanw 770 1.3.2.7 nathanw /* Initialize the device */ 771 1.3.2.7 nathanw if (yds_init(sc)) { 772 1.3.2.7 nathanw printf("%s: initialize failed\n", sc->sc_dev.dv_xname); 773 1.3.2.2 nathanw return; 774 1.3.2.2 nathanw } 775 1.3.2.2 nathanw 776 1.3.2.2 nathanw /* 777 1.3.2.2 nathanw * Detect primary/secondary AC97 778 1.3.2.2 nathanw * YMF754 Hardware Specification Rev 1.01 page 24 779 1.3.2.2 nathanw */ 780 1.3.2.2 nathanw reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL); 781 1.3.2.2 nathanw pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST); 782 1.3.2.2 nathanw delay(400000); /* Needed for 740C. */ 783 1.3.2.2 nathanw 784 1.3.2.2 nathanw /* Primary */ 785 1.3.2.2 nathanw for (to = 0; to < AC97_TIMEOUT; to++) { 786 1.3.2.2 nathanw if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0) 787 1.3.2.2 nathanw break; 788 1.3.2.2 nathanw delay(1); 789 1.3.2.2 nathanw } 790 1.3.2.2 nathanw if (to == AC97_TIMEOUT) { 791 1.3.2.2 nathanw printf("%s: no AC97 avaliable\n", sc->sc_dev.dv_xname); 792 1.3.2.2 nathanw return; 793 1.3.2.2 nathanw } 794 1.3.2.2 nathanw 795 1.3.2.2 nathanw /* Secondary */ 796 1.3.2.2 nathanw /* Secondary AC97 is used for 4ch audio. Currently unused. */ 797 1.3.2.2 nathanw ac97_id2 = -1; 798 1.3.2.2 nathanw if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0) 799 1.3.2.2 nathanw goto detected; 800 1.3.2.2 nathanw #if 0 /* reset secondary... */ 801 1.3.2.2 nathanw YWRITE2(sc, YDS_GPIO_OCTRL, 802 1.3.2.2 nathanw YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2); 803 1.3.2.2 nathanw YWRITE2(sc, YDS_GPIO_FUNCE, 804 1.3.2.2 nathanw (YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2); 805 1.3.2.2 nathanw #endif 806 1.3.2.2 nathanw for (to = 0; to < AC97_TIMEOUT; to++) { 807 1.3.2.2 nathanw if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0) 808 1.3.2.2 nathanw break; 809 1.3.2.2 nathanw delay(1); 810 1.3.2.2 nathanw } 811 1.3.2.2 nathanw if (to < AC97_TIMEOUT) { 812 1.3.2.2 nathanw /* detect id */ 813 1.3.2.2 nathanw for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) { 814 1.3.2.2 nathanw YWRITE2(sc, AC97_CMD_ADDR, 815 1.3.2.2 nathanw AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28); 816 1.3.2.2 nathanw 817 1.3.2.2 nathanw for (to = 0; to < AC97_TIMEOUT; to++) { 818 1.3.2.2 nathanw if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) 819 1.3.2.2 nathanw == 0) 820 1.3.2.2 nathanw goto detected; 821 1.3.2.2 nathanw delay(1); 822 1.3.2.2 nathanw } 823 1.3.2.2 nathanw } 824 1.3.2.2 nathanw if (ac97_id2 == 4) 825 1.3.2.2 nathanw ac97_id2 = -1; 826 1.3.2.2 nathanw detected: 827 1.3.2.3 nathanw ; 828 1.3.2.2 nathanw } 829 1.3.2.2 nathanw 830 1.3.2.2 nathanw pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST); 831 1.3.2.2 nathanw delay (20); 832 1.3.2.2 nathanw pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST); 833 1.3.2.2 nathanw delay (400000); 834 1.3.2.2 nathanw for (to = 0; to < AC97_TIMEOUT; to++) { 835 1.3.2.2 nathanw if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0) 836 1.3.2.2 nathanw break; 837 1.3.2.2 nathanw delay(1); 838 1.3.2.2 nathanw } 839 1.3.2.2 nathanw 840 1.3.2.2 nathanw /* 841 1.3.2.2 nathanw * Attach ac97 codec 842 1.3.2.2 nathanw */ 843 1.3.2.2 nathanw for (i = 0; i < 2; i++) { 844 1.3.2.2 nathanw static struct { 845 1.3.2.2 nathanw int data; 846 1.3.2.2 nathanw int addr; 847 1.3.2.2 nathanw } statregs[] = { 848 1.3.2.2 nathanw {AC97_STAT_DATA1, AC97_STAT_ADDR1}, 849 1.3.2.2 nathanw {AC97_STAT_DATA2, AC97_STAT_ADDR2}, 850 1.3.2.2 nathanw }; 851 1.3.2.2 nathanw 852 1.3.2.2 nathanw if (i == 1 && ac97_id2 == -1) 853 1.3.2.2 nathanw break; /* secondary ac97 not available */ 854 1.3.2.2 nathanw 855 1.3.2.2 nathanw codec = &sc->sc_codec[i]; 856 1.3.2.2 nathanw memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev)); 857 1.3.2.2 nathanw codec->sc = sc; 858 1.3.2.2 nathanw codec->id = i == 1 ? ac97_id2 : 0; 859 1.3.2.2 nathanw codec->status_data = statregs[i].data; 860 1.3.2.2 nathanw codec->status_addr = statregs[i].addr; 861 1.3.2.2 nathanw codec->host_if.arg = codec; 862 1.3.2.2 nathanw codec->host_if.attach = yds_attach_codec; 863 1.3.2.2 nathanw codec->host_if.read = yds_read_codec; 864 1.3.2.2 nathanw codec->host_if.write = yds_write_codec; 865 1.3.2.2 nathanw codec->host_if.reset = yds_reset_codec; 866 1.3.2.2 nathanw 867 1.3.2.2 nathanw if ((r = ac97_attach(&codec->host_if)) != 0) { 868 1.3.2.2 nathanw printf("%s: can't attach codec (error 0x%X)\n", 869 1.3.2.2 nathanw sc->sc_dev.dv_xname, r); 870 1.3.2.2 nathanw return; 871 1.3.2.2 nathanw } 872 1.3.2.2 nathanw } 873 1.3.2.2 nathanw 874 1.3.2.2 nathanw /* Just enable the DAC and master volumes by default */ 875 1.3.2.2 nathanw ctl.type = AUDIO_MIXER_ENUM; 876 1.3.2.2 nathanw ctl.un.ord = 0; /* off */ 877 1.3.2.2 nathanw ctl.dev = yds_get_portnum_by_name(sc, AudioCoutputs, 878 1.3.2.2 nathanw AudioNmaster, AudioNmute); 879 1.3.2.2 nathanw yds_mixer_set_port(sc, &ctl); 880 1.3.2.2 nathanw ctl.dev = yds_get_portnum_by_name(sc, AudioCinputs, 881 1.3.2.2 nathanw AudioNdac, AudioNmute); 882 1.3.2.2 nathanw yds_mixer_set_port(sc, &ctl); 883 1.3.2.2 nathanw ctl.dev = yds_get_portnum_by_name(sc, AudioCinputs, 884 1.3.2.2 nathanw AudioNcd, AudioNmute); 885 1.3.2.2 nathanw yds_mixer_set_port(sc, &ctl); 886 1.3.2.2 nathanw ctl.dev = yds_get_portnum_by_name(sc, AudioCrecord, 887 1.3.2.2 nathanw AudioNvolume, AudioNmute); 888 1.3.2.2 nathanw yds_mixer_set_port(sc, &ctl); 889 1.3.2.2 nathanw 890 1.3.2.2 nathanw ctl.dev = yds_get_portnum_by_name(sc, AudioCrecord, 891 1.3.2.2 nathanw AudioNsource, NULL); 892 1.3.2.2 nathanw ctl.type = AUDIO_MIXER_ENUM; 893 1.3.2.2 nathanw ctl.un.ord = 0; 894 1.3.2.2 nathanw yds_mixer_set_port(sc, &ctl); 895 1.3.2.2 nathanw 896 1.3.2.2 nathanw /* Set a reasonable default volume */ 897 1.3.2.2 nathanw ctl.type = AUDIO_MIXER_VALUE; 898 1.3.2.2 nathanw ctl.un.value.num_channels = 2; 899 1.3.2.2 nathanw ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 900 1.3.2.2 nathanw ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 127; 901 1.3.2.2 nathanw 902 1.3.2.2 nathanw ctl.dev = sc->sc_codec[0].codec_if->vtbl->get_portnum_by_name( 903 1.3.2.2 nathanw sc->sc_codec[0].codec_if, AudioCoutputs, AudioNmaster, NULL); 904 1.3.2.2 nathanw yds_mixer_set_port(sc, &ctl); 905 1.3.2.2 nathanw 906 1.3.2.2 nathanw audio_attach_mi(&yds_hw_if, sc, &sc->sc_dev); 907 1.3.2.2 nathanw 908 1.3.2.2 nathanw sc->sc_legacy_iot = pa->pa_iot; 909 1.3.2.2 nathanw config_defer((struct device*) sc, yds_configure_legacy); 910 1.3.2.7 nathanw 911 1.3.2.7 nathanw powerhook_establish(yds_powerhook, sc); 912 1.3.2.2 nathanw } 913 1.3.2.2 nathanw 914 1.3.2.2 nathanw int 915 1.3.2.2 nathanw yds_attach_codec(sc_, codec_if) 916 1.3.2.2 nathanw void *sc_; 917 1.3.2.2 nathanw struct ac97_codec_if *codec_if; 918 1.3.2.2 nathanw { 919 1.3.2.2 nathanw struct yds_codec_softc *sc = sc_; 920 1.3.2.2 nathanw 921 1.3.2.2 nathanw sc->codec_if = codec_if; 922 1.3.2.2 nathanw return 0; 923 1.3.2.2 nathanw } 924 1.3.2.2 nathanw 925 1.3.2.2 nathanw static int 926 1.3.2.2 nathanw yds_ready_codec(sc) 927 1.3.2.2 nathanw struct yds_codec_softc *sc; 928 1.3.2.2 nathanw { 929 1.3.2.2 nathanw int to; 930 1.3.2.2 nathanw 931 1.3.2.2 nathanw for (to = 0; to < AC97_TIMEOUT; to++) { 932 1.3.2.2 nathanw if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0) 933 1.3.2.2 nathanw return 0; 934 1.3.2.2 nathanw delay(1); 935 1.3.2.2 nathanw } 936 1.3.2.2 nathanw 937 1.3.2.2 nathanw return 1; 938 1.3.2.2 nathanw } 939 1.3.2.2 nathanw 940 1.3.2.2 nathanw int 941 1.3.2.2 nathanw yds_read_codec(sc_, reg, data) 942 1.3.2.2 nathanw void *sc_; 943 1.3.2.2 nathanw u_int8_t reg; 944 1.3.2.2 nathanw u_int16_t *data; 945 1.3.2.2 nathanw { 946 1.3.2.2 nathanw struct yds_codec_softc *sc = sc_; 947 1.3.2.2 nathanw 948 1.3.2.2 nathanw YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg); 949 1.3.2.2 nathanw 950 1.3.2.2 nathanw if (yds_ready_codec(sc)) { 951 1.3.2.2 nathanw printf("%s: yds_read_codec timeout\n", 952 1.3.2.2 nathanw sc->sc->sc_dev.dv_xname); 953 1.3.2.2 nathanw return EIO; 954 1.3.2.2 nathanw } 955 1.3.2.2 nathanw 956 1.3.2.7 nathanw if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744B && 957 1.3.2.7 nathanw sc->sc->sc_revision < 2) { 958 1.3.2.7 nathanw int i; 959 1.3.2.7 nathanw for (i=0; i<600; i++) 960 1.3.2.7 nathanw YREAD2(sc->sc, sc->status_data); 961 1.3.2.7 nathanw } 962 1.3.2.7 nathanw 963 1.3.2.2 nathanw *data = YREAD2(sc->sc, sc->status_data); 964 1.3.2.2 nathanw 965 1.3.2.2 nathanw return 0; 966 1.3.2.2 nathanw } 967 1.3.2.2 nathanw 968 1.3.2.2 nathanw int 969 1.3.2.2 nathanw yds_write_codec(sc_, reg, data) 970 1.3.2.2 nathanw void *sc_; 971 1.3.2.2 nathanw u_int8_t reg; 972 1.3.2.2 nathanw u_int16_t data; 973 1.3.2.2 nathanw { 974 1.3.2.2 nathanw struct yds_codec_softc *sc = sc_; 975 1.3.2.2 nathanw 976 1.3.2.2 nathanw YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg); 977 1.3.2.2 nathanw YWRITE2(sc->sc, AC97_CMD_DATA, data); 978 1.3.2.2 nathanw 979 1.3.2.2 nathanw if (yds_ready_codec(sc)) { 980 1.3.2.2 nathanw printf("%s: yds_write_codec timeout\n", 981 1.3.2.2 nathanw sc->sc->sc_dev.dv_xname); 982 1.3.2.2 nathanw return EIO; 983 1.3.2.2 nathanw } 984 1.3.2.2 nathanw 985 1.3.2.2 nathanw return 0; 986 1.3.2.2 nathanw } 987 1.3.2.2 nathanw 988 1.3.2.2 nathanw /* 989 1.3.2.2 nathanw * XXX: Must handle the secondary differntly!! 990 1.3.2.2 nathanw */ 991 1.3.2.2 nathanw void 992 1.3.2.2 nathanw yds_reset_codec(sc_) 993 1.3.2.2 nathanw void *sc_; 994 1.3.2.2 nathanw { 995 1.3.2.2 nathanw struct yds_codec_softc *codec = sc_; 996 1.3.2.2 nathanw struct yds_softc *sc = codec->sc; 997 1.3.2.2 nathanw pcireg_t reg; 998 1.3.2.2 nathanw 999 1.3.2.2 nathanw /* reset AC97 codec */ 1000 1.3.2.2 nathanw reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL); 1001 1.3.2.2 nathanw if (reg & 0x03) { 1002 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 1003 1.3.2.2 nathanw YDS_PCI_DSCTRL, reg & ~0x03); 1004 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 1005 1.3.2.2 nathanw YDS_PCI_DSCTRL, reg | 0x03); 1006 1.3.2.2 nathanw pci_conf_write(sc->sc_pc, sc->sc_pcitag, 1007 1.3.2.2 nathanw YDS_PCI_DSCTRL, reg & ~0x03); 1008 1.3.2.2 nathanw delay(50000); 1009 1.3.2.2 nathanw } 1010 1.3.2.2 nathanw 1011 1.3.2.2 nathanw yds_ready_codec(sc_); 1012 1.3.2.2 nathanw } 1013 1.3.2.2 nathanw 1014 1.3.2.2 nathanw int 1015 1.3.2.2 nathanw yds_intr(p) 1016 1.3.2.2 nathanw void *p; 1017 1.3.2.2 nathanw { 1018 1.3.2.2 nathanw struct yds_softc *sc = p; 1019 1.3.2.2 nathanw u_int status; 1020 1.3.2.2 nathanw 1021 1.3.2.2 nathanw status = YREAD4(sc, YDS_STATUS); 1022 1.3.2.2 nathanw DPRINTFN(1, ("yds_intr: status=%08x\n", status)); 1023 1.3.2.2 nathanw if ((status & (YDS_STAT_INT|YDS_STAT_TINT)) == 0) { 1024 1.3.2.2 nathanw #if NMPU > 0 1025 1.3.2.2 nathanw if (sc->sc_mpu) 1026 1.3.2.2 nathanw return mpu_intr(sc->sc_mpu); 1027 1.3.2.2 nathanw #endif 1028 1.3.2.2 nathanw return 0; 1029 1.3.2.2 nathanw } 1030 1.3.2.2 nathanw 1031 1.3.2.2 nathanw if (status & YDS_STAT_TINT) { 1032 1.3.2.2 nathanw YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT); 1033 1.3.2.2 nathanw printf ("yds_intr: timeout!\n"); 1034 1.3.2.2 nathanw } 1035 1.3.2.2 nathanw 1036 1.3.2.2 nathanw if (status & YDS_STAT_INT) { 1037 1.3.2.2 nathanw int nbank = (YREAD4(sc, YDS_CONTROL_SELECT) == 0); 1038 1.3.2.2 nathanw 1039 1.3.2.2 nathanw /* Clear interrupt flag */ 1040 1.3.2.2 nathanw YWRITE4(sc, YDS_STATUS, YDS_STAT_INT); 1041 1.3.2.2 nathanw 1042 1.3.2.2 nathanw /* Buffer for the next frame is always ready. */ 1043 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2); 1044 1.3.2.2 nathanw 1045 1.3.2.2 nathanw if (sc->sc_play.intr) { 1046 1.3.2.2 nathanw u_int dma, cpu, blk, len; 1047 1.3.2.2 nathanw 1048 1.3.2.2 nathanw /* Sync play slot control data */ 1049 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1050 1.3.2.2 nathanw sc->pbankoff, 1051 1.3.2.2 nathanw sizeof(struct play_slot_ctrl_bank)* 1052 1.3.2.2 nathanw (*sc->ptbl)* 1053 1.3.2.2 nathanw N_PLAY_SLOT_CTRL_BANK, 1054 1.3.2.2 nathanw BUS_DMASYNC_POSTWRITE| 1055 1.3.2.2 nathanw BUS_DMASYNC_POSTREAD); 1056 1.3.2.2 nathanw dma = sc->pbankp[nbank]->pgstart * sc->sc_play.factor; 1057 1.3.2.2 nathanw cpu = sc->sc_play.offset; 1058 1.3.2.2 nathanw blk = sc->sc_play.blksize; 1059 1.3.2.2 nathanw len = sc->sc_play.length; 1060 1.3.2.2 nathanw 1061 1.3.2.2 nathanw if (((dma > cpu) && (dma - cpu > blk * 2)) || 1062 1.3.2.2 nathanw ((cpu > dma) && (dma + len - cpu > blk * 2))) { 1063 1.3.2.2 nathanw /* We can fill the next block */ 1064 1.3.2.2 nathanw /* Sync ring buffer for previous write */ 1065 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, 1066 1.3.2.2 nathanw sc->sc_play.dma->map, 1067 1.3.2.2 nathanw cpu, blk, 1068 1.3.2.2 nathanw BUS_DMASYNC_POSTWRITE); 1069 1.3.2.2 nathanw sc->sc_play.intr(sc->sc_play.intr_arg); 1070 1.3.2.2 nathanw sc->sc_play.offset += blk; 1071 1.3.2.2 nathanw if (sc->sc_play.offset >= len) { 1072 1.3.2.2 nathanw sc->sc_play.offset -= len; 1073 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1074 1.3.2.2 nathanw if (sc->sc_play.offset != 0) 1075 1.3.2.2 nathanw printf ("Audio ringbuffer botch\n"); 1076 1.3.2.2 nathanw #endif 1077 1.3.2.2 nathanw } 1078 1.3.2.2 nathanw /* Sync ring buffer for next write */ 1079 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, 1080 1.3.2.2 nathanw sc->sc_play.dma->map, 1081 1.3.2.2 nathanw cpu, blk, 1082 1.3.2.2 nathanw BUS_DMASYNC_PREWRITE); 1083 1.3.2.2 nathanw } 1084 1.3.2.2 nathanw } 1085 1.3.2.2 nathanw if (sc->sc_rec.intr) { 1086 1.3.2.2 nathanw u_int dma, cpu, blk, len; 1087 1.3.2.2 nathanw 1088 1.3.2.2 nathanw /* Sync rec slot control data */ 1089 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1090 1.3.2.2 nathanw sc->rbankoff, 1091 1.3.2.2 nathanw sizeof(struct rec_slot_ctrl_bank)* 1092 1.3.2.2 nathanw N_REC_SLOT_CTRL* 1093 1.3.2.2 nathanw N_REC_SLOT_CTRL_BANK, 1094 1.3.2.2 nathanw BUS_DMASYNC_POSTWRITE| 1095 1.3.2.2 nathanw BUS_DMASYNC_POSTREAD); 1096 1.3.2.2 nathanw dma = sc->rbank[YDS_INPUT_SLOT*2 + nbank].pgstartadr; 1097 1.3.2.2 nathanw cpu = sc->sc_rec.offset; 1098 1.3.2.2 nathanw blk = sc->sc_rec.blksize; 1099 1.3.2.2 nathanw len = sc->sc_rec.length; 1100 1.3.2.2 nathanw 1101 1.3.2.2 nathanw if (((dma > cpu) && (dma - cpu > blk * 2)) || 1102 1.3.2.2 nathanw ((cpu > dma) && (dma + len - cpu > blk * 2))) { 1103 1.3.2.2 nathanw /* We can drain the current block */ 1104 1.3.2.2 nathanw /* Sync ring buffer first */ 1105 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, 1106 1.3.2.2 nathanw sc->sc_rec.dma->map, 1107 1.3.2.2 nathanw cpu, blk, 1108 1.3.2.2 nathanw BUS_DMASYNC_POSTREAD); 1109 1.3.2.2 nathanw sc->sc_rec.intr(sc->sc_rec.intr_arg); 1110 1.3.2.2 nathanw sc->sc_rec.offset += blk; 1111 1.3.2.2 nathanw if (sc->sc_rec.offset >= len) { 1112 1.3.2.2 nathanw sc->sc_rec.offset -= len; 1113 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1114 1.3.2.2 nathanw if (sc->sc_rec.offset != 0) 1115 1.3.2.2 nathanw printf ("Audio ringbuffer botch\n"); 1116 1.3.2.2 nathanw #endif 1117 1.3.2.2 nathanw } 1118 1.3.2.2 nathanw /* Sync ring buffer for next read */ 1119 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, 1120 1.3.2.2 nathanw sc->sc_rec.dma->map, 1121 1.3.2.2 nathanw cpu, blk, 1122 1.3.2.2 nathanw BUS_DMASYNC_PREREAD); 1123 1.3.2.2 nathanw } 1124 1.3.2.2 nathanw } 1125 1.3.2.2 nathanw } 1126 1.3.2.2 nathanw 1127 1.3.2.2 nathanw return 1; 1128 1.3.2.2 nathanw } 1129 1.3.2.2 nathanw 1130 1.3.2.2 nathanw int 1131 1.3.2.2 nathanw yds_allocmem(sc, size, align, p) 1132 1.3.2.2 nathanw struct yds_softc *sc; 1133 1.3.2.2 nathanw size_t size; 1134 1.3.2.2 nathanw size_t align; 1135 1.3.2.2 nathanw struct yds_dma *p; 1136 1.3.2.2 nathanw { 1137 1.3.2.2 nathanw int error; 1138 1.3.2.2 nathanw 1139 1.3.2.2 nathanw p->size = size; 1140 1.3.2.2 nathanw error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 1141 1.3.2.2 nathanw p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1142 1.3.2.2 nathanw &p->nsegs, BUS_DMA_NOWAIT); 1143 1.3.2.2 nathanw if (error) 1144 1.3.2.2 nathanw return (error); 1145 1.3.2.2 nathanw 1146 1.3.2.2 nathanw error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 1147 1.3.2.2 nathanw &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1148 1.3.2.2 nathanw if (error) 1149 1.3.2.2 nathanw goto free; 1150 1.3.2.2 nathanw 1151 1.3.2.2 nathanw error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 1152 1.3.2.2 nathanw 0, BUS_DMA_NOWAIT, &p->map); 1153 1.3.2.2 nathanw if (error) 1154 1.3.2.2 nathanw goto unmap; 1155 1.3.2.2 nathanw 1156 1.3.2.2 nathanw error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 1157 1.3.2.2 nathanw BUS_DMA_NOWAIT); 1158 1.3.2.2 nathanw if (error) 1159 1.3.2.2 nathanw goto destroy; 1160 1.3.2.2 nathanw return (0); 1161 1.3.2.2 nathanw 1162 1.3.2.2 nathanw destroy: 1163 1.3.2.2 nathanw bus_dmamap_destroy(sc->sc_dmatag, p->map); 1164 1.3.2.2 nathanw unmap: 1165 1.3.2.2 nathanw bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1166 1.3.2.2 nathanw free: 1167 1.3.2.2 nathanw bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1168 1.3.2.2 nathanw return (error); 1169 1.3.2.2 nathanw } 1170 1.3.2.2 nathanw 1171 1.3.2.2 nathanw int 1172 1.3.2.2 nathanw yds_freemem(sc, p) 1173 1.3.2.2 nathanw struct yds_softc *sc; 1174 1.3.2.2 nathanw struct yds_dma *p; 1175 1.3.2.2 nathanw { 1176 1.3.2.2 nathanw bus_dmamap_unload(sc->sc_dmatag, p->map); 1177 1.3.2.2 nathanw bus_dmamap_destroy(sc->sc_dmatag, p->map); 1178 1.3.2.2 nathanw bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1179 1.3.2.2 nathanw bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1180 1.3.2.2 nathanw return 0; 1181 1.3.2.2 nathanw } 1182 1.3.2.2 nathanw 1183 1.3.2.2 nathanw int 1184 1.3.2.2 nathanw yds_open(addr, flags) 1185 1.3.2.2 nathanw void *addr; 1186 1.3.2.2 nathanw int flags; 1187 1.3.2.2 nathanw { 1188 1.3.2.2 nathanw struct yds_softc *sc = addr; 1189 1.3.2.2 nathanw int mode; 1190 1.3.2.2 nathanw 1191 1.3.2.2 nathanw /* Select bank 0. */ 1192 1.3.2.2 nathanw YWRITE4(sc, YDS_CONTROL_SELECT, 0); 1193 1.3.2.2 nathanw 1194 1.3.2.2 nathanw /* Start the DSP operation. */ 1195 1.3.2.2 nathanw mode = YREAD4(sc, YDS_MODE); 1196 1.3.2.2 nathanw mode |= YDS_MODE_ACTV; 1197 1.3.2.2 nathanw mode &= ~YDS_MODE_ACTV2; 1198 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, mode); 1199 1.3.2.2 nathanw 1200 1.3.2.2 nathanw return 0; 1201 1.3.2.2 nathanw } 1202 1.3.2.2 nathanw 1203 1.3.2.2 nathanw /* 1204 1.3.2.2 nathanw * Close function is called at splaudio(). 1205 1.3.2.2 nathanw */ 1206 1.3.2.2 nathanw void 1207 1.3.2.2 nathanw yds_close(addr) 1208 1.3.2.2 nathanw void *addr; 1209 1.3.2.2 nathanw { 1210 1.3.2.2 nathanw struct yds_softc *sc = addr; 1211 1.3.2.2 nathanw 1212 1.3.2.2 nathanw yds_halt_output(sc); 1213 1.3.2.2 nathanw yds_halt_input(sc); 1214 1.3.2.2 nathanw yds_halt(sc); 1215 1.3.2.2 nathanw } 1216 1.3.2.2 nathanw 1217 1.3.2.2 nathanw int 1218 1.3.2.2 nathanw yds_query_encoding(addr, fp) 1219 1.3.2.2 nathanw void *addr; 1220 1.3.2.2 nathanw struct audio_encoding *fp; 1221 1.3.2.2 nathanw { 1222 1.3.2.2 nathanw switch (fp->index) { 1223 1.3.2.2 nathanw case 0: 1224 1.3.2.2 nathanw strcpy(fp->name, AudioEulinear); 1225 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_ULINEAR; 1226 1.3.2.2 nathanw fp->precision = 8; 1227 1.3.2.2 nathanw fp->flags = 0; 1228 1.3.2.2 nathanw return (0); 1229 1.3.2.2 nathanw case 1: 1230 1.3.2.2 nathanw strcpy(fp->name, AudioEmulaw); 1231 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_ULAW; 1232 1.3.2.2 nathanw fp->precision = 8; 1233 1.3.2.2 nathanw fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1234 1.3.2.2 nathanw return (0); 1235 1.3.2.2 nathanw case 2: 1236 1.3.2.2 nathanw strcpy(fp->name, AudioEalaw); 1237 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_ALAW; 1238 1.3.2.2 nathanw fp->precision = 8; 1239 1.3.2.2 nathanw fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1240 1.3.2.2 nathanw return (0); 1241 1.3.2.2 nathanw case 3: 1242 1.3.2.2 nathanw strcpy(fp->name, AudioEslinear); 1243 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_SLINEAR; 1244 1.3.2.2 nathanw fp->precision = 8; 1245 1.3.2.2 nathanw fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1246 1.3.2.2 nathanw return (0); 1247 1.3.2.2 nathanw case 4: 1248 1.3.2.2 nathanw strcpy(fp->name, AudioEslinear_le); 1249 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1250 1.3.2.2 nathanw fp->precision = 16; 1251 1.3.2.2 nathanw fp->flags = 0; 1252 1.3.2.2 nathanw return (0); 1253 1.3.2.2 nathanw case 5: 1254 1.3.2.2 nathanw strcpy(fp->name, AudioEulinear_le); 1255 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1256 1.3.2.2 nathanw fp->precision = 16; 1257 1.3.2.2 nathanw fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1258 1.3.2.2 nathanw return (0); 1259 1.3.2.2 nathanw case 6: 1260 1.3.2.2 nathanw strcpy(fp->name, AudioEslinear_be); 1261 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1262 1.3.2.2 nathanw fp->precision = 16; 1263 1.3.2.2 nathanw fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1264 1.3.2.2 nathanw return (0); 1265 1.3.2.2 nathanw case 7: 1266 1.3.2.2 nathanw strcpy(fp->name, AudioEulinear_be); 1267 1.3.2.2 nathanw fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1268 1.3.2.2 nathanw fp->precision = 16; 1269 1.3.2.2 nathanw fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1270 1.3.2.2 nathanw return (0); 1271 1.3.2.2 nathanw default: 1272 1.3.2.2 nathanw return (EINVAL); 1273 1.3.2.2 nathanw } 1274 1.3.2.2 nathanw } 1275 1.3.2.2 nathanw 1276 1.3.2.2 nathanw int 1277 1.3.2.2 nathanw yds_set_params(addr, setmode, usemode, play, rec) 1278 1.3.2.2 nathanw void *addr; 1279 1.3.2.2 nathanw int setmode, usemode; 1280 1.3.2.2 nathanw struct audio_params *play, *rec; 1281 1.3.2.2 nathanw { 1282 1.3.2.2 nathanw struct audio_params *p; 1283 1.3.2.2 nathanw int mode; 1284 1.3.2.2 nathanw 1285 1.3.2.2 nathanw for (mode = AUMODE_RECORD; mode != -1; 1286 1.3.2.2 nathanw mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1287 1.3.2.2 nathanw if ((setmode & mode) == 0) 1288 1.3.2.2 nathanw continue; 1289 1.3.2.2 nathanw 1290 1.3.2.2 nathanw p = mode == AUMODE_PLAY ? play : rec; 1291 1.3.2.2 nathanw 1292 1.3.2.2 nathanw if (p->sample_rate < 4000 || p->sample_rate > 48000 || 1293 1.3.2.2 nathanw (p->precision != 8 && p->precision != 16) || 1294 1.3.2.2 nathanw (p->channels != 1 && p->channels != 2)) 1295 1.3.2.2 nathanw return (EINVAL); 1296 1.3.2.2 nathanw 1297 1.3.2.2 nathanw p->factor = 1; 1298 1.3.2.2 nathanw p->sw_code = 0; 1299 1.3.2.2 nathanw switch (p->encoding) { 1300 1.3.2.2 nathanw case AUDIO_ENCODING_SLINEAR_BE: 1301 1.3.2.2 nathanw if (p->precision == 16) 1302 1.3.2.2 nathanw p->sw_code = swap_bytes; 1303 1.3.2.2 nathanw else 1304 1.3.2.2 nathanw p->sw_code = change_sign8; 1305 1.3.2.2 nathanw break; 1306 1.3.2.2 nathanw case AUDIO_ENCODING_SLINEAR_LE: 1307 1.3.2.2 nathanw if (p->precision != 16) 1308 1.3.2.2 nathanw p->sw_code = change_sign8; 1309 1.3.2.2 nathanw break; 1310 1.3.2.2 nathanw case AUDIO_ENCODING_ULINEAR_BE: 1311 1.3.2.2 nathanw if (p->precision == 16) { 1312 1.3.2.2 nathanw if (mode == AUMODE_PLAY) 1313 1.3.2.2 nathanw p->sw_code = swap_bytes_change_sign16_le; 1314 1.3.2.2 nathanw else 1315 1.3.2.2 nathanw p->sw_code = change_sign16_swap_bytes_le; 1316 1.3.2.2 nathanw } 1317 1.3.2.2 nathanw break; 1318 1.3.2.2 nathanw case AUDIO_ENCODING_ULINEAR_LE: 1319 1.3.2.2 nathanw if (p->precision == 16) 1320 1.3.2.2 nathanw p->sw_code = change_sign16_le; 1321 1.3.2.2 nathanw break; 1322 1.3.2.2 nathanw case AUDIO_ENCODING_ULAW: 1323 1.3.2.2 nathanw if (mode == AUMODE_PLAY) { 1324 1.3.2.2 nathanw p->factor = 2; 1325 1.3.2.2 nathanw p->precision = 16; 1326 1.3.2.2 nathanw p->sw_code = mulaw_to_slinear16_le; 1327 1.3.2.2 nathanw } else 1328 1.3.2.2 nathanw p->sw_code = ulinear8_to_mulaw; 1329 1.3.2.2 nathanw break; 1330 1.3.2.2 nathanw case AUDIO_ENCODING_ALAW: 1331 1.3.2.2 nathanw if (mode == AUMODE_PLAY) { 1332 1.3.2.2 nathanw p->factor = 2; 1333 1.3.2.2 nathanw p->precision = 16; 1334 1.3.2.2 nathanw p->sw_code = alaw_to_slinear16_le; 1335 1.3.2.2 nathanw } else 1336 1.3.2.2 nathanw p->sw_code = ulinear8_to_alaw; 1337 1.3.2.2 nathanw break; 1338 1.3.2.2 nathanw default: 1339 1.3.2.2 nathanw return (EINVAL); 1340 1.3.2.2 nathanw } 1341 1.3.2.2 nathanw } 1342 1.3.2.2 nathanw 1343 1.3.2.2 nathanw return 0; 1344 1.3.2.2 nathanw } 1345 1.3.2.2 nathanw 1346 1.3.2.2 nathanw int 1347 1.3.2.2 nathanw yds_round_blocksize(addr, blk) 1348 1.3.2.2 nathanw void *addr; 1349 1.3.2.2 nathanw int blk; 1350 1.3.2.2 nathanw { 1351 1.3.2.2 nathanw /* 1352 1.3.2.2 nathanw * Block size must be bigger than a frame. 1353 1.3.2.2 nathanw * That is 1024bytes at most, i.e. for 48000Hz, 16bit, 2ch. 1354 1.3.2.2 nathanw */ 1355 1.3.2.2 nathanw if (blk < 1024) 1356 1.3.2.2 nathanw blk = 1024; 1357 1.3.2.2 nathanw 1358 1.3.2.2 nathanw return blk & ~4; 1359 1.3.2.2 nathanw } 1360 1.3.2.2 nathanw 1361 1.3.2.2 nathanw static u_int32_t 1362 1.3.2.2 nathanw yds_get_lpfq(sample_rate) 1363 1.3.2.2 nathanw u_int sample_rate; 1364 1.3.2.2 nathanw { 1365 1.3.2.2 nathanw int i; 1366 1.3.2.2 nathanw static struct lpfqt { 1367 1.3.2.2 nathanw u_int rate; 1368 1.3.2.2 nathanw u_int32_t lpfq; 1369 1.3.2.2 nathanw } lpfqt[] = { 1370 1.3.2.2 nathanw {8000, 0x32020000}, 1371 1.3.2.2 nathanw {11025, 0x31770000}, 1372 1.3.2.2 nathanw {16000, 0x31390000}, 1373 1.3.2.2 nathanw {22050, 0x31c90000}, 1374 1.3.2.2 nathanw {32000, 0x33d00000}, 1375 1.3.2.2 nathanw {48000, 0x40000000}, 1376 1.3.2.2 nathanw {0, 0} 1377 1.3.2.2 nathanw }; 1378 1.3.2.2 nathanw 1379 1.3.2.2 nathanw if (sample_rate == 44100) /* for P44 slot? */ 1380 1.3.2.2 nathanw return 0x370A0000; 1381 1.3.2.2 nathanw 1382 1.3.2.2 nathanw for (i = 0; lpfqt[i].rate != 0; i++) 1383 1.3.2.2 nathanw if (sample_rate <= lpfqt[i].rate) 1384 1.3.2.2 nathanw break; 1385 1.3.2.2 nathanw 1386 1.3.2.2 nathanw return lpfqt[i].lpfq; 1387 1.3.2.2 nathanw } 1388 1.3.2.2 nathanw 1389 1.3.2.2 nathanw static u_int32_t 1390 1.3.2.2 nathanw yds_get_lpfk(sample_rate) 1391 1.3.2.2 nathanw u_int sample_rate; 1392 1.3.2.2 nathanw { 1393 1.3.2.2 nathanw int i; 1394 1.3.2.2 nathanw static struct lpfkt { 1395 1.3.2.2 nathanw u_int rate; 1396 1.3.2.2 nathanw u_int32_t lpfk; 1397 1.3.2.2 nathanw } lpfkt[] = { 1398 1.3.2.2 nathanw {8000, 0x18b20000}, 1399 1.3.2.2 nathanw {11025, 0x20930000}, 1400 1.3.2.2 nathanw {16000, 0x2b9a0000}, 1401 1.3.2.2 nathanw {22050, 0x35a10000}, 1402 1.3.2.2 nathanw {32000, 0x3eaa0000}, 1403 1.3.2.2 nathanw {48000, 0x40000000}, 1404 1.3.2.2 nathanw {0, 0} 1405 1.3.2.2 nathanw }; 1406 1.3.2.2 nathanw 1407 1.3.2.2 nathanw if (sample_rate == 44100) /* for P44 slot? */ 1408 1.3.2.2 nathanw return 0x46460000; 1409 1.3.2.2 nathanw 1410 1.3.2.2 nathanw for (i = 0; lpfkt[i].rate != 0; i++) 1411 1.3.2.2 nathanw if (sample_rate <= lpfkt[i].rate) 1412 1.3.2.2 nathanw break; 1413 1.3.2.2 nathanw 1414 1.3.2.2 nathanw return lpfkt[i].lpfk; 1415 1.3.2.2 nathanw } 1416 1.3.2.2 nathanw 1417 1.3.2.2 nathanw int 1418 1.3.2.2 nathanw yds_trigger_output(addr, start, end, blksize, intr, arg, param) 1419 1.3.2.2 nathanw void *addr; 1420 1.3.2.2 nathanw void *start, *end; 1421 1.3.2.2 nathanw int blksize; 1422 1.3.2.2 nathanw void (*intr) __P((void *)); 1423 1.3.2.2 nathanw void *arg; 1424 1.3.2.2 nathanw struct audio_params *param; 1425 1.3.2.2 nathanw #define P44 (sc->sc_flags & YDS_CAP_HAS_P44) 1426 1.3.2.2 nathanw { 1427 1.3.2.2 nathanw struct yds_softc *sc = addr; 1428 1.3.2.2 nathanw struct yds_dma *p; 1429 1.3.2.2 nathanw struct play_slot_ctrl_bank *psb; 1430 1.3.2.2 nathanw const u_int gain = 0x40000000; 1431 1.3.2.2 nathanw bus_addr_t s; 1432 1.3.2.2 nathanw size_t l; 1433 1.3.2.2 nathanw int i; 1434 1.3.2.2 nathanw int p44, channels; 1435 1.3.2.2 nathanw 1436 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1437 1.3.2.2 nathanw if (sc->sc_play.intr) 1438 1.3.2.2 nathanw panic("yds_trigger_output: already running"); 1439 1.3.2.2 nathanw #endif 1440 1.3.2.2 nathanw 1441 1.3.2.2 nathanw sc->sc_play.intr = intr; 1442 1.3.2.2 nathanw sc->sc_play.intr_arg = arg; 1443 1.3.2.2 nathanw sc->sc_play.offset = 0; 1444 1.3.2.2 nathanw sc->sc_play.blksize = blksize; 1445 1.3.2.2 nathanw 1446 1.3.2.2 nathanw DPRINTFN(1, ("yds_trigger_output: sc=%p start=%p end=%p " 1447 1.3.2.2 nathanw "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1448 1.3.2.2 nathanw 1449 1.3.2.2 nathanw p = yds_find_dma(sc, start); 1450 1.3.2.2 nathanw if (!p) { 1451 1.3.2.2 nathanw printf("yds_trigger_output: bad addr %p\n", start); 1452 1.3.2.2 nathanw return (EINVAL); 1453 1.3.2.2 nathanw } 1454 1.3.2.2 nathanw sc->sc_play.dma = p; 1455 1.3.2.2 nathanw 1456 1.3.2.2 nathanw #ifdef YDS_USE_P44 1457 1.3.2.2 nathanw /* The document says the P44 SRC supports only stereo, 16bit PCM. */ 1458 1.3.2.2 nathanw if (P44) 1459 1.3.2.2 nathanw p44 = ((param->sample_rate == 44100) && 1460 1.3.2.2 nathanw (param->channels == 2) && 1461 1.3.2.2 nathanw (param->precision == 16)); 1462 1.3.2.2 nathanw else 1463 1.3.2.2 nathanw #endif 1464 1.3.2.2 nathanw p44 = 0; 1465 1.3.2.2 nathanw channels = p44 ? 1 : param->channels; 1466 1.3.2.2 nathanw 1467 1.3.2.2 nathanw s = DMAADDR(p); 1468 1.3.2.2 nathanw l = ((char *)end - (char *)start); 1469 1.3.2.2 nathanw sc->sc_play.length = l; 1470 1.3.2.2 nathanw 1471 1.3.2.2 nathanw *sc->ptbl = channels; /* Num of play */ 1472 1.3.2.2 nathanw 1473 1.3.2.2 nathanw sc->sc_play.factor = 1; 1474 1.3.2.2 nathanw if (param->channels == 2) 1475 1.3.2.2 nathanw sc->sc_play.factor *= 2; 1476 1.3.2.2 nathanw if (param->precision != 8) 1477 1.3.2.2 nathanw sc->sc_play.factor *= 2; 1478 1.3.2.2 nathanw l /= sc->sc_play.factor; 1479 1.3.2.2 nathanw 1480 1.3.2.2 nathanw psb = sc->pbankp[0]; 1481 1.3.2.2 nathanw memset(psb, 0, sizeof(*psb)); 1482 1.3.2.2 nathanw psb->format = ((channels == 2 ? PSLT_FORMAT_STEREO : 0) | 1483 1.3.2.2 nathanw (param->precision == 8 ? PSLT_FORMAT_8BIT : 0) | 1484 1.3.2.2 nathanw (p44 ? PSLT_FORMAT_SRC441 : 0)); 1485 1.3.2.2 nathanw psb->pgbase = s; 1486 1.3.2.2 nathanw psb->pgloopend = l; 1487 1.3.2.2 nathanw if (!p44) { 1488 1.3.2.2 nathanw psb->pgdeltaend = (param->sample_rate * 65536 / 48000) << 12; 1489 1.3.2.2 nathanw psb->lpfkend = yds_get_lpfk(param->sample_rate); 1490 1.3.2.2 nathanw psb->eggainend = gain; 1491 1.3.2.2 nathanw psb->lpfq = yds_get_lpfq(param->sample_rate); 1492 1.3.2.2 nathanw psb->pgdelta = psb->pgdeltaend; 1493 1.3.2.2 nathanw psb->lpfk = yds_get_lpfk(param->sample_rate); 1494 1.3.2.2 nathanw psb->eggain = gain; 1495 1.3.2.2 nathanw } 1496 1.3.2.2 nathanw 1497 1.3.2.2 nathanw for (i = 0; i < channels; i++) { 1498 1.3.2.2 nathanw /* i == 0: left or mono, i == 1: right */ 1499 1.3.2.2 nathanw psb = sc->pbankp[i*2]; 1500 1.3.2.2 nathanw if (i) 1501 1.3.2.2 nathanw /* copy from left */ 1502 1.3.2.2 nathanw *psb = *(sc->pbankp[0]); 1503 1.3.2.2 nathanw if (channels == 2) { 1504 1.3.2.2 nathanw /* stereo */ 1505 1.3.2.2 nathanw if (i == 0) { 1506 1.3.2.2 nathanw psb->lchgain = psb->lchgainend = gain; 1507 1.3.2.2 nathanw } else { 1508 1.3.2.3 nathanw psb->lchgain = psb->lchgainend = 0; 1509 1.3.2.2 nathanw psb->rchgain = psb->rchgainend = gain; 1510 1.3.2.2 nathanw psb->format |= PSLT_FORMAT_RCH; 1511 1.3.2.2 nathanw } 1512 1.3.2.2 nathanw } else if (!p44) { 1513 1.3.2.2 nathanw /* mono */ 1514 1.3.2.2 nathanw psb->lchgain = psb->rchgain = gain; 1515 1.3.2.2 nathanw psb->lchgainend = psb->rchgainend = gain; 1516 1.3.2.2 nathanw } 1517 1.3.2.2 nathanw /* copy to the other bank */ 1518 1.3.2.2 nathanw *(sc->pbankp[i*2+1]) = *psb; 1519 1.3.2.2 nathanw } 1520 1.3.2.2 nathanw 1521 1.3.2.2 nathanw YDS_DUMP_PLAY_SLOT(5, sc, 0); 1522 1.3.2.2 nathanw YDS_DUMP_PLAY_SLOT(5, sc, 1); 1523 1.3.2.2 nathanw 1524 1.3.2.2 nathanw if (p44) 1525 1.3.2.2 nathanw YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff); 1526 1.3.2.2 nathanw else 1527 1.3.2.2 nathanw YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff); 1528 1.3.2.2 nathanw 1529 1.3.2.2 nathanw /* Now the play slot for the next frame is set up!! */ 1530 1.3.2.2 nathanw /* Sync play slot control data for both directions */ 1531 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1532 1.3.2.2 nathanw sc->ptbloff, 1533 1.3.2.2 nathanw sizeof(struct play_slot_ctrl_bank) * 1534 1.3.2.2 nathanw channels * N_PLAY_SLOT_CTRL_BANK, 1535 1.3.2.2 nathanw BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1536 1.3.2.2 nathanw /* Sync ring buffer */ 1537 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize, 1538 1.3.2.2 nathanw BUS_DMASYNC_PREWRITE); 1539 1.3.2.2 nathanw /* HERE WE GO!! */ 1540 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, 1541 1.3.2.2 nathanw YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2); 1542 1.3.2.2 nathanw 1543 1.3.2.2 nathanw return 0; 1544 1.3.2.2 nathanw } 1545 1.3.2.2 nathanw #undef P44 1546 1.3.2.2 nathanw 1547 1.3.2.2 nathanw int 1548 1.3.2.2 nathanw yds_trigger_input(addr, start, end, blksize, intr, arg, param) 1549 1.3.2.2 nathanw void *addr; 1550 1.3.2.2 nathanw void *start, *end; 1551 1.3.2.2 nathanw int blksize; 1552 1.3.2.2 nathanw void (*intr) __P((void *)); 1553 1.3.2.2 nathanw void *arg; 1554 1.3.2.2 nathanw struct audio_params *param; 1555 1.3.2.2 nathanw { 1556 1.3.2.2 nathanw struct yds_softc *sc = addr; 1557 1.3.2.2 nathanw struct yds_dma *p; 1558 1.3.2.2 nathanw u_int srate, format; 1559 1.3.2.2 nathanw struct rec_slot_ctrl_bank *rsb; 1560 1.3.2.2 nathanw bus_addr_t s; 1561 1.3.2.2 nathanw size_t l; 1562 1.3.2.2 nathanw 1563 1.3.2.2 nathanw #ifdef DIAGNOSTIC 1564 1.3.2.2 nathanw if (sc->sc_rec.intr) 1565 1.3.2.2 nathanw panic("yds_trigger_input: already running"); 1566 1.3.2.2 nathanw #endif 1567 1.3.2.2 nathanw sc->sc_rec.intr = intr; 1568 1.3.2.2 nathanw sc->sc_rec.intr_arg = arg; 1569 1.3.2.2 nathanw sc->sc_rec.offset = 0; 1570 1.3.2.2 nathanw sc->sc_rec.blksize = blksize; 1571 1.3.2.2 nathanw 1572 1.3.2.2 nathanw DPRINTFN(1, ("yds_trigger_input: " 1573 1.3.2.2 nathanw "sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1574 1.3.2.2 nathanw addr, start, end, blksize, intr, arg)); 1575 1.3.2.2 nathanw DPRINTFN(1, (" parameters: rate=%lu, precision=%u, channels=%u\n", 1576 1.3.2.2 nathanw param->sample_rate, param->precision, param->channels)); 1577 1.3.2.2 nathanw 1578 1.3.2.2 nathanw p = yds_find_dma(sc, start); 1579 1.3.2.2 nathanw if (!p) { 1580 1.3.2.2 nathanw printf("yds_trigger_input: bad addr %p\n", start); 1581 1.3.2.2 nathanw return (EINVAL); 1582 1.3.2.2 nathanw } 1583 1.3.2.2 nathanw sc->sc_rec.dma = p; 1584 1.3.2.2 nathanw 1585 1.3.2.2 nathanw s = DMAADDR(p); 1586 1.3.2.2 nathanw l = ((char *)end - (char *)start); 1587 1.3.2.2 nathanw sc->sc_rec.length = l; 1588 1.3.2.2 nathanw 1589 1.3.2.2 nathanw sc->sc_rec.factor = 1; 1590 1.3.2.2 nathanw if (param->channels == 2) 1591 1.3.2.2 nathanw sc->sc_rec.factor *= 2; 1592 1.3.2.2 nathanw if (param->precision != 8) 1593 1.3.2.2 nathanw sc->sc_rec.factor *= 2; 1594 1.3.2.2 nathanw 1595 1.3.2.2 nathanw rsb = &sc->rbank[0]; 1596 1.3.2.2 nathanw memset(rsb, 0, sizeof(*rsb)); 1597 1.3.2.2 nathanw rsb->pgbase = s; 1598 1.3.2.2 nathanw rsb->pgloopendadr = l; 1599 1.3.2.2 nathanw /* Seems all 4 banks must be set up... */ 1600 1.3.2.2 nathanw sc->rbank[1] = *rsb; 1601 1.3.2.2 nathanw sc->rbank[2] = *rsb; 1602 1.3.2.2 nathanw sc->rbank[3] = *rsb; 1603 1.3.2.2 nathanw 1604 1.3.2.2 nathanw YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff); 1605 1.3.2.2 nathanw YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff); 1606 1.3.2.2 nathanw srate = 48000 * 4096 / param->sample_rate - 1; 1607 1.3.2.2 nathanw format = ((param->precision == 8 ? YDS_FORMAT_8BIT : 0) | 1608 1.3.2.2 nathanw (param->channels == 2 ? YDS_FORMAT_STEREO : 0)); 1609 1.3.2.2 nathanw DPRINTF(("srate=%d, format=%08x\n", srate, format)); 1610 1.3.2.2 nathanw #ifdef YDS_USE_REC_SLOT 1611 1.3.2.2 nathanw YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff); 1612 1.3.2.2 nathanw YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff); 1613 1.3.2.2 nathanw YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID); 1614 1.3.2.2 nathanw YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate); 1615 1.3.2.2 nathanw YWRITE4(sc, YDS_REC_FORMAT, format); 1616 1.3.2.2 nathanw #else 1617 1.3.2.2 nathanw YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID); 1618 1.3.2.2 nathanw YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate); 1619 1.3.2.2 nathanw YWRITE4(sc, YDS_ADC_FORMAT, format); 1620 1.3.2.2 nathanw #endif 1621 1.3.2.2 nathanw /* Now the rec slot for the next frame is set up!! */ 1622 1.3.2.2 nathanw /* Sync record slot control data */ 1623 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1624 1.3.2.2 nathanw sc->rbankoff, 1625 1.3.2.2 nathanw sizeof(struct rec_slot_ctrl_bank)* 1626 1.3.2.2 nathanw N_REC_SLOT_CTRL* 1627 1.3.2.2 nathanw N_REC_SLOT_CTRL_BANK, 1628 1.3.2.2 nathanw BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD); 1629 1.3.2.2 nathanw /* Sync ring buffer */ 1630 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize, 1631 1.3.2.2 nathanw BUS_DMASYNC_PREREAD); 1632 1.3.2.2 nathanw /* HERE WE GO!! */ 1633 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, 1634 1.3.2.2 nathanw YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2); 1635 1.3.2.2 nathanw 1636 1.3.2.2 nathanw return 0; 1637 1.3.2.2 nathanw } 1638 1.3.2.2 nathanw 1639 1.3.2.2 nathanw static int 1640 1.3.2.2 nathanw yds_halt(sc) 1641 1.3.2.2 nathanw struct yds_softc *sc; 1642 1.3.2.2 nathanw { 1643 1.3.2.2 nathanw u_int32_t mode; 1644 1.3.2.2 nathanw 1645 1.3.2.2 nathanw /* Stop the DSP operation. */ 1646 1.3.2.2 nathanw mode = YREAD4(sc, YDS_MODE); 1647 1.3.2.2 nathanw YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2)); 1648 1.3.2.2 nathanw 1649 1.3.2.2 nathanw /* Paranoia... mute all */ 1650 1.3.2.2 nathanw YWRITE4(sc, YDS_P44_OUT_VOLUME, 0); 1651 1.3.2.2 nathanw YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0); 1652 1.3.2.2 nathanw YWRITE4(sc, YDS_ADC_IN_VOLUME, 0); 1653 1.3.2.2 nathanw YWRITE4(sc, YDS_REC_IN_VOLUME, 0); 1654 1.3.2.2 nathanw YWRITE4(sc, YDS_DAC_REC_VOLUME, 0); 1655 1.3.2.2 nathanw YWRITE4(sc, YDS_P44_REC_VOLUME, 0); 1656 1.3.2.2 nathanw 1657 1.3.2.2 nathanw return 0; 1658 1.3.2.2 nathanw } 1659 1.3.2.2 nathanw 1660 1.3.2.2 nathanw int 1661 1.3.2.2 nathanw yds_halt_output(addr) 1662 1.3.2.2 nathanw void *addr; 1663 1.3.2.2 nathanw { 1664 1.3.2.2 nathanw struct yds_softc *sc = addr; 1665 1.3.2.2 nathanw 1666 1.3.2.2 nathanw DPRINTF(("yds: yds_halt_output\n")); 1667 1.3.2.2 nathanw if (sc->sc_play.intr) { 1668 1.3.2.2 nathanw sc->sc_play.intr = 0; 1669 1.3.2.2 nathanw /* Sync play slot control data */ 1670 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1671 1.3.2.2 nathanw sc->pbankoff, 1672 1.3.2.2 nathanw sizeof(struct play_slot_ctrl_bank)* 1673 1.3.2.2 nathanw (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK, 1674 1.3.2.2 nathanw BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD); 1675 1.3.2.2 nathanw /* Stop the play slot operation */ 1676 1.3.2.2 nathanw sc->pbankp[0]->status = 1677 1.3.2.2 nathanw sc->pbankp[1]->status = 1678 1.3.2.2 nathanw sc->pbankp[2]->status = 1679 1.3.2.2 nathanw sc->pbankp[3]->status = 1; 1680 1.3.2.2 nathanw /* Sync ring buffer */ 1681 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map, 1682 1.3.2.2 nathanw 0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE); 1683 1.3.2.2 nathanw } 1684 1.3.2.2 nathanw 1685 1.3.2.2 nathanw return 0; 1686 1.3.2.2 nathanw } 1687 1.3.2.2 nathanw 1688 1.3.2.2 nathanw int 1689 1.3.2.2 nathanw yds_halt_input(addr) 1690 1.3.2.2 nathanw void *addr; 1691 1.3.2.2 nathanw { 1692 1.3.2.2 nathanw struct yds_softc *sc = addr; 1693 1.3.2.2 nathanw 1694 1.3.2.2 nathanw DPRINTF(("yds: yds_halt_input\n")); 1695 1.3.2.2 nathanw sc->sc_rec.intr = NULL; 1696 1.3.2.2 nathanw if (sc->sc_rec.intr) { 1697 1.3.2.2 nathanw /* Stop the rec slot operation */ 1698 1.3.2.2 nathanw YWRITE4(sc, YDS_MAPOF_REC, 0); 1699 1.3.2.2 nathanw sc->sc_rec.intr = 0; 1700 1.3.2.2 nathanw /* Sync rec slot control data */ 1701 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map, 1702 1.3.2.2 nathanw sc->rbankoff, 1703 1.3.2.2 nathanw sizeof(struct rec_slot_ctrl_bank)* 1704 1.3.2.2 nathanw N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK, 1705 1.3.2.2 nathanw BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD); 1706 1.3.2.2 nathanw /* Sync ring buffer */ 1707 1.3.2.2 nathanw bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map, 1708 1.3.2.2 nathanw 0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD); 1709 1.3.2.2 nathanw } 1710 1.3.2.2 nathanw 1711 1.3.2.2 nathanw return 0; 1712 1.3.2.2 nathanw } 1713 1.3.2.2 nathanw 1714 1.3.2.2 nathanw int 1715 1.3.2.2 nathanw yds_getdev(addr, retp) 1716 1.3.2.2 nathanw void *addr; 1717 1.3.2.2 nathanw struct audio_device *retp; 1718 1.3.2.2 nathanw { 1719 1.3.2.2 nathanw *retp = yds_device; 1720 1.3.2.2 nathanw 1721 1.3.2.2 nathanw return 0; 1722 1.3.2.2 nathanw } 1723 1.3.2.2 nathanw 1724 1.3.2.2 nathanw int 1725 1.3.2.2 nathanw yds_mixer_set_port(addr, cp) 1726 1.3.2.2 nathanw void *addr; 1727 1.3.2.2 nathanw mixer_ctrl_t *cp; 1728 1.3.2.2 nathanw { 1729 1.3.2.2 nathanw struct yds_softc *sc = addr; 1730 1.3.2.2 nathanw 1731 1.3.2.2 nathanw return (sc->sc_codec[0].codec_if->vtbl->mixer_set_port( 1732 1.3.2.2 nathanw sc->sc_codec[0].codec_if, cp)); 1733 1.3.2.2 nathanw } 1734 1.3.2.2 nathanw 1735 1.3.2.2 nathanw int 1736 1.3.2.2 nathanw yds_mixer_get_port(addr, cp) 1737 1.3.2.2 nathanw void *addr; 1738 1.3.2.2 nathanw mixer_ctrl_t *cp; 1739 1.3.2.2 nathanw { 1740 1.3.2.2 nathanw struct yds_softc *sc = addr; 1741 1.3.2.2 nathanw 1742 1.3.2.2 nathanw return (sc->sc_codec[0].codec_if->vtbl->mixer_get_port( 1743 1.3.2.2 nathanw sc->sc_codec[0].codec_if, cp)); 1744 1.3.2.2 nathanw } 1745 1.3.2.2 nathanw 1746 1.3.2.2 nathanw int 1747 1.3.2.2 nathanw yds_query_devinfo(addr, dip) 1748 1.3.2.2 nathanw void *addr; 1749 1.3.2.2 nathanw mixer_devinfo_t *dip; 1750 1.3.2.2 nathanw { 1751 1.3.2.2 nathanw struct yds_softc *sc = addr; 1752 1.3.2.2 nathanw 1753 1.3.2.2 nathanw return (sc->sc_codec[0].codec_if->vtbl->query_devinfo( 1754 1.3.2.2 nathanw sc->sc_codec[0].codec_if, dip)); 1755 1.3.2.2 nathanw } 1756 1.3.2.2 nathanw 1757 1.3.2.2 nathanw int 1758 1.3.2.2 nathanw yds_get_portnum_by_name(sc, class, device, qualifier) 1759 1.3.2.2 nathanw struct yds_softc *sc; 1760 1.3.2.2 nathanw char *class, *device, *qualifier; 1761 1.3.2.2 nathanw { 1762 1.3.2.2 nathanw return (sc->sc_codec[0].codec_if->vtbl->get_portnum_by_name( 1763 1.3.2.2 nathanw sc->sc_codec[0].codec_if, class, device, qualifier)); 1764 1.3.2.2 nathanw } 1765 1.3.2.2 nathanw 1766 1.3.2.2 nathanw void * 1767 1.3.2.2 nathanw yds_malloc(addr, direction, size, pool, flags) 1768 1.3.2.2 nathanw void *addr; 1769 1.3.2.2 nathanw int direction; 1770 1.3.2.2 nathanw size_t size; 1771 1.3.2.2 nathanw int pool, flags; 1772 1.3.2.2 nathanw { 1773 1.3.2.2 nathanw struct yds_softc *sc = addr; 1774 1.3.2.2 nathanw struct yds_dma *p; 1775 1.3.2.2 nathanw int error; 1776 1.3.2.2 nathanw 1777 1.3.2.2 nathanw p = malloc(sizeof(*p), pool, flags); 1778 1.3.2.2 nathanw if (!p) 1779 1.3.2.2 nathanw return (0); 1780 1.3.2.2 nathanw error = yds_allocmem(sc, size, 16, p); 1781 1.3.2.2 nathanw if (error) { 1782 1.3.2.2 nathanw free(p, pool); 1783 1.3.2.2 nathanw return (0); 1784 1.3.2.2 nathanw } 1785 1.3.2.2 nathanw p->next = sc->sc_dmas; 1786 1.3.2.2 nathanw sc->sc_dmas = p; 1787 1.3.2.2 nathanw return (KERNADDR(p)); 1788 1.3.2.2 nathanw } 1789 1.3.2.2 nathanw 1790 1.3.2.2 nathanw void 1791 1.3.2.2 nathanw yds_free(addr, ptr, pool) 1792 1.3.2.2 nathanw void *addr; 1793 1.3.2.2 nathanw void *ptr; 1794 1.3.2.2 nathanw int pool; 1795 1.3.2.2 nathanw { 1796 1.3.2.2 nathanw struct yds_softc *sc = addr; 1797 1.3.2.2 nathanw struct yds_dma **pp, *p; 1798 1.3.2.2 nathanw 1799 1.3.2.2 nathanw for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1800 1.3.2.2 nathanw if (KERNADDR(p) == ptr) { 1801 1.3.2.2 nathanw yds_freemem(sc, p); 1802 1.3.2.2 nathanw *pp = p->next; 1803 1.3.2.2 nathanw free(p, pool); 1804 1.3.2.2 nathanw return; 1805 1.3.2.2 nathanw } 1806 1.3.2.2 nathanw } 1807 1.3.2.2 nathanw } 1808 1.3.2.2 nathanw 1809 1.3.2.2 nathanw static struct yds_dma * 1810 1.3.2.2 nathanw yds_find_dma(sc, addr) 1811 1.3.2.2 nathanw struct yds_softc *sc; 1812 1.3.2.2 nathanw void *addr; 1813 1.3.2.2 nathanw { 1814 1.3.2.2 nathanw struct yds_dma *p; 1815 1.3.2.2 nathanw 1816 1.3.2.2 nathanw for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next) 1817 1.3.2.2 nathanw ; 1818 1.3.2.2 nathanw 1819 1.3.2.2 nathanw return p; 1820 1.3.2.2 nathanw } 1821 1.3.2.2 nathanw 1822 1.3.2.2 nathanw size_t 1823 1.3.2.2 nathanw yds_round_buffersize(addr, direction, size) 1824 1.3.2.2 nathanw void *addr; 1825 1.3.2.2 nathanw int direction; 1826 1.3.2.2 nathanw size_t size; 1827 1.3.2.2 nathanw { 1828 1.3.2.2 nathanw /* 1829 1.3.2.2 nathanw * Buffer size should be at least twice as bigger as a frame. 1830 1.3.2.2 nathanw */ 1831 1.3.2.2 nathanw if (size < 1024 * 3) 1832 1.3.2.2 nathanw size = 1024 * 3; 1833 1.3.2.2 nathanw return (size); 1834 1.3.2.2 nathanw } 1835 1.3.2.2 nathanw 1836 1.3.2.2 nathanw paddr_t 1837 1.3.2.2 nathanw yds_mappage(addr, mem, off, prot) 1838 1.3.2.2 nathanw void *addr; 1839 1.3.2.2 nathanw void *mem; 1840 1.3.2.2 nathanw off_t off; 1841 1.3.2.2 nathanw int prot; 1842 1.3.2.2 nathanw { 1843 1.3.2.2 nathanw struct yds_softc *sc = addr; 1844 1.3.2.2 nathanw struct yds_dma *p; 1845 1.3.2.2 nathanw 1846 1.3.2.2 nathanw if (off < 0) 1847 1.3.2.2 nathanw return (-1); 1848 1.3.2.2 nathanw p = yds_find_dma(sc, mem); 1849 1.3.2.2 nathanw if (!p) 1850 1.3.2.2 nathanw return (-1); 1851 1.3.2.2 nathanw return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1852 1.3.2.2 nathanw off, prot, BUS_DMA_WAITOK)); 1853 1.3.2.2 nathanw } 1854 1.3.2.2 nathanw 1855 1.3.2.2 nathanw int 1856 1.3.2.2 nathanw yds_get_props(addr) 1857 1.3.2.2 nathanw void *addr; 1858 1.3.2.2 nathanw { 1859 1.3.2.2 nathanw return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1860 1.3.2.2 nathanw AUDIO_PROP_FULLDUPLEX); 1861 1.3.2.2 nathanw } 1862
Indexes created Tue Oct 07 21:09:53 GMT 2025