yds.c revision 1.61.2.2 1 1.61.2.2 isaki /* $NetBSD: yds.c,v 1.61.2.2 2019/04/29 09:32:07 isaki Exp $ */
2 1.1 minoura
3 1.1 minoura /*
4 1.1 minoura * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto.
5 1.1 minoura * All rights reserved.
6 1.1 minoura *
7 1.1 minoura * Redistribution and use in source and binary forms, with or without
8 1.1 minoura * modification, are permitted provided that the following conditions
9 1.1 minoura * are met:
10 1.1 minoura * 1. Redistributions of source code must retain the above copyright
11 1.1 minoura * notice, this list of conditions and the following disclaimer.
12 1.1 minoura * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 minoura * notice, this list of conditions and the following disclaimer in the
14 1.1 minoura * documentation and/or other materials provided with the distribution.
15 1.1 minoura *
16 1.1 minoura * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 minoura * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 minoura * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 minoura * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 minoura * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 1.1 minoura * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 1.1 minoura * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 1.1 minoura * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 1.1 minoura * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 1.1 minoura * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 1.1 minoura */
27 1.1 minoura
28 1.27 kent /*
29 1.1 minoura * Yamaha YMF724[B-F]/740[B-C]/744/754
30 1.1 minoura *
31 1.1 minoura * Documentation links:
32 1.1 minoura * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/
33 1.1 minoura * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/pci/
34 1.1 minoura *
35 1.1 minoura * TODO:
36 1.2 minoura * - FM synth volume (difficult: mixed before ac97)
37 1.1 minoura * - Digital in/out (SPDIF) support
38 1.1 minoura * - Effect??
39 1.1 minoura */
40 1.8 lukem
41 1.8 lukem #include <sys/cdefs.h>
42 1.61.2.2 isaki __KERNEL_RCSID(0, "$NetBSD: yds.c,v 1.61.2.2 2019/04/29 09:32:07 isaki Exp $");
43 1.1 minoura
44 1.1 minoura #include "mpu.h"
45 1.1 minoura
46 1.1 minoura #include <sys/param.h>
47 1.1 minoura #include <sys/systm.h>
48 1.1 minoura #include <sys/kernel.h>
49 1.1 minoura #include <sys/fcntl.h>
50 1.51 jmcneill #include <sys/kmem.h>
51 1.1 minoura #include <sys/device.h>
52 1.1 minoura #include <sys/proc.h>
53 1.1 minoura
54 1.1 minoura #include <dev/pci/pcidevs.h>
55 1.1 minoura #include <dev/pci/pcireg.h>
56 1.1 minoura #include <dev/pci/pcivar.h>
57 1.1 minoura
58 1.1 minoura #include <sys/audioio.h>
59 1.1 minoura #include <dev/audio_if.h>
60 1.1 minoura #include <dev/ic/ac97reg.h>
61 1.1 minoura #include <dev/ic/ac97var.h>
62 1.1 minoura #include <dev/ic/mpuvar.h>
63 1.1 minoura
64 1.38 ad #include <sys/bus.h>
65 1.38 ad #include <sys/intr.h>
66 1.1 minoura
67 1.1 minoura #include <dev/microcode/yds/yds_hwmcode.h>
68 1.1 minoura #include <dev/pci/ydsreg.h>
69 1.1 minoura #include <dev/pci/ydsvar.h>
70 1.1 minoura
71 1.1 minoura /* Debug */
72 1.1 minoura #undef YDS_USE_REC_SLOT
73 1.1 minoura #define YDS_USE_P44
74 1.1 minoura
75 1.1 minoura #ifdef AUDIO_DEBUG
76 1.1 minoura # define DPRINTF(x) if (ydsdebug) printf x
77 1.1 minoura # define DPRINTFN(n,x) if (ydsdebug>(n)) printf x
78 1.1 minoura int ydsdebug = 0;
79 1.1 minoura #else
80 1.1 minoura # define DPRINTF(x)
81 1.1 minoura # define DPRINTFN(n,x)
82 1.1 minoura #endif
83 1.1 minoura #ifdef YDS_USE_REC_SLOT
84 1.1 minoura # define YDS_INPUT_SLOT 0 /* REC slot = ADC + loopbacks */
85 1.1 minoura #else
86 1.1 minoura # define YDS_INPUT_SLOT 1 /* ADC slot */
87 1.1 minoura #endif
88 1.1 minoura
89 1.43 joerg static int yds_match(device_t, cfdata_t, void *);
90 1.43 joerg static void yds_attach(device_t, device_t, void *);
91 1.29 thorpej static int yds_intr(void *);
92 1.23 kent
93 1.23 kent #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr)
94 1.23 kent #define KERNADDR(p) ((void *)((p)->addr))
95 1.23 kent
96 1.29 thorpej static int yds_allocmem(struct yds_softc *, size_t, size_t,
97 1.29 thorpej struct yds_dma *);
98 1.29 thorpej static int yds_freemem(struct yds_softc *, struct yds_dma *);
99 1.1 minoura
100 1.1 minoura #ifndef AUDIO_DEBUG
101 1.1 minoura #define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
102 1.1 minoura #define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
103 1.1 minoura #define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
104 1.23 kent #define YREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r))
105 1.23 kent #define YREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r))
106 1.23 kent #define YREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r))
107 1.1 minoura #else
108 1.29 thorpej static uint16_t YREAD2(struct yds_softc *sc, bus_size_t r)
109 1.1 minoura {
110 1.23 kent DPRINTFN(5, (" YREAD2(0x%lX)\n", (unsigned long)r));
111 1.23 kent return bus_space_read_2(sc->memt, sc->memh, r);
112 1.1 minoura }
113 1.29 thorpej
114 1.29 thorpej static uint32_t YREAD4(struct yds_softc *sc, bus_size_t r)
115 1.1 minoura {
116 1.23 kent DPRINTFN(5, (" YREAD4(0x%lX)\n", (unsigned long)r));
117 1.23 kent return bus_space_read_4(sc->memt, sc->memh, r);
118 1.1 minoura }
119 1.29 thorpej
120 1.33 christos #ifdef notdef
121 1.29 thorpej static void YWRITE1(struct yds_softc *sc, bus_size_t r, uint8_t x)
122 1.1 minoura {
123 1.23 kent DPRINTFN(5, (" YWRITE1(0x%lX,0x%lX)\n", (unsigned long)r,
124 1.23 kent (unsigned long)x));
125 1.23 kent bus_space_write_1(sc->memt, sc->memh, r, x);
126 1.1 minoura }
127 1.33 christos #endif
128 1.29 thorpej
129 1.29 thorpej static void YWRITE2(struct yds_softc *sc, bus_size_t r, uint16_t x)
130 1.1 minoura {
131 1.23 kent DPRINTFN(5, (" YWRITE2(0x%lX,0x%lX)\n", (unsigned long)r,
132 1.23 kent (unsigned long)x));
133 1.23 kent bus_space_write_2(sc->memt, sc->memh, r, x);
134 1.1 minoura }
135 1.29 thorpej
136 1.29 thorpej static void YWRITE4(struct yds_softc *sc, bus_size_t r, uint32_t x)
137 1.1 minoura {
138 1.23 kent DPRINTFN(5, (" YWRITE4(0x%lX,0x%lX)\n", (unsigned long)r,
139 1.23 kent (unsigned long)x));
140 1.23 kent bus_space_write_4(sc->memt, sc->memh, r, x);
141 1.1 minoura }
142 1.1 minoura #endif
143 1.1 minoura
144 1.1 minoura #define YWRITEREGION4(sc, r, x, c) \
145 1.1 minoura bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4)
146 1.1 minoura
147 1.43 joerg CFATTACH_DECL_NEW(yds, sizeof(struct yds_softc),
148 1.15 thorpej yds_match, yds_attach, NULL, NULL);
149 1.1 minoura
150 1.29 thorpej static int yds_open(void *, int);
151 1.29 thorpej static void yds_close(void *);
152 1.61.2.2 isaki static int yds_query_format(void *, audio_format_query_t *);
153 1.61.2.2 isaki static int yds_set_format(void *, int,
154 1.61.2.2 isaki const audio_params_t *, const audio_params_t *,
155 1.61.2.2 isaki audio_filter_reg_t *, audio_filter_reg_t *);
156 1.29 thorpej static int yds_round_blocksize(void *, int, int, const audio_params_t *);
157 1.29 thorpej static int yds_trigger_output(void *, void *, void *, int,
158 1.29 thorpej void (*)(void *), void *,
159 1.29 thorpej const audio_params_t *);
160 1.29 thorpej static int yds_trigger_input(void *, void *, void *, int,
161 1.29 thorpej void (*)(void *), void *,
162 1.29 thorpej const audio_params_t *);
163 1.29 thorpej static int yds_halt_output(void *);
164 1.29 thorpej static int yds_halt_input(void *);
165 1.29 thorpej static int yds_getdev(void *, struct audio_device *);
166 1.29 thorpej static int yds_mixer_set_port(void *, mixer_ctrl_t *);
167 1.29 thorpej static int yds_mixer_get_port(void *, mixer_ctrl_t *);
168 1.56 tsutsui static void * yds_malloc(void *, int, size_t);
169 1.51 jmcneill static void yds_free(void *, void *, size_t);
170 1.29 thorpej static size_t yds_round_buffersize(void *, int, size_t);
171 1.29 thorpej static int yds_get_props(void *);
172 1.29 thorpej static int yds_query_devinfo(void *, mixer_devinfo_t *);
173 1.51 jmcneill static void yds_get_locks(void *, kmutex_t **, kmutex_t **);
174 1.29 thorpej
175 1.56 tsutsui static int yds_attach_codec(void *, struct ac97_codec_if *);
176 1.29 thorpej static int yds_read_codec(void *, uint8_t, uint16_t *);
177 1.29 thorpej static int yds_write_codec(void *, uint8_t, uint16_t);
178 1.56 tsutsui static int yds_reset_codec(void *);
179 1.23 kent
180 1.23 kent static u_int yds_get_dstype(int);
181 1.23 kent static int yds_download_mcode(struct yds_softc *);
182 1.23 kent static int yds_allocate_slots(struct yds_softc *);
183 1.46 cegger static void yds_configure_legacy(device_t);
184 1.23 kent static void yds_enable_dsp(struct yds_softc *);
185 1.23 kent static int yds_disable_dsp(struct yds_softc *);
186 1.23 kent static int yds_ready_codec(struct yds_codec_softc *);
187 1.23 kent static int yds_halt(struct yds_softc *);
188 1.27 kent static uint32_t yds_get_lpfq(u_int);
189 1.27 kent static uint32_t yds_get_lpfk(u_int);
190 1.23 kent static struct yds_dma *yds_find_dma(struct yds_softc *, void *);
191 1.1 minoura
192 1.23 kent static int yds_init(struct yds_softc *);
193 1.10 someya
194 1.1 minoura #ifdef AUDIO_DEBUG
195 1.23 kent static void yds_dump_play_slot(struct yds_softc *, int);
196 1.23 kent #define YDS_DUMP_PLAY_SLOT(n, sc, bank) \
197 1.1 minoura if (ydsdebug > (n)) yds_dump_play_slot(sc, bank)
198 1.1 minoura #else
199 1.23 kent #define YDS_DUMP_PLAY_SLOT(n, sc, bank)
200 1.1 minoura #endif /* AUDIO_DEBUG */
201 1.1 minoura
202 1.22 yamt static const struct audio_hw_if yds_hw_if = {
203 1.56 tsutsui .open = yds_open,
204 1.56 tsutsui .close = yds_close,
205 1.56 tsutsui .drain = NULL,
206 1.61.2.2 isaki .query_format = yds_query_format,
207 1.61.2.2 isaki .set_format = yds_set_format,
208 1.56 tsutsui .round_blocksize = yds_round_blocksize,
209 1.56 tsutsui .commit_settings = NULL,
210 1.56 tsutsui .init_output = NULL,
211 1.56 tsutsui .init_input = NULL,
212 1.56 tsutsui .start_output = NULL,
213 1.56 tsutsui .start_input = NULL,
214 1.56 tsutsui .halt_output = yds_halt_output,
215 1.56 tsutsui .halt_input = yds_halt_input,
216 1.56 tsutsui .speaker_ctl = NULL,
217 1.56 tsutsui .getdev = yds_getdev,
218 1.56 tsutsui .setfd = NULL,
219 1.56 tsutsui .set_port = yds_mixer_set_port,
220 1.56 tsutsui .get_port = yds_mixer_get_port,
221 1.56 tsutsui .query_devinfo = yds_query_devinfo,
222 1.56 tsutsui .allocm = yds_malloc,
223 1.56 tsutsui .freem = yds_free,
224 1.56 tsutsui .round_buffersize = yds_round_buffersize,
225 1.56 tsutsui .get_props = yds_get_props,
226 1.56 tsutsui .trigger_output = yds_trigger_output,
227 1.56 tsutsui .trigger_input = yds_trigger_input,
228 1.56 tsutsui .dev_ioctl = NULL,
229 1.56 tsutsui .get_locks = yds_get_locks,
230 1.1 minoura };
231 1.1 minoura
232 1.29 thorpej static const struct audio_device yds_device = {
233 1.56 tsutsui .name = "Yamaha DS-1",
234 1.56 tsutsui .version = "",
235 1.56 tsutsui .config = "yds"
236 1.1 minoura };
237 1.1 minoura
238 1.29 thorpej static const struct {
239 1.27 kent uint id;
240 1.1 minoura u_int flags;
241 1.1 minoura #define YDS_CAP_MCODE_1 0x0001
242 1.1 minoura #define YDS_CAP_MCODE_1E 0x0002
243 1.1 minoura #define YDS_CAP_LEGACY_SELECTABLE 0x0004
244 1.1 minoura #define YDS_CAP_LEGACY_FLEXIBLE 0x0008
245 1.1 minoura #define YDS_CAP_HAS_P44 0x0010
246 1.1 minoura } yds_chip_capabliity_list[] = {
247 1.1 minoura { PCI_PRODUCT_YAMAHA_YMF724,
248 1.1 minoura YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },
249 1.1 minoura /* 740[C] has only 32 slots. But anyway we use only 2 */
250 1.1 minoura { PCI_PRODUCT_YAMAHA_YMF740,
251 1.1 minoura YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE }, /* XXX NOT TESTED */
252 1.1 minoura { PCI_PRODUCT_YAMAHA_YMF740C,
253 1.1 minoura YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
254 1.1 minoura { PCI_PRODUCT_YAMAHA_YMF724F,
255 1.1 minoura YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
256 1.23 kent { PCI_PRODUCT_YAMAHA_YMF744B,
257 1.1 minoura YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE },
258 1.1 minoura { PCI_PRODUCT_YAMAHA_YMF754,
259 1.1 minoura YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE|YDS_CAP_HAS_P44 },
260 1.1 minoura { 0, 0 }
261 1.1 minoura };
262 1.1 minoura #ifdef AUDIO_DEBUG
263 1.1 minoura #define YDS_CAP_BITS "\020\005P44\004LEGFLEX\003LEGSEL\002MCODE1E\001MCODE1"
264 1.1 minoura #endif
265 1.1 minoura
266 1.25 kent static const struct audio_format yds_formats[] = {
267 1.61.2.2 isaki {
268 1.61.2.2 isaki .mode = AUMODE_PLAY | AUMODE_RECORD,
269 1.61.2.2 isaki .encoding = AUDIO_ENCODING_SLINEAR_LE,
270 1.61.2.2 isaki .validbits = 16,
271 1.61.2.2 isaki .precision = 16,
272 1.61.2.2 isaki .channels = 2,
273 1.61.2.2 isaki .channel_mask = AUFMT_STEREO,
274 1.61.2.2 isaki .frequency_type = 8,
275 1.61.2.2 isaki .frequency =
276 1.61.2.2 isaki { 5512, 8000, 11025, 16000, 22050, 32000, 44100, 48000 },
277 1.61.2.2 isaki },
278 1.25 kent };
279 1.25 kent #define YDS_NFORMATS (sizeof(yds_formats) / sizeof(struct audio_format))
280 1.25 kent
281 1.1 minoura #ifdef AUDIO_DEBUG
282 1.1 minoura static void
283 1.37 christos yds_dump_play_slot(struct yds_softc *sc, int bank)
284 1.1 minoura {
285 1.1 minoura int i, j;
286 1.27 kent uint32_t *p;
287 1.27 kent uint32_t num;
288 1.50 jym bus_addr_t pa;
289 1.1 minoura
290 1.1 minoura for (i = 0; i < N_PLAY_SLOTS; i++) {
291 1.1 minoura printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]);
292 1.1 minoura printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]);
293 1.1 minoura }
294 1.1 minoura
295 1.50 jym pa = DMAADDR(&sc->sc_ctrldata) + sc->pbankoff;
296 1.50 jym p = sc->ptbl;
297 1.1 minoura printf("ptbl + 0: %d\n", *p++);
298 1.1 minoura for (i = 0; i < N_PLAY_SLOTS; i++) {
299 1.50 jym printf("ptbl + %d: %#x, should be %#" PRIxPADDR "\n",
300 1.1 minoura i+1, *p,
301 1.1 minoura pa + i * sizeof(struct play_slot_ctrl_bank) *
302 1.23 kent N_PLAY_SLOT_CTRL_BANK);
303 1.1 minoura p++;
304 1.1 minoura }
305 1.1 minoura
306 1.27 kent num = le32toh(*(uint32_t*)sc->ptbl);
307 1.1 minoura printf("numofplay = %d\n", num);
308 1.1 minoura
309 1.1 minoura for (i = 0; i < num; i++) {
310 1.27 kent p = (uint32_t *)sc->pbankp[i*2];
311 1.1 minoura
312 1.1 minoura printf(" pbankp[%d], bank 0 : %p\n", i*2, p);
313 1.23 kent for (j = 0;
314 1.27 kent j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
315 1.1 minoura j++) {
316 1.1 minoura printf(" 0x%02x: 0x%08x\n",
317 1.27 kent (unsigned)(j * sizeof(uint32_t)),
318 1.1 minoura (unsigned)*p++);
319 1.1 minoura }
320 1.1 minoura
321 1.27 kent p = (uint32_t *)sc->pbankp[i*2 + 1];
322 1.1 minoura printf(" pbankp[%d], bank 1 : %p\n", i*2 + 1, p);
323 1.1 minoura for (j = 0;
324 1.27 kent j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
325 1.1 minoura j++) {
326 1.1 minoura printf(" 0x%02x: 0x%08x\n",
327 1.27 kent (unsigned)(j * sizeof(uint32_t)),
328 1.1 minoura (unsigned)*p++);
329 1.23 kent }
330 1.1 minoura }
331 1.1 minoura }
332 1.1 minoura #endif /* AUDIO_DEBUG */
333 1.1 minoura
334 1.1 minoura static u_int
335 1.23 kent yds_get_dstype(int id)
336 1.1 minoura {
337 1.1 minoura int i;
338 1.1 minoura
339 1.1 minoura for (i = 0; yds_chip_capabliity_list[i].id; i++) {
340 1.1 minoura if (PCI_PRODUCT(id) == yds_chip_capabliity_list[i].id)
341 1.1 minoura return yds_chip_capabliity_list[i].flags;
342 1.1 minoura }
343 1.1 minoura
344 1.1 minoura return -1;
345 1.1 minoura }
346 1.1 minoura
347 1.1 minoura static int
348 1.23 kent yds_download_mcode(struct yds_softc *sc)
349 1.1 minoura {
350 1.1 minoura static struct {
351 1.27 kent const uint32_t *mcode;
352 1.1 minoura size_t size;
353 1.1 minoura } ctrls[] = {
354 1.1 minoura {yds_ds1_ctrl_mcode, sizeof(yds_ds1_ctrl_mcode)},
355 1.1 minoura {yds_ds1e_ctrl_mcode, sizeof(yds_ds1e_ctrl_mcode)},
356 1.1 minoura };
357 1.27 kent u_int ctrl;
358 1.27 kent const uint32_t *p;
359 1.27 kent size_t size;
360 1.27 kent int dstype;
361 1.1 minoura
362 1.1 minoura if (sc->sc_flags & YDS_CAP_MCODE_1)
363 1.1 minoura dstype = YDS_DS_1;
364 1.1 minoura else if (sc->sc_flags & YDS_CAP_MCODE_1E)
365 1.1 minoura dstype = YDS_DS_1E;
366 1.1 minoura else
367 1.1 minoura return 1; /* unknown */
368 1.1 minoura
369 1.1 minoura if (yds_disable_dsp(sc))
370 1.1 minoura return 1;
371 1.1 minoura
372 1.1 minoura /* Software reset */
373 1.23 kent YWRITE4(sc, YDS_MODE, YDS_MODE_RESET);
374 1.23 kent YWRITE4(sc, YDS_MODE, 0);
375 1.1 minoura
376 1.23 kent YWRITE4(sc, YDS_MAPOF_REC, 0);
377 1.23 kent YWRITE4(sc, YDS_MAPOF_EFFECT, 0);
378 1.23 kent YWRITE4(sc, YDS_PLAY_CTRLBASE, 0);
379 1.23 kent YWRITE4(sc, YDS_REC_CTRLBASE, 0);
380 1.23 kent YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0);
381 1.23 kent YWRITE4(sc, YDS_WORK_BASE, 0);
382 1.1 minoura
383 1.23 kent ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL);
384 1.23 kent YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007);
385 1.1 minoura
386 1.1 minoura /* Download DSP microcode. */
387 1.1 minoura p = yds_dsp_mcode;
388 1.1 minoura size = sizeof(yds_dsp_mcode);
389 1.1 minoura YWRITEREGION4(sc, YDS_DSP_INSTRAM, p, size);
390 1.1 minoura
391 1.1 minoura /* Download CONTROL microcode. */
392 1.1 minoura p = ctrls[dstype].mcode;
393 1.1 minoura size = ctrls[dstype].size;
394 1.1 minoura YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size);
395 1.1 minoura
396 1.1 minoura yds_enable_dsp(sc);
397 1.1 minoura delay(10 * 1000); /* nessesary on my 724F (??) */
398 1.1 minoura
399 1.1 minoura return 0;
400 1.1 minoura }
401 1.1 minoura
402 1.1 minoura static int
403 1.23 kent yds_allocate_slots(struct yds_softc *sc)
404 1.1 minoura {
405 1.1 minoura size_t pcs, rcs, ecs, ws, memsize;
406 1.1 minoura void *mp;
407 1.27 kent uint32_t da; /* DMA address */
408 1.1 minoura char *va; /* KVA */
409 1.1 minoura off_t cb;
410 1.1 minoura int i;
411 1.1 minoura struct yds_dma *p;
412 1.1 minoura
413 1.1 minoura /* Alloc DSP Control Data */
414 1.27 kent pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(uint32_t);
415 1.27 kent rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(uint32_t);
416 1.27 kent ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(uint32_t);
417 1.1 minoura ws = WORK_SIZE;
418 1.27 kent YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(uint32_t));
419 1.1 minoura
420 1.3 minoura DPRINTF(("play control size : %d\n", (unsigned int)pcs));
421 1.3 minoura DPRINTF(("rec control size : %d\n", (unsigned int)rcs));
422 1.3 minoura DPRINTF(("eff control size : %d\n", (unsigned int)ecs));
423 1.54 christos #ifndef AUDIO_DEBUG
424 1.54 christos __USE(ecs);
425 1.54 christos #endif
426 1.3 minoura DPRINTF(("work size : %d\n", (unsigned int)ws));
427 1.1 minoura #ifdef DIAGNOSTIC
428 1.1 minoura if (pcs != sizeof(struct play_slot_ctrl_bank)) {
429 1.43 joerg aprint_error_dev(sc->sc_dev, "invalid play slot ctrldata %d != %d\n",
430 1.42 cegger (unsigned int)pcs,
431 1.3 minoura (unsigned int)sizeof(struct play_slot_ctrl_bank));
432 1.1 minoura if (rcs != sizeof(struct rec_slot_ctrl_bank))
433 1.43 joerg aprint_error_dev(sc->sc_dev, "invalid rec slot ctrldata %d != %d\n",
434 1.42 cegger (unsigned int)rcs,
435 1.3 minoura (unsigned int)sizeof(struct rec_slot_ctrl_bank));
436 1.1 minoura }
437 1.1 minoura #endif
438 1.1 minoura
439 1.1 minoura memsize = N_PLAY_SLOTS*N_PLAY_SLOT_CTRL_BANK*pcs +
440 1.1 minoura N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK*rcs + ws;
441 1.27 kent memsize += (N_PLAY_SLOTS+1)*sizeof(uint32_t);
442 1.1 minoura
443 1.1 minoura p = &sc->sc_ctrldata;
444 1.10 someya if (KERNADDR(p) == NULL) {
445 1.10 someya i = yds_allocmem(sc, memsize, 16, p);
446 1.10 someya if (i) {
447 1.43 joerg aprint_error_dev(sc->sc_dev, "couldn't alloc/map DSP DMA buffer, reason %d\n", i);
448 1.10 someya return 1;
449 1.10 someya }
450 1.1 minoura }
451 1.1 minoura mp = KERNADDR(p);
452 1.1 minoura da = DMAADDR(p);
453 1.1 minoura
454 1.50 jym DPRINTF(("mp:%p, DMA addr:%#" PRIxPADDR "\n",
455 1.50 jym mp, sc->sc_ctrldata.map->dm_segs[0].ds_addr));
456 1.1 minoura
457 1.6 thorpej memset(mp, 0, memsize);
458 1.1 minoura
459 1.1 minoura /* Work space */
460 1.23 kent cb = 0;
461 1.27 kent va = (uint8_t *)mp;
462 1.1 minoura YWRITE4(sc, YDS_WORK_BASE, da + cb);
463 1.23 kent cb += ws;
464 1.1 minoura
465 1.1 minoura /* Play control data table */
466 1.27 kent sc->ptbl = (uint32_t *)(va + cb);
467 1.1 minoura sc->ptbloff = cb;
468 1.23 kent YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb);
469 1.27 kent cb += (N_PLAY_SLOT_CTRL + 1) * sizeof(uint32_t);
470 1.1 minoura
471 1.1 minoura /* Record slot control data */
472 1.23 kent sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb);
473 1.23 kent YWRITE4(sc, YDS_REC_CTRLBASE, da + cb);
474 1.1 minoura sc->rbankoff = cb;
475 1.23 kent cb += N_REC_SLOT_CTRL * N_REC_SLOT_CTRL_BANK * rcs;
476 1.1 minoura
477 1.1 minoura #if 0
478 1.1 minoura /* Effect slot control data -- unused */
479 1.23 kent YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb);
480 1.23 kent cb += N_EFFECT_SLOT_CTRL * N_EFFECT_SLOT_CTRL_BANK * ecs;
481 1.1 minoura #endif
482 1.1 minoura
483 1.1 minoura /* Play slot control data */
484 1.23 kent sc->pbankoff = cb;
485 1.23 kent for (i=0; i < N_PLAY_SLOT_CTRL; i++) {
486 1.1 minoura sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb);
487 1.12 someya *(sc->ptbl + i+1) = htole32(da + cb);
488 1.23 kent cb += pcs;
489 1.1 minoura
490 1.23 kent sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb);
491 1.23 kent cb += pcs;
492 1.23 kent }
493 1.1 minoura /* Sync play control data table */
494 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, p->map,
495 1.27 kent sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(uint32_t),
496 1.23 kent BUS_DMASYNC_PREWRITE);
497 1.1 minoura
498 1.1 minoura return 0;
499 1.1 minoura }
500 1.1 minoura
501 1.1 minoura static void
502 1.23 kent yds_enable_dsp(struct yds_softc *sc)
503 1.1 minoura {
504 1.27 kent
505 1.1 minoura YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP);
506 1.1 minoura }
507 1.1 minoura
508 1.1 minoura static int
509 1.23 kent yds_disable_dsp(struct yds_softc *sc)
510 1.1 minoura {
511 1.1 minoura int to;
512 1.27 kent uint32_t data;
513 1.1 minoura
514 1.1 minoura data = YREAD4(sc, YDS_CONFIG);
515 1.1 minoura if (data)
516 1.1 minoura YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE);
517 1.1 minoura
518 1.1 minoura for (to = 0; to < YDS_WORK_TIMEOUT; to++) {
519 1.1 minoura if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0)
520 1.1 minoura return 0;
521 1.1 minoura delay(1);
522 1.1 minoura }
523 1.1 minoura
524 1.1 minoura return 1;
525 1.1 minoura }
526 1.1 minoura
527 1.29 thorpej static int
528 1.43 joerg yds_match(device_t parent, cfdata_t match, void *aux)
529 1.1 minoura {
530 1.27 kent struct pci_attach_args *pa;
531 1.1 minoura
532 1.27 kent pa = (struct pci_attach_args *)aux;
533 1.1 minoura switch (PCI_VENDOR(pa->pa_id)) {
534 1.1 minoura case PCI_VENDOR_YAMAHA:
535 1.1 minoura switch (PCI_PRODUCT(pa->pa_id)) {
536 1.1 minoura case PCI_PRODUCT_YAMAHA_YMF724:
537 1.1 minoura case PCI_PRODUCT_YAMAHA_YMF740:
538 1.1 minoura case PCI_PRODUCT_YAMAHA_YMF740C:
539 1.1 minoura case PCI_PRODUCT_YAMAHA_YMF724F:
540 1.1 minoura case PCI_PRODUCT_YAMAHA_YMF744B:
541 1.1 minoura case PCI_PRODUCT_YAMAHA_YMF754:
542 1.27 kent return 1;
543 1.1 minoura }
544 1.1 minoura break;
545 1.1 minoura }
546 1.1 minoura
547 1.27 kent return 0;
548 1.1 minoura }
549 1.1 minoura
550 1.1 minoura /*
551 1.1 minoura * This routine is called after all the ISA devices are configured,
552 1.1 minoura * to avoid conflict.
553 1.1 minoura */
554 1.1 minoura static void
555 1.43 joerg yds_configure_legacy(device_t self)
556 1.1 minoura #define FLEXIBLE (sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE)
557 1.1 minoura #define SELECTABLE (sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE)
558 1.1 minoura {
559 1.27 kent static const bus_addr_t opl_addrs[] = {0x388, 0x398, 0x3A0, 0x3A8};
560 1.27 kent static const bus_addr_t mpu_addrs[] = {0x330, 0x300, 0x332, 0x334};
561 1.27 kent struct yds_softc *sc;
562 1.1 minoura pcireg_t reg;
563 1.43 joerg device_t dev;
564 1.1 minoura int i;
565 1.1 minoura
566 1.43 joerg sc = device_private(self);
567 1.1 minoura if (!FLEXIBLE && !SELECTABLE)
568 1.1 minoura return;
569 1.1 minoura
570 1.1 minoura reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY);
571 1.1 minoura reg &= ~0x8133c03f; /* these bits are out of interest */
572 1.1 minoura reg |= ((YDS_PCI_EX_LEGACY_IMOD) |
573 1.1 minoura (YDS_PCI_LEGACY_FMEN |
574 1.1 minoura YDS_PCI_LEGACY_MEN /*| YDS_PCI_LEGACY_MIEN*/));
575 1.17 minoura reg |= YDS_PCI_EX_LEGACY_SMOD_DISABLE;
576 1.1 minoura if (FLEXIBLE) {
577 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
578 1.1 minoura delay(100*1000);
579 1.1 minoura }
580 1.1 minoura
581 1.1 minoura /* Look for OPL */
582 1.1 minoura dev = 0;
583 1.1 minoura for (i = 0; i < sizeof(opl_addrs) / sizeof(bus_addr_t); i++) {
584 1.1 minoura if (SELECTABLE) {
585 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
586 1.1 minoura YDS_PCI_LEGACY, reg | (i << (0+16)));
587 1.1 minoura delay(100*1000); /* wait 100ms */
588 1.1 minoura } else
589 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
590 1.1 minoura YDS_PCI_FM_BA, opl_addrs[i]);
591 1.1 minoura if (bus_space_map(sc->sc_opl_iot,
592 1.1 minoura opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) {
593 1.23 kent struct audio_attach_args aa;
594 1.1 minoura
595 1.1 minoura aa.type = AUDIODEV_TYPE_OPL;
596 1.1 minoura aa.hwif = aa.hdl = NULL;
597 1.43 joerg dev = config_found(self, &aa, audioprint);
598 1.1 minoura if (dev == 0)
599 1.1 minoura bus_space_unmap(sc->sc_opl_iot,
600 1.1 minoura sc->sc_opl_ioh, 4);
601 1.1 minoura else {
602 1.1 minoura if (SELECTABLE)
603 1.1 minoura reg |= (i << (0+16));
604 1.1 minoura break;
605 1.1 minoura }
606 1.23 kent }
607 1.1 minoura }
608 1.1 minoura if (dev == 0) {
609 1.1 minoura reg &= ~YDS_PCI_LEGACY_FMEN;
610 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
611 1.1 minoura YDS_PCI_LEGACY, reg);
612 1.1 minoura } else {
613 1.1 minoura /* Max. volume */
614 1.1 minoura YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff);
615 1.1 minoura YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff);
616 1.1 minoura }
617 1.1 minoura
618 1.1 minoura /* Look for MPU */
619 1.43 joerg dev = NULL;
620 1.1 minoura for (i = 0; i < sizeof(mpu_addrs) / sizeof(bus_addr_t); i++) {
621 1.1 minoura if (SELECTABLE)
622 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
623 1.1 minoura YDS_PCI_LEGACY, reg | (i << (4+16)));
624 1.1 minoura else
625 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
626 1.1 minoura YDS_PCI_MPU_BA, mpu_addrs[i]);
627 1.1 minoura if (bus_space_map(sc->sc_mpu_iot,
628 1.1 minoura mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) {
629 1.23 kent struct audio_attach_args aa;
630 1.1 minoura
631 1.1 minoura aa.type = AUDIODEV_TYPE_MPU;
632 1.1 minoura aa.hwif = aa.hdl = NULL;
633 1.43 joerg dev = config_found(self, &aa, audioprint);
634 1.1 minoura if (dev == 0)
635 1.1 minoura bus_space_unmap(sc->sc_mpu_iot,
636 1.1 minoura sc->sc_mpu_ioh, 2);
637 1.1 minoura else {
638 1.1 minoura if (SELECTABLE)
639 1.1 minoura reg |= (i << (4+16));
640 1.1 minoura break;
641 1.1 minoura }
642 1.1 minoura }
643 1.1 minoura }
644 1.1 minoura if (dev == 0) {
645 1.1 minoura reg &= ~(YDS_PCI_LEGACY_MEN | YDS_PCI_LEGACY_MIEN);
646 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
647 1.1 minoura }
648 1.1 minoura sc->sc_mpu = dev;
649 1.23 kent }
650 1.1 minoura #undef FLEXIBLE
651 1.1 minoura #undef SELECTABLE
652 1.1 minoura
653 1.10 someya static int
654 1.23 kent yds_init(struct yds_softc *sc)
655 1.10 someya {
656 1.27 kent uint32_t reg;
657 1.10 someya
658 1.10 someya DPRINTF(("yds_init()\n"));
659 1.10 someya
660 1.10 someya /* Download microcode */
661 1.10 someya if (yds_download_mcode(sc)) {
662 1.43 joerg aprint_error_dev(sc->sc_dev, "download microcode failed\n");
663 1.10 someya return 1;
664 1.10 someya }
665 1.10 someya
666 1.10 someya /* Allocate DMA buffers */
667 1.10 someya if (yds_allocate_slots(sc)) {
668 1.43 joerg aprint_error_dev(sc->sc_dev, "could not allocate slots\n");
669 1.10 someya return 1;
670 1.10 someya }
671 1.10 someya
672 1.10 someya /* Warm reset */
673 1.10 someya reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
674 1.10 someya pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
675 1.10 someya reg | YDS_DSCTRL_WRST);
676 1.10 someya delay(50000);
677 1.10 someya
678 1.10 someya return 0;
679 1.10 someya }
680 1.10 someya
681 1.39 jmcneill static bool
682 1.49 dyoung yds_suspend(device_t dv, const pmf_qual_t *qual)
683 1.39 jmcneill {
684 1.39 jmcneill struct yds_softc *sc = device_private(dv);
685 1.39 jmcneill pci_chipset_tag_t pc = sc->sc_pc;
686 1.39 jmcneill pcitag_t tag = sc->sc_pcitag;
687 1.39 jmcneill
688 1.51 jmcneill mutex_enter(&sc->sc_lock);
689 1.51 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
690 1.59 christos sc->sc_enabled = 0;
691 1.39 jmcneill sc->sc_dsctrl = pci_conf_read(pc, tag, YDS_PCI_DSCTRL);
692 1.39 jmcneill sc->sc_legacy = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
693 1.39 jmcneill sc->sc_ba[0] = pci_conf_read(pc, tag, YDS_PCI_FM_BA);
694 1.39 jmcneill sc->sc_ba[1] = pci_conf_read(pc, tag, YDS_PCI_MPU_BA);
695 1.51 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
696 1.51 jmcneill mutex_exit(&sc->sc_lock);
697 1.39 jmcneill
698 1.39 jmcneill return true;
699 1.39 jmcneill }
700 1.39 jmcneill
701 1.39 jmcneill static bool
702 1.49 dyoung yds_resume(device_t dv, const pmf_qual_t *qual)
703 1.10 someya {
704 1.39 jmcneill struct yds_softc *sc = device_private(dv);
705 1.39 jmcneill pci_chipset_tag_t pc = sc->sc_pc;
706 1.39 jmcneill pcitag_t tag = sc->sc_pcitag;
707 1.32 jmcneill pcireg_t reg;
708 1.32 jmcneill
709 1.39 jmcneill /* Disable legacy mode */
710 1.51 jmcneill mutex_enter(&sc->sc_lock);
711 1.51 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
712 1.39 jmcneill reg = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
713 1.39 jmcneill pci_conf_write(pc, tag, YDS_PCI_LEGACY, reg & YDS_PCI_LEGACY_LAD);
714 1.10 someya
715 1.39 jmcneill /* Enable the device. */
716 1.39 jmcneill reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
717 1.39 jmcneill reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
718 1.39 jmcneill PCI_COMMAND_MASTER_ENABLE);
719 1.39 jmcneill pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg);
720 1.39 jmcneill reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
721 1.59 christos mutex_spin_exit(&sc->sc_intr_lock);
722 1.39 jmcneill if (yds_init(sc)) {
723 1.39 jmcneill aprint_error_dev(dv, "reinitialize failed\n");
724 1.51 jmcneill mutex_exit(&sc->sc_lock);
725 1.39 jmcneill return false;
726 1.10 someya }
727 1.32 jmcneill
728 1.39 jmcneill pci_conf_write(pc, tag, YDS_PCI_DSCTRL, sc->sc_dsctrl);
729 1.59 christos sc->sc_enabled = 1;
730 1.51 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
731 1.39 jmcneill sc->sc_codec[0].codec_if->vtbl->restore_ports(sc->sc_codec[0].codec_if);
732 1.51 jmcneill mutex_exit(&sc->sc_lock);
733 1.39 jmcneill
734 1.39 jmcneill return true;
735 1.10 someya }
736 1.10 someya
737 1.29 thorpej static void
738 1.43 joerg yds_attach(device_t parent, device_t self, void *aux)
739 1.1 minoura {
740 1.27 kent struct yds_softc *sc;
741 1.27 kent struct pci_attach_args *pa;
742 1.27 kent pci_chipset_tag_t pc;
743 1.1 minoura char const *intrstr;
744 1.1 minoura pci_intr_handle_t ih;
745 1.1 minoura pcireg_t reg;
746 1.1 minoura struct yds_codec_softc *codec;
747 1.1 minoura int i, r, to;
748 1.1 minoura int revision;
749 1.1 minoura int ac97_id2;
750 1.55 christos char intrbuf[PCI_INTRSTR_LEN];
751 1.1 minoura
752 1.43 joerg sc = device_private(self);
753 1.43 joerg sc->sc_dev = self;
754 1.27 kent pa = (struct pci_attach_args *)aux;
755 1.27 kent pc = pa->pa_pc;
756 1.1 minoura revision = PCI_REVISION(pa->pa_class);
757 1.53 drochner
758 1.53 drochner pci_aprint_devinfo(pa, NULL);
759 1.1 minoura
760 1.1 minoura /* Map register to memory */
761 1.1 minoura if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0,
762 1.1 minoura &sc->memt, &sc->memh, NULL, NULL)) {
763 1.43 joerg aprint_error_dev(self, "can't map memory space\n");
764 1.1 minoura return;
765 1.1 minoura }
766 1.1 minoura
767 1.1 minoura /* Map and establish the interrupt. */
768 1.1 minoura if (pci_intr_map(pa, &ih)) {
769 1.43 joerg aprint_error_dev(self, "couldn't map interrupt\n");
770 1.1 minoura return;
771 1.1 minoura }
772 1.51 jmcneill
773 1.61 isaki mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
774 1.52 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
775 1.51 jmcneill
776 1.55 christos intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
777 1.60 jdolecek sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, yds_intr, sc,
778 1.60 jdolecek device_xname(self));
779 1.1 minoura if (sc->sc_ih == NULL) {
780 1.43 joerg aprint_error_dev(self, "couldn't establish interrupt");
781 1.1 minoura if (intrstr != NULL)
782 1.47 njoly aprint_error(" at %s", intrstr);
783 1.47 njoly aprint_error("\n");
784 1.51 jmcneill mutex_destroy(&sc->sc_lock);
785 1.51 jmcneill mutex_destroy(&sc->sc_intr_lock);
786 1.1 minoura return;
787 1.1 minoura }
788 1.47 njoly aprint_normal_dev(self, "interrupting at %s\n", intrstr);
789 1.1 minoura
790 1.59 christos sc->sc_enabled = 0;
791 1.1 minoura sc->sc_dmatag = pa->pa_dmat;
792 1.1 minoura sc->sc_pc = pc;
793 1.1 minoura sc->sc_pcitag = pa->pa_tag;
794 1.1 minoura sc->sc_id = pa->pa_id;
795 1.9 someya sc->sc_revision = revision;
796 1.1 minoura sc->sc_flags = yds_get_dstype(sc->sc_id);
797 1.1 minoura #ifdef AUDIO_DEBUG
798 1.1 minoura if (ydsdebug) {
799 1.1 minoura char bits[80];
800 1.1 minoura
801 1.45 cegger snprintb(bits, sizeof(bits), YDS_CAP_BITS, sc->sc_flags);
802 1.44 christos printf("%s: chip has %s\n", device_xname(self), bits);
803 1.1 minoura }
804 1.1 minoura #endif
805 1.1 minoura
806 1.1 minoura /* Disable legacy mode */
807 1.1 minoura reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY);
808 1.1 minoura pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY,
809 1.1 minoura reg & YDS_PCI_LEGACY_LAD);
810 1.1 minoura
811 1.1 minoura /* Enable the device. */
812 1.1 minoura reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
813 1.1 minoura reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
814 1.1 minoura PCI_COMMAND_MASTER_ENABLE);
815 1.1 minoura pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
816 1.1 minoura reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
817 1.1 minoura
818 1.1 minoura /* Mute all volumes */
819 1.1 minoura for (i = 0x80; i < 0xc0; i += 2)
820 1.1 minoura YWRITE2(sc, i, 0);
821 1.1 minoura
822 1.10 someya /* Initialize the device */
823 1.10 someya if (yds_init(sc)) {
824 1.43 joerg aprint_error_dev(self, "initialize failed\n");
825 1.51 jmcneill mutex_destroy(&sc->sc_lock);
826 1.51 jmcneill mutex_destroy(&sc->sc_intr_lock);
827 1.1 minoura return;
828 1.1 minoura }
829 1.1 minoura
830 1.1 minoura /*
831 1.1 minoura * Detect primary/secondary AC97
832 1.1 minoura * YMF754 Hardware Specification Rev 1.01 page 24
833 1.1 minoura */
834 1.1 minoura reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL);
835 1.1 minoura pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
836 1.1 minoura delay(400000); /* Needed for 740C. */
837 1.1 minoura
838 1.1 minoura /* Primary */
839 1.1 minoura for (to = 0; to < AC97_TIMEOUT; to++) {
840 1.1 minoura if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
841 1.1 minoura break;
842 1.1 minoura delay(1);
843 1.1 minoura }
844 1.1 minoura if (to == AC97_TIMEOUT) {
845 1.43 joerg aprint_error_dev(self, "no AC97 available\n");
846 1.51 jmcneill mutex_destroy(&sc->sc_lock);
847 1.51 jmcneill mutex_destroy(&sc->sc_intr_lock);
848 1.1 minoura return;
849 1.1 minoura }
850 1.1 minoura
851 1.1 minoura /* Secondary */
852 1.1 minoura /* Secondary AC97 is used for 4ch audio. Currently unused. */
853 1.1 minoura ac97_id2 = -1;
854 1.1 minoura if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0)
855 1.1 minoura goto detected;
856 1.1 minoura #if 0 /* reset secondary... */
857 1.1 minoura YWRITE2(sc, YDS_GPIO_OCTRL,
858 1.1 minoura YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2);
859 1.1 minoura YWRITE2(sc, YDS_GPIO_FUNCE,
860 1.1 minoura (YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2);
861 1.1 minoura #endif
862 1.1 minoura for (to = 0; to < AC97_TIMEOUT; to++) {
863 1.1 minoura if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0)
864 1.1 minoura break;
865 1.1 minoura delay(1);
866 1.1 minoura }
867 1.1 minoura if (to < AC97_TIMEOUT) {
868 1.1 minoura /* detect id */
869 1.1 minoura for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) {
870 1.1 minoura YWRITE2(sc, AC97_CMD_ADDR,
871 1.1 minoura AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28);
872 1.1 minoura
873 1.1 minoura for (to = 0; to < AC97_TIMEOUT; to++) {
874 1.1 minoura if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY)
875 1.1 minoura == 0)
876 1.1 minoura goto detected;
877 1.1 minoura delay(1);
878 1.1 minoura }
879 1.1 minoura }
880 1.1 minoura if (ac97_id2 == 4)
881 1.1 minoura ac97_id2 = -1;
882 1.1 minoura detected:
883 1.4 lukem ;
884 1.1 minoura }
885 1.1 minoura
886 1.1 minoura pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST);
887 1.1 minoura delay (20);
888 1.1 minoura pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
889 1.1 minoura delay (400000);
890 1.1 minoura for (to = 0; to < AC97_TIMEOUT; to++) {
891 1.1 minoura if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
892 1.1 minoura break;
893 1.1 minoura delay(1);
894 1.1 minoura }
895 1.1 minoura
896 1.1 minoura /*
897 1.1 minoura * Attach ac97 codec
898 1.1 minoura */
899 1.1 minoura for (i = 0; i < 2; i++) {
900 1.1 minoura static struct {
901 1.1 minoura int data;
902 1.1 minoura int addr;
903 1.1 minoura } statregs[] = {
904 1.1 minoura {AC97_STAT_DATA1, AC97_STAT_ADDR1},
905 1.1 minoura {AC97_STAT_DATA2, AC97_STAT_ADDR2},
906 1.1 minoura };
907 1.1 minoura
908 1.1 minoura if (i == 1 && ac97_id2 == -1)
909 1.1 minoura break; /* secondary ac97 not available */
910 1.1 minoura
911 1.1 minoura codec = &sc->sc_codec[i];
912 1.1 minoura codec->sc = sc;
913 1.1 minoura codec->id = i == 1 ? ac97_id2 : 0;
914 1.1 minoura codec->status_data = statregs[i].data;
915 1.1 minoura codec->status_addr = statregs[i].addr;
916 1.1 minoura codec->host_if.arg = codec;
917 1.1 minoura codec->host_if.attach = yds_attach_codec;
918 1.1 minoura codec->host_if.read = yds_read_codec;
919 1.1 minoura codec->host_if.write = yds_write_codec;
920 1.1 minoura codec->host_if.reset = yds_reset_codec;
921 1.1 minoura
922 1.51 jmcneill r = ac97_attach(&codec->host_if, self, &sc->sc_lock);
923 1.51 jmcneill if (r != 0) {
924 1.57 msaitoh aprint_error_dev(self,
925 1.57 msaitoh "can't attach codec (error 0x%X)\n", r);
926 1.51 jmcneill mutex_destroy(&sc->sc_lock);
927 1.51 jmcneill mutex_destroy(&sc->sc_intr_lock);
928 1.1 minoura return;
929 1.1 minoura }
930 1.1 minoura }
931 1.1 minoura
932 1.43 joerg audio_attach_mi(&yds_hw_if, sc, self);
933 1.1 minoura
934 1.1 minoura sc->sc_legacy_iot = pa->pa_iot;
935 1.43 joerg config_defer(self, yds_configure_legacy);
936 1.10 someya
937 1.39 jmcneill if (!pmf_device_register(self, yds_suspend, yds_resume))
938 1.39 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
939 1.59 christos
940 1.59 christos mutex_spin_enter(&sc->sc_intr_lock);
941 1.59 christos sc->sc_enabled = 1;
942 1.59 christos mutex_spin_exit(&sc->sc_intr_lock);
943 1.1 minoura }
944 1.1 minoura
945 1.29 thorpej static int
946 1.23 kent yds_attach_codec(void *sc_, struct ac97_codec_if *codec_if)
947 1.1 minoura {
948 1.27 kent struct yds_codec_softc *sc;
949 1.1 minoura
950 1.27 kent sc = sc_;
951 1.1 minoura sc->codec_if = codec_if;
952 1.1 minoura return 0;
953 1.1 minoura }
954 1.1 minoura
955 1.1 minoura static int
956 1.23 kent yds_ready_codec(struct yds_codec_softc *sc)
957 1.1 minoura {
958 1.1 minoura int to;
959 1.1 minoura
960 1.1 minoura for (to = 0; to < AC97_TIMEOUT; to++) {
961 1.1 minoura if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0)
962 1.1 minoura return 0;
963 1.1 minoura delay(1);
964 1.1 minoura }
965 1.1 minoura
966 1.1 minoura return 1;
967 1.1 minoura }
968 1.1 minoura
969 1.29 thorpej static int
970 1.27 kent yds_read_codec(void *sc_, uint8_t reg, uint16_t *data)
971 1.1 minoura {
972 1.27 kent struct yds_codec_softc *sc;
973 1.1 minoura
974 1.27 kent sc = sc_;
975 1.1 minoura YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg);
976 1.1 minoura
977 1.1 minoura if (yds_ready_codec(sc)) {
978 1.43 joerg aprint_error_dev(sc->sc->sc_dev, "yds_read_codec timeout\n");
979 1.1 minoura return EIO;
980 1.9 someya }
981 1.9 someya
982 1.9 someya if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744B &&
983 1.9 someya sc->sc->sc_revision < 2) {
984 1.9 someya int i;
985 1.9 someya for (i=0; i<600; i++)
986 1.31 nakayama (void)YREAD2(sc->sc, sc->status_data);
987 1.1 minoura }
988 1.1 minoura
989 1.1 minoura *data = YREAD2(sc->sc, sc->status_data);
990 1.1 minoura
991 1.1 minoura return 0;
992 1.1 minoura }
993 1.1 minoura
994 1.29 thorpej static int
995 1.27 kent yds_write_codec(void *sc_, uint8_t reg, uint16_t data)
996 1.1 minoura {
997 1.27 kent struct yds_codec_softc *sc;
998 1.1 minoura
999 1.27 kent sc = sc_;
1000 1.1 minoura YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg);
1001 1.1 minoura YWRITE2(sc->sc, AC97_CMD_DATA, data);
1002 1.1 minoura
1003 1.1 minoura if (yds_ready_codec(sc)) {
1004 1.43 joerg aprint_error_dev(sc->sc->sc_dev, "yds_write_codec timeout\n");
1005 1.1 minoura return EIO;
1006 1.1 minoura }
1007 1.1 minoura
1008 1.1 minoura return 0;
1009 1.1 minoura }
1010 1.1 minoura
1011 1.1 minoura /*
1012 1.1 minoura * XXX: Must handle the secondary differntly!!
1013 1.1 minoura */
1014 1.29 thorpej static int
1015 1.23 kent yds_reset_codec(void *sc_)
1016 1.1 minoura {
1017 1.27 kent struct yds_codec_softc *codec;
1018 1.27 kent struct yds_softc *sc;
1019 1.1 minoura pcireg_t reg;
1020 1.1 minoura
1021 1.27 kent codec = sc_;
1022 1.27 kent sc = codec->sc;
1023 1.1 minoura /* reset AC97 codec */
1024 1.1 minoura reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
1025 1.1 minoura if (reg & 0x03) {
1026 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1027 1.1 minoura YDS_PCI_DSCTRL, reg & ~0x03);
1028 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1029 1.1 minoura YDS_PCI_DSCTRL, reg | 0x03);
1030 1.1 minoura pci_conf_write(sc->sc_pc, sc->sc_pcitag,
1031 1.1 minoura YDS_PCI_DSCTRL, reg & ~0x03);
1032 1.1 minoura delay(50000);
1033 1.1 minoura }
1034 1.1 minoura
1035 1.1 minoura yds_ready_codec(sc_);
1036 1.21 kent return 0;
1037 1.1 minoura }
1038 1.1 minoura
1039 1.29 thorpej static int
1040 1.23 kent yds_intr(void *p)
1041 1.1 minoura {
1042 1.41 xtraeme struct yds_softc *sc = p;
1043 1.41 xtraeme #if NMPU > 0
1044 1.41 xtraeme struct mpu_softc *sc_mpu = device_private(sc->sc_mpu);
1045 1.41 xtraeme #endif
1046 1.1 minoura u_int status;
1047 1.1 minoura
1048 1.51 jmcneill mutex_spin_enter(&sc->sc_intr_lock);
1049 1.59 christos if (!sc->sc_enabled) {
1050 1.59 christos mutex_spin_exit(&sc->sc_intr_lock);
1051 1.59 christos return 0;
1052 1.59 christos }
1053 1.51 jmcneill
1054 1.1 minoura status = YREAD4(sc, YDS_STATUS);
1055 1.1 minoura DPRINTFN(1, ("yds_intr: status=%08x\n", status));
1056 1.1 minoura if ((status & (YDS_STAT_INT|YDS_STAT_TINT)) == 0) {
1057 1.1 minoura #if NMPU > 0
1058 1.41 xtraeme if (sc_mpu)
1059 1.41 xtraeme return mpu_intr(sc_mpu);
1060 1.1 minoura #endif
1061 1.51 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
1062 1.1 minoura return 0;
1063 1.1 minoura }
1064 1.1 minoura
1065 1.1 minoura if (status & YDS_STAT_TINT) {
1066 1.1 minoura YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT);
1067 1.1 minoura printf ("yds_intr: timeout!\n");
1068 1.1 minoura }
1069 1.1 minoura
1070 1.1 minoura if (status & YDS_STAT_INT) {
1071 1.27 kent int nbank;
1072 1.1 minoura
1073 1.27 kent nbank = (YREAD4(sc, YDS_CONTROL_SELECT) == 0);
1074 1.1 minoura /* Clear interrupt flag */
1075 1.1 minoura YWRITE4(sc, YDS_STATUS, YDS_STAT_INT);
1076 1.1 minoura
1077 1.1 minoura /* Buffer for the next frame is always ready. */
1078 1.1 minoura YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2);
1079 1.1 minoura
1080 1.1 minoura if (sc->sc_play.intr) {
1081 1.28 christos u_int dma, ccpu, blk, len;
1082 1.1 minoura
1083 1.1 minoura /* Sync play slot control data */
1084 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1085 1.1 minoura sc->pbankoff,
1086 1.1 minoura sizeof(struct play_slot_ctrl_bank)*
1087 1.12 someya le32toh(*sc->ptbl)*
1088 1.1 minoura N_PLAY_SLOT_CTRL_BANK,
1089 1.1 minoura BUS_DMASYNC_POSTWRITE|
1090 1.1 minoura BUS_DMASYNC_POSTREAD);
1091 1.12 someya dma = le32toh(sc->pbankp[nbank]->pgstart) * sc->sc_play.factor;
1092 1.28 christos ccpu = sc->sc_play.offset;
1093 1.1 minoura blk = sc->sc_play.blksize;
1094 1.1 minoura len = sc->sc_play.length;
1095 1.1 minoura
1096 1.28 christos if (((dma > ccpu) && (dma - ccpu > blk * 2)) ||
1097 1.28 christos ((ccpu > dma) && (dma + len - ccpu > blk * 2))) {
1098 1.1 minoura /* We can fill the next block */
1099 1.1 minoura /* Sync ring buffer for previous write */
1100 1.1 minoura bus_dmamap_sync(sc->sc_dmatag,
1101 1.1 minoura sc->sc_play.dma->map,
1102 1.28 christos ccpu, blk,
1103 1.1 minoura BUS_DMASYNC_POSTWRITE);
1104 1.1 minoura sc->sc_play.intr(sc->sc_play.intr_arg);
1105 1.1 minoura sc->sc_play.offset += blk;
1106 1.1 minoura if (sc->sc_play.offset >= len) {
1107 1.1 minoura sc->sc_play.offset -= len;
1108 1.1 minoura #ifdef DIAGNOSTIC
1109 1.1 minoura if (sc->sc_play.offset != 0)
1110 1.1 minoura printf ("Audio ringbuffer botch\n");
1111 1.1 minoura #endif
1112 1.1 minoura }
1113 1.1 minoura /* Sync ring buffer for next write */
1114 1.1 minoura bus_dmamap_sync(sc->sc_dmatag,
1115 1.1 minoura sc->sc_play.dma->map,
1116 1.28 christos ccpu, blk,
1117 1.1 minoura BUS_DMASYNC_PREWRITE);
1118 1.1 minoura }
1119 1.1 minoura }
1120 1.1 minoura if (sc->sc_rec.intr) {
1121 1.28 christos u_int dma, ccpu, blk, len;
1122 1.1 minoura
1123 1.1 minoura /* Sync rec slot control data */
1124 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1125 1.1 minoura sc->rbankoff,
1126 1.1 minoura sizeof(struct rec_slot_ctrl_bank)*
1127 1.1 minoura N_REC_SLOT_CTRL*
1128 1.1 minoura N_REC_SLOT_CTRL_BANK,
1129 1.1 minoura BUS_DMASYNC_POSTWRITE|
1130 1.1 minoura BUS_DMASYNC_POSTREAD);
1131 1.12 someya dma = le32toh(sc->rbank[YDS_INPUT_SLOT*2 + nbank].pgstartadr);
1132 1.28 christos ccpu = sc->sc_rec.offset;
1133 1.1 minoura blk = sc->sc_rec.blksize;
1134 1.1 minoura len = sc->sc_rec.length;
1135 1.1 minoura
1136 1.28 christos if (((dma > ccpu) && (dma - ccpu > blk * 2)) ||
1137 1.28 christos ((ccpu > dma) && (dma + len - ccpu > blk * 2))) {
1138 1.1 minoura /* We can drain the current block */
1139 1.1 minoura /* Sync ring buffer first */
1140 1.1 minoura bus_dmamap_sync(sc->sc_dmatag,
1141 1.1 minoura sc->sc_rec.dma->map,
1142 1.28 christos ccpu, blk,
1143 1.1 minoura BUS_DMASYNC_POSTREAD);
1144 1.1 minoura sc->sc_rec.intr(sc->sc_rec.intr_arg);
1145 1.1 minoura sc->sc_rec.offset += blk;
1146 1.1 minoura if (sc->sc_rec.offset >= len) {
1147 1.1 minoura sc->sc_rec.offset -= len;
1148 1.1 minoura #ifdef DIAGNOSTIC
1149 1.1 minoura if (sc->sc_rec.offset != 0)
1150 1.1 minoura printf ("Audio ringbuffer botch\n");
1151 1.1 minoura #endif
1152 1.1 minoura }
1153 1.1 minoura /* Sync ring buffer for next read */
1154 1.1 minoura bus_dmamap_sync(sc->sc_dmatag,
1155 1.1 minoura sc->sc_rec.dma->map,
1156 1.28 christos ccpu, blk,
1157 1.1 minoura BUS_DMASYNC_PREREAD);
1158 1.1 minoura }
1159 1.1 minoura }
1160 1.1 minoura }
1161 1.1 minoura
1162 1.51 jmcneill mutex_spin_exit(&sc->sc_intr_lock);
1163 1.1 minoura return 1;
1164 1.1 minoura }
1165 1.1 minoura
1166 1.29 thorpej static int
1167 1.23 kent yds_allocmem(struct yds_softc *sc, size_t size, size_t align, struct yds_dma *p)
1168 1.1 minoura {
1169 1.1 minoura int error;
1170 1.1 minoura
1171 1.1 minoura p->size = size;
1172 1.1 minoura error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
1173 1.1 minoura p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
1174 1.51 jmcneill &p->nsegs, BUS_DMA_WAITOK);
1175 1.1 minoura if (error)
1176 1.27 kent return error;
1177 1.1 minoura
1178 1.23 kent error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
1179 1.51 jmcneill &p->addr, BUS_DMA_WAITOK|BUS_DMA_COHERENT);
1180 1.1 minoura if (error)
1181 1.1 minoura goto free;
1182 1.1 minoura
1183 1.1 minoura error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
1184 1.51 jmcneill 0, BUS_DMA_WAITOK, &p->map);
1185 1.1 minoura if (error)
1186 1.1 minoura goto unmap;
1187 1.1 minoura
1188 1.23 kent error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
1189 1.51 jmcneill BUS_DMA_WAITOK);
1190 1.1 minoura if (error)
1191 1.1 minoura goto destroy;
1192 1.27 kent return 0;
1193 1.1 minoura
1194 1.1 minoura destroy:
1195 1.1 minoura bus_dmamap_destroy(sc->sc_dmatag, p->map);
1196 1.1 minoura unmap:
1197 1.1 minoura bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
1198 1.1 minoura free:
1199 1.1 minoura bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
1200 1.27 kent return error;
1201 1.1 minoura }
1202 1.1 minoura
1203 1.29 thorpej static int
1204 1.23 kent yds_freemem(struct yds_softc *sc, struct yds_dma *p)
1205 1.1 minoura {
1206 1.27 kent
1207 1.1 minoura bus_dmamap_unload(sc->sc_dmatag, p->map);
1208 1.1 minoura bus_dmamap_destroy(sc->sc_dmatag, p->map);
1209 1.1 minoura bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
1210 1.1 minoura bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
1211 1.1 minoura return 0;
1212 1.1 minoura }
1213 1.1 minoura
1214 1.29 thorpej static int
1215 1.37 christos yds_open(void *addr, int flags)
1216 1.1 minoura {
1217 1.27 kent struct yds_softc *sc;
1218 1.27 kent uint32_t mode;
1219 1.1 minoura
1220 1.27 kent sc = addr;
1221 1.1 minoura /* Select bank 0. */
1222 1.1 minoura YWRITE4(sc, YDS_CONTROL_SELECT, 0);
1223 1.1 minoura
1224 1.1 minoura /* Start the DSP operation. */
1225 1.1 minoura mode = YREAD4(sc, YDS_MODE);
1226 1.1 minoura mode |= YDS_MODE_ACTV;
1227 1.1 minoura mode &= ~YDS_MODE_ACTV2;
1228 1.1 minoura YWRITE4(sc, YDS_MODE, mode);
1229 1.1 minoura
1230 1.1 minoura return 0;
1231 1.1 minoura }
1232 1.1 minoura
1233 1.29 thorpej static void
1234 1.23 kent yds_close(void *addr)
1235 1.1 minoura {
1236 1.1 minoura
1237 1.27 kent yds_halt(addr);
1238 1.1 minoura }
1239 1.1 minoura
1240 1.29 thorpej static int
1241 1.61.2.2 isaki yds_query_format(void *addr, audio_format_query_t *afp)
1242 1.1 minoura {
1243 1.25 kent
1244 1.61.2.2 isaki return audio_query_format(yds_formats, YDS_NFORMATS, afp);
1245 1.1 minoura }
1246 1.1 minoura
1247 1.29 thorpej static int
1248 1.61.2.2 isaki yds_set_format(void *addr, int setmode,
1249 1.61.2.2 isaki const audio_params_t *play, const audio_params_t *rec,
1250 1.61.2.2 isaki audio_filter_reg_t *pfil, audio_filter_reg_t *rfil)
1251 1.1 minoura {
1252 1.1 minoura return 0;
1253 1.1 minoura }
1254 1.1 minoura
1255 1.29 thorpej static int
1256 1.37 christos yds_round_blocksize(void *addr, int blk, int mode,
1257 1.37 christos const audio_params_t *param)
1258 1.1 minoura {
1259 1.27 kent
1260 1.1 minoura /*
1261 1.1 minoura * Block size must be bigger than a frame.
1262 1.1 minoura * That is 1024bytes at most, i.e. for 48000Hz, 16bit, 2ch.
1263 1.1 minoura */
1264 1.1 minoura if (blk < 1024)
1265 1.1 minoura blk = 1024;
1266 1.1 minoura
1267 1.61 isaki return blk & ~3;
1268 1.1 minoura }
1269 1.1 minoura
1270 1.27 kent static uint32_t
1271 1.23 kent yds_get_lpfq(u_int sample_rate)
1272 1.1 minoura {
1273 1.1 minoura int i;
1274 1.1 minoura static struct lpfqt {
1275 1.1 minoura u_int rate;
1276 1.27 kent uint32_t lpfq;
1277 1.1 minoura } lpfqt[] = {
1278 1.1 minoura {8000, 0x32020000},
1279 1.1 minoura {11025, 0x31770000},
1280 1.1 minoura {16000, 0x31390000},
1281 1.1 minoura {22050, 0x31c90000},
1282 1.1 minoura {32000, 0x33d00000},
1283 1.1 minoura {48000, 0x40000000},
1284 1.1 minoura {0, 0}
1285 1.1 minoura };
1286 1.1 minoura
1287 1.1 minoura if (sample_rate == 44100) /* for P44 slot? */
1288 1.1 minoura return 0x370A0000;
1289 1.1 minoura
1290 1.1 minoura for (i = 0; lpfqt[i].rate != 0; i++)
1291 1.1 minoura if (sample_rate <= lpfqt[i].rate)
1292 1.1 minoura break;
1293 1.1 minoura
1294 1.1 minoura return lpfqt[i].lpfq;
1295 1.1 minoura }
1296 1.1 minoura
1297 1.27 kent static uint32_t
1298 1.23 kent yds_get_lpfk(u_int sample_rate)
1299 1.1 minoura {
1300 1.1 minoura int i;
1301 1.1 minoura static struct lpfkt {
1302 1.1 minoura u_int rate;
1303 1.27 kent uint32_t lpfk;
1304 1.1 minoura } lpfkt[] = {
1305 1.1 minoura {8000, 0x18b20000},
1306 1.1 minoura {11025, 0x20930000},
1307 1.1 minoura {16000, 0x2b9a0000},
1308 1.1 minoura {22050, 0x35a10000},
1309 1.1 minoura {32000, 0x3eaa0000},
1310 1.1 minoura {48000, 0x40000000},
1311 1.1 minoura {0, 0}
1312 1.1 minoura };
1313 1.1 minoura
1314 1.1 minoura if (sample_rate == 44100) /* for P44 slot? */
1315 1.1 minoura return 0x46460000;
1316 1.1 minoura
1317 1.1 minoura for (i = 0; lpfkt[i].rate != 0; i++)
1318 1.1 minoura if (sample_rate <= lpfkt[i].rate)
1319 1.1 minoura break;
1320 1.1 minoura
1321 1.1 minoura return lpfkt[i].lpfk;
1322 1.1 minoura }
1323 1.1 minoura
1324 1.29 thorpej static int
1325 1.23 kent yds_trigger_output(void *addr, void *start, void *end, int blksize,
1326 1.26 kent void (*intr)(void *), void *arg, const audio_params_t *param)
1327 1.1 minoura #define P44 (sc->sc_flags & YDS_CAP_HAS_P44)
1328 1.1 minoura {
1329 1.27 kent struct yds_softc *sc;
1330 1.1 minoura struct yds_dma *p;
1331 1.1 minoura struct play_slot_ctrl_bank *psb;
1332 1.1 minoura const u_int gain = 0x40000000;
1333 1.1 minoura bus_addr_t s;
1334 1.1 minoura size_t l;
1335 1.1 minoura int i;
1336 1.1 minoura int p44, channels;
1337 1.27 kent uint32_t format;
1338 1.1 minoura
1339 1.27 kent sc = addr;
1340 1.1 minoura #ifdef DIAGNOSTIC
1341 1.1 minoura if (sc->sc_play.intr)
1342 1.1 minoura panic("yds_trigger_output: already running");
1343 1.1 minoura #endif
1344 1.1 minoura
1345 1.1 minoura sc->sc_play.intr = intr;
1346 1.1 minoura sc->sc_play.intr_arg = arg;
1347 1.1 minoura sc->sc_play.offset = 0;
1348 1.1 minoura sc->sc_play.blksize = blksize;
1349 1.1 minoura
1350 1.1 minoura DPRINTFN(1, ("yds_trigger_output: sc=%p start=%p end=%p "
1351 1.1 minoura "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
1352 1.1 minoura
1353 1.1 minoura p = yds_find_dma(sc, start);
1354 1.1 minoura if (!p) {
1355 1.1 minoura printf("yds_trigger_output: bad addr %p\n", start);
1356 1.27 kent return EINVAL;
1357 1.1 minoura }
1358 1.1 minoura sc->sc_play.dma = p;
1359 1.1 minoura
1360 1.1 minoura #ifdef YDS_USE_P44
1361 1.1 minoura /* The document says the P44 SRC supports only stereo, 16bit PCM. */
1362 1.1 minoura if (P44)
1363 1.26 kent p44 = ((param->sample_rate == 44100) &&
1364 1.26 kent (param->channels == 2) &&
1365 1.26 kent (param->precision == 16));
1366 1.1 minoura else
1367 1.1 minoura #endif
1368 1.1 minoura p44 = 0;
1369 1.26 kent channels = p44 ? 1 : param->channels;
1370 1.1 minoura
1371 1.1 minoura s = DMAADDR(p);
1372 1.1 minoura l = ((char *)end - (char *)start);
1373 1.1 minoura sc->sc_play.length = l;
1374 1.1 minoura
1375 1.12 someya *sc->ptbl = htole32(channels); /* Num of play */
1376 1.1 minoura
1377 1.1 minoura sc->sc_play.factor = 1;
1378 1.26 kent if (param->channels == 2)
1379 1.1 minoura sc->sc_play.factor *= 2;
1380 1.26 kent if (param->precision != 8)
1381 1.1 minoura sc->sc_play.factor *= 2;
1382 1.1 minoura l /= sc->sc_play.factor;
1383 1.1 minoura
1384 1.12 someya format = ((channels == 2 ? PSLT_FORMAT_STEREO : 0) |
1385 1.26 kent (param->precision == 8 ? PSLT_FORMAT_8BIT : 0) |
1386 1.12 someya (p44 ? PSLT_FORMAT_SRC441 : 0));
1387 1.12 someya
1388 1.1 minoura psb = sc->pbankp[0];
1389 1.1 minoura memset(psb, 0, sizeof(*psb));
1390 1.12 someya psb->format = htole32(format);
1391 1.12 someya psb->pgbase = htole32(s);
1392 1.12 someya psb->pgloopend = htole32(l);
1393 1.1 minoura if (!p44) {
1394 1.26 kent psb->pgdeltaend = htole32((param->sample_rate * 65536 / 48000) << 12);
1395 1.26 kent psb->lpfkend = htole32(yds_get_lpfk(param->sample_rate));
1396 1.12 someya psb->eggainend = htole32(gain);
1397 1.26 kent psb->lpfq = htole32(yds_get_lpfq(param->sample_rate));
1398 1.12 someya psb->pgdelta = htole32(psb->pgdeltaend);
1399 1.26 kent psb->lpfk = htole32(yds_get_lpfk(param->sample_rate));
1400 1.12 someya psb->eggain = htole32(gain);
1401 1.1 minoura }
1402 1.1 minoura
1403 1.1 minoura for (i = 0; i < channels; i++) {
1404 1.1 minoura /* i == 0: left or mono, i == 1: right */
1405 1.1 minoura psb = sc->pbankp[i*2];
1406 1.1 minoura if (i)
1407 1.1 minoura /* copy from left */
1408 1.1 minoura *psb = *(sc->pbankp[0]);
1409 1.1 minoura if (channels == 2) {
1410 1.1 minoura /* stereo */
1411 1.1 minoura if (i == 0) {
1412 1.12 someya psb->lchgain = psb->lchgainend = htole32(gain);
1413 1.1 minoura } else {
1414 1.5 minoura psb->lchgain = psb->lchgainend = 0;
1415 1.12 someya psb->rchgain = psb->rchgainend = htole32(gain);
1416 1.12 someya psb->format |= htole32(PSLT_FORMAT_RCH);
1417 1.1 minoura }
1418 1.1 minoura } else if (!p44) {
1419 1.1 minoura /* mono */
1420 1.12 someya psb->lchgain = psb->rchgain = htole32(gain);
1421 1.12 someya psb->lchgainend = psb->rchgainend = htole32(gain);
1422 1.1 minoura }
1423 1.1 minoura /* copy to the other bank */
1424 1.1 minoura *(sc->pbankp[i*2+1]) = *psb;
1425 1.1 minoura }
1426 1.1 minoura
1427 1.1 minoura YDS_DUMP_PLAY_SLOT(5, sc, 0);
1428 1.1 minoura YDS_DUMP_PLAY_SLOT(5, sc, 1);
1429 1.1 minoura
1430 1.1 minoura if (p44)
1431 1.1 minoura YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff);
1432 1.1 minoura else
1433 1.1 minoura YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff);
1434 1.1 minoura
1435 1.1 minoura /* Now the play slot for the next frame is set up!! */
1436 1.1 minoura /* Sync play slot control data for both directions */
1437 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1438 1.61 isaki sc->pbankoff,
1439 1.1 minoura sizeof(struct play_slot_ctrl_bank) *
1440 1.1 minoura channels * N_PLAY_SLOT_CTRL_BANK,
1441 1.1 minoura BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1442 1.1 minoura /* Sync ring buffer */
1443 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
1444 1.1 minoura BUS_DMASYNC_PREWRITE);
1445 1.1 minoura /* HERE WE GO!! */
1446 1.1 minoura YWRITE4(sc, YDS_MODE,
1447 1.1 minoura YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
1448 1.1 minoura
1449 1.1 minoura return 0;
1450 1.1 minoura }
1451 1.1 minoura #undef P44
1452 1.1 minoura
1453 1.29 thorpej static int
1454 1.23 kent yds_trigger_input(void *addr, void *start, void *end, int blksize,
1455 1.26 kent void (*intr)(void *), void *arg, const audio_params_t *param)
1456 1.1 minoura {
1457 1.27 kent struct yds_softc *sc;
1458 1.1 minoura struct yds_dma *p;
1459 1.1 minoura u_int srate, format;
1460 1.1 minoura struct rec_slot_ctrl_bank *rsb;
1461 1.1 minoura bus_addr_t s;
1462 1.1 minoura size_t l;
1463 1.1 minoura
1464 1.27 kent sc = addr;
1465 1.1 minoura #ifdef DIAGNOSTIC
1466 1.1 minoura if (sc->sc_rec.intr)
1467 1.1 minoura panic("yds_trigger_input: already running");
1468 1.1 minoura #endif
1469 1.1 minoura sc->sc_rec.intr = intr;
1470 1.1 minoura sc->sc_rec.intr_arg = arg;
1471 1.1 minoura sc->sc_rec.offset = 0;
1472 1.1 minoura sc->sc_rec.blksize = blksize;
1473 1.1 minoura
1474 1.1 minoura DPRINTFN(1, ("yds_trigger_input: "
1475 1.23 kent "sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
1476 1.1 minoura addr, start, end, blksize, intr, arg));
1477 1.26 kent DPRINTFN(1, (" parameters: rate=%u, precision=%u, channels=%u\n",
1478 1.26 kent param->sample_rate, param->precision, param->channels));
1479 1.1 minoura
1480 1.1 minoura p = yds_find_dma(sc, start);
1481 1.1 minoura if (!p) {
1482 1.1 minoura printf("yds_trigger_input: bad addr %p\n", start);
1483 1.27 kent return EINVAL;
1484 1.1 minoura }
1485 1.1 minoura sc->sc_rec.dma = p;
1486 1.1 minoura
1487 1.1 minoura s = DMAADDR(p);
1488 1.1 minoura l = ((char *)end - (char *)start);
1489 1.1 minoura sc->sc_rec.length = l;
1490 1.1 minoura
1491 1.1 minoura sc->sc_rec.factor = 1;
1492 1.26 kent if (param->channels == 2)
1493 1.1 minoura sc->sc_rec.factor *= 2;
1494 1.26 kent if (param->precision != 8)
1495 1.1 minoura sc->sc_rec.factor *= 2;
1496 1.1 minoura
1497 1.1 minoura rsb = &sc->rbank[0];
1498 1.1 minoura memset(rsb, 0, sizeof(*rsb));
1499 1.12 someya rsb->pgbase = htole32(s);
1500 1.12 someya rsb->pgloopendadr = htole32(l);
1501 1.1 minoura /* Seems all 4 banks must be set up... */
1502 1.1 minoura sc->rbank[1] = *rsb;
1503 1.1 minoura sc->rbank[2] = *rsb;
1504 1.1 minoura sc->rbank[3] = *rsb;
1505 1.1 minoura
1506 1.1 minoura YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff);
1507 1.1 minoura YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff);
1508 1.26 kent srate = 48000 * 4096 / param->sample_rate - 1;
1509 1.26 kent format = ((param->precision == 8 ? YDS_FORMAT_8BIT : 0) |
1510 1.26 kent (param->channels == 2 ? YDS_FORMAT_STEREO : 0));
1511 1.1 minoura DPRINTF(("srate=%d, format=%08x\n", srate, format));
1512 1.1 minoura #ifdef YDS_USE_REC_SLOT
1513 1.1 minoura YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff);
1514 1.1 minoura YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff);
1515 1.1 minoura YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID);
1516 1.1 minoura YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate);
1517 1.1 minoura YWRITE4(sc, YDS_REC_FORMAT, format);
1518 1.1 minoura #else
1519 1.1 minoura YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID);
1520 1.1 minoura YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate);
1521 1.1 minoura YWRITE4(sc, YDS_ADC_FORMAT, format);
1522 1.1 minoura #endif
1523 1.1 minoura /* Now the rec slot for the next frame is set up!! */
1524 1.1 minoura /* Sync record slot control data */
1525 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1526 1.1 minoura sc->rbankoff,
1527 1.1 minoura sizeof(struct rec_slot_ctrl_bank)*
1528 1.1 minoura N_REC_SLOT_CTRL*
1529 1.1 minoura N_REC_SLOT_CTRL_BANK,
1530 1.1 minoura BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1531 1.1 minoura /* Sync ring buffer */
1532 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
1533 1.1 minoura BUS_DMASYNC_PREREAD);
1534 1.1 minoura /* HERE WE GO!! */
1535 1.1 minoura YWRITE4(sc, YDS_MODE,
1536 1.1 minoura YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
1537 1.1 minoura
1538 1.1 minoura return 0;
1539 1.1 minoura }
1540 1.1 minoura
1541 1.1 minoura static int
1542 1.23 kent yds_halt(struct yds_softc *sc)
1543 1.1 minoura {
1544 1.27 kent uint32_t mode;
1545 1.1 minoura
1546 1.1 minoura /* Stop the DSP operation. */
1547 1.1 minoura mode = YREAD4(sc, YDS_MODE);
1548 1.1 minoura YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2));
1549 1.1 minoura
1550 1.1 minoura /* Paranoia... mute all */
1551 1.1 minoura YWRITE4(sc, YDS_P44_OUT_VOLUME, 0);
1552 1.1 minoura YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0);
1553 1.1 minoura YWRITE4(sc, YDS_ADC_IN_VOLUME, 0);
1554 1.1 minoura YWRITE4(sc, YDS_REC_IN_VOLUME, 0);
1555 1.1 minoura YWRITE4(sc, YDS_DAC_REC_VOLUME, 0);
1556 1.1 minoura YWRITE4(sc, YDS_P44_REC_VOLUME, 0);
1557 1.1 minoura
1558 1.1 minoura return 0;
1559 1.1 minoura }
1560 1.1 minoura
1561 1.29 thorpej static int
1562 1.23 kent yds_halt_output(void *addr)
1563 1.1 minoura {
1564 1.27 kent struct yds_softc *sc;
1565 1.1 minoura
1566 1.1 minoura DPRINTF(("yds: yds_halt_output\n"));
1567 1.27 kent sc = addr;
1568 1.1 minoura if (sc->sc_play.intr) {
1569 1.1 minoura sc->sc_play.intr = 0;
1570 1.1 minoura /* Sync play slot control data */
1571 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1572 1.1 minoura sc->pbankoff,
1573 1.1 minoura sizeof(struct play_slot_ctrl_bank)*
1574 1.1 minoura (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK,
1575 1.1 minoura BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
1576 1.1 minoura /* Stop the play slot operation */
1577 1.1 minoura sc->pbankp[0]->status =
1578 1.1 minoura sc->pbankp[1]->status =
1579 1.1 minoura sc->pbankp[2]->status =
1580 1.1 minoura sc->pbankp[3]->status = 1;
1581 1.1 minoura /* Sync ring buffer */
1582 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map,
1583 1.1 minoura 0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE);
1584 1.1 minoura }
1585 1.1 minoura
1586 1.1 minoura return 0;
1587 1.1 minoura }
1588 1.1 minoura
1589 1.29 thorpej static int
1590 1.23 kent yds_halt_input(void *addr)
1591 1.1 minoura {
1592 1.27 kent struct yds_softc *sc;
1593 1.1 minoura
1594 1.1 minoura DPRINTF(("yds: yds_halt_input\n"));
1595 1.27 kent sc = addr;
1596 1.1 minoura if (sc->sc_rec.intr) {
1597 1.61 isaki sc->sc_rec.intr = NULL;
1598 1.1 minoura /* Stop the rec slot operation */
1599 1.1 minoura YWRITE4(sc, YDS_MAPOF_REC, 0);
1600 1.1 minoura /* Sync rec slot control data */
1601 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
1602 1.1 minoura sc->rbankoff,
1603 1.1 minoura sizeof(struct rec_slot_ctrl_bank)*
1604 1.1 minoura N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK,
1605 1.1 minoura BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
1606 1.1 minoura /* Sync ring buffer */
1607 1.1 minoura bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map,
1608 1.1 minoura 0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD);
1609 1.1 minoura }
1610 1.1 minoura
1611 1.1 minoura return 0;
1612 1.1 minoura }
1613 1.1 minoura
1614 1.29 thorpej static int
1615 1.37 christos yds_getdev(void *addr, struct audio_device *retp)
1616 1.1 minoura {
1617 1.27 kent
1618 1.1 minoura *retp = yds_device;
1619 1.1 minoura return 0;
1620 1.1 minoura }
1621 1.1 minoura
1622 1.29 thorpej static int
1623 1.23 kent yds_mixer_set_port(void *addr, mixer_ctrl_t *cp)
1624 1.1 minoura {
1625 1.27 kent struct yds_softc *sc;
1626 1.1 minoura
1627 1.27 kent sc = addr;
1628 1.27 kent return sc->sc_codec[0].codec_if->vtbl->mixer_set_port(
1629 1.27 kent sc->sc_codec[0].codec_if, cp);
1630 1.1 minoura }
1631 1.1 minoura
1632 1.29 thorpej static int
1633 1.23 kent yds_mixer_get_port(void *addr, mixer_ctrl_t *cp)
1634 1.1 minoura {
1635 1.27 kent struct yds_softc *sc;
1636 1.1 minoura
1637 1.27 kent sc = addr;
1638 1.27 kent return sc->sc_codec[0].codec_if->vtbl->mixer_get_port(
1639 1.27 kent sc->sc_codec[0].codec_if, cp);
1640 1.1 minoura }
1641 1.1 minoura
1642 1.29 thorpej static int
1643 1.23 kent yds_query_devinfo(void *addr, mixer_devinfo_t *dip)
1644 1.1 minoura {
1645 1.27 kent struct yds_softc *sc;
1646 1.1 minoura
1647 1.27 kent sc = addr;
1648 1.27 kent return sc->sc_codec[0].codec_if->vtbl->query_devinfo(
1649 1.27 kent sc->sc_codec[0].codec_if, dip);
1650 1.1 minoura }
1651 1.1 minoura
1652 1.29 thorpej static void *
1653 1.51 jmcneill yds_malloc(void *addr, int direction, size_t size)
1654 1.1 minoura {
1655 1.27 kent struct yds_softc *sc;
1656 1.1 minoura struct yds_dma *p;
1657 1.1 minoura int error;
1658 1.1 minoura
1659 1.51 jmcneill p = kmem_alloc(sizeof(*p), KM_SLEEP);
1660 1.27 kent sc = addr;
1661 1.1 minoura error = yds_allocmem(sc, size, 16, p);
1662 1.1 minoura if (error) {
1663 1.51 jmcneill kmem_free(p, sizeof(*p));
1664 1.27 kent return NULL;
1665 1.1 minoura }
1666 1.1 minoura p->next = sc->sc_dmas;
1667 1.1 minoura sc->sc_dmas = p;
1668 1.27 kent return KERNADDR(p);
1669 1.1 minoura }
1670 1.1 minoura
1671 1.29 thorpej static void
1672 1.51 jmcneill yds_free(void *addr, void *ptr, size_t size)
1673 1.1 minoura {
1674 1.27 kent struct yds_softc *sc;
1675 1.1 minoura struct yds_dma **pp, *p;
1676 1.1 minoura
1677 1.27 kent sc = addr;
1678 1.1 minoura for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
1679 1.1 minoura if (KERNADDR(p) == ptr) {
1680 1.1 minoura yds_freemem(sc, p);
1681 1.1 minoura *pp = p->next;
1682 1.51 jmcneill kmem_free(p, sizeof(*p));
1683 1.1 minoura return;
1684 1.1 minoura }
1685 1.1 minoura }
1686 1.1 minoura }
1687 1.1 minoura
1688 1.1 minoura static struct yds_dma *
1689 1.23 kent yds_find_dma(struct yds_softc *sc, void *addr)
1690 1.1 minoura {
1691 1.1 minoura struct yds_dma *p;
1692 1.1 minoura
1693 1.1 minoura for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
1694 1.27 kent continue;
1695 1.1 minoura
1696 1.1 minoura return p;
1697 1.1 minoura }
1698 1.1 minoura
1699 1.29 thorpej static size_t
1700 1.37 christos yds_round_buffersize(void *addr, int direction, size_t size)
1701 1.1 minoura {
1702 1.27 kent
1703 1.1 minoura /*
1704 1.1 minoura * Buffer size should be at least twice as bigger as a frame.
1705 1.1 minoura */
1706 1.1 minoura if (size < 1024 * 3)
1707 1.1 minoura size = 1024 * 3;
1708 1.27 kent return size;
1709 1.1 minoura }
1710 1.1 minoura
1711 1.29 thorpej static int
1712 1.37 christos yds_get_props(void *addr)
1713 1.1 minoura {
1714 1.27 kent
1715 1.27 kent return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
1716 1.27 kent AUDIO_PROP_FULLDUPLEX;
1717 1.1 minoura }
1718 1.51 jmcneill
1719 1.51 jmcneill static void
1720 1.51 jmcneill yds_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
1721 1.51 jmcneill {
1722 1.51 jmcneill struct yds_softc *sc;
1723 1.51 jmcneill
1724 1.51 jmcneill sc = addr;
1725 1.51 jmcneill *intr = &sc->sc_intr_lock;
1726 1.51 jmcneill *thread = &sc->sc_lock;
1727 1.51 jmcneill }
1728