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yds.c revision 1.60
      1 /*	$NetBSD: yds.c,v 1.60 2018/12/09 11:14:02 jdolecek Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000, 2001 Kazuki Sakamoto and Minoura Makoto.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * Yamaha YMF724[B-F]/740[B-C]/744/754
     30  *
     31  * Documentation links:
     32  * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/
     33  * - ftp://ftp.alsa-project.org/pub/manuals/yamaha/pci/
     34  *
     35  * TODO:
     36  * - FM synth volume (difficult: mixed before ac97)
     37  * - Digital in/out (SPDIF) support
     38  * - Effect??
     39  */
     40 
     41 #include <sys/cdefs.h>
     42 __KERNEL_RCSID(0, "$NetBSD: yds.c,v 1.60 2018/12/09 11:14:02 jdolecek Exp $");
     43 
     44 #include "mpu.h"
     45 
     46 #include <sys/param.h>
     47 #include <sys/systm.h>
     48 #include <sys/kernel.h>
     49 #include <sys/fcntl.h>
     50 #include <sys/kmem.h>
     51 #include <sys/device.h>
     52 #include <sys/proc.h>
     53 
     54 #include <dev/pci/pcidevs.h>
     55 #include <dev/pci/pcireg.h>
     56 #include <dev/pci/pcivar.h>
     57 
     58 #include <sys/audioio.h>
     59 #include <dev/audio_if.h>
     60 #include <dev/mulaw.h>
     61 #include <dev/auconv.h>
     62 #include <dev/ic/ac97reg.h>
     63 #include <dev/ic/ac97var.h>
     64 #include <dev/ic/mpuvar.h>
     65 
     66 #include <sys/bus.h>
     67 #include <sys/intr.h>
     68 
     69 #include <dev/microcode/yds/yds_hwmcode.h>
     70 #include <dev/pci/ydsreg.h>
     71 #include <dev/pci/ydsvar.h>
     72 
     73 /* Debug */
     74 #undef YDS_USE_REC_SLOT
     75 #define YDS_USE_P44
     76 
     77 #ifdef AUDIO_DEBUG
     78 # define DPRINTF(x)	if (ydsdebug) printf x
     79 # define DPRINTFN(n,x)	if (ydsdebug>(n)) printf x
     80 int	ydsdebug = 0;
     81 #else
     82 # define DPRINTF(x)
     83 # define DPRINTFN(n,x)
     84 #endif
     85 #ifdef YDS_USE_REC_SLOT
     86 # define YDS_INPUT_SLOT 0	/* REC slot = ADC + loopbacks */
     87 #else
     88 # define YDS_INPUT_SLOT 1	/* ADC slot */
     89 #endif
     90 
     91 static int	yds_match(device_t, cfdata_t, void *);
     92 static void	yds_attach(device_t, device_t, void *);
     93 static int	yds_intr(void *);
     94 
     95 #define DMAADDR(p)	((p)->map->dm_segs[0].ds_addr)
     96 #define KERNADDR(p)	((void *)((p)->addr))
     97 
     98 static int	yds_allocmem(struct yds_softc *, size_t, size_t,
     99 			     struct yds_dma *);
    100 static int	yds_freemem(struct yds_softc *, struct yds_dma *);
    101 
    102 #ifndef AUDIO_DEBUG
    103 #define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
    104 #define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
    105 #define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
    106 #define YREAD1(sc, r)	bus_space_read_1((sc)->memt, (sc)->memh, (r))
    107 #define YREAD2(sc, r)	bus_space_read_2((sc)->memt, (sc)->memh, (r))
    108 #define YREAD4(sc, r)	bus_space_read_4((sc)->memt, (sc)->memh, (r))
    109 #else
    110 static uint16_t YREAD2(struct yds_softc *sc, bus_size_t r)
    111 {
    112 	DPRINTFN(5, (" YREAD2(0x%lX)\n", (unsigned long)r));
    113 	return bus_space_read_2(sc->memt, sc->memh, r);
    114 }
    115 
    116 static uint32_t YREAD4(struct yds_softc *sc, bus_size_t r)
    117 {
    118 	DPRINTFN(5, (" YREAD4(0x%lX)\n", (unsigned long)r));
    119 	return bus_space_read_4(sc->memt, sc->memh, r);
    120 }
    121 
    122 #ifdef notdef
    123 static void YWRITE1(struct yds_softc *sc, bus_size_t r, uint8_t x)
    124 {
    125 	DPRINTFN(5, (" YWRITE1(0x%lX,0x%lX)\n", (unsigned long)r,
    126 		     (unsigned long)x));
    127 	bus_space_write_1(sc->memt, sc->memh, r, x);
    128 }
    129 #endif
    130 
    131 static void YWRITE2(struct yds_softc *sc, bus_size_t r, uint16_t x)
    132 {
    133 	DPRINTFN(5, (" YWRITE2(0x%lX,0x%lX)\n", (unsigned long)r,
    134 		     (unsigned long)x));
    135 	bus_space_write_2(sc->memt, sc->memh, r, x);
    136 }
    137 
    138 static void YWRITE4(struct yds_softc *sc, bus_size_t r, uint32_t x)
    139 {
    140 	DPRINTFN(5, (" YWRITE4(0x%lX,0x%lX)\n", (unsigned long)r,
    141 		     (unsigned long)x));
    142 	bus_space_write_4(sc->memt, sc->memh, r, x);
    143 }
    144 #endif
    145 
    146 #define	YWRITEREGION4(sc, r, x, c)	\
    147 	bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4)
    148 
    149 CFATTACH_DECL_NEW(yds, sizeof(struct yds_softc),
    150     yds_match, yds_attach, NULL, NULL);
    151 
    152 static int	yds_open(void *, int);
    153 static void	yds_close(void *);
    154 static int	yds_query_encoding(void *, struct audio_encoding *);
    155 static int	yds_set_params(void *, int, int, audio_params_t *,
    156 			       audio_params_t *, stream_filter_list_t *,
    157 			       stream_filter_list_t *);
    158 static int	yds_round_blocksize(void *, int, int, const audio_params_t *);
    159 static int	yds_trigger_output(void *, void *, void *, int,
    160 				   void (*)(void *), void *,
    161 				   const audio_params_t *);
    162 static int	yds_trigger_input(void *, void *, void *, int,
    163 				  void (*)(void *), void *,
    164 				  const audio_params_t *);
    165 static int	yds_halt_output(void *);
    166 static int	yds_halt_input(void *);
    167 static int	yds_getdev(void *, struct audio_device *);
    168 static int	yds_mixer_set_port(void *, mixer_ctrl_t *);
    169 static int	yds_mixer_get_port(void *, mixer_ctrl_t *);
    170 static void *	yds_malloc(void *, int, size_t);
    171 static void	yds_free(void *, void *, size_t);
    172 static size_t	yds_round_buffersize(void *, int, size_t);
    173 static paddr_t	yds_mappage(void *, void *, off_t, int);
    174 static int	yds_get_props(void *);
    175 static int	yds_query_devinfo(void *, mixer_devinfo_t *);
    176 static void	yds_get_locks(void *, kmutex_t **, kmutex_t **);
    177 
    178 static int	yds_attach_codec(void *, struct ac97_codec_if *);
    179 static int	yds_read_codec(void *, uint8_t, uint16_t *);
    180 static int	yds_write_codec(void *, uint8_t, uint16_t);
    181 static int	yds_reset_codec(void *);
    182 
    183 static u_int	yds_get_dstype(int);
    184 static int	yds_download_mcode(struct yds_softc *);
    185 static int	yds_allocate_slots(struct yds_softc *);
    186 static void	yds_configure_legacy(device_t);
    187 static void	yds_enable_dsp(struct yds_softc *);
    188 static int	yds_disable_dsp(struct yds_softc *);
    189 static int	yds_ready_codec(struct yds_codec_softc *);
    190 static int	yds_halt(struct yds_softc *);
    191 static uint32_t yds_get_lpfq(u_int);
    192 static uint32_t yds_get_lpfk(u_int);
    193 static struct yds_dma *yds_find_dma(struct yds_softc *, void *);
    194 
    195 static int	yds_init(struct yds_softc *);
    196 
    197 #ifdef AUDIO_DEBUG
    198 static void	yds_dump_play_slot(struct yds_softc *, int);
    199 #define	YDS_DUMP_PLAY_SLOT(n, sc, bank) \
    200 	if (ydsdebug > (n)) yds_dump_play_slot(sc, bank)
    201 #else
    202 #define	YDS_DUMP_PLAY_SLOT(n, sc, bank)
    203 #endif /* AUDIO_DEBUG */
    204 
    205 static const struct audio_hw_if yds_hw_if = {
    206 	.open		  = yds_open,
    207 	.close		  = yds_close,
    208 	.drain		  = NULL,
    209 	.query_encoding	  = yds_query_encoding,
    210 	.set_params	  = yds_set_params,
    211 	.round_blocksize  = yds_round_blocksize,
    212 	.commit_settings  = NULL,
    213 	.init_output	  = NULL,
    214 	.init_input	  = NULL,
    215 	.start_output	  = NULL,
    216 	.start_input	  = NULL,
    217 	.halt_output	  = yds_halt_output,
    218 	.halt_input	  = yds_halt_input,
    219 	.speaker_ctl	  = NULL,
    220 	.getdev		  = yds_getdev,
    221 	.setfd		  = NULL,
    222 	.set_port	  = yds_mixer_set_port,
    223 	.get_port	  = yds_mixer_get_port,
    224 	.query_devinfo	  = yds_query_devinfo,
    225 	.allocm		  = yds_malloc,
    226 	.freem		  = yds_free,
    227 	.round_buffersize = yds_round_buffersize,
    228 	.mappage	  = yds_mappage,
    229 	.get_props	  = yds_get_props,
    230 	.trigger_output	  = yds_trigger_output,
    231 	.trigger_input	  = yds_trigger_input,
    232 	.dev_ioctl	  = NULL,
    233 	.get_locks	  = yds_get_locks,
    234 };
    235 
    236 static const struct audio_device yds_device = {
    237 	.name    = "Yamaha DS-1",
    238 	.version = "",
    239 	.config  = "yds"
    240 };
    241 
    242 static const struct {
    243 	uint	id;
    244 	u_int	flags;
    245 #define YDS_CAP_MCODE_1			0x0001
    246 #define YDS_CAP_MCODE_1E		0x0002
    247 #define YDS_CAP_LEGACY_SELECTABLE	0x0004
    248 #define YDS_CAP_LEGACY_FLEXIBLE		0x0008
    249 #define YDS_CAP_HAS_P44			0x0010
    250 } yds_chip_capabliity_list[] = {
    251 	{ PCI_PRODUCT_YAMAHA_YMF724,
    252 	  YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },
    253 	/* 740[C] has only 32 slots.  But anyway we use only 2 */
    254 	{ PCI_PRODUCT_YAMAHA_YMF740,
    255 	  YDS_CAP_MCODE_1|YDS_CAP_LEGACY_SELECTABLE },	/* XXX NOT TESTED */
    256 	{ PCI_PRODUCT_YAMAHA_YMF740C,
    257 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
    258 	{ PCI_PRODUCT_YAMAHA_YMF724F,
    259 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_SELECTABLE },
    260 	{ PCI_PRODUCT_YAMAHA_YMF744B,
    261 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE },
    262 	{ PCI_PRODUCT_YAMAHA_YMF754,
    263 	  YDS_CAP_MCODE_1E|YDS_CAP_LEGACY_FLEXIBLE|YDS_CAP_HAS_P44 },
    264 	{ 0, 0 }
    265 };
    266 #ifdef AUDIO_DEBUG
    267 #define YDS_CAP_BITS	"\020\005P44\004LEGFLEX\003LEGSEL\002MCODE1E\001MCODE1"
    268 #endif
    269 
    270 static const struct audio_format yds_formats[] = {
    271 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    272 	 1, AUFMT_MONAURAL, 0, {4000, 48000}},
    273 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_SLINEAR_LE, 16, 16,
    274 	 2, AUFMT_STEREO, 0, {4000, 48000}},
    275 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    276 	 1, AUFMT_MONAURAL, 0, {4000, 48000}},
    277 	{NULL, AUMODE_PLAY | AUMODE_RECORD, AUDIO_ENCODING_ULINEAR_LE, 8, 8,
    278 	 2, AUFMT_STEREO, 0, {4000, 48000}},
    279 };
    280 #define	YDS_NFORMATS	(sizeof(yds_formats) / sizeof(struct audio_format))
    281 
    282 #ifdef AUDIO_DEBUG
    283 static void
    284 yds_dump_play_slot(struct yds_softc *sc, int bank)
    285 {
    286 	int i, j;
    287 	uint32_t *p;
    288 	uint32_t num;
    289 	bus_addr_t pa;
    290 
    291 	for (i = 0; i < N_PLAY_SLOTS; i++) {
    292 		printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]);
    293 		printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]);
    294 	}
    295 
    296 	pa = DMAADDR(&sc->sc_ctrldata) + sc->pbankoff;
    297 	p = sc->ptbl;
    298 	printf("ptbl + 0: %d\n", *p++);
    299 	for (i = 0; i < N_PLAY_SLOTS; i++) {
    300 		printf("ptbl + %d: %#x, should be %#" PRIxPADDR "\n",
    301 		       i+1, *p,
    302 		       pa + i * sizeof(struct play_slot_ctrl_bank) *
    303 				N_PLAY_SLOT_CTRL_BANK);
    304 		p++;
    305 	}
    306 
    307 	num = le32toh(*(uint32_t*)sc->ptbl);
    308 	printf("numofplay = %d\n", num);
    309 
    310 	for (i = 0; i < num; i++) {
    311 		p = (uint32_t *)sc->pbankp[i*2];
    312 
    313 		printf("  pbankp[%d], bank 0 : %p\n", i*2, p);
    314 		for (j = 0;
    315 		     j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
    316 		     j++) {
    317 			printf("    0x%02x: 0x%08x\n",
    318 			       (unsigned)(j * sizeof(uint32_t)),
    319 			       (unsigned)*p++);
    320 		}
    321 
    322 		p = (uint32_t *)sc->pbankp[i*2 + 1];
    323 		printf("  pbankp[%d], bank 1 : %p\n", i*2 + 1, p);
    324 		for (j = 0;
    325 		     j < sizeof(struct play_slot_ctrl_bank) / sizeof(uint32_t);
    326 		     j++) {
    327 			printf("    0x%02x: 0x%08x\n",
    328 			       (unsigned)(j * sizeof(uint32_t)),
    329 			       (unsigned)*p++);
    330 		}
    331 	}
    332 }
    333 #endif /* AUDIO_DEBUG */
    334 
    335 static u_int
    336 yds_get_dstype(int id)
    337 {
    338 	int i;
    339 
    340 	for (i = 0; yds_chip_capabliity_list[i].id; i++) {
    341 		if (PCI_PRODUCT(id) == yds_chip_capabliity_list[i].id)
    342 			return yds_chip_capabliity_list[i].flags;
    343 	}
    344 
    345 	return -1;
    346 }
    347 
    348 static int
    349 yds_download_mcode(struct yds_softc *sc)
    350 {
    351 	static struct {
    352 		const uint32_t *mcode;
    353 		size_t size;
    354 	} ctrls[] = {
    355 		{yds_ds1_ctrl_mcode, sizeof(yds_ds1_ctrl_mcode)},
    356 		{yds_ds1e_ctrl_mcode, sizeof(yds_ds1e_ctrl_mcode)},
    357 	};
    358 	u_int ctrl;
    359 	const uint32_t *p;
    360 	size_t size;
    361 	int dstype;
    362 
    363 	if (sc->sc_flags & YDS_CAP_MCODE_1)
    364 		dstype = YDS_DS_1;
    365 	else if (sc->sc_flags & YDS_CAP_MCODE_1E)
    366 		dstype = YDS_DS_1E;
    367 	else
    368 		return 1;	/* unknown */
    369 
    370 	if (yds_disable_dsp(sc))
    371 		return 1;
    372 
    373 	/* Software reset */
    374 	YWRITE4(sc, YDS_MODE, YDS_MODE_RESET);
    375 	YWRITE4(sc, YDS_MODE, 0);
    376 
    377 	YWRITE4(sc, YDS_MAPOF_REC, 0);
    378 	YWRITE4(sc, YDS_MAPOF_EFFECT, 0);
    379 	YWRITE4(sc, YDS_PLAY_CTRLBASE, 0);
    380 	YWRITE4(sc, YDS_REC_CTRLBASE, 0);
    381 	YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0);
    382 	YWRITE4(sc, YDS_WORK_BASE, 0);
    383 
    384 	ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL);
    385 	YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007);
    386 
    387 	/* Download DSP microcode. */
    388 	p = yds_dsp_mcode;
    389 	size = sizeof(yds_dsp_mcode);
    390 	YWRITEREGION4(sc, YDS_DSP_INSTRAM, p, size);
    391 
    392 	/* Download CONTROL microcode. */
    393 	p = ctrls[dstype].mcode;
    394 	size = ctrls[dstype].size;
    395 	YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size);
    396 
    397 	yds_enable_dsp(sc);
    398 	delay(10 * 1000);		/* nessesary on my 724F (??) */
    399 
    400 	return 0;
    401 }
    402 
    403 static int
    404 yds_allocate_slots(struct yds_softc *sc)
    405 {
    406 	size_t pcs, rcs, ecs, ws, memsize;
    407 	void *mp;
    408 	uint32_t da;		/* DMA address */
    409 	char *va;		/* KVA */
    410 	off_t cb;
    411 	int i;
    412 	struct yds_dma *p;
    413 
    414 	/* Alloc DSP Control Data */
    415 	pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(uint32_t);
    416 	rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(uint32_t);
    417 	ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(uint32_t);
    418 	ws = WORK_SIZE;
    419 	YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(uint32_t));
    420 
    421 	DPRINTF(("play control size : %d\n", (unsigned int)pcs));
    422 	DPRINTF(("rec control size : %d\n", (unsigned int)rcs));
    423 	DPRINTF(("eff control size : %d\n", (unsigned int)ecs));
    424 #ifndef AUDIO_DEBUG
    425 	__USE(ecs);
    426 #endif
    427 	DPRINTF(("work size : %d\n", (unsigned int)ws));
    428 #ifdef DIAGNOSTIC
    429 	if (pcs != sizeof(struct play_slot_ctrl_bank)) {
    430 		aprint_error_dev(sc->sc_dev, "invalid play slot ctrldata %d != %d\n",
    431 		       (unsigned int)pcs,
    432 		       (unsigned int)sizeof(struct play_slot_ctrl_bank));
    433 	if (rcs != sizeof(struct rec_slot_ctrl_bank))
    434 		aprint_error_dev(sc->sc_dev, "invalid rec slot ctrldata %d != %d\n",
    435 		       (unsigned int)rcs,
    436 		       (unsigned int)sizeof(struct rec_slot_ctrl_bank));
    437 	}
    438 #endif
    439 
    440 	memsize = N_PLAY_SLOTS*N_PLAY_SLOT_CTRL_BANK*pcs +
    441 		  N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK*rcs + ws;
    442 	memsize += (N_PLAY_SLOTS+1)*sizeof(uint32_t);
    443 
    444 	p = &sc->sc_ctrldata;
    445 	if (KERNADDR(p) == NULL) {
    446 		i = yds_allocmem(sc, memsize, 16, p);
    447 		if (i) {
    448 			aprint_error_dev(sc->sc_dev, "couldn't alloc/map DSP DMA buffer, reason %d\n", i);
    449 			return 1;
    450 		}
    451 	}
    452 	mp = KERNADDR(p);
    453 	da = DMAADDR(p);
    454 
    455 	DPRINTF(("mp:%p, DMA addr:%#" PRIxPADDR "\n",
    456 		 mp, sc->sc_ctrldata.map->dm_segs[0].ds_addr));
    457 
    458 	memset(mp, 0, memsize);
    459 
    460 	/* Work space */
    461 	cb = 0;
    462 	va = (uint8_t *)mp;
    463 	YWRITE4(sc, YDS_WORK_BASE, da + cb);
    464 	cb += ws;
    465 
    466 	/* Play control data table */
    467 	sc->ptbl = (uint32_t *)(va + cb);
    468 	sc->ptbloff = cb;
    469 	YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb);
    470 	cb += (N_PLAY_SLOT_CTRL + 1) * sizeof(uint32_t);
    471 
    472 	/* Record slot control data */
    473 	sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb);
    474 	YWRITE4(sc, YDS_REC_CTRLBASE, da + cb);
    475 	sc->rbankoff = cb;
    476 	cb += N_REC_SLOT_CTRL * N_REC_SLOT_CTRL_BANK * rcs;
    477 
    478 #if 0
    479 	/* Effect slot control data -- unused */
    480 	YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb);
    481 	cb += N_EFFECT_SLOT_CTRL * N_EFFECT_SLOT_CTRL_BANK * ecs;
    482 #endif
    483 
    484 	/* Play slot control data */
    485 	sc->pbankoff = cb;
    486 	for (i=0; i < N_PLAY_SLOT_CTRL; i++) {
    487 		sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb);
    488 		*(sc->ptbl + i+1) = htole32(da + cb);
    489 		cb += pcs;
    490 
    491 		sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb);
    492 		cb += pcs;
    493 	}
    494 	/* Sync play control data table */
    495 	bus_dmamap_sync(sc->sc_dmatag, p->map,
    496 			sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(uint32_t),
    497 			BUS_DMASYNC_PREWRITE);
    498 
    499 	return 0;
    500 }
    501 
    502 static void
    503 yds_enable_dsp(struct yds_softc *sc)
    504 {
    505 
    506 	YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP);
    507 }
    508 
    509 static int
    510 yds_disable_dsp(struct yds_softc *sc)
    511 {
    512 	int to;
    513 	uint32_t data;
    514 
    515 	data = YREAD4(sc, YDS_CONFIG);
    516 	if (data)
    517 		YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE);
    518 
    519 	for (to = 0; to < YDS_WORK_TIMEOUT; to++) {
    520 		if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0)
    521 			return 0;
    522 		delay(1);
    523 	}
    524 
    525 	return 1;
    526 }
    527 
    528 static int
    529 yds_match(device_t parent, cfdata_t match, void *aux)
    530 {
    531 	struct pci_attach_args *pa;
    532 
    533 	pa = (struct pci_attach_args *)aux;
    534 	switch (PCI_VENDOR(pa->pa_id)) {
    535 	case PCI_VENDOR_YAMAHA:
    536 		switch (PCI_PRODUCT(pa->pa_id)) {
    537 		case PCI_PRODUCT_YAMAHA_YMF724:
    538 		case PCI_PRODUCT_YAMAHA_YMF740:
    539 		case PCI_PRODUCT_YAMAHA_YMF740C:
    540 		case PCI_PRODUCT_YAMAHA_YMF724F:
    541 		case PCI_PRODUCT_YAMAHA_YMF744B:
    542 		case PCI_PRODUCT_YAMAHA_YMF754:
    543 			return 1;
    544 		}
    545 		break;
    546 	}
    547 
    548 	return 0;
    549 }
    550 
    551 /*
    552  * This routine is called after all the ISA devices are configured,
    553  * to avoid conflict.
    554  */
    555 static void
    556 yds_configure_legacy(device_t self)
    557 #define FLEXIBLE	(sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE)
    558 #define SELECTABLE	(sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE)
    559 {
    560 	static const bus_addr_t opl_addrs[] = {0x388, 0x398, 0x3A0, 0x3A8};
    561 	static const bus_addr_t mpu_addrs[] = {0x330, 0x300, 0x332, 0x334};
    562 	struct yds_softc *sc;
    563 	pcireg_t reg;
    564 	device_t dev;
    565 	int i;
    566 
    567 	sc = device_private(self);
    568 	if (!FLEXIBLE && !SELECTABLE)
    569 		return;
    570 
    571 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY);
    572 	reg &= ~0x8133c03f;	/* these bits are out of interest */
    573 	reg |= ((YDS_PCI_EX_LEGACY_IMOD) |
    574 		(YDS_PCI_LEGACY_FMEN |
    575 		 YDS_PCI_LEGACY_MEN /*| YDS_PCI_LEGACY_MIEN*/));
    576 	reg |= YDS_PCI_EX_LEGACY_SMOD_DISABLE;
    577 	if (FLEXIBLE) {
    578 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
    579 		delay(100*1000);
    580 	}
    581 
    582 	/* Look for OPL */
    583 	dev = 0;
    584 	for (i = 0; i < sizeof(opl_addrs) / sizeof(bus_addr_t); i++) {
    585 		if (SELECTABLE) {
    586 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
    587 				       YDS_PCI_LEGACY, reg | (i << (0+16)));
    588 			delay(100*1000);	/* wait 100ms */
    589 		} else
    590 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
    591 				       YDS_PCI_FM_BA, opl_addrs[i]);
    592 		if (bus_space_map(sc->sc_opl_iot,
    593 				  opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) {
    594 			struct audio_attach_args aa;
    595 
    596 			aa.type = AUDIODEV_TYPE_OPL;
    597 			aa.hwif = aa.hdl = NULL;
    598 			dev = config_found(self, &aa, audioprint);
    599 			if (dev == 0)
    600 				bus_space_unmap(sc->sc_opl_iot,
    601 						sc->sc_opl_ioh, 4);
    602 			else {
    603 				if (SELECTABLE)
    604 					reg |= (i << (0+16));
    605 				break;
    606 			}
    607 		}
    608 	}
    609 	if (dev == 0) {
    610 		reg &= ~YDS_PCI_LEGACY_FMEN;
    611 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
    612 			       YDS_PCI_LEGACY, reg);
    613 	} else {
    614 		/* Max. volume */
    615 		YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff);
    616 		YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff);
    617 	}
    618 
    619 	/* Look for MPU */
    620 	dev = NULL;
    621 	for (i = 0; i < sizeof(mpu_addrs) / sizeof(bus_addr_t); i++) {
    622 		if (SELECTABLE)
    623 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
    624 				       YDS_PCI_LEGACY, reg | (i << (4+16)));
    625 		else
    626 			pci_conf_write(sc->sc_pc, sc->sc_pcitag,
    627 				       YDS_PCI_MPU_BA, mpu_addrs[i]);
    628 		if (bus_space_map(sc->sc_mpu_iot,
    629 				  mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) {
    630 			struct audio_attach_args aa;
    631 
    632 			aa.type = AUDIODEV_TYPE_MPU;
    633 			aa.hwif = aa.hdl = NULL;
    634 			dev = config_found(self, &aa, audioprint);
    635 			if (dev == 0)
    636 				bus_space_unmap(sc->sc_mpu_iot,
    637 						sc->sc_mpu_ioh, 2);
    638 			else {
    639 				if (SELECTABLE)
    640 					reg |= (i << (4+16));
    641 				break;
    642 			}
    643 		}
    644 	}
    645 	if (dev == 0) {
    646 		reg &= ~(YDS_PCI_LEGACY_MEN | YDS_PCI_LEGACY_MIEN);
    647 		pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
    648 	}
    649 	sc->sc_mpu = dev;
    650 }
    651 #undef FLEXIBLE
    652 #undef SELECTABLE
    653 
    654 static int
    655 yds_init(struct yds_softc *sc)
    656 {
    657 	uint32_t reg;
    658 
    659 	DPRINTF(("yds_init()\n"));
    660 
    661 	/* Download microcode */
    662 	if (yds_download_mcode(sc)) {
    663 		aprint_error_dev(sc->sc_dev, "download microcode failed\n");
    664 		return 1;
    665 	}
    666 
    667 	/* Allocate DMA buffers */
    668 	if (yds_allocate_slots(sc)) {
    669 		aprint_error_dev(sc->sc_dev, "could not allocate slots\n");
    670 		return 1;
    671 	}
    672 
    673 	/* Warm reset */
    674 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
    675 	pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
    676 		reg | YDS_DSCTRL_WRST);
    677 	delay(50000);
    678 
    679 	return 0;
    680 }
    681 
    682 static bool
    683 yds_suspend(device_t dv, const pmf_qual_t *qual)
    684 {
    685 	struct yds_softc *sc = device_private(dv);
    686 	pci_chipset_tag_t pc = sc->sc_pc;
    687 	pcitag_t tag = sc->sc_pcitag;
    688 
    689 	mutex_enter(&sc->sc_lock);
    690 	mutex_spin_enter(&sc->sc_intr_lock);
    691 	sc->sc_enabled = 0;
    692 	sc->sc_dsctrl = pci_conf_read(pc, tag, YDS_PCI_DSCTRL);
    693 	sc->sc_legacy = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
    694 	sc->sc_ba[0] = pci_conf_read(pc, tag, YDS_PCI_FM_BA);
    695 	sc->sc_ba[1] = pci_conf_read(pc, tag, YDS_PCI_MPU_BA);
    696 	mutex_spin_exit(&sc->sc_intr_lock);
    697 	mutex_exit(&sc->sc_lock);
    698 
    699 	return true;
    700 }
    701 
    702 static bool
    703 yds_resume(device_t dv, const pmf_qual_t *qual)
    704 {
    705 	struct yds_softc *sc = device_private(dv);
    706 	pci_chipset_tag_t pc = sc->sc_pc;
    707 	pcitag_t tag = sc->sc_pcitag;
    708 	pcireg_t reg;
    709 
    710 	/* Disable legacy mode */
    711 	mutex_enter(&sc->sc_lock);
    712 	mutex_spin_enter(&sc->sc_intr_lock);
    713 	reg = pci_conf_read(pc, tag, YDS_PCI_LEGACY);
    714 	pci_conf_write(pc, tag, YDS_PCI_LEGACY, reg & YDS_PCI_LEGACY_LAD);
    715 
    716 	/* Enable the device. */
    717 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    718 	reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    719 		PCI_COMMAND_MASTER_ENABLE);
    720 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, reg);
    721 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    722 	mutex_spin_exit(&sc->sc_intr_lock);
    723 	if (yds_init(sc)) {
    724 		aprint_error_dev(dv, "reinitialize failed\n");
    725 		mutex_exit(&sc->sc_lock);
    726 		return false;
    727 	}
    728 
    729 	pci_conf_write(pc, tag, YDS_PCI_DSCTRL, sc->sc_dsctrl);
    730 	sc->sc_enabled = 1;
    731 	mutex_spin_exit(&sc->sc_intr_lock);
    732 	sc->sc_codec[0].codec_if->vtbl->restore_ports(sc->sc_codec[0].codec_if);
    733 	mutex_exit(&sc->sc_lock);
    734 
    735 	return true;
    736 }
    737 
    738 static void
    739 yds_attach(device_t parent, device_t self, void *aux)
    740 {
    741 	struct yds_softc *sc;
    742 	struct pci_attach_args *pa;
    743 	pci_chipset_tag_t pc;
    744 	char const *intrstr;
    745 	pci_intr_handle_t ih;
    746 	pcireg_t reg;
    747 	struct yds_codec_softc *codec;
    748 	int i, r, to;
    749 	int revision;
    750 	int ac97_id2;
    751 	char intrbuf[PCI_INTRSTR_LEN];
    752 
    753 	sc = device_private(self);
    754 	sc->sc_dev = self;
    755 	pa = (struct pci_attach_args *)aux;
    756 	pc = pa->pa_pc;
    757 	revision = PCI_REVISION(pa->pa_class);
    758 
    759 	pci_aprint_devinfo(pa, NULL);
    760 
    761 	/* Map register to memory */
    762 	if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0,
    763 			   &sc->memt, &sc->memh, NULL, NULL)) {
    764 		aprint_error_dev(self, "can't map memory space\n");
    765 		return;
    766 	}
    767 
    768 	/* Map and establish the interrupt. */
    769 	if (pci_intr_map(pa, &ih)) {
    770 		aprint_error_dev(self, "couldn't map interrupt\n");
    771 		return;
    772 	}
    773 
    774 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_AUDIO); /* XXX IPL_NONE? */
    775 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
    776 
    777 	intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
    778 	sc->sc_ih = pci_intr_establish_xname(pc, ih, IPL_AUDIO, yds_intr, sc,
    779 	    device_xname(self));
    780 	if (sc->sc_ih == NULL) {
    781 		aprint_error_dev(self, "couldn't establish interrupt");
    782 		if (intrstr != NULL)
    783 			aprint_error(" at %s", intrstr);
    784 		aprint_error("\n");
    785 		mutex_destroy(&sc->sc_lock);
    786 		mutex_destroy(&sc->sc_intr_lock);
    787 		return;
    788 	}
    789 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
    790 
    791 	sc->sc_enabled = 0;
    792 	sc->sc_dmatag = pa->pa_dmat;
    793 	sc->sc_pc = pc;
    794 	sc->sc_pcitag = pa->pa_tag;
    795 	sc->sc_id = pa->pa_id;
    796 	sc->sc_revision = revision;
    797 	sc->sc_flags = yds_get_dstype(sc->sc_id);
    798 #ifdef AUDIO_DEBUG
    799 	if (ydsdebug) {
    800 		char bits[80];
    801 
    802 		snprintb(bits, sizeof(bits), YDS_CAP_BITS, sc->sc_flags);
    803 		printf("%s: chip has %s\n", device_xname(self), bits);
    804 	}
    805 #endif
    806 
    807 	/* Disable legacy mode */
    808 	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY);
    809 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY,
    810 		       reg & YDS_PCI_LEGACY_LAD);
    811 
    812 	/* Enable the device. */
    813 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    814 	reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    815 		PCI_COMMAND_MASTER_ENABLE);
    816 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
    817 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    818 
    819 	/* Mute all volumes */
    820 	for (i = 0x80; i < 0xc0; i += 2)
    821 		YWRITE2(sc, i, 0);
    822 
    823 	/* Initialize the device */
    824 	if (yds_init(sc)) {
    825 		aprint_error_dev(self, "initialize failed\n");
    826 		mutex_destroy(&sc->sc_lock);
    827 		mutex_destroy(&sc->sc_intr_lock);
    828 		return;
    829 	}
    830 
    831 	/*
    832 	 * Detect primary/secondary AC97
    833 	 *	YMF754 Hardware Specification Rev 1.01 page 24
    834 	 */
    835 	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL);
    836 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
    837 	delay(400000);		/* Needed for 740C. */
    838 
    839 	/* Primary */
    840 	for (to = 0; to < AC97_TIMEOUT; to++) {
    841 		if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
    842 			break;
    843 		delay(1);
    844 	}
    845 	if (to == AC97_TIMEOUT) {
    846 		aprint_error_dev(self, "no AC97 available\n");
    847 		mutex_destroy(&sc->sc_lock);
    848 		mutex_destroy(&sc->sc_intr_lock);
    849 		return;
    850 	}
    851 
    852 	/* Secondary */
    853 	/* Secondary AC97 is used for 4ch audio. Currently unused. */
    854 	ac97_id2 = -1;
    855 	if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0)
    856 		goto detected;
    857 #if 0				/* reset secondary... */
    858 	YWRITE2(sc, YDS_GPIO_OCTRL,
    859 		YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2);
    860 	YWRITE2(sc, YDS_GPIO_FUNCE,
    861 		(YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2);
    862 #endif
    863 	for (to = 0; to < AC97_TIMEOUT; to++) {
    864 		if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0)
    865 			break;
    866 		delay(1);
    867 	}
    868 	if (to < AC97_TIMEOUT) {
    869 		/* detect id */
    870 		for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) {
    871 			YWRITE2(sc, AC97_CMD_ADDR,
    872 				AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28);
    873 
    874 			for (to = 0; to < AC97_TIMEOUT; to++) {
    875 				if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY)
    876 				    == 0)
    877 					goto detected;
    878 				delay(1);
    879 			}
    880 		}
    881 		if (ac97_id2 == 4)
    882 			ac97_id2 = -1;
    883 detected:
    884 		;
    885 	}
    886 
    887 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST);
    888 	delay (20);
    889 	pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
    890 	delay (400000);
    891 	for (to = 0; to < AC97_TIMEOUT; to++) {
    892 		if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
    893 			break;
    894 		delay(1);
    895 	}
    896 
    897 	/*
    898 	 * Attach ac97 codec
    899 	 */
    900 	for (i = 0; i < 2; i++) {
    901 		static struct {
    902 			int data;
    903 			int addr;
    904 		} statregs[] = {
    905 			{AC97_STAT_DATA1, AC97_STAT_ADDR1},
    906 			{AC97_STAT_DATA2, AC97_STAT_ADDR2},
    907 		};
    908 
    909 		if (i == 1 && ac97_id2 == -1)
    910 			break;		/* secondary ac97 not available */
    911 
    912 		codec = &sc->sc_codec[i];
    913 		codec->sc = sc;
    914 		codec->id = i == 1 ? ac97_id2 : 0;
    915 		codec->status_data = statregs[i].data;
    916 		codec->status_addr = statregs[i].addr;
    917 		codec->host_if.arg = codec;
    918 		codec->host_if.attach = yds_attach_codec;
    919 		codec->host_if.read = yds_read_codec;
    920 		codec->host_if.write = yds_write_codec;
    921 		codec->host_if.reset = yds_reset_codec;
    922 
    923 		r = ac97_attach(&codec->host_if, self, &sc->sc_lock);
    924 		if (r != 0) {
    925 			aprint_error_dev(self,
    926 			    "can't attach codec (error 0x%X)\n", r);
    927 			mutex_destroy(&sc->sc_lock);
    928 			mutex_destroy(&sc->sc_intr_lock);
    929 			return;
    930 		}
    931 	}
    932 
    933 	if (0 != auconv_create_encodings(yds_formats, YDS_NFORMATS,
    934 	    &sc->sc_encodings)) {
    935 		mutex_destroy(&sc->sc_lock);
    936 		mutex_destroy(&sc->sc_intr_lock);
    937 		return;
    938 	}
    939 
    940 	audio_attach_mi(&yds_hw_if, sc, self);
    941 
    942 	sc->sc_legacy_iot = pa->pa_iot;
    943 	config_defer(self, yds_configure_legacy);
    944 
    945 	if (!pmf_device_register(self, yds_suspend, yds_resume))
    946 		aprint_error_dev(self, "couldn't establish power handler\n");
    947 
    948 	mutex_spin_enter(&sc->sc_intr_lock);
    949 	sc->sc_enabled = 1;
    950 	mutex_spin_exit(&sc->sc_intr_lock);
    951 }
    952 
    953 static int
    954 yds_attach_codec(void *sc_, struct ac97_codec_if *codec_if)
    955 {
    956 	struct yds_codec_softc *sc;
    957 
    958 	sc = sc_;
    959 	sc->codec_if = codec_if;
    960 	return 0;
    961 }
    962 
    963 static int
    964 yds_ready_codec(struct yds_codec_softc *sc)
    965 {
    966 	int to;
    967 
    968 	for (to = 0; to < AC97_TIMEOUT; to++) {
    969 		if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0)
    970 			return 0;
    971 		delay(1);
    972 	}
    973 
    974 	return 1;
    975 }
    976 
    977 static int
    978 yds_read_codec(void *sc_, uint8_t reg, uint16_t *data)
    979 {
    980 	struct yds_codec_softc *sc;
    981 
    982 	sc = sc_;
    983 	YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg);
    984 
    985 	if (yds_ready_codec(sc)) {
    986 		aprint_error_dev(sc->sc->sc_dev, "yds_read_codec timeout\n");
    987 		return EIO;
    988 	}
    989 
    990 	if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744B &&
    991 	    sc->sc->sc_revision < 2) {
    992 		int i;
    993 		for (i=0; i<600; i++)
    994 			(void)YREAD2(sc->sc, sc->status_data);
    995 	}
    996 
    997 	*data = YREAD2(sc->sc, sc->status_data);
    998 
    999 	return 0;
   1000 }
   1001 
   1002 static int
   1003 yds_write_codec(void *sc_, uint8_t reg, uint16_t data)
   1004 {
   1005 	struct yds_codec_softc *sc;
   1006 
   1007 	sc = sc_;
   1008 	YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg);
   1009 	YWRITE2(sc->sc, AC97_CMD_DATA, data);
   1010 
   1011 	if (yds_ready_codec(sc)) {
   1012 		aprint_error_dev(sc->sc->sc_dev, "yds_write_codec timeout\n");
   1013 		return EIO;
   1014 	}
   1015 
   1016 	return 0;
   1017 }
   1018 
   1019 /*
   1020  * XXX: Must handle the secondary differntly!!
   1021  */
   1022 static int
   1023 yds_reset_codec(void *sc_)
   1024 {
   1025 	struct yds_codec_softc *codec;
   1026 	struct yds_softc *sc;
   1027 	pcireg_t reg;
   1028 
   1029 	codec = sc_;
   1030 	sc = codec->sc;
   1031 	/* reset AC97 codec */
   1032 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
   1033 	if (reg & 0x03) {
   1034 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
   1035 			       YDS_PCI_DSCTRL, reg & ~0x03);
   1036 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
   1037 			       YDS_PCI_DSCTRL, reg | 0x03);
   1038 		pci_conf_write(sc->sc_pc, sc->sc_pcitag,
   1039 			       YDS_PCI_DSCTRL, reg & ~0x03);
   1040 		delay(50000);
   1041 	}
   1042 
   1043 	yds_ready_codec(sc_);
   1044 	return 0;
   1045 }
   1046 
   1047 static int
   1048 yds_intr(void *p)
   1049 {
   1050 	struct yds_softc *sc = p;
   1051 #if NMPU > 0
   1052 	struct mpu_softc *sc_mpu = device_private(sc->sc_mpu);
   1053 #endif
   1054 	u_int status;
   1055 
   1056 	mutex_spin_enter(&sc->sc_intr_lock);
   1057 	if (!sc->sc_enabled) {
   1058 		mutex_spin_exit(&sc->sc_intr_lock);
   1059 		return 0;
   1060 	}
   1061 
   1062 	status = YREAD4(sc, YDS_STATUS);
   1063 	DPRINTFN(1, ("yds_intr: status=%08x\n", status));
   1064 	if ((status & (YDS_STAT_INT|YDS_STAT_TINT)) == 0) {
   1065 #if NMPU > 0
   1066 		if (sc_mpu)
   1067 			return mpu_intr(sc_mpu);
   1068 #endif
   1069 		mutex_spin_exit(&sc->sc_intr_lock);
   1070 		return 0;
   1071 	}
   1072 
   1073 	if (status & YDS_STAT_TINT) {
   1074 		YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT);
   1075 		printf ("yds_intr: timeout!\n");
   1076 	}
   1077 
   1078 	if (status & YDS_STAT_INT) {
   1079 		int nbank;
   1080 
   1081 		nbank = (YREAD4(sc, YDS_CONTROL_SELECT) == 0);
   1082 		/* Clear interrupt flag */
   1083 		YWRITE4(sc, YDS_STATUS, YDS_STAT_INT);
   1084 
   1085 		/* Buffer for the next frame is always ready. */
   1086 		YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2);
   1087 
   1088 		if (sc->sc_play.intr) {
   1089 			u_int dma, ccpu, blk, len;
   1090 
   1091 			/* Sync play slot control data */
   1092 			bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
   1093 					sc->pbankoff,
   1094 					sizeof(struct play_slot_ctrl_bank)*
   1095 					    le32toh(*sc->ptbl)*
   1096 					    N_PLAY_SLOT_CTRL_BANK,
   1097 					BUS_DMASYNC_POSTWRITE|
   1098 					BUS_DMASYNC_POSTREAD);
   1099 			dma = le32toh(sc->pbankp[nbank]->pgstart) * sc->sc_play.factor;
   1100 			ccpu = sc->sc_play.offset;
   1101 			blk = sc->sc_play.blksize;
   1102 			len = sc->sc_play.length;
   1103 
   1104 			if (((dma > ccpu) && (dma - ccpu > blk * 2)) ||
   1105 			    ((ccpu > dma) && (dma + len - ccpu > blk * 2))) {
   1106 				/* We can fill the next block */
   1107 				/* Sync ring buffer for previous write */
   1108 				bus_dmamap_sync(sc->sc_dmatag,
   1109 						sc->sc_play.dma->map,
   1110 						ccpu, blk,
   1111 						BUS_DMASYNC_POSTWRITE);
   1112 				sc->sc_play.intr(sc->sc_play.intr_arg);
   1113 				sc->sc_play.offset += blk;
   1114 				if (sc->sc_play.offset >= len) {
   1115 					sc->sc_play.offset -= len;
   1116 #ifdef DIAGNOSTIC
   1117 					if (sc->sc_play.offset != 0)
   1118 						printf ("Audio ringbuffer botch\n");
   1119 #endif
   1120 				}
   1121 				/* Sync ring buffer for next write */
   1122 				bus_dmamap_sync(sc->sc_dmatag,
   1123 						sc->sc_play.dma->map,
   1124 						ccpu, blk,
   1125 						BUS_DMASYNC_PREWRITE);
   1126 			}
   1127 		}
   1128 		if (sc->sc_rec.intr) {
   1129 			u_int dma, ccpu, blk, len;
   1130 
   1131 			/* Sync rec slot control data */
   1132 			bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
   1133 					sc->rbankoff,
   1134 					sizeof(struct rec_slot_ctrl_bank)*
   1135 					    N_REC_SLOT_CTRL*
   1136 					    N_REC_SLOT_CTRL_BANK,
   1137 					BUS_DMASYNC_POSTWRITE|
   1138 					BUS_DMASYNC_POSTREAD);
   1139 			dma = le32toh(sc->rbank[YDS_INPUT_SLOT*2 + nbank].pgstartadr);
   1140 			ccpu = sc->sc_rec.offset;
   1141 			blk = sc->sc_rec.blksize;
   1142 			len = sc->sc_rec.length;
   1143 
   1144 			if (((dma > ccpu) && (dma - ccpu > blk * 2)) ||
   1145 			    ((ccpu > dma) && (dma + len - ccpu > blk * 2))) {
   1146 				/* We can drain the current block */
   1147 				/* Sync ring buffer first */
   1148 				bus_dmamap_sync(sc->sc_dmatag,
   1149 						sc->sc_rec.dma->map,
   1150 						ccpu, blk,
   1151 						BUS_DMASYNC_POSTREAD);
   1152 				sc->sc_rec.intr(sc->sc_rec.intr_arg);
   1153 				sc->sc_rec.offset += blk;
   1154 				if (sc->sc_rec.offset >= len) {
   1155 					sc->sc_rec.offset -= len;
   1156 #ifdef DIAGNOSTIC
   1157 					if (sc->sc_rec.offset != 0)
   1158 						printf ("Audio ringbuffer botch\n");
   1159 #endif
   1160 				}
   1161 				/* Sync ring buffer for next read */
   1162 				bus_dmamap_sync(sc->sc_dmatag,
   1163 						sc->sc_rec.dma->map,
   1164 						ccpu, blk,
   1165 						BUS_DMASYNC_PREREAD);
   1166 			}
   1167 		}
   1168 	}
   1169 
   1170 	mutex_spin_exit(&sc->sc_intr_lock);
   1171 	return 1;
   1172 }
   1173 
   1174 static int
   1175 yds_allocmem(struct yds_softc *sc, size_t size, size_t align, struct yds_dma *p)
   1176 {
   1177 	int error;
   1178 
   1179 	p->size = size;
   1180 	error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
   1181 				 p->segs, sizeof(p->segs)/sizeof(p->segs[0]),
   1182 				 &p->nsegs, BUS_DMA_WAITOK);
   1183 	if (error)
   1184 		return error;
   1185 
   1186 	error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
   1187 			       &p->addr, BUS_DMA_WAITOK|BUS_DMA_COHERENT);
   1188 	if (error)
   1189 		goto free;
   1190 
   1191 	error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
   1192 				  0, BUS_DMA_WAITOK, &p->map);
   1193 	if (error)
   1194 		goto unmap;
   1195 
   1196 	error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
   1197 				BUS_DMA_WAITOK);
   1198 	if (error)
   1199 		goto destroy;
   1200 	return 0;
   1201 
   1202 destroy:
   1203 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
   1204 unmap:
   1205 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
   1206 free:
   1207 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
   1208 	return error;
   1209 }
   1210 
   1211 static int
   1212 yds_freemem(struct yds_softc *sc, struct yds_dma *p)
   1213 {
   1214 
   1215 	bus_dmamap_unload(sc->sc_dmatag, p->map);
   1216 	bus_dmamap_destroy(sc->sc_dmatag, p->map);
   1217 	bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
   1218 	bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
   1219 	return 0;
   1220 }
   1221 
   1222 static int
   1223 yds_open(void *addr, int flags)
   1224 {
   1225 	struct yds_softc *sc;
   1226 	uint32_t mode;
   1227 
   1228 	sc = addr;
   1229 	/* Select bank 0. */
   1230 	YWRITE4(sc, YDS_CONTROL_SELECT, 0);
   1231 
   1232 	/* Start the DSP operation. */
   1233 	mode = YREAD4(sc, YDS_MODE);
   1234 	mode |= YDS_MODE_ACTV;
   1235 	mode &= ~YDS_MODE_ACTV2;
   1236 	YWRITE4(sc, YDS_MODE, mode);
   1237 
   1238 	return 0;
   1239 }
   1240 
   1241 static void
   1242 yds_close(void *addr)
   1243 {
   1244 
   1245 	yds_halt(addr);
   1246 }
   1247 
   1248 static int
   1249 yds_query_encoding(void *addr, struct audio_encoding *fp)
   1250 {
   1251 	struct yds_softc *sc;
   1252 
   1253 	sc = addr;
   1254 	return auconv_query_encoding(sc->sc_encodings, fp);
   1255 }
   1256 
   1257 static int
   1258 yds_set_params(void *addr, int setmode, int usemode,
   1259 	       audio_params_t *play, audio_params_t* rec,
   1260 	       stream_filter_list_t *pfil, stream_filter_list_t *rfil)
   1261 {
   1262 	if (setmode & AUMODE_RECORD) {
   1263 		if (auconv_set_converter(yds_formats, YDS_NFORMATS,
   1264 					 AUMODE_RECORD, rec, FALSE, rfil) < 0)
   1265 			return EINVAL;
   1266 	}
   1267 	if (setmode & AUMODE_PLAY) {
   1268 		if (auconv_set_converter(yds_formats, YDS_NFORMATS,
   1269 					 AUMODE_PLAY, play, FALSE, pfil) < 0)
   1270 			return EINVAL;
   1271 	}
   1272 	return 0;
   1273 }
   1274 
   1275 static int
   1276 yds_round_blocksize(void *addr, int blk, int mode,
   1277     const audio_params_t *param)
   1278 {
   1279 
   1280 	/*
   1281 	 * Block size must be bigger than a frame.
   1282 	 * That is 1024bytes at most, i.e. for 48000Hz, 16bit, 2ch.
   1283 	 */
   1284 	if (blk < 1024)
   1285 		blk = 1024;
   1286 
   1287 	return blk & ~4;
   1288 }
   1289 
   1290 static uint32_t
   1291 yds_get_lpfq(u_int sample_rate)
   1292 {
   1293 	int i;
   1294 	static struct lpfqt {
   1295 		u_int rate;
   1296 		uint32_t lpfq;
   1297 	} lpfqt[] = {
   1298 		{8000,  0x32020000},
   1299 		{11025, 0x31770000},
   1300 		{16000, 0x31390000},
   1301 		{22050, 0x31c90000},
   1302 		{32000, 0x33d00000},
   1303 		{48000, 0x40000000},
   1304 		{0, 0}
   1305 	};
   1306 
   1307 	if (sample_rate == 44100)		/* for P44 slot? */
   1308 		return 0x370A0000;
   1309 
   1310 	for (i = 0; lpfqt[i].rate != 0; i++)
   1311 		if (sample_rate <= lpfqt[i].rate)
   1312 			break;
   1313 
   1314 	return lpfqt[i].lpfq;
   1315 }
   1316 
   1317 static uint32_t
   1318 yds_get_lpfk(u_int sample_rate)
   1319 {
   1320 	int i;
   1321 	static struct lpfkt {
   1322 		u_int rate;
   1323 		uint32_t lpfk;
   1324 	} lpfkt[] = {
   1325 		{8000,  0x18b20000},
   1326 		{11025, 0x20930000},
   1327 		{16000, 0x2b9a0000},
   1328 		{22050, 0x35a10000},
   1329 		{32000, 0x3eaa0000},
   1330 		{48000, 0x40000000},
   1331 		{0, 0}
   1332 	};
   1333 
   1334 	if (sample_rate == 44100)		/* for P44 slot? */
   1335 		return 0x46460000;
   1336 
   1337 	for (i = 0; lpfkt[i].rate != 0; i++)
   1338 		if (sample_rate <= lpfkt[i].rate)
   1339 			break;
   1340 
   1341 	return lpfkt[i].lpfk;
   1342 }
   1343 
   1344 static int
   1345 yds_trigger_output(void *addr, void *start, void *end, int blksize,
   1346 		   void (*intr)(void *), void *arg, const audio_params_t *param)
   1347 #define P44		(sc->sc_flags & YDS_CAP_HAS_P44)
   1348 {
   1349 	struct yds_softc *sc;
   1350 	struct yds_dma *p;
   1351 	struct play_slot_ctrl_bank *psb;
   1352 	const u_int gain = 0x40000000;
   1353 	bus_addr_t s;
   1354 	size_t l;
   1355 	int i;
   1356 	int p44, channels;
   1357 	uint32_t format;
   1358 
   1359 	sc = addr;
   1360 #ifdef DIAGNOSTIC
   1361 	if (sc->sc_play.intr)
   1362 		panic("yds_trigger_output: already running");
   1363 #endif
   1364 
   1365 	sc->sc_play.intr = intr;
   1366 	sc->sc_play.intr_arg = arg;
   1367 	sc->sc_play.offset = 0;
   1368 	sc->sc_play.blksize = blksize;
   1369 
   1370 	DPRINTFN(1, ("yds_trigger_output: sc=%p start=%p end=%p "
   1371 	    "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg));
   1372 
   1373 	p = yds_find_dma(sc, start);
   1374 	if (!p) {
   1375 		printf("yds_trigger_output: bad addr %p\n", start);
   1376 		return EINVAL;
   1377 	}
   1378 	sc->sc_play.dma = p;
   1379 
   1380 #ifdef YDS_USE_P44
   1381 	/* The document says the P44 SRC supports only stereo, 16bit PCM. */
   1382 	if (P44)
   1383 		p44 = ((param->sample_rate == 44100) &&
   1384 		       (param->channels == 2) &&
   1385 		       (param->precision == 16));
   1386 	else
   1387 #endif
   1388 		p44 = 0;
   1389 	channels = p44 ? 1 : param->channels;
   1390 
   1391 	s = DMAADDR(p);
   1392 	l = ((char *)end - (char *)start);
   1393 	sc->sc_play.length = l;
   1394 
   1395 	*sc->ptbl = htole32(channels);	/* Num of play */
   1396 
   1397 	sc->sc_play.factor = 1;
   1398 	if (param->channels == 2)
   1399 		sc->sc_play.factor *= 2;
   1400 	if (param->precision != 8)
   1401 		sc->sc_play.factor *= 2;
   1402 	l /= sc->sc_play.factor;
   1403 
   1404 	format = ((channels == 2 ? PSLT_FORMAT_STEREO : 0) |
   1405 		  (param->precision == 8 ? PSLT_FORMAT_8BIT : 0) |
   1406 		  (p44 ? PSLT_FORMAT_SRC441 : 0));
   1407 
   1408 	psb = sc->pbankp[0];
   1409 	memset(psb, 0, sizeof(*psb));
   1410 	psb->format = htole32(format);
   1411 	psb->pgbase = htole32(s);
   1412 	psb->pgloopend = htole32(l);
   1413 	if (!p44) {
   1414 		psb->pgdeltaend = htole32((param->sample_rate * 65536 / 48000) << 12);
   1415 		psb->lpfkend = htole32(yds_get_lpfk(param->sample_rate));
   1416 		psb->eggainend = htole32(gain);
   1417 		psb->lpfq = htole32(yds_get_lpfq(param->sample_rate));
   1418 		psb->pgdelta = htole32(psb->pgdeltaend);
   1419 		psb->lpfk = htole32(yds_get_lpfk(param->sample_rate));
   1420 		psb->eggain = htole32(gain);
   1421 	}
   1422 
   1423 	for (i = 0; i < channels; i++) {
   1424 		/* i == 0: left or mono, i == 1: right */
   1425 		psb = sc->pbankp[i*2];
   1426 		if (i)
   1427 			/* copy from left */
   1428 			*psb = *(sc->pbankp[0]);
   1429 		if (channels == 2) {
   1430 			/* stereo */
   1431 			if (i == 0) {
   1432 				psb->lchgain = psb->lchgainend = htole32(gain);
   1433 			} else {
   1434 				psb->lchgain = psb->lchgainend = 0;
   1435 				psb->rchgain = psb->rchgainend = htole32(gain);
   1436 				psb->format |= htole32(PSLT_FORMAT_RCH);
   1437 			}
   1438 		} else if (!p44) {
   1439 			/* mono */
   1440 			psb->lchgain = psb->rchgain = htole32(gain);
   1441 			psb->lchgainend = psb->rchgainend = htole32(gain);
   1442 		}
   1443 		/* copy to the other bank */
   1444 		*(sc->pbankp[i*2+1]) = *psb;
   1445 	}
   1446 
   1447 	YDS_DUMP_PLAY_SLOT(5, sc, 0);
   1448 	YDS_DUMP_PLAY_SLOT(5, sc, 1);
   1449 
   1450 	if (p44)
   1451 		YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff);
   1452 	else
   1453 		YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff);
   1454 
   1455 	/* Now the play slot for the next frame is set up!! */
   1456 	/* Sync play slot control data for both directions */
   1457 	bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
   1458 			sc->ptbloff,
   1459 			sizeof(struct play_slot_ctrl_bank) *
   1460 			    channels * N_PLAY_SLOT_CTRL_BANK,
   1461 			BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
   1462 	/* Sync ring buffer */
   1463 	bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
   1464 			BUS_DMASYNC_PREWRITE);
   1465 	/* HERE WE GO!! */
   1466 	YWRITE4(sc, YDS_MODE,
   1467 		YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
   1468 
   1469 	return 0;
   1470 }
   1471 #undef P44
   1472 
   1473 static int
   1474 yds_trigger_input(void *addr, void *start, void *end, int blksize,
   1475 		  void (*intr)(void *), void *arg, const audio_params_t *param)
   1476 {
   1477 	struct yds_softc *sc;
   1478 	struct yds_dma *p;
   1479 	u_int srate, format;
   1480 	struct rec_slot_ctrl_bank *rsb;
   1481 	bus_addr_t s;
   1482 	size_t l;
   1483 
   1484 	sc = addr;
   1485 #ifdef DIAGNOSTIC
   1486 	if (sc->sc_rec.intr)
   1487 		panic("yds_trigger_input: already running");
   1488 #endif
   1489 	sc->sc_rec.intr = intr;
   1490 	sc->sc_rec.intr_arg = arg;
   1491 	sc->sc_rec.offset = 0;
   1492 	sc->sc_rec.blksize = blksize;
   1493 
   1494 	DPRINTFN(1, ("yds_trigger_input: "
   1495 	    "sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
   1496 	    addr, start, end, blksize, intr, arg));
   1497 	DPRINTFN(1, (" parameters: rate=%u, precision=%u, channels=%u\n",
   1498 	    param->sample_rate, param->precision, param->channels));
   1499 
   1500 	p = yds_find_dma(sc, start);
   1501 	if (!p) {
   1502 		printf("yds_trigger_input: bad addr %p\n", start);
   1503 		return EINVAL;
   1504 	}
   1505 	sc->sc_rec.dma = p;
   1506 
   1507 	s = DMAADDR(p);
   1508 	l = ((char *)end - (char *)start);
   1509 	sc->sc_rec.length = l;
   1510 
   1511 	sc->sc_rec.factor = 1;
   1512 	if (param->channels == 2)
   1513 		sc->sc_rec.factor *= 2;
   1514 	if (param->precision != 8)
   1515 		sc->sc_rec.factor *= 2;
   1516 
   1517 	rsb = &sc->rbank[0];
   1518 	memset(rsb, 0, sizeof(*rsb));
   1519 	rsb->pgbase = htole32(s);
   1520 	rsb->pgloopendadr = htole32(l);
   1521 	/* Seems all 4 banks must be set up... */
   1522 	sc->rbank[1] = *rsb;
   1523 	sc->rbank[2] = *rsb;
   1524 	sc->rbank[3] = *rsb;
   1525 
   1526 	YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff);
   1527 	YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff);
   1528 	srate = 48000 * 4096 / param->sample_rate - 1;
   1529 	format = ((param->precision == 8 ? YDS_FORMAT_8BIT : 0) |
   1530 		  (param->channels == 2 ? YDS_FORMAT_STEREO : 0));
   1531 	DPRINTF(("srate=%d, format=%08x\n", srate, format));
   1532 #ifdef YDS_USE_REC_SLOT
   1533 	YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff);
   1534 	YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff);
   1535 	YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID);
   1536 	YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate);
   1537 	YWRITE4(sc, YDS_REC_FORMAT, format);
   1538 #else
   1539 	YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID);
   1540 	YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate);
   1541 	YWRITE4(sc, YDS_ADC_FORMAT, format);
   1542 #endif
   1543 	/* Now the rec slot for the next frame is set up!! */
   1544 	/* Sync record slot control data */
   1545 	bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
   1546 			sc->rbankoff,
   1547 			sizeof(struct rec_slot_ctrl_bank)*
   1548 			    N_REC_SLOT_CTRL*
   1549 			    N_REC_SLOT_CTRL_BANK,
   1550 			BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
   1551 	/* Sync ring buffer */
   1552 	bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
   1553 			BUS_DMASYNC_PREREAD);
   1554 	/* HERE WE GO!! */
   1555 	YWRITE4(sc, YDS_MODE,
   1556 		YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
   1557 
   1558 	return 0;
   1559 }
   1560 
   1561 static int
   1562 yds_halt(struct yds_softc *sc)
   1563 {
   1564 	uint32_t mode;
   1565 
   1566 	/* Stop the DSP operation. */
   1567 	mode = YREAD4(sc, YDS_MODE);
   1568 	YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2));
   1569 
   1570 	/* Paranoia...  mute all */
   1571 	YWRITE4(sc, YDS_P44_OUT_VOLUME, 0);
   1572 	YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0);
   1573 	YWRITE4(sc, YDS_ADC_IN_VOLUME, 0);
   1574 	YWRITE4(sc, YDS_REC_IN_VOLUME, 0);
   1575 	YWRITE4(sc, YDS_DAC_REC_VOLUME, 0);
   1576 	YWRITE4(sc, YDS_P44_REC_VOLUME, 0);
   1577 
   1578 	return 0;
   1579 }
   1580 
   1581 static int
   1582 yds_halt_output(void *addr)
   1583 {
   1584 	struct yds_softc *sc;
   1585 
   1586 	DPRINTF(("yds: yds_halt_output\n"));
   1587 	sc = addr;
   1588 	if (sc->sc_play.intr) {
   1589 		sc->sc_play.intr = 0;
   1590 		/* Sync play slot control data */
   1591 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
   1592 				sc->pbankoff,
   1593 				sizeof(struct play_slot_ctrl_bank)*
   1594 				    (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK,
   1595 				BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
   1596 		/* Stop the play slot operation */
   1597 		sc->pbankp[0]->status =
   1598 		sc->pbankp[1]->status =
   1599 		sc->pbankp[2]->status =
   1600 		sc->pbankp[3]->status = 1;
   1601 		/* Sync ring buffer */
   1602 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map,
   1603 				0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE);
   1604 	}
   1605 
   1606 	return 0;
   1607 }
   1608 
   1609 static int
   1610 yds_halt_input(void *addr)
   1611 {
   1612 	struct yds_softc *sc;
   1613 
   1614 	DPRINTF(("yds: yds_halt_input\n"));
   1615 	sc = addr;
   1616 	sc->sc_rec.intr = NULL;
   1617 	if (sc->sc_rec.intr) {
   1618 		/* Stop the rec slot operation */
   1619 		YWRITE4(sc, YDS_MAPOF_REC, 0);
   1620 		sc->sc_rec.intr = 0;
   1621 		/* Sync rec slot control data */
   1622 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
   1623 				sc->rbankoff,
   1624 				sizeof(struct rec_slot_ctrl_bank)*
   1625 				    N_REC_SLOT_CTRL*N_REC_SLOT_CTRL_BANK,
   1626 				BUS_DMASYNC_POSTWRITE|BUS_DMASYNC_POSTREAD);
   1627 		/* Sync ring buffer */
   1628 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map,
   1629 				0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD);
   1630 	}
   1631 
   1632 	return 0;
   1633 }
   1634 
   1635 static int
   1636 yds_getdev(void *addr, struct audio_device *retp)
   1637 {
   1638 
   1639 	*retp = yds_device;
   1640 	return 0;
   1641 }
   1642 
   1643 static int
   1644 yds_mixer_set_port(void *addr, mixer_ctrl_t *cp)
   1645 {
   1646 	struct yds_softc *sc;
   1647 
   1648 	sc = addr;
   1649 	return sc->sc_codec[0].codec_if->vtbl->mixer_set_port(
   1650 	    sc->sc_codec[0].codec_if, cp);
   1651 }
   1652 
   1653 static int
   1654 yds_mixer_get_port(void *addr, mixer_ctrl_t *cp)
   1655 {
   1656 	struct yds_softc *sc;
   1657 
   1658 	sc = addr;
   1659 	return sc->sc_codec[0].codec_if->vtbl->mixer_get_port(
   1660 	    sc->sc_codec[0].codec_if, cp);
   1661 }
   1662 
   1663 static int
   1664 yds_query_devinfo(void *addr, mixer_devinfo_t *dip)
   1665 {
   1666 	struct yds_softc *sc;
   1667 
   1668 	sc = addr;
   1669 	return sc->sc_codec[0].codec_if->vtbl->query_devinfo(
   1670 	    sc->sc_codec[0].codec_if, dip);
   1671 }
   1672 
   1673 static void *
   1674 yds_malloc(void *addr, int direction, size_t size)
   1675 {
   1676 	struct yds_softc *sc;
   1677 	struct yds_dma *p;
   1678 	int error;
   1679 
   1680 	p = kmem_alloc(sizeof(*p), KM_SLEEP);
   1681 	sc = addr;
   1682 	error = yds_allocmem(sc, size, 16, p);
   1683 	if (error) {
   1684 		kmem_free(p, sizeof(*p));
   1685 		return NULL;
   1686 	}
   1687 	p->next = sc->sc_dmas;
   1688 	sc->sc_dmas = p;
   1689 	return KERNADDR(p);
   1690 }
   1691 
   1692 static void
   1693 yds_free(void *addr, void *ptr, size_t size)
   1694 {
   1695 	struct yds_softc *sc;
   1696 	struct yds_dma **pp, *p;
   1697 
   1698 	sc = addr;
   1699 	for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
   1700 		if (KERNADDR(p) == ptr) {
   1701 			yds_freemem(sc, p);
   1702 			*pp = p->next;
   1703 			kmem_free(p, sizeof(*p));
   1704 			return;
   1705 		}
   1706 	}
   1707 }
   1708 
   1709 static struct yds_dma *
   1710 yds_find_dma(struct yds_softc *sc, void *addr)
   1711 {
   1712 	struct yds_dma *p;
   1713 
   1714 	for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
   1715 		continue;
   1716 
   1717 	return p;
   1718 }
   1719 
   1720 static size_t
   1721 yds_round_buffersize(void *addr, int direction, size_t size)
   1722 {
   1723 
   1724 	/*
   1725 	 * Buffer size should be at least twice as bigger as a frame.
   1726 	 */
   1727 	if (size < 1024 * 3)
   1728 		size = 1024 * 3;
   1729 	return size;
   1730 }
   1731 
   1732 static paddr_t
   1733 yds_mappage(void *addr, void *mem, off_t off, int prot)
   1734 {
   1735 	struct yds_softc *sc;
   1736 	struct yds_dma *p;
   1737 
   1738 	if (off < 0)
   1739 		return -1;
   1740 	sc = addr;
   1741 	p = yds_find_dma(sc, mem);
   1742 	if (p == NULL)
   1743 		return -1;
   1744 	return bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
   1745 	    off, prot, BUS_DMA_WAITOK);
   1746 }
   1747 
   1748 static int
   1749 yds_get_props(void *addr)
   1750 {
   1751 
   1752 	return AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT |
   1753 	    AUDIO_PROP_FULLDUPLEX;
   1754 }
   1755 
   1756 static void
   1757 yds_get_locks(void *addr, kmutex_t **intr, kmutex_t **thread)
   1758 {
   1759 	struct yds_softc *sc;
   1760 
   1761 	sc = addr;
   1762 	*intr = &sc->sc_intr_lock;
   1763 	*thread = &sc->sc_lock;
   1764 }
   1765