esp_pcmcia.c revision 1.1
1 /* $NetBSD: esp_pcmcia.c,v 1.1 2000/03/19 21:54:01 mycroft Exp $ */ 2 3 #define ESP_PCMCIA_POLL 4 5 /*- 6 * Copyright (c) 2000 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Charles M. Hannum. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/buf.h> 45 46 #include <machine/bus.h> 47 #include <machine/intr.h> 48 49 #include <dev/scsipi/scsi_all.h> 50 #include <dev/scsipi/scsipi_all.h> 51 #include <dev/scsipi/scsiconf.h> 52 53 #include <dev/pcmcia/pcmciareg.h> 54 #include <dev/pcmcia/pcmciavar.h> 55 #include <dev/pcmcia/pcmciadevs.h> 56 57 #include <dev/ic/ncr53c9xreg.h> 58 #include <dev/ic/ncr53c9xvar.h> 59 60 struct esp_pcmcia_softc { 61 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 62 63 int sc_active; /* Pseudo-DMA state vars */ 64 int sc_tc; 65 int sc_datain; 66 size_t sc_dmasize; 67 size_t sc_dmatrans; 68 char **sc_dmaaddr; 69 size_t *sc_pdmalen; 70 71 /* PCMCIA-specific goo. */ 72 struct pcmcia_io_handle sc_pcioh; /* PCMCIA i/o space info */ 73 int sc_io_window; /* our i/o window */ 74 struct pcmcia_function *sc_pf; /* our PCMCIA function */ 75 void *sc_ih; /* interrupt handler */ 76 int sc_flags; 77 #define ESP_PCMCIA_ATTACHED 1 /* attach completed */ 78 #define ESP_PCMCIA_ATTACHING 2 /* attach in progress */ 79 }; 80 81 int esp_pcmcia_match __P((struct device *, struct cfdata *, void *)); 82 void esp_pcmcia_attach __P((struct device *, struct device *, void *)); 83 void esp_pcmcia_init __P((struct esp_pcmcia_softc *)); 84 int esp_pcmcia_detach __P((struct device *, int)); 85 int esp_pcmcia_enable __P((void *, int)); 86 87 struct cfattach esp_pcmcia_ca = { 88 sizeof(struct esp_pcmcia_softc), esp_pcmcia_match, esp_pcmcia_attach, 89 esp_pcmcia_detach 90 }; 91 92 struct scsipi_device esp_pcmcia_dev = { 93 NULL, /* Use default error handler */ 94 NULL, /* have a queue, served by this */ 95 NULL, /* have no async handler */ 96 NULL, /* Use default 'done' routine */ 97 }; 98 99 /* 100 * Functions and the switch for the MI code. 101 */ 102 #ifdef ESP_PCMCIA_POLL 103 void esp_pcmcia_poll __P((void *)); 104 #endif 105 u_char esp_pcmcia_read_reg __P((struct ncr53c9x_softc *, int)); 106 void esp_pcmcia_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 107 int esp_pcmcia_dma_isintr __P((struct ncr53c9x_softc *)); 108 void esp_pcmcia_dma_reset __P((struct ncr53c9x_softc *)); 109 int esp_pcmcia_dma_intr __P((struct ncr53c9x_softc *)); 110 int esp_pcmcia_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 111 size_t *, int, size_t *)); 112 void esp_pcmcia_dma_go __P((struct ncr53c9x_softc *)); 113 void esp_pcmcia_dma_stop __P((struct ncr53c9x_softc *)); 114 int esp_pcmcia_dma_isactive __P((struct ncr53c9x_softc *)); 115 116 struct ncr53c9x_glue esp_pcmcia_glue = { 117 esp_pcmcia_read_reg, 118 esp_pcmcia_write_reg, 119 esp_pcmcia_dma_isintr, 120 esp_pcmcia_dma_reset, 121 esp_pcmcia_dma_intr, 122 esp_pcmcia_dma_setup, 123 esp_pcmcia_dma_go, 124 esp_pcmcia_dma_stop, 125 esp_pcmcia_dma_isactive, 126 NULL, /* gl_clear_latched_intr */ 127 }; 128 129 const struct pcmcia_product esp_pcmcia_products[] = { 130 { PCMCIA_STR_PANASONIC_KXLC002, PCMCIA_VENDOR_PANASONIC, 131 PCMCIA_PRODUCT_PANASONIC_KXLC002, 0 }, 132 133 { NULL } 134 }; 135 136 int 137 esp_pcmcia_match(parent, match, aux) 138 struct device *parent; 139 struct cfdata *match; 140 void *aux; 141 { 142 struct pcmcia_attach_args *pa = aux; 143 144 if (pcmcia_product_lookup(pa, esp_pcmcia_products, 145 sizeof esp_pcmcia_products[0], NULL) != NULL) 146 return (1); 147 return (0); 148 } 149 150 void 151 esp_pcmcia_attach(parent, self, aux) 152 struct device *parent, *self; 153 void *aux; 154 { 155 struct esp_pcmcia_softc *esc = (void *)self; 156 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 157 struct pcmcia_attach_args *pa = aux; 158 struct pcmcia_config_entry *cfe; 159 struct pcmcia_function *pf = pa->pf; 160 const struct pcmcia_product *pp; 161 162 esc->sc_pf = pf; 163 164 for (cfe = SIMPLEQ_FIRST(&pf->cfe_head); cfe != NULL; 165 cfe = SIMPLEQ_NEXT(cfe, cfe_list)) { 166 if (cfe->num_memspace != 0 || 167 cfe->num_iospace != 1) 168 continue; 169 170 if (pcmcia_io_alloc(pa->pf, cfe->iospace[0].start, 171 cfe->iospace[0].length, 0, &esc->sc_pcioh) == 0) 172 break; 173 } 174 175 if (cfe == 0) { 176 printf(": can't alloc i/o space\n"); 177 goto no_config_entry; 178 } 179 180 /* Enable the card. */ 181 pcmcia_function_init(pf, cfe); 182 if (pcmcia_function_enable(pf)) { 183 printf(": function enable failed\n"); 184 goto enable_failed; 185 } 186 187 /* Map in the I/O space */ 188 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_AUTO, 0, esc->sc_pcioh.size, 189 &esc->sc_pcioh, &esc->sc_io_window)) { 190 printf(": can't map i/o space\n"); 191 goto iomap_failed; 192 } 193 194 pp = pcmcia_product_lookup(pa, esp_pcmcia_products, 195 sizeof esp_pcmcia_products[0], NULL); 196 if (pp == NULL) { 197 printf("\n"); 198 panic("esp_pcmcia_attach: impossible"); 199 } 200 201 printf(": %s\n", pp->pp_name); 202 203 esp_pcmcia_init(esc); 204 205 sc->sc_adapter.scsipi_enable = esp_pcmcia_enable; 206 sc->sc_adapter.scsipi_cmd = ncr53c9x_scsi_cmd; 207 sc->sc_adapter.scsipi_minphys = minphys; 208 209 /* 210 * Initialize nca board itself. 211 */ 212 esc->sc_flags |= ESP_PCMCIA_ATTACHING; 213 ncr53c9x_attach(sc, &esp_pcmcia_dev); 214 esc->sc_flags &= ~ESP_PCMCIA_ATTACHING; 215 esc->sc_flags |= ESP_PCMCIA_ATTACHED; 216 return; 217 218 iomap_failed: 219 /* Disable the device. */ 220 pcmcia_function_disable(esc->sc_pf); 221 222 enable_failed: 223 /* Unmap our I/O space. */ 224 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 225 226 no_config_entry: 227 return; 228 } 229 230 void 231 esp_pcmcia_init(esc) 232 struct esp_pcmcia_softc *esc; 233 { 234 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 235 bus_space_tag_t iot = esc->sc_pcioh.iot; 236 bus_space_handle_t ioh = esc->sc_pcioh.ioh; 237 238 /* id 7, clock 40M, parity ON, sync OFF, fast ON, slow ON */ 239 240 sc->sc_glue = &esp_pcmcia_glue; 241 242 sc->sc_rev = NCR_VARIANT_ESP406; 243 sc->sc_id = 7; 244 sc->sc_freq = 40; 245 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW; 246 sc->sc_cfg2 = NCRCFG2_SCSI2; 247 sc->sc_cfg3 = bus_space_read_1(iot, ioh, NCR_ESPCFG3) | 248 NCRESPCFG3_FCLK | NCRESPCFG3_IDM | NCRESPCFG3_FSCSI; 249 sc->sc_cfg4 = NCRCFG4_ACTNEG; 250 sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC; 251 sc->sc_minsync = 0; 252 sc->sc_maxxfer = 64 * 1024; 253 254 bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5); 255 256 bus_space_write_1(iot, ioh, NCR_PIOI, 0); 257 bus_space_write_1(iot, ioh, NCR_PSTAT, 0); 258 bus_space_write_1(iot, ioh, 0x09, 0x24); 259 260 bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4); 261 } 262 263 int 264 esp_pcmcia_detach(self, flags) 265 struct device *self; 266 int flags; 267 { 268 struct esp_pcmcia_softc *esc = (void *)self; 269 int error; 270 271 if ((esc->sc_flags & ESP_PCMCIA_ATTACHED) == 0) { 272 /* Nothing to detach. */ 273 return (0); 274 } 275 276 error = ncr53c9x_detach(&esc->sc_ncr53c9x, flags); 277 if (error) 278 return (error); 279 280 /* Unmap our i/o window and i/o space. */ 281 pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window); 282 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 283 284 return (0); 285 } 286 287 int 288 esp_pcmcia_enable(arg, onoff) 289 void *arg; 290 int onoff; 291 { 292 struct esp_pcmcia_softc *esc = arg; 293 294 if (onoff) { 295 #ifdef ESP_PCMCIA_POLL 296 timeout(esp_pcmcia_poll, esc, 1); 297 #else 298 /* Establish the interrupt handler. */ 299 esc->sc_ih = pcmcia_intr_establish(esc->sc_pf, IPL_BIO, 300 ncr53c9x_intr, &esc->sc_ncr53c9x); 301 if (esc->sc_ih == NULL) { 302 printf("%s: couldn't establish interrupt handler\n", 303 esc->sc_ncr53c9x.sc_dev.dv_xname); 304 return (EIO); 305 } 306 #endif 307 308 /* 309 * If attach is in progress, we know that card power is 310 * enabled and chip will be initialized later. 311 * Otherwise, enable and reset now. 312 */ 313 if ((esc->sc_flags & ESP_PCMCIA_ATTACHING) == 0) { 314 if (pcmcia_function_enable(esc->sc_pf)) { 315 printf("%s: couldn't enable PCMCIA function\n", 316 esc->sc_ncr53c9x.sc_dev.dv_xname); 317 pcmcia_intr_disestablish(esc->sc_pf, 318 esc->sc_ih); 319 return (EIO); 320 } 321 322 /* Initialize only chip. */ 323 ncr53c9x_init(&esc->sc_ncr53c9x, 0); 324 } 325 } else { 326 pcmcia_function_disable(esc->sc_pf); 327 #ifdef ESP_PCMCIA_POLL 328 untimeout(esp_pcmcia_poll, esc); 329 #else 330 pcmcia_intr_disestablish(esc->sc_pf, esc->sc_ih); 331 #endif 332 } 333 334 return (0); 335 } 336 337 #ifdef ESP_PCMCIA_POLL 338 void 339 esp_pcmcia_poll(arg) 340 void *arg; 341 { 342 struct esp_pcmcia_softc *esc = arg; 343 344 (void) ncr53c9x_intr(&esc->sc_ncr53c9x); 345 timeout(esp_pcmcia_poll, esc, 1); 346 } 347 #endif 348 349 /* 350 * Glue functions. 351 */ 352 u_char 353 esp_pcmcia_read_reg(sc, reg) 354 struct ncr53c9x_softc *sc; 355 int reg; 356 { 357 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 358 u_char v; 359 360 v = bus_space_read_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg); 361 return v; 362 } 363 364 void 365 esp_pcmcia_write_reg(sc, reg, val) 366 struct ncr53c9x_softc *sc; 367 int reg; 368 u_char val; 369 { 370 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 371 u_char v = val; 372 373 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) 374 v = NCRCMD_TRANS; 375 bus_space_write_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg, v); 376 } 377 378 int 379 esp_pcmcia_dma_isintr(sc) 380 struct ncr53c9x_softc *sc; 381 { 382 383 return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT; 384 } 385 386 void 387 esp_pcmcia_dma_reset(sc) 388 struct ncr53c9x_softc *sc; 389 { 390 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 391 392 esc->sc_active = 0; 393 esc->sc_tc = 0; 394 } 395 396 int 397 esp_pcmcia_dma_intr(sc) 398 struct ncr53c9x_softc *sc; 399 { 400 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 401 u_char *p; 402 u_int espphase, espstat, espintr; 403 int cnt; 404 405 if (esc->sc_active == 0) { 406 printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname); 407 return -1; 408 } 409 410 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 411 esc->sc_active = 0; 412 return 0; 413 } 414 415 cnt = *esc->sc_pdmalen; 416 if (*esc->sc_pdmalen == 0) { 417 printf("%s: data interrupt, but no count left\n", 418 sc->sc_dev.dv_xname); 419 } 420 421 p = *esc->sc_dmaaddr; 422 espphase = sc->sc_phase; 423 espstat = (u_int) sc->sc_espstat; 424 espintr = (u_int) sc->sc_espintr; 425 do { 426 if (esc->sc_datain) { 427 if (espphase == DATA_IN_PHASE) { 428 *p++ = NCR_READ_REG(sc, NCR_FIFO); 429 cnt--; 430 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 431 } else 432 esc->sc_active = 0; 433 } else { 434 if (espphase == DATA_OUT_PHASE || 435 espphase == MESSAGE_OUT_PHASE) { 436 NCR_WRITE_REG(sc, NCR_FIFO, *p++); 437 cnt--; 438 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 439 } else 440 esc->sc_active = 0; 441 } 442 443 if (esc->sc_active) { 444 while (!(NCR_READ_REG(sc, NCR_STAT) & 0x80)); 445 espstat = NCR_READ_REG(sc, NCR_STAT); 446 espintr = NCR_READ_REG(sc, NCR_INTR); 447 espphase = (espintr & NCRINTR_DIS) 448 ? /* Disconnected */ BUSFREE_PHASE 449 : espstat & PHASE_MASK; 450 } 451 } while (esc->sc_active && espintr); 452 sc->sc_phase = espphase; 453 sc->sc_espstat = (u_char) espstat; 454 sc->sc_espintr = (u_char) espintr; 455 *esc->sc_dmaaddr = p; 456 *esc->sc_pdmalen = cnt; 457 458 if (*esc->sc_pdmalen == 0) 459 esc->sc_tc = NCRSTAT_TC; 460 sc->sc_espstat |= esc->sc_tc; 461 return 0; 462 } 463 464 int 465 esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize) 466 struct ncr53c9x_softc *sc; 467 caddr_t *addr; 468 size_t *len; 469 int datain; 470 size_t *dmasize; 471 { 472 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 473 474 esc->sc_dmaaddr = addr; 475 esc->sc_pdmalen = len; 476 esc->sc_datain = datain; 477 esc->sc_dmasize = *dmasize; 478 esc->sc_tc = 0; 479 480 return 0; 481 } 482 483 void 484 esp_pcmcia_dma_go(sc) 485 struct ncr53c9x_softc *sc; 486 { 487 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 488 489 esc->sc_active = 1; 490 } 491 492 void 493 esp_pcmcia_dma_stop(sc) 494 struct ncr53c9x_softc *sc; 495 { 496 } 497 498 int 499 esp_pcmcia_dma_isactive(sc) 500 struct ncr53c9x_softc *sc; 501 { 502 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 503 504 return (esc->sc_active); 505 } 506
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