esp_pcmcia.c revision 1.15
1 /* $NetBSD: esp_pcmcia.c,v 1.15 2003/01/12 12:53:36 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: esp_pcmcia.c,v 1.15 2003/01/12 12:53:36 jdolecek Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/device.h> 45 #include <sys/buf.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 50 #include <dev/scsipi/scsi_all.h> 51 #include <dev/scsipi/scsipi_all.h> 52 #include <dev/scsipi/scsiconf.h> 53 54 #include <dev/pcmcia/pcmciareg.h> 55 #include <dev/pcmcia/pcmciavar.h> 56 #include <dev/pcmcia/pcmciadevs.h> 57 58 #include <dev/ic/ncr53c9xreg.h> 59 #include <dev/ic/ncr53c9xvar.h> 60 61 struct esp_pcmcia_softc { 62 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 63 64 int sc_active; /* Pseudo-DMA state vars */ 65 int sc_tc; 66 int sc_datain; 67 size_t sc_dmasize; 68 size_t sc_dmatrans; 69 char **sc_dmaaddr; 70 size_t *sc_pdmalen; 71 72 /* PCMCIA-specific goo. */ 73 struct pcmcia_io_handle sc_pcioh; /* PCMCIA i/o space info */ 74 int sc_io_window; /* our i/o window */ 75 struct pcmcia_function *sc_pf; /* our PCMCIA function */ 76 void *sc_ih; /* interrupt handler */ 77 #ifdef ESP_PCMCIA_POLL 78 struct callout sc_poll_ch; 79 #endif 80 int sc_flags; 81 #define ESP_PCMCIA_ATTACHED 1 /* attach completed */ 82 #define ESP_PCMCIA_ATTACHING 2 /* attach in progress */ 83 }; 84 85 int esp_pcmcia_match __P((struct device *, struct cfdata *, void *)); 86 void esp_pcmcia_attach __P((struct device *, struct device *, void *)); 87 void esp_pcmcia_init __P((struct esp_pcmcia_softc *)); 88 int esp_pcmcia_detach __P((struct device *, int)); 89 int esp_pcmcia_enable __P((struct device *, int)); 90 91 CFATTACH_DECL(esp_pcmcia, sizeof(struct esp_pcmcia_softc), 92 esp_pcmcia_match, esp_pcmcia_attach, esp_pcmcia_detach, NULL); 93 94 /* 95 * Functions and the switch for the MI code. 96 */ 97 #ifdef ESP_PCMCIA_POLL 98 void esp_pcmcia_poll __P((void *)); 99 #endif 100 u_char esp_pcmcia_read_reg __P((struct ncr53c9x_softc *, int)); 101 void esp_pcmcia_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 102 int esp_pcmcia_dma_isintr __P((struct ncr53c9x_softc *)); 103 void esp_pcmcia_dma_reset __P((struct ncr53c9x_softc *)); 104 int esp_pcmcia_dma_intr __P((struct ncr53c9x_softc *)); 105 int esp_pcmcia_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 106 size_t *, int, size_t *)); 107 void esp_pcmcia_dma_go __P((struct ncr53c9x_softc *)); 108 void esp_pcmcia_dma_stop __P((struct ncr53c9x_softc *)); 109 int esp_pcmcia_dma_isactive __P((struct ncr53c9x_softc *)); 110 111 struct ncr53c9x_glue esp_pcmcia_glue = { 112 esp_pcmcia_read_reg, 113 esp_pcmcia_write_reg, 114 esp_pcmcia_dma_isintr, 115 esp_pcmcia_dma_reset, 116 esp_pcmcia_dma_intr, 117 esp_pcmcia_dma_setup, 118 esp_pcmcia_dma_go, 119 esp_pcmcia_dma_stop, 120 esp_pcmcia_dma_isactive, 121 NULL, /* gl_clear_latched_intr */ 122 }; 123 124 const struct pcmcia_product esp_pcmcia_products[] = { 125 { PCMCIA_STR_PANASONIC_KXLC002, PCMCIA_VENDOR_PANASONIC, 126 PCMCIA_PRODUCT_PANASONIC_KXLC002, 0 }, 127 128 { NULL } 129 }; 130 131 int 132 esp_pcmcia_match(parent, match, aux) 133 struct device *parent; 134 struct cfdata *match; 135 void *aux; 136 { 137 struct pcmcia_attach_args *pa = aux; 138 139 if (pcmcia_product_lookup(pa, esp_pcmcia_products, 140 sizeof esp_pcmcia_products[0], NULL) != NULL) 141 return (1); 142 return (0); 143 } 144 145 void 146 esp_pcmcia_attach(parent, self, aux) 147 struct device *parent, *self; 148 void *aux; 149 { 150 struct esp_pcmcia_softc *esc = (void *)self; 151 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 152 struct pcmcia_attach_args *pa = aux; 153 struct pcmcia_config_entry *cfe; 154 struct pcmcia_function *pf = pa->pf; 155 const struct pcmcia_product *pp; 156 157 esc->sc_pf = pf; 158 159 SIMPLEQ_FOREACH(cfe, &pf->cfe_head, cfe_list) { 160 if (cfe->num_memspace != 0 || 161 cfe->num_iospace != 1) 162 continue; 163 164 if (pcmcia_io_alloc(pa->pf, cfe->iospace[0].start, 165 cfe->iospace[0].length, 0, &esc->sc_pcioh) == 0) 166 break; 167 } 168 169 if (cfe == 0) { 170 printf(": can't alloc i/o space\n"); 171 goto no_config_entry; 172 } 173 174 /* Enable the card. */ 175 pcmcia_function_init(pf, cfe); 176 if (pcmcia_function_enable(pf)) { 177 printf(": function enable failed\n"); 178 goto enable_failed; 179 } 180 181 /* Map in the I/O space */ 182 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_AUTO, 0, esc->sc_pcioh.size, 183 &esc->sc_pcioh, &esc->sc_io_window)) { 184 printf(": can't map i/o space\n"); 185 goto iomap_failed; 186 } 187 188 pp = pcmcia_product_lookup(pa, esp_pcmcia_products, 189 sizeof esp_pcmcia_products[0], NULL); 190 if (pp == NULL) { 191 printf("\n"); 192 panic("esp_pcmcia_attach: impossible"); 193 } 194 195 printf(": %s\n", pp->pp_name); 196 197 esp_pcmcia_init(esc); 198 199 /* 200 * Initialize nca board itself. 201 */ 202 esc->sc_flags |= ESP_PCMCIA_ATTACHING; 203 sc->sc_adapter.adapt_minphys = minphys; 204 sc->sc_adapter.adapt_request = ncr53c9x_scsipi_request; 205 sc->sc_adapter.adapt_enable = esp_pcmcia_enable; 206 ncr53c9x_attach(sc); 207 esc->sc_flags &= ~ESP_PCMCIA_ATTACHING; 208 esc->sc_flags |= ESP_PCMCIA_ATTACHED; 209 return; 210 211 iomap_failed: 212 /* Disable the device. */ 213 pcmcia_function_disable(esc->sc_pf); 214 215 enable_failed: 216 /* Unmap our I/O space. */ 217 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 218 219 no_config_entry: 220 return; 221 } 222 223 void 224 esp_pcmcia_init(esc) 225 struct esp_pcmcia_softc *esc; 226 { 227 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 228 bus_space_tag_t iot = esc->sc_pcioh.iot; 229 bus_space_handle_t ioh = esc->sc_pcioh.ioh; 230 231 /* id 7, clock 40M, parity ON, sync OFF, fast ON, slow ON */ 232 233 sc->sc_glue = &esp_pcmcia_glue; 234 235 #ifdef ESP_PCMCIA_POLL 236 callout_init(&esc->sc_poll_ch); 237 #endif 238 239 sc->sc_rev = NCR_VARIANT_ESP406; 240 sc->sc_id = 7; 241 sc->sc_freq = 40; 242 /* try -PARENB -SLOW */ 243 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW; 244 /* try +FE */ 245 sc->sc_cfg2 = NCRCFG2_SCSI2; 246 /* try -IDM -FSCSI -FCLK */ 247 sc->sc_cfg3 = NCRESPCFG3_CDB | NCRESPCFG3_FCLK | NCRESPCFG3_IDM | 248 NCRESPCFG3_FSCSI; 249 sc->sc_cfg4 = NCRCFG4_ACTNEG; 250 /* try +INTP */ 251 sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC; 252 sc->sc_minsync = 0; 253 sc->sc_maxxfer = 64 * 1024; 254 255 bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5); 256 257 bus_space_write_1(iot, ioh, NCR_PIOI, 0); 258 bus_space_write_1(iot, ioh, NCR_PSTAT, 0); 259 bus_space_write_1(iot, ioh, 0x09, 0x24); 260 261 bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4); 262 } 263 264 int 265 esp_pcmcia_detach(self, flags) 266 struct device *self; 267 int flags; 268 { 269 struct esp_pcmcia_softc *esc = (void *)self; 270 int error; 271 272 if ((esc->sc_flags & ESP_PCMCIA_ATTACHED) == 0) { 273 /* Nothing to detach. */ 274 return (0); 275 } 276 277 error = ncr53c9x_detach(&esc->sc_ncr53c9x, flags); 278 if (error) 279 return (error); 280 281 /* Unmap our i/o window and i/o space. */ 282 pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window); 283 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 284 285 return (0); 286 } 287 288 int 289 esp_pcmcia_enable(arg, onoff) 290 struct device *arg; 291 int onoff; 292 { 293 struct esp_pcmcia_softc *esc = (void *) arg; 294 295 if (onoff) { 296 #ifdef ESP_PCMCIA_POLL 297 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 298 #else 299 /* Establish the interrupt handler. */ 300 esc->sc_ih = pcmcia_intr_establish(esc->sc_pf, IPL_BIO, 301 ncr53c9x_intr, &esc->sc_ncr53c9x); 302 if (esc->sc_ih == NULL) { 303 printf("%s: couldn't establish interrupt handler\n", 304 esc->sc_ncr53c9x.sc_dev.dv_xname); 305 return (EIO); 306 } 307 #endif 308 309 /* 310 * If attach is in progress, we know that card power is 311 * enabled and chip will be initialized later. 312 * Otherwise, enable and reset now. 313 */ 314 if ((esc->sc_flags & ESP_PCMCIA_ATTACHING) == 0) { 315 if (pcmcia_function_enable(esc->sc_pf)) { 316 printf("%s: couldn't enable PCMCIA function\n", 317 esc->sc_ncr53c9x.sc_dev.dv_xname); 318 pcmcia_intr_disestablish(esc->sc_pf, 319 esc->sc_ih); 320 return (EIO); 321 } 322 323 /* Initialize only chip. */ 324 ncr53c9x_init(&esc->sc_ncr53c9x, 0); 325 } 326 } else { 327 pcmcia_function_disable(esc->sc_pf); 328 #ifdef ESP_PCMCIA_POLL 329 callout_stop(&esc->sc_poll_ch); 330 #else 331 pcmcia_intr_disestablish(esc->sc_pf, esc->sc_ih); 332 #endif 333 } 334 335 return (0); 336 } 337 338 #ifdef ESP_PCMCIA_POLL 339 void 340 esp_pcmcia_poll(arg) 341 void *arg; 342 { 343 struct esp_pcmcia_softc *esc = arg; 344 345 (void) ncr53c9x_intr(&esc->sc_ncr53c9x); 346 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 347 } 348 #endif 349 350 /* 351 * Glue functions. 352 */ 353 u_char 354 esp_pcmcia_read_reg(sc, reg) 355 struct ncr53c9x_softc *sc; 356 int reg; 357 { 358 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 359 u_char v; 360 361 v = bus_space_read_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg); 362 return v; 363 } 364 365 void 366 esp_pcmcia_write_reg(sc, reg, val) 367 struct ncr53c9x_softc *sc; 368 int reg; 369 u_char val; 370 { 371 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 372 u_char v = val; 373 374 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) 375 v = NCRCMD_TRANS; 376 bus_space_write_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg, v); 377 } 378 379 int 380 esp_pcmcia_dma_isintr(sc) 381 struct ncr53c9x_softc *sc; 382 { 383 384 return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT; 385 } 386 387 void 388 esp_pcmcia_dma_reset(sc) 389 struct ncr53c9x_softc *sc; 390 { 391 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 392 393 esc->sc_active = 0; 394 esc->sc_tc = 0; 395 } 396 397 int 398 esp_pcmcia_dma_intr(sc) 399 struct ncr53c9x_softc *sc; 400 { 401 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 402 u_char *p; 403 u_int espphase, espstat, espintr; 404 int cnt; 405 406 if (esc->sc_active == 0) { 407 printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname); 408 return -1; 409 } 410 411 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 412 esc->sc_active = 0; 413 return 0; 414 } 415 416 cnt = *esc->sc_pdmalen; 417 if (*esc->sc_pdmalen == 0) { 418 printf("%s: data interrupt, but no count left\n", 419 sc->sc_dev.dv_xname); 420 } 421 422 p = *esc->sc_dmaaddr; 423 espphase = sc->sc_phase; 424 espstat = (u_int) sc->sc_espstat; 425 espintr = (u_int) sc->sc_espintr; 426 do { 427 if (esc->sc_datain) { 428 *p++ = NCR_READ_REG(sc, NCR_FIFO); 429 cnt--; 430 if (espphase == DATA_IN_PHASE) 431 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 432 else 433 esc->sc_active = 0; 434 } else { 435 if (espphase == DATA_OUT_PHASE || 436 espphase == MESSAGE_OUT_PHASE) { 437 NCR_WRITE_REG(sc, NCR_FIFO, *p++); 438 cnt--; 439 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 440 } else 441 esc->sc_active = 0; 442 } 443 444 if (esc->sc_active) { 445 while (!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)); 446 espstat = NCR_READ_REG(sc, NCR_STAT); 447 espintr = NCR_READ_REG(sc, NCR_INTR); 448 espphase = (espintr & NCRINTR_DIS) 449 ? /* Disconnected */ BUSFREE_PHASE 450 : espstat & PHASE_MASK; 451 } 452 } while (esc->sc_active && espintr); 453 sc->sc_phase = espphase; 454 sc->sc_espstat = (u_char) espstat; 455 sc->sc_espintr = (u_char) espintr; 456 *esc->sc_dmaaddr = p; 457 *esc->sc_pdmalen = cnt; 458 459 if (*esc->sc_pdmalen == 0) 460 esc->sc_tc = NCRSTAT_TC; 461 sc->sc_espstat |= esc->sc_tc; 462 return 0; 463 } 464 465 int 466 esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize) 467 struct ncr53c9x_softc *sc; 468 caddr_t *addr; 469 size_t *len; 470 int datain; 471 size_t *dmasize; 472 { 473 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 474 475 esc->sc_dmaaddr = addr; 476 esc->sc_pdmalen = len; 477 esc->sc_datain = datain; 478 esc->sc_dmasize = *dmasize; 479 esc->sc_tc = 0; 480 481 return 0; 482 } 483 484 void 485 esp_pcmcia_dma_go(sc) 486 struct ncr53c9x_softc *sc; 487 { 488 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 489 490 esc->sc_active = 1; 491 } 492 493 void 494 esp_pcmcia_dma_stop(sc) 495 struct ncr53c9x_softc *sc; 496 { 497 } 498 499 int 500 esp_pcmcia_dma_isactive(sc) 501 struct ncr53c9x_softc *sc; 502 { 503 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 504 505 return (esc->sc_active); 506 } 507
Indexes created Fri Oct 03 02:09:57 GMT 2025