esp_pcmcia.c revision 1.2
1 /* $NetBSD: esp_pcmcia.c,v 1.2 2000/03/20 00:53:17 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/buf.h> 43 44 #include <machine/bus.h> 45 #include <machine/intr.h> 46 47 #include <dev/scsipi/scsi_all.h> 48 #include <dev/scsipi/scsipi_all.h> 49 #include <dev/scsipi/scsiconf.h> 50 51 #include <dev/pcmcia/pcmciareg.h> 52 #include <dev/pcmcia/pcmciavar.h> 53 #include <dev/pcmcia/pcmciadevs.h> 54 55 #include <dev/ic/ncr53c9xreg.h> 56 #include <dev/ic/ncr53c9xvar.h> 57 58 struct esp_pcmcia_softc { 59 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 60 61 int sc_active; /* Pseudo-DMA state vars */ 62 int sc_tc; 63 int sc_datain; 64 size_t sc_dmasize; 65 size_t sc_dmatrans; 66 char **sc_dmaaddr; 67 size_t *sc_pdmalen; 68 69 /* PCMCIA-specific goo. */ 70 struct pcmcia_io_handle sc_pcioh; /* PCMCIA i/o space info */ 71 int sc_io_window; /* our i/o window */ 72 struct pcmcia_function *sc_pf; /* our PCMCIA function */ 73 void *sc_ih; /* interrupt handler */ 74 int sc_flags; 75 #define ESP_PCMCIA_ATTACHED 1 /* attach completed */ 76 #define ESP_PCMCIA_ATTACHING 2 /* attach in progress */ 77 }; 78 79 int esp_pcmcia_match __P((struct device *, struct cfdata *, void *)); 80 void esp_pcmcia_attach __P((struct device *, struct device *, void *)); 81 void esp_pcmcia_init __P((struct esp_pcmcia_softc *)); 82 int esp_pcmcia_detach __P((struct device *, int)); 83 int esp_pcmcia_enable __P((void *, int)); 84 85 struct cfattach esp_pcmcia_ca = { 86 sizeof(struct esp_pcmcia_softc), esp_pcmcia_match, esp_pcmcia_attach, 87 esp_pcmcia_detach 88 }; 89 90 struct scsipi_device esp_pcmcia_dev = { 91 NULL, /* Use default error handler */ 92 NULL, /* have a queue, served by this */ 93 NULL, /* have no async handler */ 94 NULL, /* Use default 'done' routine */ 95 }; 96 97 /* 98 * Functions and the switch for the MI code. 99 */ 100 #ifdef ESP_PCMCIA_POLL 101 void esp_pcmcia_poll __P((void *)); 102 #endif 103 u_char esp_pcmcia_read_reg __P((struct ncr53c9x_softc *, int)); 104 void esp_pcmcia_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 105 int esp_pcmcia_dma_isintr __P((struct ncr53c9x_softc *)); 106 void esp_pcmcia_dma_reset __P((struct ncr53c9x_softc *)); 107 int esp_pcmcia_dma_intr __P((struct ncr53c9x_softc *)); 108 int esp_pcmcia_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 109 size_t *, int, size_t *)); 110 void esp_pcmcia_dma_go __P((struct ncr53c9x_softc *)); 111 void esp_pcmcia_dma_stop __P((struct ncr53c9x_softc *)); 112 int esp_pcmcia_dma_isactive __P((struct ncr53c9x_softc *)); 113 114 struct ncr53c9x_glue esp_pcmcia_glue = { 115 esp_pcmcia_read_reg, 116 esp_pcmcia_write_reg, 117 esp_pcmcia_dma_isintr, 118 esp_pcmcia_dma_reset, 119 esp_pcmcia_dma_intr, 120 esp_pcmcia_dma_setup, 121 esp_pcmcia_dma_go, 122 esp_pcmcia_dma_stop, 123 esp_pcmcia_dma_isactive, 124 NULL, /* gl_clear_latched_intr */ 125 }; 126 127 const struct pcmcia_product esp_pcmcia_products[] = { 128 { PCMCIA_STR_PANASONIC_KXLC002, PCMCIA_VENDOR_PANASONIC, 129 PCMCIA_PRODUCT_PANASONIC_KXLC002, 0 }, 130 131 { NULL } 132 }; 133 134 int 135 esp_pcmcia_match(parent, match, aux) 136 struct device *parent; 137 struct cfdata *match; 138 void *aux; 139 { 140 struct pcmcia_attach_args *pa = aux; 141 142 if (pcmcia_product_lookup(pa, esp_pcmcia_products, 143 sizeof esp_pcmcia_products[0], NULL) != NULL) 144 return (1); 145 return (0); 146 } 147 148 void 149 esp_pcmcia_attach(parent, self, aux) 150 struct device *parent, *self; 151 void *aux; 152 { 153 struct esp_pcmcia_softc *esc = (void *)self; 154 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 155 struct pcmcia_attach_args *pa = aux; 156 struct pcmcia_config_entry *cfe; 157 struct pcmcia_function *pf = pa->pf; 158 const struct pcmcia_product *pp; 159 160 esc->sc_pf = pf; 161 162 for (cfe = SIMPLEQ_FIRST(&pf->cfe_head); cfe != NULL; 163 cfe = SIMPLEQ_NEXT(cfe, cfe_list)) { 164 if (cfe->num_memspace != 0 || 165 cfe->num_iospace != 1) 166 continue; 167 168 if (pcmcia_io_alloc(pa->pf, cfe->iospace[0].start, 169 cfe->iospace[0].length, 0, &esc->sc_pcioh) == 0) 170 break; 171 } 172 173 if (cfe == 0) { 174 printf(": can't alloc i/o space\n"); 175 goto no_config_entry; 176 } 177 178 /* Enable the card. */ 179 pcmcia_function_init(pf, cfe); 180 if (pcmcia_function_enable(pf)) { 181 printf(": function enable failed\n"); 182 goto enable_failed; 183 } 184 185 /* Map in the I/O space */ 186 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_AUTO, 0, esc->sc_pcioh.size, 187 &esc->sc_pcioh, &esc->sc_io_window)) { 188 printf(": can't map i/o space\n"); 189 goto iomap_failed; 190 } 191 192 pp = pcmcia_product_lookup(pa, esp_pcmcia_products, 193 sizeof esp_pcmcia_products[0], NULL); 194 if (pp == NULL) { 195 printf("\n"); 196 panic("esp_pcmcia_attach: impossible"); 197 } 198 199 printf(": %s\n", pp->pp_name); 200 201 esp_pcmcia_init(esc); 202 203 sc->sc_adapter.scsipi_enable = esp_pcmcia_enable; 204 sc->sc_adapter.scsipi_cmd = ncr53c9x_scsi_cmd; 205 sc->sc_adapter.scsipi_minphys = minphys; 206 207 /* 208 * Initialize nca board itself. 209 */ 210 esc->sc_flags |= ESP_PCMCIA_ATTACHING; 211 ncr53c9x_attach(sc, &esp_pcmcia_dev); 212 esc->sc_flags &= ~ESP_PCMCIA_ATTACHING; 213 esc->sc_flags |= ESP_PCMCIA_ATTACHED; 214 return; 215 216 iomap_failed: 217 /* Disable the device. */ 218 pcmcia_function_disable(esc->sc_pf); 219 220 enable_failed: 221 /* Unmap our I/O space. */ 222 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 223 224 no_config_entry: 225 return; 226 } 227 228 void 229 esp_pcmcia_init(esc) 230 struct esp_pcmcia_softc *esc; 231 { 232 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 233 bus_space_tag_t iot = esc->sc_pcioh.iot; 234 bus_space_handle_t ioh = esc->sc_pcioh.ioh; 235 236 /* id 7, clock 40M, parity ON, sync OFF, fast ON, slow ON */ 237 238 sc->sc_glue = &esp_pcmcia_glue; 239 240 sc->sc_rev = NCR_VARIANT_ESP406; 241 sc->sc_id = 7; 242 sc->sc_freq = 40; 243 /* try -PARENB -SLOW */ 244 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW; 245 /* try +FE */ 246 sc->sc_cfg2 = NCRCFG2_SCSI2; 247 /* try -IDM -FSCSI -FCLK */ 248 sc->sc_cfg3 = NCRESPCFG3_CDB | NCRESPCFG3_FCLK | NCRESPCFG3_IDM | 249 NCRESPCFG3_FSCSI; 250 sc->sc_cfg4 = NCRCFG4_ACTNEG; 251 /* try +INTP */ 252 sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC; 253 sc->sc_minsync = 0; 254 sc->sc_maxxfer = 64 * 1024; 255 256 bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5); 257 258 bus_space_write_1(iot, ioh, NCR_PIOI, 0); 259 bus_space_write_1(iot, ioh, NCR_PSTAT, 0); 260 bus_space_write_1(iot, ioh, 0x09, 0x24); 261 262 bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4); 263 } 264 265 int 266 esp_pcmcia_detach(self, flags) 267 struct device *self; 268 int flags; 269 { 270 struct esp_pcmcia_softc *esc = (void *)self; 271 int error; 272 273 if ((esc->sc_flags & ESP_PCMCIA_ATTACHED) == 0) { 274 /* Nothing to detach. */ 275 return (0); 276 } 277 278 error = ncr53c9x_detach(&esc->sc_ncr53c9x, flags); 279 if (error) 280 return (error); 281 282 /* Unmap our i/o window and i/o space. */ 283 pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window); 284 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 285 286 return (0); 287 } 288 289 int 290 esp_pcmcia_enable(arg, onoff) 291 void *arg; 292 int onoff; 293 { 294 struct esp_pcmcia_softc *esc = arg; 295 296 if (onoff) { 297 #ifdef ESP_PCMCIA_POLL 298 timeout(esp_pcmcia_poll, esc, 1); 299 #else 300 /* Establish the interrupt handler. */ 301 esc->sc_ih = pcmcia_intr_establish(esc->sc_pf, IPL_BIO, 302 ncr53c9x_intr, &esc->sc_ncr53c9x); 303 if (esc->sc_ih == NULL) { 304 printf("%s: couldn't establish interrupt handler\n", 305 esc->sc_ncr53c9x.sc_dev.dv_xname); 306 return (EIO); 307 } 308 #endif 309 310 /* 311 * If attach is in progress, we know that card power is 312 * enabled and chip will be initialized later. 313 * Otherwise, enable and reset now. 314 */ 315 if ((esc->sc_flags & ESP_PCMCIA_ATTACHING) == 0) { 316 if (pcmcia_function_enable(esc->sc_pf)) { 317 printf("%s: couldn't enable PCMCIA function\n", 318 esc->sc_ncr53c9x.sc_dev.dv_xname); 319 pcmcia_intr_disestablish(esc->sc_pf, 320 esc->sc_ih); 321 return (EIO); 322 } 323 324 /* Initialize only chip. */ 325 ncr53c9x_init(&esc->sc_ncr53c9x, 0); 326 } 327 } else { 328 pcmcia_function_disable(esc->sc_pf); 329 #ifdef ESP_PCMCIA_POLL 330 untimeout(esp_pcmcia_poll, esc); 331 #else 332 pcmcia_intr_disestablish(esc->sc_pf, esc->sc_ih); 333 #endif 334 } 335 336 return (0); 337 } 338 339 #ifdef ESP_PCMCIA_POLL 340 void 341 esp_pcmcia_poll(arg) 342 void *arg; 343 { 344 struct esp_pcmcia_softc *esc = arg; 345 346 (void) ncr53c9x_intr(&esc->sc_ncr53c9x); 347 timeout(esp_pcmcia_poll, esc, 1); 348 } 349 #endif 350 351 /* 352 * Glue functions. 353 */ 354 u_char 355 esp_pcmcia_read_reg(sc, reg) 356 struct ncr53c9x_softc *sc; 357 int reg; 358 { 359 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 360 u_char v; 361 362 v = bus_space_read_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg); 363 return v; 364 } 365 366 void 367 esp_pcmcia_write_reg(sc, reg, val) 368 struct ncr53c9x_softc *sc; 369 int reg; 370 u_char val; 371 { 372 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 373 u_char v = val; 374 375 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) 376 v = NCRCMD_TRANS; 377 bus_space_write_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg, v); 378 } 379 380 int 381 esp_pcmcia_dma_isintr(sc) 382 struct ncr53c9x_softc *sc; 383 { 384 385 return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT; 386 } 387 388 void 389 esp_pcmcia_dma_reset(sc) 390 struct ncr53c9x_softc *sc; 391 { 392 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 393 394 esc->sc_active = 0; 395 esc->sc_tc = 0; 396 } 397 398 int 399 esp_pcmcia_dma_intr(sc) 400 struct ncr53c9x_softc *sc; 401 { 402 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 403 u_char *p; 404 u_int espphase, espstat, espintr; 405 int cnt; 406 407 if (esc->sc_active == 0) { 408 printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname); 409 return -1; 410 } 411 412 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 413 esc->sc_active = 0; 414 return 0; 415 } 416 417 cnt = *esc->sc_pdmalen; 418 if (*esc->sc_pdmalen == 0) { 419 printf("%s: data interrupt, but no count left\n", 420 sc->sc_dev.dv_xname); 421 } 422 423 p = *esc->sc_dmaaddr; 424 espphase = sc->sc_phase; 425 espstat = (u_int) sc->sc_espstat; 426 espintr = (u_int) sc->sc_espintr; 427 do { 428 if (esc->sc_datain) { 429 if (espphase == DATA_IN_PHASE) { 430 *p++ = NCR_READ_REG(sc, NCR_FIFO); 431 cnt--; 432 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 433 } else 434 esc->sc_active = 0; 435 } else { 436 if (espphase == DATA_OUT_PHASE || 437 espphase == MESSAGE_OUT_PHASE) { 438 NCR_WRITE_REG(sc, NCR_FIFO, *p++); 439 cnt--; 440 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 441 } else 442 esc->sc_active = 0; 443 } 444 445 if (esc->sc_active) { 446 while (!(NCR_READ_REG(sc, NCR_STAT) & 0x80)); 447 espstat = NCR_READ_REG(sc, NCR_STAT); 448 espintr = NCR_READ_REG(sc, NCR_INTR); 449 espphase = (espintr & NCRINTR_DIS) 450 ? /* Disconnected */ BUSFREE_PHASE 451 : espstat & PHASE_MASK; 452 } 453 } while (esc->sc_active && espintr); 454 sc->sc_phase = espphase; 455 sc->sc_espstat = (u_char) espstat; 456 sc->sc_espintr = (u_char) espintr; 457 *esc->sc_dmaaddr = p; 458 *esc->sc_pdmalen = cnt; 459 460 if (*esc->sc_pdmalen == 0) 461 esc->sc_tc = NCRSTAT_TC; 462 sc->sc_espstat |= esc->sc_tc; 463 return 0; 464 } 465 466 int 467 esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize) 468 struct ncr53c9x_softc *sc; 469 caddr_t *addr; 470 size_t *len; 471 int datain; 472 size_t *dmasize; 473 { 474 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 475 476 esc->sc_dmaaddr = addr; 477 esc->sc_pdmalen = len; 478 esc->sc_datain = datain; 479 esc->sc_dmasize = *dmasize; 480 esc->sc_tc = 0; 481 482 return 0; 483 } 484 485 void 486 esp_pcmcia_dma_go(sc) 487 struct ncr53c9x_softc *sc; 488 { 489 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 490 491 esc->sc_active = 1; 492 } 493 494 void 495 esp_pcmcia_dma_stop(sc) 496 struct ncr53c9x_softc *sc; 497 { 498 } 499 500 int 501 esp_pcmcia_dma_isactive(sc) 502 struct ncr53c9x_softc *sc; 503 { 504 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 505 506 return (esc->sc_active); 507 } 508
Indexes created Fri Oct 03 15:10:06 GMT 2025