esp_pcmcia.c revision 1.8.4.2
1 /* $NetBSD: esp_pcmcia.c,v 1.8.4.2 2000/11/20 11:42:42 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/buf.h> 43 44 #include <machine/bus.h> 45 #include <machine/intr.h> 46 47 #include <dev/scsipi/scsi_all.h> 48 #include <dev/scsipi/scsipi_all.h> 49 #include <dev/scsipi/scsiconf.h> 50 51 #include <dev/pcmcia/pcmciareg.h> 52 #include <dev/pcmcia/pcmciavar.h> 53 #include <dev/pcmcia/pcmciadevs.h> 54 55 #include <dev/ic/ncr53c9xreg.h> 56 #include <dev/ic/ncr53c9xvar.h> 57 58 struct esp_pcmcia_softc { 59 struct ncr53c9x_softc sc_ncr53c9x; /* glue to MI code */ 60 61 int sc_active; /* Pseudo-DMA state vars */ 62 int sc_tc; 63 int sc_datain; 64 size_t sc_dmasize; 65 size_t sc_dmatrans; 66 char **sc_dmaaddr; 67 size_t *sc_pdmalen; 68 69 /* PCMCIA-specific goo. */ 70 struct pcmcia_io_handle sc_pcioh; /* PCMCIA i/o space info */ 71 int sc_io_window; /* our i/o window */ 72 struct pcmcia_function *sc_pf; /* our PCMCIA function */ 73 void *sc_ih; /* interrupt handler */ 74 #ifdef ESP_PCMCIA_POLL 75 struct callout sc_poll_ch; 76 #endif 77 int sc_flags; 78 #define ESP_PCMCIA_ATTACHED 1 /* attach completed */ 79 #define ESP_PCMCIA_ATTACHING 2 /* attach in progress */ 80 }; 81 82 int esp_pcmcia_match __P((struct device *, struct cfdata *, void *)); 83 void esp_pcmcia_attach __P((struct device *, struct device *, void *)); 84 void esp_pcmcia_init __P((struct esp_pcmcia_softc *)); 85 int esp_pcmcia_detach __P((struct device *, int)); 86 int esp_pcmcia_enable __P((void *, int)); 87 88 struct cfattach esp_pcmcia_ca = { 89 sizeof(struct esp_pcmcia_softc), esp_pcmcia_match, esp_pcmcia_attach, 90 esp_pcmcia_detach 91 }; 92 93 /* 94 * Functions and the switch for the MI code. 95 */ 96 #ifdef ESP_PCMCIA_POLL 97 void esp_pcmcia_poll __P((void *)); 98 #endif 99 u_char esp_pcmcia_read_reg __P((struct ncr53c9x_softc *, int)); 100 void esp_pcmcia_write_reg __P((struct ncr53c9x_softc *, int, u_char)); 101 int esp_pcmcia_dma_isintr __P((struct ncr53c9x_softc *)); 102 void esp_pcmcia_dma_reset __P((struct ncr53c9x_softc *)); 103 int esp_pcmcia_dma_intr __P((struct ncr53c9x_softc *)); 104 int esp_pcmcia_dma_setup __P((struct ncr53c9x_softc *, caddr_t *, 105 size_t *, int, size_t *)); 106 void esp_pcmcia_dma_go __P((struct ncr53c9x_softc *)); 107 void esp_pcmcia_dma_stop __P((struct ncr53c9x_softc *)); 108 int esp_pcmcia_dma_isactive __P((struct ncr53c9x_softc *)); 109 110 struct ncr53c9x_glue esp_pcmcia_glue = { 111 esp_pcmcia_read_reg, 112 esp_pcmcia_write_reg, 113 esp_pcmcia_dma_isintr, 114 esp_pcmcia_dma_reset, 115 esp_pcmcia_dma_intr, 116 esp_pcmcia_dma_setup, 117 esp_pcmcia_dma_go, 118 esp_pcmcia_dma_stop, 119 esp_pcmcia_dma_isactive, 120 NULL, /* gl_clear_latched_intr */ 121 }; 122 123 const struct pcmcia_product esp_pcmcia_products[] = { 124 { PCMCIA_STR_PANASONIC_KXLC002, PCMCIA_VENDOR_PANASONIC, 125 PCMCIA_PRODUCT_PANASONIC_KXLC002, 0 }, 126 127 { NULL } 128 }; 129 130 int 131 esp_pcmcia_match(parent, match, aux) 132 struct device *parent; 133 struct cfdata *match; 134 void *aux; 135 { 136 struct pcmcia_attach_args *pa = aux; 137 138 if (pcmcia_product_lookup(pa, esp_pcmcia_products, 139 sizeof esp_pcmcia_products[0], NULL) != NULL) 140 return (1); 141 return (0); 142 } 143 144 void 145 esp_pcmcia_attach(parent, self, aux) 146 struct device *parent, *self; 147 void *aux; 148 { 149 struct esp_pcmcia_softc *esc = (void *)self; 150 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 151 struct pcmcia_attach_args *pa = aux; 152 struct pcmcia_config_entry *cfe; 153 struct pcmcia_function *pf = pa->pf; 154 const struct pcmcia_product *pp; 155 156 esc->sc_pf = pf; 157 158 for (cfe = SIMPLEQ_FIRST(&pf->cfe_head); cfe != NULL; 159 cfe = SIMPLEQ_NEXT(cfe, cfe_list)) { 160 if (cfe->num_memspace != 0 || 161 cfe->num_iospace != 1) 162 continue; 163 164 if (pcmcia_io_alloc(pa->pf, cfe->iospace[0].start, 165 cfe->iospace[0].length, 0, &esc->sc_pcioh) == 0) 166 break; 167 } 168 169 if (cfe == 0) { 170 printf(": can't alloc i/o space\n"); 171 goto no_config_entry; 172 } 173 174 /* Enable the card. */ 175 pcmcia_function_init(pf, cfe); 176 if (pcmcia_function_enable(pf)) { 177 printf(": function enable failed\n"); 178 goto enable_failed; 179 } 180 181 /* Map in the I/O space */ 182 if (pcmcia_io_map(pa->pf, PCMCIA_WIDTH_AUTO, 0, esc->sc_pcioh.size, 183 &esc->sc_pcioh, &esc->sc_io_window)) { 184 printf(": can't map i/o space\n"); 185 goto iomap_failed; 186 } 187 188 pp = pcmcia_product_lookup(pa, esp_pcmcia_products, 189 sizeof esp_pcmcia_products[0], NULL); 190 if (pp == NULL) { 191 printf("\n"); 192 panic("esp_pcmcia_attach: impossible"); 193 } 194 195 printf(": %s\n", pp->pp_name); 196 197 esp_pcmcia_init(esc); 198 199 /* 200 * Initialize nca board itself. 201 */ 202 esc->sc_flags |= ESP_PCMCIA_ATTACHING; 203 ncr53c9x_attach(sc); 204 esc->sc_flags &= ~ESP_PCMCIA_ATTACHING; 205 esc->sc_flags |= ESP_PCMCIA_ATTACHED; 206 return; 207 208 iomap_failed: 209 /* Disable the device. */ 210 pcmcia_function_disable(esc->sc_pf); 211 212 enable_failed: 213 /* Unmap our I/O space. */ 214 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 215 216 no_config_entry: 217 return; 218 } 219 220 void 221 esp_pcmcia_init(esc) 222 struct esp_pcmcia_softc *esc; 223 { 224 struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x; 225 bus_space_tag_t iot = esc->sc_pcioh.iot; 226 bus_space_handle_t ioh = esc->sc_pcioh.ioh; 227 228 /* id 7, clock 40M, parity ON, sync OFF, fast ON, slow ON */ 229 230 sc->sc_glue = &esp_pcmcia_glue; 231 232 #ifdef ESP_PCMCIA_POLL 233 callout_init(&esc->sc_poll_ch); 234 #endif 235 236 sc->sc_rev = NCR_VARIANT_ESP406; 237 sc->sc_id = 7; 238 sc->sc_freq = 40; 239 /* try -PARENB -SLOW */ 240 sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW; 241 /* try +FE */ 242 sc->sc_cfg2 = NCRCFG2_SCSI2; 243 /* try -IDM -FSCSI -FCLK */ 244 sc->sc_cfg3 = NCRESPCFG3_CDB | NCRESPCFG3_FCLK | NCRESPCFG3_IDM | 245 NCRESPCFG3_FSCSI; 246 sc->sc_cfg4 = NCRCFG4_ACTNEG; 247 /* try +INTP */ 248 sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC; 249 sc->sc_minsync = 0; 250 sc->sc_maxxfer = 64 * 1024; 251 252 bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5); 253 254 bus_space_write_1(iot, ioh, NCR_PIOI, 0); 255 bus_space_write_1(iot, ioh, NCR_PSTAT, 0); 256 bus_space_write_1(iot, ioh, 0x09, 0x24); 257 258 bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4); 259 } 260 261 int 262 esp_pcmcia_detach(self, flags) 263 struct device *self; 264 int flags; 265 { 266 struct esp_pcmcia_softc *esc = (void *)self; 267 int error; 268 269 if ((esc->sc_flags & ESP_PCMCIA_ATTACHED) == 0) { 270 /* Nothing to detach. */ 271 return (0); 272 } 273 274 error = ncr53c9x_detach(&esc->sc_ncr53c9x, flags); 275 if (error) 276 return (error); 277 278 /* Unmap our i/o window and i/o space. */ 279 pcmcia_io_unmap(esc->sc_pf, esc->sc_io_window); 280 pcmcia_io_free(esc->sc_pf, &esc->sc_pcioh); 281 282 return (0); 283 } 284 285 int 286 esp_pcmcia_enable(arg, onoff) 287 void *arg; 288 int onoff; 289 { 290 struct esp_pcmcia_softc *esc = arg; 291 292 if (onoff) { 293 #ifdef ESP_PCMCIA_POLL 294 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 295 #else 296 /* Establish the interrupt handler. */ 297 esc->sc_ih = pcmcia_intr_establish(esc->sc_pf, IPL_BIO, 298 ncr53c9x_intr, &esc->sc_ncr53c9x); 299 if (esc->sc_ih == NULL) { 300 printf("%s: couldn't establish interrupt handler\n", 301 esc->sc_ncr53c9x.sc_dev.dv_xname); 302 return (EIO); 303 } 304 #endif 305 306 /* 307 * If attach is in progress, we know that card power is 308 * enabled and chip will be initialized later. 309 * Otherwise, enable and reset now. 310 */ 311 if ((esc->sc_flags & ESP_PCMCIA_ATTACHING) == 0) { 312 if (pcmcia_function_enable(esc->sc_pf)) { 313 printf("%s: couldn't enable PCMCIA function\n", 314 esc->sc_ncr53c9x.sc_dev.dv_xname); 315 pcmcia_intr_disestablish(esc->sc_pf, 316 esc->sc_ih); 317 return (EIO); 318 } 319 320 /* Initialize only chip. */ 321 ncr53c9x_init(&esc->sc_ncr53c9x, 0); 322 } 323 } else { 324 pcmcia_function_disable(esc->sc_pf); 325 #ifdef ESP_PCMCIA_POLL 326 callout_stop(&esc->sc_poll_ch); 327 #else 328 pcmcia_intr_disestablish(esc->sc_pf, esc->sc_ih); 329 #endif 330 } 331 332 return (0); 333 } 334 335 #ifdef ESP_PCMCIA_POLL 336 void 337 esp_pcmcia_poll(arg) 338 void *arg; 339 { 340 struct esp_pcmcia_softc *esc = arg; 341 342 (void) ncr53c9x_intr(&esc->sc_ncr53c9x); 343 callout_reset(&esc->sc_poll_ch, 1, esp_pcmcia_poll, esc); 344 } 345 #endif 346 347 /* 348 * Glue functions. 349 */ 350 u_char 351 esp_pcmcia_read_reg(sc, reg) 352 struct ncr53c9x_softc *sc; 353 int reg; 354 { 355 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 356 u_char v; 357 358 v = bus_space_read_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg); 359 return v; 360 } 361 362 void 363 esp_pcmcia_write_reg(sc, reg, val) 364 struct ncr53c9x_softc *sc; 365 int reg; 366 u_char val; 367 { 368 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 369 u_char v = val; 370 371 if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) 372 v = NCRCMD_TRANS; 373 bus_space_write_1(esc->sc_pcioh.iot, esc->sc_pcioh.ioh, reg, v); 374 } 375 376 int 377 esp_pcmcia_dma_isintr(sc) 378 struct ncr53c9x_softc *sc; 379 { 380 381 return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT; 382 } 383 384 void 385 esp_pcmcia_dma_reset(sc) 386 struct ncr53c9x_softc *sc; 387 { 388 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 389 390 esc->sc_active = 0; 391 esc->sc_tc = 0; 392 } 393 394 int 395 esp_pcmcia_dma_intr(sc) 396 struct ncr53c9x_softc *sc; 397 { 398 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 399 u_char *p; 400 u_int espphase, espstat, espintr; 401 int cnt; 402 403 if (esc->sc_active == 0) { 404 printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname); 405 return -1; 406 } 407 408 if ((sc->sc_espintr & NCRINTR_BS) == 0) { 409 esc->sc_active = 0; 410 return 0; 411 } 412 413 cnt = *esc->sc_pdmalen; 414 if (*esc->sc_pdmalen == 0) { 415 printf("%s: data interrupt, but no count left\n", 416 sc->sc_dev.dv_xname); 417 } 418 419 p = *esc->sc_dmaaddr; 420 espphase = sc->sc_phase; 421 espstat = (u_int) sc->sc_espstat; 422 espintr = (u_int) sc->sc_espintr; 423 do { 424 if (esc->sc_datain) { 425 *p++ = NCR_READ_REG(sc, NCR_FIFO); 426 cnt--; 427 if (espphase == DATA_IN_PHASE) 428 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 429 else 430 esc->sc_active = 0; 431 } else { 432 if (espphase == DATA_OUT_PHASE || 433 espphase == MESSAGE_OUT_PHASE) { 434 NCR_WRITE_REG(sc, NCR_FIFO, *p++); 435 cnt--; 436 NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS); 437 } else 438 esc->sc_active = 0; 439 } 440 441 if (esc->sc_active) { 442 while (!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)); 443 espstat = NCR_READ_REG(sc, NCR_STAT); 444 espintr = NCR_READ_REG(sc, NCR_INTR); 445 espphase = (espintr & NCRINTR_DIS) 446 ? /* Disconnected */ BUSFREE_PHASE 447 : espstat & PHASE_MASK; 448 } 449 } while (esc->sc_active && espintr); 450 sc->sc_phase = espphase; 451 sc->sc_espstat = (u_char) espstat; 452 sc->sc_espintr = (u_char) espintr; 453 *esc->sc_dmaaddr = p; 454 *esc->sc_pdmalen = cnt; 455 456 if (*esc->sc_pdmalen == 0) 457 esc->sc_tc = NCRSTAT_TC; 458 sc->sc_espstat |= esc->sc_tc; 459 return 0; 460 } 461 462 int 463 esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize) 464 struct ncr53c9x_softc *sc; 465 caddr_t *addr; 466 size_t *len; 467 int datain; 468 size_t *dmasize; 469 { 470 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 471 472 esc->sc_dmaaddr = addr; 473 esc->sc_pdmalen = len; 474 esc->sc_datain = datain; 475 esc->sc_dmasize = *dmasize; 476 esc->sc_tc = 0; 477 478 return 0; 479 } 480 481 void 482 esp_pcmcia_dma_go(sc) 483 struct ncr53c9x_softc *sc; 484 { 485 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 486 487 esc->sc_active = 1; 488 } 489 490 void 491 esp_pcmcia_dma_stop(sc) 492 struct ncr53c9x_softc *sc; 493 { 494 } 495 496 int 497 esp_pcmcia_dma_isactive(sc) 498 struct ncr53c9x_softc *sc; 499 { 500 struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc; 501 502 return (esc->sc_active); 503 } 504
Indexes created Mon Oct 27 17:09:47 GMT 2025