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if_rayreg.h revision 1.2
      1 /*	$NetBSD: if_rayreg.h,v 1.2 2000/02/27 20:40:43 augustss Exp $	*/
      2 /*
      3  * Copyright (c) 2000 Christian E. Hopps
      4  * All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. Neither the name of the author nor the names of any co-contributors
     15  *    may be used to endorse or promote products derived from this software
     16  *    without specific prior written permission.
     17  *
     18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28  * SUCH DAMAGE.
     29  */
     30 
     31 #define	RAY_MAXSSIDLEN	32
     32 
     33 /*
     34  * CCR registers
     35  */
     36 #define RAY_COR		(0xf00 + 0)	/* config option register */
     37 #define	RAY_CCSR	(0xf00 + 1)	/* card config and status register */
     38 #define	RAY_PIN		(0xf00 + 2)	/* not in hw */
     39 #define	RAY_SOCKETCOPY	(0xf00 + 3)	/* not used by hw */
     40 #define	RAY_HCSIR	(0xf00 + 5)	/* HCS intr register */
     41 #define	RAY_ECFIR	(0xf00 + 6)	/* ECF intr register */
     42 #define	RAY_AR0		(0xf00 + 8)	/* authorization register 0 (unused) */
     43 #define	RAY_AR1		(0xf00 + 9)	/* authorization register 1 (unused) */
     44 /*
     45  * XXX these registers cannot be accessed with pcmcia.c's 14 byte mapping
     46  * of the CCR for us
     47  */
     48 #if 0
     49 #define	RAY_PMR		0xf0a	/* program mode register (unused) */
     50 #define	RAY_TMR		0xf0b	/* pc test mode register (unused) */
     51 #define	RAY_FCWR	0xf10	/* frequency control word register */
     52 #define RAY_TMC1	0xf14	/* test mode control 1 (unused) */
     53 #define RAY_TMC2	0xf15	/* test mode control 1 (unused) */
     54 #define RAY_TMC3	0xf16	/* test mode control 1 (unused) */
     55 #define RAY_TMC4	0xf17	/* test mode control 1 (unused) */
     56 #endif
     57 
     58 /*
     59  * COR register bits
     60  */
     61 #define	RAY_COR_CFG_NUM		0x01	/* currently ignored and set */
     62 #define RAY_COR_CFG_MASK	0x3f	/* mask for function */
     63 #define	RAY_COR_LEVEL_IRQ	0x40	/* currently ignored and set */
     64 #define	RAY_COR_RESET		0x80	/* soft-reset the card */
     65 
     66 /*
     67  * CCS register bits
     68  */
     69 /* XXX the linux driver indicates bit 0 is the irq bit */
     70 #define	RAY_CCS_IRQ		0x02	/* interrupt pending */
     71 #define	RAY_CCS_POWER_DOWN	0x04
     72 
     73 /*
     74  * HCSI register bits
     75  *
     76  * the host can only clear this bit.
     77  */
     78 #define	RAY_HCSIR_IRQ		0x01	/* indicates an interrupt */
     79 
     80 /*
     81  * ECFI register values
     82  */
     83 #define	RAY_ECSIR_IRQ		0x01	/* interrupt the card */
     84 
     85 /*
     86  * authorization register 0 values
     87  *    -- used for testing/programming the card (unused)
     88  */
     89 #define	RAY_AR0_ON		0x57
     90 
     91 /*
     92  * authorization register 1 values
     93  *	-- used for testing/programming the card (unused)
     94  */
     95 #define	RAY_AR1_ON		0x82
     96 
     97 /*
     98  * PMR bits -- these are used to program the card (unused)
     99  */
    100 #define	RAY_PMR_PC2PM		0x02	/* grant access to firmware flash */
    101 #define	RAY_PMR_PC2CAL		0x10	/* read access to the A/D modem inp */
    102 #define	RAY_PMR_MLSE		0x20	/* read access to the MSLE prom */
    103 
    104 /*
    105  * TMR bits -- get access to test modes (unused)
    106  */
    107 #define	RAY_TMR_TEST		0x08	/* test mode */
    108 
    109 /*
    110  * FCWR -- frequency control word, values from [0x02,0xA6] map to
    111  * RF frequency values.
    112  */
    113 
    114 /*
    115  * 48k of memory -- would like to map this into smaller isa windows
    116  * but doesn't seem currently possible with the pcmcia code
    117  */
    118 #define	RAY_SRAM_MEM_BASE	0
    119 #define	RAY_SRAM_MEM_SIZE	0xc000
    120 
    121 /*
    122  * offsets into shared ram
    123  */
    124 #define	RAY_SCB_BASE		0x0	/* cfg/status/ctl area */
    125 #define	RAY_STATUS_BASE		0x0100
    126 #define	RAY_HOST_TO_ECF_BASE	0x0200
    127 #define	RAY_ECF_TO_HOST_BASE	0x0300
    128 #define	RAY_CCS_BASE		0x0400
    129 #define	RAY_RCS_BASE		0x0800
    130 #define	RAY_APOINT_TIM_BASE	0x0c00
    131 #define	RAY_SSID_LIST_BASE	0x0d00
    132 #define	RAY_TX_BASE		0x1000
    133 #define	RAY_TX_SIZE		0x7000
    134 #define	RAY_TX_END		0x8000
    135 #define	RAY_RX_BASE		0x8000
    136 #define	RAY_RX_END		0xc000
    137 #define	RAY_RX_MASK		0x3fff
    138 
    139 struct ray_ecf_startup {
    140 	u_int8_t	e_status;		/* RAY_ECFS_ */
    141 	u_int8_t	e_station_addr[ETHER_ADDR_LEN];
    142 	u_int8_t	e_resv0;
    143 	u_int8_t	e_rates[8];
    144 	u_int8_t	e_japan_callsign[12];
    145 	u_int8_t	e_prg_cksum;
    146 	u_int8_t	e_cis_cksum;
    147 	u_int8_t	e_fw_build_string;
    148 	u_int8_t	e_fw_build;
    149 	u_int8_t	e_fw_resv;
    150 	u_int8_t	e_asic_version;
    151 	u_int8_t	e_tib_size;
    152 	u_int8_t	e_resv1[29];
    153 };
    154 
    155 #define	RAY_ECFS_RESERVED0		0x01
    156 #define	RAY_ECFS_PROC_SELF_TEST		0x02
    157 #define	RAY_ECFS_PROG_MEM_CHECKSUM	0x04
    158 #define	RAY_ECFS_DATA_MEM_TEST		0x08
    159 #define	RAY_ECFS_RX_CALIBRATION		0x10
    160 #define	RAY_ECFS_FW_VERSION_COMPAT	0x20
    161 #define	RAY_ECFS_RERSERVED1		0x40
    162 #define	RAY_ECFS_TEST_COMPLETE		0x80
    163 #define	RAY_ECFS_CARD_OK		RAY_ECFS_TEST_COMPLETE
    164 
    165 /* configure/status/control memory */
    166 struct ray_csc {
    167 	u_int8_t	csc_mrxo_own;	/* 0 ECF writes, 1 host write */
    168 	u_int8_t	csc_mrxc_own;	/* " */
    169 	u_int8_t	csc_rxhc_own;	/* " */
    170 	u_int8_t	csc_resv;
    171 	u_int16_t	csc_mrx_overflow;	/* ECF incs on rx overflow */
    172 	u_int16_t	csc_mrx_cksum;	/* " on cksum error */
    173 	u_int16_t	csc_rx_hcksum;	/* " on header cksum error */
    174 	u_int8_t	csc_rx_noise;		/* average RSL measuremant */
    175 };
    176 
    177 /* status area */
    178 struct ray_status {
    179 	u_int8_t	st_startup_word;
    180 	u_int8_t	st_station_addr[ETHER_ADDR_LEN];
    181 	u_int8_t	st_calc_prog_cksum;
    182 	u_int8_t	st_calc_cis_cksum;
    183 	u_int8_t	st_ecf_spare[7];
    184 	u_int8_t	st_japan_callsign[12];
    185 };
    186 
    187 /*
    188  * Host to ECF data formats
    189  */
    190 struct ray_startup_params_head {
    191 	u_int8_t	sp_net_type;	/* 0: ad-hoc 1: infra */
    192 	u_int8_t	sp_ap_status;	/* 0: terminal 1: access-point */
    193 	u_int8_t	sp_ssid[RAY_MAXSSIDLEN];	/* current SSID */
    194 	u_int8_t	sp_scan_mode;	/* 1: active */
    195 	u_int8_t	sp_apm_mode;	/* 0: none 1: power-saving */
    196 	u_int8_t	sp_mac_addr[ETHER_ADDR_LEN];
    197 	u_int8_t	sp_frag_thresh[2];
    198 /*2c*/	u_int8_t	sp_dwell_time[2];
    199 /*2e*/	u_int8_t	sp_beacon_period[2];
    200 /*30*/	u_int8_t	sp_dtim_interval;
    201 /*31*/	u_int8_t	sp_max_retry;	/* number of times to attemp tx */
    202 /*32*/	u_int8_t	sp_ack_timo;
    203 /*33*/	u_int8_t	sp_sifs;
    204 /*34*/	u_int8_t	sp_difs;
    205 /*35*/	u_int8_t	sp_pifs;
    206 /*36*/	u_int8_t	sp_rts_thresh[2];
    207 /*38*/	u_int8_t	sp_scan_dwell[2];
    208 /*3a*/	u_int8_t	sp_scan_max_dwell[2];
    209 /*3c*/	u_int8_t	sp_assoc_timo;
    210 /*3d*/	u_int8_t	sp_adhoc_scan_cycle;
    211 /*3e*/	u_int8_t	sp_infra_scan_cycle;
    212 /*3f*/	u_int8_t	sp_infra_super_scan_cycle;
    213 /*40*/	u_int8_t	sp_promisc;
    214 /*41*/	u_int8_t	sp_uniq_word[2];
    215 /*43*/	u_int8_t	sp_slot_time;
    216 /*44*/	u_int8_t	sp_roam_low_snr_thresh;	/* if below this inc count */
    217 
    218 /*45*/	u_int8_t	sp_low_snr_count;	/* roam after cnt below thrsh */
    219 /*46*/	u_int8_t	sp_infra_missed_beacon_count;
    220 /*47*/	u_int8_t	sp_adhoc_missed_beacon_count;
    221 
    222 /*48*/	u_int8_t	sp_country_code;
    223 /*49*/	u_int8_t	sp_hop_seq;
    224 /*4a*/	u_int8_t	sp_hop_seq_len;	/* no longer supported */
    225 } __attribute__((__packed__));
    226 
    227 /* build 5 tail to the startup params */
    228 struct ray_startup_params_tail_5 {
    229 	u_int8_t	sp_cw_max[2];
    230 	u_int8_t	sp_cw_min[2];
    231 	u_int8_t	sp_noise_filter_gain;
    232 	u_int8_t	sp_noise_limit_offset;
    233 	u_int8_t	sp_rssi_thresh_offset;
    234 	u_int8_t	sp_busy_thresh_offset;
    235 	u_int8_t	sp_sync_thresh;
    236 	u_int8_t	sp_test_mode;
    237 	u_int8_t	sp_test_min_chan;
    238 	u_int8_t	sp_test_max_chan;
    239 	u_int8_t	sp_allow_probe_resp;
    240 	u_int8_t	sp_privacy_must_start;
    241 	u_int8_t	sp_privacy_can_join;
    242 	u_int8_t	sp_basic_rate_set[8];
    243 } __attribute__((__packed__));
    244 
    245 /* build 4 (webgear) tail to the startup params */
    246 struct ray_startup_params_tail_4 {
    247 /*4b*/	u_int8_t	sp_cw_max;		/* 2 bytes in build 5 */
    248 /*4c*/	u_int8_t	sp_cw_min;		/* 2 bytes in build 5 */
    249 /*4e*/	u_int8_t	sp_noise_filter_gain;
    250 /*4f*/	u_int8_t	sp_noise_limit_offset;
    251 	u_int8_t	sp_rssi_thresh_offset;
    252 	u_int8_t	sp_busy_thresh_offset;
    253 	u_int8_t	sp_sync_thresh;
    254 	u_int8_t	sp_test_mode;
    255 	u_int8_t	sp_test_min_chan;
    256 	u_int8_t	sp_test_max_chan;
    257 	/* more bytes in build 5 */
    258 } __attribute__((__packed__));
    259 
    260 /*
    261  * Parameter IDs for the update/report param commands and values if
    262  * relevant
    263  */
    264 #define	RAY_PID_NET_TYPE		0
    265 #define	RAY_PID_AP_STATUS		1
    266 #define	RAY_PID_SSID			2
    267 #define RAY_PID_SCAN_MODE		3
    268 #define	RAY_PID_APM_MODE		4
    269 #define	RAY_PID_MAC_ADDR		5
    270 #define	RAY_PID_FRAG_THRESH		6
    271 #define	RAY_PID_DWELL_TIME		7
    272 #define	RAY_PID_BEACON_PERIOD		8
    273 #define	RAY_PID_DTIM_INT		9
    274 #define	RAY_PID_MAX_RETRY		10
    275 #define	RAY_PID_ACK_TIMO		11
    276 #define	RAY_PID_SIFS			12
    277 #define	RAY_PID_DIFS			13
    278 #define	RAY_PID_PIFS			14
    279 #define	RAY_PID_RTS_THRESH		15
    280 #define	RAY_PID_SCAN_DWELL_PERIOD	16
    281 #define	RAY_PID_MAX_SCAN_DWELL_PERIOD	17
    282 #define	RAY_PID_ASSOC_TIMO		18
    283 #define	RAY_PID_ADHOC_SCAN_CYCLE	19
    284 #define	RAY_PID_INFRA_SCAN_CYCLE	20
    285 #define	RAY_PID_INFRA_SUPER_SCAN_CYCLE	21
    286 #define	RAY_PID_PROMISC			22
    287 #define	RAY_PID_UNIQ_WORD		23
    288 #define	RAY_PID_SLOT_TIME		24
    289 #define	RAY_PID_ROAM_LOW_SNR_THRESH	25
    290 #define	RAY_PID_LOW_SNR_COUNT		26
    291 #define	RAY_PID_INFRA_MISSED_BEACON_COUNT	27
    292 #define	RAY_PID_ADHOC_MISSED_BEACON_COUNT	28
    293 #define	RAY_PID_COUNTRY_CODE		29
    294 #define	RAY_PID_HOP_SEQ			30
    295 #define	RAY_PID_HOP_SEQ_LEN		31
    296 #define	RAY_PID_CW_MAX			32
    297 #define	RAY_PID_CW_MIN			33
    298 #define	RAY_PID_NOISE_FILTER_GAIN	34
    299 #define	RAY_PID_NOISE_LIMIT_OFFSET	35
    300 #define	RAY_PID_RSSI_THRESH_OFFSET	36
    301 #define	RAY_PID_BUSY_THRESH_OFFSET	37
    302 #define	RAY_PID_SYNC_THRESH		38
    303 #define	RAY_PID_TEST_MODE		39
    304 #define	RAY_PID_TEST_MIN_CHAN		40
    305 #define	RAY_PID_TEST_MAX_CHAN		41
    306 #define	RAY_PID_ALLOW_PROBE_RESP	42
    307 #define	RAY_PID_PRIVACY_MUST_START	43
    308 #define	RAY_PID_PRIVACY_CAN_JOIN	44
    309 #define	RAY_PID_BASIC_RATE_SET		45
    310 #define	RAY_PID_MAX			46
    311 
    312 /*
    313  * various values for the above parameters
    314  */
    315 #define	RAY_PID_NET_TYPE_ADHOC		0x00
    316 #define	RAY_PID_NET_TYPE_INFRA		0x01
    317 
    318 #define	RAY_PID_AP_STATUS_TERMINAL	0x00	/* not access-point */
    319 #define	RAY_PID_AP_STATUS_AP		0x01	/* act as access-point */
    320 
    321 #define	RAY_PID_SCAN_MODE_PASSIVE	0x00	/* hw doesn't implement */
    322 #define	RAY_PID_SCAN_MODE_ACTIVE	0x01
    323 
    324 #define	RAY_PID_APM_MODE_NONE		0x00	/* no power saving */
    325 #define	RAY_PID_APM_MODE_PS		0x01	/* power saving mode */
    326 
    327 #define	RAY_PID_COUNTRY_CODE_USA	0x1
    328 #define	RAY_PID_COUNTRY_CODE_EUROPE	0x2
    329 #define	RAY_PID_COUNTRY_CODE_JAPAN	0x3
    330 #define	RAY_PID_COUNTRY_CODE_KOREA	0x4
    331 #define	RAY_PID_COUNTRY_CODE_SPAIN	0x5
    332 #define	RAY_PID_COUNTRY_CODE_FRANCE	0x6
    333 #define	RAY_PID_COUNTRY_CODE_ISRAEL	0x7
    334 #define	RAY_PID_COUNTRY_CODE_AUSTRALIA	0x8
    335 #define	RAY_PID_COUNTRY_CODE_JAPAN_TEST	0x9
    336 #define	RAY_PID_COUNTRY_CODE_MAX	0xa
    337 
    338 #define	RAY_PID_TEST_MODE_NORMAL	0x0
    339 #define	RAY_PID_TEST_MODE_ANT_1		0x1
    340 #define	RAY_PID_TEST_MODE_ATN_2		0x2
    341 #define	RAY_PID_TEST_MODE_ATN_BOTH	0x3
    342 
    343 #define	RAY_PID_ALLOW_PROBE_RESP_DISALLOW	0x0
    344 #define	RAY_PID_ALLOW_PROBE_RESP_ALLOW		0x1
    345 
    346 #define	RAY_PID_PRIVACY_MUST_START_NOWEP	0x0
    347 #define	RAY_PID_PRIVACY_MUST_START_WEP		0x1
    348 
    349 #define	RAY_PID_PRIVACY_CAN_JOIN_NOWEP		0x0
    350 #define	RAY_PID_PRIVACY_CAN_JOIN_WEP		0x1
    351 #define	RAY_PID_PRIVACY_CAN_JOIN_DONT_CARE	0x2
    352 
    353 #define	RAY_PID_BASIC_RATE_500K		1
    354 #define	RAY_PID_BASIC_RATE_1000K	2
    355 #define	RAY_PID_BASIC_RATE_1500K	3
    356 #define	RAY_PID_BASIC_RATE_2000K	4
    357 
    358 /*
    359  * System Control Block
    360  */
    361 #define	RAY_SCB_CCSI		0x00	/* host CCS index */
    362 #define	RAY_SCB_RCCSI		0x01	/* ecf RCCS index */
    363 
    364 /*
    365  * command control structures (for CCSR commands)
    366  */
    367 
    368 /*
    369  * commands for CCSR
    370  */
    371 #define	RAY_CMD_START_PARAMS	0x01	/* download start params */
    372 #define	RAY_CMD_UPDATE_PARAMS	0x02	/* update params */
    373 #define	RAY_CMD_REPORT_PARAMS	0x03	/* report params */
    374 #define	RAY_CMD_UPDATE_MCAST	0x04	/* update mcast list */
    375 #define	RAY_CMD_UPDATE_APM	0x05	/* update power saving mode */
    376 #define	RAY_CMD_START_NET	0x06
    377 #define	RAY_CMD_JOIN_NET	0x07
    378 #define	RAY_CMD_START_ASSOC	0x08
    379 #define	RAY_CMD_TX_REQ		0x09
    380 #define	RAY_CMD_TEST_MEM	0x0a
    381 #define	RAY_CMD_SHUTDOWN	0x0b
    382 #define	RAY_CMD_DUMP_MEM	0x0c
    383 #define	RAY_CMD_START_TIMER	0x0d
    384 #define	RAY_CMD_MAX		0x0e
    385 
    386 /*
    387  * unsolicted commands from the ECF
    388  */
    389 #define	RAY_ECMD_RX_DONE		0x80	/* process rx packet */
    390 #define	RAY_ECMD_REJOIN_DONE		0x81	/* rejoined the network */
    391 #define	RAY_ECMD_ROAM_START		0x82	/* romaining started */
    392 #define	RAY_ECMD_JAPAN_CALL_SIGNAL	0x83	/* japan test thing */
    393 
    394 
    395 #define	RAY_CCS_LINK_NULL	0xff
    396 #define	RAY_CCS_SIZE	16
    397 
    398 #define	RAY_CCS_TX_FIRST	0
    399 #define	RAY_CCS_TX_LAST		13
    400 #define	RAY_CCS_NTX		(RAY_CCS_TX_LAST - RAY_CCS_TX_FIRST + 1)
    401 #define	RAY_TX_BUF_SIZE		2048
    402 #define	RAY_CCS_CMD_FIRST	14
    403 #define	RAY_CCS_CMD_LAST	63
    404 #define	RAY_CCS_NCMD		(RAY_CCS_CMD_LAST - RAY_CCS_CMD_FIRST + 1)
    405 #define	RAY_CCS_LAST		63
    406 
    407 #define	RAY_RCCS_FIRST	64
    408 #define	RAY_RCCS_LAST	127
    409 
    410 struct ray_cmd {
    411 	u_int8_t	c_status;		/* ccs generic header */
    412 	u_int8_t	c_cmd;			/* " */
    413 	u_int8_t	c_link;			/* " */
    414 };
    415 
    416 #define	RAY_CCS_STATUS_FREE		0x0
    417 #define	RAY_CCS_STATUS_BUSY		0x1
    418 #define	RAY_CCS_STATUS_COMPLETE		0x2
    419 #define	RAY_CCS_STATUS_FAIL		0x3
    420 
    421 /* RAY_CMD_UPDATE_PARAMS */
    422 struct ray_cmd_update {
    423 	u_int8_t	c_status;		/* ccs generic header */
    424 	u_int8_t	c_cmd;			/* " */
    425 	u_int8_t	c_link;			/* " */
    426 	u_int8_t	c_paramid;
    427 	u_int8_t	c_nparam;
    428 	u_int8_t	c_failcause;
    429 };
    430 
    431 /* RAY_CMD_REPORT_PARAMS */
    432 struct ray_cmd_report {
    433 	u_int8_t	c_status;		/* ccs generic header */
    434 	u_int8_t	c_cmd;			/* " */
    435 	u_int8_t	c_link;			/* " */
    436 	u_int8_t	c_paramid;
    437 	u_int8_t	c_nparam;
    438 	u_int8_t	c_failcause;
    439 	u_int8_t	c_len;
    440 };
    441 
    442 /* RAY_CMD_UPDATE_MCAST */
    443 struct ray_cmd_update_mcast {
    444 	u_int8_t	c_status;		/* ccs generic header */
    445 	u_int8_t	c_cmd;			/* " */
    446 	u_int8_t	c_link;			/* " */
    447 	u_int8_t	c_nmcast;
    448 };
    449 
    450 /* RAY_CMD_UPDATE_APM */
    451 struct ray_cmd_udpate_apm {
    452 	u_int8_t	c_status;		/* ccs generic header */
    453 	u_int8_t	c_cmd;			/* " */
    454 	u_int8_t	c_link;			/* " */
    455 	u_int8_t	c_mode;
    456 };
    457 
    458 /* RAY_CMD_START_NET and RAY_CMD_JOIN_NET */
    459 struct ray_cmd_net {
    460 	u_int8_t	c_status;		/* ccs generic header */
    461 	u_int8_t	c_cmd;			/* " */
    462 	u_int8_t	c_link;			/* " */
    463 	u_int8_t	c_upd_param;
    464 	u_int8_t	c_bss_id[ETHER_ADDR_LEN];
    465 	u_int8_t	c_inited;
    466 	u_int8_t	c_def_txrate;
    467 	u_int8_t	c_encrypt;
    468 };
    469 
    470 /* parameters passwd in h2e section when c_upd_param is set in ray_cmd_net */
    471 struct ray_net_params {
    472 	u_int8_t	p_net_type;
    473 	u_int8_t	p_ssid[32];
    474 	u_int8_t	p_privacy_must_start;
    475 	u_int8_t	p_privacy_can_join;
    476 };
    477 
    478 /* RAY_CMD_UPDATE_ASSOC */
    479 struct ray_cmd_update_assoc {
    480 	u_int8_t	c_status;		/* ccs generic header */
    481 	u_int8_t	c_cmd;			/* " */
    482 	u_int8_t	c_link;			/* " */
    483 	u_int8_t	c_astatus;
    484 	u_int8_t	c_aid[2];
    485 };
    486 
    487 /* RAY_CMD_TX_REQ */
    488 struct ray_cmd_tx {
    489 	u_int8_t	c_status;		/* ccs generic header */
    490 	u_int8_t	c_cmd;			/* " */
    491 	u_int8_t	c_link;			/* " */
    492 	u_int8_t	c_bufp[2];
    493 	u_int8_t	c_len[2];
    494 	u_int8_t	c_resv[5];
    495 	u_int8_t	c_tx_rate;
    496 	u_int8_t	c_apm_mode;
    497 	u_int8_t	c_nretry;
    498 	u_int8_t	c_antenna;
    499 };
    500 
    501 /* RAY_CMD_TX_REQ (for bulid 4) */
    502 struct ray_cmd_tx_4 {
    503 	u_int8_t	c_status;		/* ccs generic header */
    504 	u_int8_t	c_cmd;			/* " */
    505 	u_int8_t	c_link;			/* " */
    506 	u_int8_t	c_bufp[2];
    507 	u_int8_t	c_len[2];
    508 	u_int8_t	c_addr[ETHER_ADDR_LEN];
    509 	u_int8_t	c_apm_mode;
    510 	u_int8_t	c_nretry;
    511 	u_int8_t	c_antenna;
    512 };
    513 
    514 /* RAY_CMD_DUMP_MEM */
    515 struct ray_cmd_dump_mem {
    516 	u_int8_t	c_status;		/* ccs generic header */
    517 	u_int8_t	c_cmd;			/* " */
    518 	u_int8_t	c_link;			/* " */
    519 	u_int8_t	c_memtype;
    520 	u_int8_t	c_memp[2];
    521 	u_int8_t	c_len;
    522 };
    523 
    524 /* RAY_CMD_START_TIMER */
    525 struct ray_cmd_start_timer {
    526 	u_int8_t	c_status;		/* ccs generic header */
    527 	u_int8_t	c_cmd;			/* " */
    528 	u_int8_t	c_link;			/* " */
    529 	u_int8_t	c_duration[2];
    530 };
    531 
    532 struct ray_cmd_rx {
    533 	u_int8_t	c_status;		/* ccs generic header */
    534 	u_int8_t	c_cmd;			/* " */
    535 	u_int8_t	c_link;			/* " */
    536 	u_int8_t	c_bufp[2];	/* buffer pointer */
    537 	u_int8_t	c_len[2];	/* length */
    538 	u_int8_t	c_siglev;	/* signal level */
    539 	u_int8_t	c_nextfrag;	/* next fragment in packet */
    540 	u_int8_t	c_pktlen[2];	/* total packet length */
    541 	u_int8_t	c_antenna;	/* antenna with best reception */
    542 	u_int8_t	c_updbss;	/* only 1 for beacon messages */
    543 };
    544 
    545 #define	RAY_TX_PHY_SIZE	0x4
    546 
    547 /* this is used by the user to request objects */
    548 struct ray_param_req {
    549 	int		r_failcause;
    550 	u_int8_t	r_paramid;
    551 	u_int8_t	r_len;
    552 	u_int8_t	r_data[256];
    553 };
    554 #define	RAY_FAILCAUSE_EIDRANGE	1
    555 #define	RAY_FAILCAUSE_ELENGTH	2
    556 /* device can possibly return up to 255 */
    557 #define	RAY_FAILCAUSE_EDEVSTOP	256
    558 
    559 #ifdef _KERNEL
    560 #define	RAY_FAILCAUSE_WAITING	257
    561 #endif
    562 
    563 #ifndef SIOCGIFGENERIC
    564 #define SIOCGIFGENERIC  _IOWR('i', 57, struct ifreq)    /* generic IF get op */
    565 #endif
    566 
    567 #ifndef SIOCSIFGENERIC
    568 #define SIOCSIFGENERIC  _IOWR('i', 58, struct ifreq)    /* generic IF get op */
    569 #endif
    570 
    571 /* get a param the data is a ray_param_request structure */
    572 #define	SIOCSRAYPARAM	SIOCSIFGENERIC
    573 #define	SIOCGRAYPARAM	SIOCGIFGENERIC
    574 
    575 #define	RAY_PID_STRINGS	{				\
    576 	"RAY_PID_NET_TYPE",				\
    577 	"RAY_PID_AP_STATUS",				\
    578 	"RAY_PID_SSID",					\
    579 	"RAY_PID_SCAN_MODE",				\
    580 	"RAY_PID_APM_MODE",				\
    581 	"RAY_PID_MAC_ADDR",				\
    582 	"RAY_PID_FRAG_THRESH",				\
    583 	"RAY_PID_DWELL_TIME",				\
    584 	"RAY_PID_BEACON_PERIOD",			\
    585 	"RAY_PID_DTIM_INT",				\
    586 	"RAY_PID_MAX_RETRY",				\
    587 	"RAY_PID_ACK_TIMO",				\
    588 	"RAY_PID_SIFS",					\
    589 	"RAY_PID_DIFS",					\
    590 	"RAY_PID_PIFS",					\
    591 	"RAY_PID_RTS_THRESH",				\
    592 	"RAY_PID_SCAN_DWELL_PERIOD",			\
    593 	"RAY_PID_MAX_SCAN_DWELL_PERIOD",		\
    594 	"RAY_PID_ASSOC_TIMO",				\
    595 	"RAY_PID_ADHOC_SCAN_CYCLE",			\
    596 	"RAY_PID_INFRA_SCAN_CYCLE",			\
    597 	"RAY_PID_INFRA_SUPER_SCAN_CYCLE",		\
    598 	"RAY_PID_PROMISC",				\
    599 	"RAY_PID_UNIQ_WORD",				\
    600 	"RAY_PID_SLOT_TIME",				\
    601 	"RAY_PID_ROAM_LOW_SNR_THRESH",			\
    602 	"RAY_PID_LOW_SNR_COUNT",			\
    603 	"RAY_PID_INFRA_MISSED_BEACON_COUNT",		\
    604 	"RAY_PID_ADHOC_MISSED_BEACON_COUNT",		\
    605 	"RAY_PID_COUNTRY_CODE",				\
    606 	"RAY_PID_HOP_SEQ",				\
    607 	"RAY_PID_HOP_SEQ_LEN",				\
    608 	"RAY_PID_CW_MAX",				\
    609 	"RAY_PID_CW_MIN",				\
    610 	"RAY_PID_NOISE_FILTER_GAIN",			\
    611 	"RAY_PID_NOISE_LIMIT_OFFSET",			\
    612 	"RAY_PID_RSSI_THRESH_OFFSET",			\
    613 	"RAY_PID_BUSY_THRESH_OFFSET",			\
    614 	"RAY_PID_SYNC_THRESH",				\
    615 	"RAY_PID_TEST_MODE",				\
    616 	"RAY_PID_TEST_MIN_CHAN",			\
    617 	"RAY_PID_TEST_MAX_CHAN",			\
    618 	"RAY_PID_ALLOW_PROBE_RESP",			\
    619 	"RAY_PID_PRIVACY_MUST_START",			\
    620 	"RAY_PID_PRIVACY_CAN_JOIN",			\
    621 	"RAY_PID_BASIC_RATE_SET"			\
    622     }
    623 
    624 #ifdef RAY_DO_SIGLEV
    625 #define SIOCGRAYSIGLEV  _IOWR('i', 201, struct ifreq)
    626 
    627 #define RAY_NSIGLEVRECS 8
    628 #define RAY_NSIGLEV 8
    629 
    630 struct ray_siglev {
    631 	u_int8_t	rsl_host[ETHER_ADDR_LEN]; /* MAC address */
    632 	u_int8_t	rsl_siglevs[RAY_NSIGLEV]; /* levels, newest in [0] */
    633 	struct timeval	rsl_time; 		  /* time of last packet */
    634 };
    635 #endif
    636