if_rayreg.h revision 1.6
1 /* $NetBSD: if_rayreg.h,v 1.6 2003/10/22 09:13:17 mjl Exp $ */ 2 /* 3 * Copyright (c) 2000 Christian E. Hopps 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of any co-contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #define RAY_MAXSSIDLEN 32 32 33 /* 34 * CCR registers 35 */ 36 #define RAY_COR 0 /* config option register */ 37 #define RAY_CCSR 1 /* card config and status register */ 38 #define RAY_PIN 2 /* not in hw */ 39 #define RAY_SOCKETCOPY 3 /* not used by hw */ 40 #define RAY_HCSIR 5 /* HCS intr register */ 41 #define RAY_ECFIR 6 /* ECF intr register */ 42 #define RAY_AR0 8 /* authorization register 0 (unused) */ 43 #define RAY_AR1 9 /* authorization register 1 (unused) */ 44 #define RAY_PMR 10 /* program mode register (unused) */ 45 #define RAY_TMR 11 /* pc test mode register (unused) */ 46 #define RAY_FCWR 16 /* frequency control word register */ 47 48 /* 49 * XXX these registers cannot be accessed with pcmcia.c's 0x14 byte mapping 50 * of the CCR for us 51 */ 52 #if 0 53 #define RAY_TMC1 0x014 /* test mode control 1 (unused) */ 54 #define RAY_TMC2 0x015 /* test mode control 1 (unused) */ 55 #define RAY_TMC3 0x016 /* test mode control 1 (unused) */ 56 #define RAY_TMC4 0x017 /* test mode control 1 (unused) */ 57 #endif 58 59 /* 60 * COR register bits 61 */ 62 #define RAY_COR_CFG_NUM 0x01 /* currently ignored and set */ 63 #define RAY_COR_CFG_MASK 0x3f /* mask for function */ 64 #define RAY_COR_LEVEL_IRQ 0x40 /* currently ignored and set */ 65 #define RAY_COR_RESET 0x80 /* soft-reset the card */ 66 67 /* 68 * CCS register bits 69 */ 70 /* XXX the linux driver indicates bit 0 is the irq bit */ 71 #define RAY_CCS_IRQ 0x02 /* interrupt pending */ 72 #define RAY_CCS_POWER_DOWN 0x04 73 74 /* 75 * HCSI register bits 76 * 77 * the host can only clear this bit. 78 */ 79 #define RAY_HCSIR_IRQ 0x01 /* indicates an interrupt */ 80 81 /* 82 * ECFI register values 83 */ 84 #define RAY_ECSIR_IRQ 0x01 /* interrupt the card */ 85 86 /* 87 * authorization register 0 values 88 * -- used for testing/programming the card (unused) 89 */ 90 #define RAY_AR0_ON 0x57 91 92 /* 93 * authorization register 1 values 94 * -- used for testing/programming the card (unused) 95 */ 96 #define RAY_AR1_ON 0x82 97 98 /* 99 * PMR bits -- these are used to program the card (unused) 100 */ 101 #define RAY_PMR_PC2PM 0x02 /* grant access to firmware flash */ 102 #define RAY_PMR_PC2CAL 0x10 /* read access to the A/D modem inp */ 103 #define RAY_PMR_MLSE 0x20 /* read access to the MSLE prom */ 104 105 /* 106 * TMR bits -- get access to test modes (unused) 107 */ 108 #define RAY_TMR_TEST 0x08 /* test mode */ 109 110 /* 111 * FCWR -- frequency control word, values from [0x02,0xA6] map to 112 * RF frequency values. 113 */ 114 115 /* 116 * 48k of memory -- would like to map this into smaller isa windows 117 * but doesn't seem currently possible with the pcmcia code 118 */ 119 #define RAY_SRAM_MEM_BASE 0 120 #define RAY_SRAM_MEM_SIZE 0xc000 121 122 /* 123 * offsets into shared ram 124 */ 125 #define RAY_SCB_BASE 0x0 /* cfg/status/ctl area */ 126 #define RAY_STATUS_BASE 0x0100 127 #define RAY_HOST_TO_ECF_BASE 0x0200 128 #define RAY_ECF_TO_HOST_BASE 0x0300 129 #define RAY_CCS_BASE 0x0400 130 #define RAY_RCS_BASE 0x0800 131 #define RAY_APOINT_TIM_BASE 0x0c00 132 #define RAY_SSID_LIST_BASE 0x0d00 133 #define RAY_TX_BASE 0x1000 134 #define RAY_TX_SIZE 0x7000 135 #define RAY_TX_END 0x8000 136 #define RAY_RX_BASE 0x8000 137 #define RAY_RX_END 0xc000 138 #define RAY_RX_MASK 0x3fff 139 140 struct ray_ecf_startup { 141 u_int8_t e_status; /* RAY_ECFS_ */ 142 u_int8_t e_station_addr[ETHER_ADDR_LEN]; 143 u_int8_t e_resv0; 144 u_int8_t e_rates[8]; 145 u_int8_t e_japan_callsign[12]; 146 u_int8_t e_prg_cksum; 147 u_int8_t e_cis_cksum; 148 u_int8_t e_fw_build_string; 149 u_int8_t e_fw_build; 150 u_int8_t e_fw_resv; 151 u_int8_t e_asic_version; 152 u_int8_t e_tib_size; 153 u_int8_t e_resv1[29]; 154 }; 155 156 #define RAY_ECFS_RESERVED0 0x01 157 #define RAY_ECFS_PROC_SELF_TEST 0x02 158 #define RAY_ECFS_PROG_MEM_CHECKSUM 0x04 159 #define RAY_ECFS_DATA_MEM_TEST 0x08 160 #define RAY_ECFS_RX_CALIBRATION 0x10 161 #define RAY_ECFS_FW_VERSION_COMPAT 0x20 162 #define RAY_ECFS_RERSERVED1 0x40 163 #define RAY_ECFS_TEST_COMPLETE 0x80 164 #define RAY_ECFS_CARD_OK RAY_ECFS_TEST_COMPLETE 165 166 /* configure/status/control memory */ 167 struct ray_csc { 168 u_int8_t csc_mrxo_own; /* 0 ECF writes, 1 host write */ 169 u_int8_t csc_mrxc_own; /* " */ 170 u_int8_t csc_rxhc_own; /* " */ 171 u_int8_t csc_resv; 172 u_int16_t csc_mrx_overflow; /* ECF incs on rx overflow */ 173 u_int16_t csc_mrx_cksum; /* " on cksum error */ 174 u_int16_t csc_rx_hcksum; /* " on header cksum error */ 175 u_int8_t csc_rx_noise; /* average RSL measurement */ 176 }; 177 178 /* status area */ 179 struct ray_status { 180 u_int8_t st_startup_word; 181 u_int8_t st_station_addr[ETHER_ADDR_LEN]; 182 u_int8_t st_calc_prog_cksum; 183 u_int8_t st_calc_cis_cksum; 184 u_int8_t st_ecf_spare[7]; 185 u_int8_t st_japan_callsign[12]; 186 }; 187 188 /* 189 * Host to ECF data formats 190 */ 191 struct ray_startup_params_head { 192 u_int8_t sp_net_type; /* 0: ad-hoc 1: infra */ 193 u_int8_t sp_ap_status; /* 0: terminal 1: access-point */ 194 u_int8_t sp_ssid[RAY_MAXSSIDLEN]; /* current SSID */ 195 u_int8_t sp_scan_mode; /* 1: active */ 196 u_int8_t sp_apm_mode; /* 0: none 1: power-saving */ 197 u_int8_t sp_mac_addr[ETHER_ADDR_LEN]; 198 u_int8_t sp_frag_thresh[2]; 199 /*2c*/ u_int8_t sp_dwell_time[2]; 200 /*2e*/ u_int8_t sp_beacon_period[2]; 201 /*30*/ u_int8_t sp_dtim_interval; 202 /*31*/ u_int8_t sp_max_retry; /* number of times to attemp tx */ 203 /*32*/ u_int8_t sp_ack_timo; 204 /*33*/ u_int8_t sp_sifs; 205 /*34*/ u_int8_t sp_difs; 206 /*35*/ u_int8_t sp_pifs; 207 /*36*/ u_int8_t sp_rts_thresh[2]; 208 /*38*/ u_int8_t sp_scan_dwell[2]; 209 /*3a*/ u_int8_t sp_scan_max_dwell[2]; 210 /*3c*/ u_int8_t sp_assoc_timo; 211 /*3d*/ u_int8_t sp_adhoc_scan_cycle; 212 /*3e*/ u_int8_t sp_infra_scan_cycle; 213 /*3f*/ u_int8_t sp_infra_super_scan_cycle; 214 /*40*/ u_int8_t sp_promisc; 215 /*41*/ u_int8_t sp_uniq_word[2]; 216 /*43*/ u_int8_t sp_slot_time; 217 /*44*/ u_int8_t sp_roam_low_snr_thresh; /* if below this inc count */ 218 219 /*45*/ u_int8_t sp_low_snr_count; /* roam after cnt below thrsh */ 220 /*46*/ u_int8_t sp_infra_missed_beacon_count; 221 /*47*/ u_int8_t sp_adhoc_missed_beacon_count; 222 223 /*48*/ u_int8_t sp_country_code; 224 /*49*/ u_int8_t sp_hop_seq; 225 /*4a*/ u_int8_t sp_hop_seq_len; /* no longer supported */ 226 } __attribute__((__packed__)); 227 228 /* build 5 tail to the startup params */ 229 struct ray_startup_params_tail_5 { 230 u_int8_t sp_cw_max[2]; 231 u_int8_t sp_cw_min[2]; 232 u_int8_t sp_noise_filter_gain; 233 u_int8_t sp_noise_limit_offset; 234 u_int8_t sp_rssi_thresh_offset; 235 u_int8_t sp_busy_thresh_offset; 236 u_int8_t sp_sync_thresh; 237 u_int8_t sp_test_mode; 238 u_int8_t sp_test_min_chan; 239 u_int8_t sp_test_max_chan; 240 u_int8_t sp_allow_probe_resp; 241 u_int8_t sp_privacy_must_start; 242 u_int8_t sp_privacy_can_join; 243 u_int8_t sp_basic_rate_set[8]; 244 } __attribute__((__packed__)); 245 246 /* build 4 (webgear) tail to the startup params */ 247 struct ray_startup_params_tail_4 { 248 /*4b*/ u_int8_t sp_cw_max; /* 2 bytes in build 5 */ 249 /*4c*/ u_int8_t sp_cw_min; /* 2 bytes in build 5 */ 250 /*4e*/ u_int8_t sp_noise_filter_gain; 251 /*4f*/ u_int8_t sp_noise_limit_offset; 252 u_int8_t sp_rssi_thresh_offset; 253 u_int8_t sp_busy_thresh_offset; 254 u_int8_t sp_sync_thresh; 255 u_int8_t sp_test_mode; 256 u_int8_t sp_test_min_chan; 257 u_int8_t sp_test_max_chan; 258 /* more bytes in build 5 */ 259 } __attribute__((__packed__)); 260 261 /* 262 * Parameter IDs for the update/report param commands and values if 263 * relevant 264 */ 265 #define RAY_PID_NET_TYPE 0 266 #define RAY_PID_AP_STATUS 1 267 #define RAY_PID_SSID 2 268 #define RAY_PID_SCAN_MODE 3 269 #define RAY_PID_APM_MODE 4 270 #define RAY_PID_MAC_ADDR 5 271 #define RAY_PID_FRAG_THRESH 6 272 #define RAY_PID_DWELL_TIME 7 273 #define RAY_PID_BEACON_PERIOD 8 274 #define RAY_PID_DTIM_INT 9 275 #define RAY_PID_MAX_RETRY 10 276 #define RAY_PID_ACK_TIMO 11 277 #define RAY_PID_SIFS 12 278 #define RAY_PID_DIFS 13 279 #define RAY_PID_PIFS 14 280 #define RAY_PID_RTS_THRESH 15 281 #define RAY_PID_SCAN_DWELL_PERIOD 16 282 #define RAY_PID_MAX_SCAN_DWELL_PERIOD 17 283 #define RAY_PID_ASSOC_TIMO 18 284 #define RAY_PID_ADHOC_SCAN_CYCLE 19 285 #define RAY_PID_INFRA_SCAN_CYCLE 20 286 #define RAY_PID_INFRA_SUPER_SCAN_CYCLE 21 287 #define RAY_PID_PROMISC 22 288 #define RAY_PID_UNIQ_WORD 23 289 #define RAY_PID_SLOT_TIME 24 290 #define RAY_PID_ROAM_LOW_SNR_THRESH 25 291 #define RAY_PID_LOW_SNR_COUNT 26 292 #define RAY_PID_INFRA_MISSED_BEACON_COUNT 27 293 #define RAY_PID_ADHOC_MISSED_BEACON_COUNT 28 294 #define RAY_PID_COUNTRY_CODE 29 295 #define RAY_PID_HOP_SEQ 30 296 #define RAY_PID_HOP_SEQ_LEN 31 297 #define RAY_PID_CW_MAX 32 298 #define RAY_PID_CW_MIN 33 299 #define RAY_PID_NOISE_FILTER_GAIN 34 300 #define RAY_PID_NOISE_LIMIT_OFFSET 35 301 #define RAY_PID_RSSI_THRESH_OFFSET 36 302 #define RAY_PID_BUSY_THRESH_OFFSET 37 303 #define RAY_PID_SYNC_THRESH 38 304 #define RAY_PID_TEST_MODE 39 305 #define RAY_PID_TEST_MIN_CHAN 40 306 #define RAY_PID_TEST_MAX_CHAN 41 307 #define RAY_PID_ALLOW_PROBE_RESP 42 308 #define RAY_PID_PRIVACY_MUST_START 43 309 #define RAY_PID_PRIVACY_CAN_JOIN 44 310 #define RAY_PID_BASIC_RATE_SET 45 311 #define RAY_PID_MAX 46 312 313 /* 314 * various values for the above parameters 315 */ 316 #define RAY_PID_NET_TYPE_ADHOC 0x00 317 #define RAY_PID_NET_TYPE_INFRA 0x01 318 319 #define RAY_PID_AP_STATUS_TERMINAL 0x00 /* not access-point */ 320 #define RAY_PID_AP_STATUS_AP 0x01 /* act as access-point */ 321 322 #define RAY_PID_SCAN_MODE_PASSIVE 0x00 /* hw doesn't implement */ 323 #define RAY_PID_SCAN_MODE_ACTIVE 0x01 324 325 #define RAY_PID_APM_MODE_NONE 0x00 /* no power saving */ 326 #define RAY_PID_APM_MODE_PS 0x01 /* power saving mode */ 327 328 #define RAY_PID_COUNTRY_CODE_USA 0x1 329 #define RAY_PID_COUNTRY_CODE_EUROPE 0x2 330 #define RAY_PID_COUNTRY_CODE_JAPAN 0x3 331 #define RAY_PID_COUNTRY_CODE_KOREA 0x4 332 #define RAY_PID_COUNTRY_CODE_SPAIN 0x5 333 #define RAY_PID_COUNTRY_CODE_FRANCE 0x6 334 #define RAY_PID_COUNTRY_CODE_ISRAEL 0x7 335 #define RAY_PID_COUNTRY_CODE_AUSTRALIA 0x8 336 #define RAY_PID_COUNTRY_CODE_JAPAN_TEST 0x9 337 #define RAY_PID_COUNTRY_CODE_MAX 0xa 338 339 #define RAY_PID_TEST_MODE_NORMAL 0x0 340 #define RAY_PID_TEST_MODE_ANT_1 0x1 341 #define RAY_PID_TEST_MODE_ATN_2 0x2 342 #define RAY_PID_TEST_MODE_ATN_BOTH 0x3 343 344 #define RAY_PID_ALLOW_PROBE_RESP_DISALLOW 0x0 345 #define RAY_PID_ALLOW_PROBE_RESP_ALLOW 0x1 346 347 #define RAY_PID_PRIVACY_MUST_START_NOWEP 0x0 348 #define RAY_PID_PRIVACY_MUST_START_WEP 0x1 349 350 #define RAY_PID_PRIVACY_CAN_JOIN_NOWEP 0x0 351 #define RAY_PID_PRIVACY_CAN_JOIN_WEP 0x1 352 #define RAY_PID_PRIVACY_CAN_JOIN_DONT_CARE 0x2 353 354 #define RAY_PID_BASIC_RATE_500K 1 355 #define RAY_PID_BASIC_RATE_1000K 2 356 #define RAY_PID_BASIC_RATE_1500K 3 357 #define RAY_PID_BASIC_RATE_2000K 4 358 359 /* 360 * System Control Block 361 */ 362 #define RAY_SCB_CCSI 0x00 /* host CCS index */ 363 #define RAY_SCB_RCCSI 0x01 /* ecf RCCS index */ 364 365 /* 366 * command control structures (for CCSR commands) 367 */ 368 369 /* 370 * commands for CCSR 371 */ 372 #define RAY_CMD_START_PARAMS 0x01 /* download start params */ 373 #define RAY_CMD_UPDATE_PARAMS 0x02 /* update params */ 374 #define RAY_CMD_REPORT_PARAMS 0x03 /* report params */ 375 #define RAY_CMD_UPDATE_MCAST 0x04 /* update mcast list */ 376 #define RAY_CMD_UPDATE_APM 0x05 /* update power saving mode */ 377 #define RAY_CMD_START_NET 0x06 378 #define RAY_CMD_JOIN_NET 0x07 379 #define RAY_CMD_START_ASSOC 0x08 380 #define RAY_CMD_TX_REQ 0x09 381 #define RAY_CMD_TEST_MEM 0x0a 382 #define RAY_CMD_SHUTDOWN 0x0b 383 #define RAY_CMD_DUMP_MEM 0x0c 384 #define RAY_CMD_START_TIMER 0x0d 385 #define RAY_CMD_MAX 0x0e 386 387 /* 388 * unsolicited commands from the ECF 389 */ 390 #define RAY_ECMD_RX_DONE 0x80 /* process rx packet */ 391 #define RAY_ECMD_REJOIN_DONE 0x81 /* rejoined the network */ 392 #define RAY_ECMD_ROAM_START 0x82 /* romaining started */ 393 #define RAY_ECMD_JAPAN_CALL_SIGNAL 0x83 /* japan test thing */ 394 395 396 #define RAY_CCS_LINK_NULL 0xff 397 #define RAY_CCS_SIZE 16 398 399 #define RAY_CCS_TX_FIRST 0 400 #define RAY_CCS_TX_LAST 13 401 #define RAY_CCS_NTX (RAY_CCS_TX_LAST - RAY_CCS_TX_FIRST + 1) 402 #define RAY_TX_BUF_SIZE 2048 403 #define RAY_CCS_CMD_FIRST 14 404 #define RAY_CCS_CMD_LAST 63 405 #define RAY_CCS_NCMD (RAY_CCS_CMD_LAST - RAY_CCS_CMD_FIRST + 1) 406 #define RAY_CCS_LAST 63 407 408 #define RAY_RCCS_FIRST 64 409 #define RAY_RCCS_LAST 127 410 411 struct ray_cmd { 412 u_int8_t c_status; /* ccs generic header */ 413 u_int8_t c_cmd; /* " */ 414 u_int8_t c_link; /* " */ 415 }; 416 417 #define RAY_CCS_STATUS_FREE 0x0 418 #define RAY_CCS_STATUS_BUSY 0x1 419 #define RAY_CCS_STATUS_COMPLETE 0x2 420 #define RAY_CCS_STATUS_FAIL 0x3 421 422 /* RAY_CMD_UPDATE_PARAMS */ 423 struct ray_cmd_update { 424 u_int8_t c_status; /* ccs generic header */ 425 u_int8_t c_cmd; /* " */ 426 u_int8_t c_link; /* " */ 427 u_int8_t c_paramid; 428 u_int8_t c_nparam; 429 u_int8_t c_failcause; 430 }; 431 432 /* RAY_CMD_REPORT_PARAMS */ 433 struct ray_cmd_report { 434 u_int8_t c_status; /* ccs generic header */ 435 u_int8_t c_cmd; /* " */ 436 u_int8_t c_link; /* " */ 437 u_int8_t c_paramid; 438 u_int8_t c_nparam; 439 u_int8_t c_failcause; 440 u_int8_t c_len; 441 }; 442 443 /* RAY_CMD_UPDATE_MCAST */ 444 struct ray_cmd_update_mcast { 445 u_int8_t c_status; /* ccs generic header */ 446 u_int8_t c_cmd; /* " */ 447 u_int8_t c_link; /* " */ 448 u_int8_t c_nmcast; 449 }; 450 451 /* RAY_CMD_UPDATE_APM */ 452 struct ray_cmd_udpate_apm { 453 u_int8_t c_status; /* ccs generic header */ 454 u_int8_t c_cmd; /* " */ 455 u_int8_t c_link; /* " */ 456 u_int8_t c_mode; 457 }; 458 459 /* RAY_CMD_START_NET and RAY_CMD_JOIN_NET */ 460 struct ray_cmd_net { 461 u_int8_t c_status; /* ccs generic header */ 462 u_int8_t c_cmd; /* " */ 463 u_int8_t c_link; /* " */ 464 u_int8_t c_upd_param; 465 u_int8_t c_bss_id[ETHER_ADDR_LEN]; 466 u_int8_t c_inited; 467 u_int8_t c_def_txrate; 468 u_int8_t c_encrypt; 469 }; 470 471 /* parameters passwd in h2e section when c_upd_param is set in ray_cmd_net */ 472 struct ray_net_params { 473 u_int8_t p_net_type; 474 u_int8_t p_ssid[32]; 475 u_int8_t p_privacy_must_start; 476 u_int8_t p_privacy_can_join; 477 }; 478 479 /* RAY_CMD_UPDATE_ASSOC */ 480 struct ray_cmd_update_assoc { 481 u_int8_t c_status; /* ccs generic header */ 482 u_int8_t c_cmd; /* " */ 483 u_int8_t c_link; /* " */ 484 u_int8_t c_astatus; 485 u_int8_t c_aid[2]; 486 }; 487 488 /* RAY_CMD_TX_REQ */ 489 struct ray_cmd_tx { 490 u_int8_t c_status; /* ccs generic header */ 491 u_int8_t c_cmd; /* " */ 492 u_int8_t c_link; /* " */ 493 u_int8_t c_bufp[2]; 494 u_int8_t c_len[2]; 495 u_int8_t c_resv[5]; 496 u_int8_t c_tx_rate; 497 u_int8_t c_apm_mode; 498 u_int8_t c_nretry; 499 u_int8_t c_antenna; 500 }; 501 502 /* RAY_CMD_TX_REQ (for build 4) */ 503 struct ray_cmd_tx_4 { 504 u_int8_t c_status; /* ccs generic header */ 505 u_int8_t c_cmd; /* " */ 506 u_int8_t c_link; /* " */ 507 u_int8_t c_bufp[2]; 508 u_int8_t c_len[2]; 509 u_int8_t c_addr[ETHER_ADDR_LEN]; 510 u_int8_t c_apm_mode; 511 u_int8_t c_nretry; 512 u_int8_t c_antenna; 513 }; 514 515 /* RAY_CMD_DUMP_MEM */ 516 struct ray_cmd_dump_mem { 517 u_int8_t c_status; /* ccs generic header */ 518 u_int8_t c_cmd; /* " */ 519 u_int8_t c_link; /* " */ 520 u_int8_t c_memtype; 521 u_int8_t c_memp[2]; 522 u_int8_t c_len; 523 }; 524 525 /* RAY_CMD_START_TIMER */ 526 struct ray_cmd_start_timer { 527 u_int8_t c_status; /* ccs generic header */ 528 u_int8_t c_cmd; /* " */ 529 u_int8_t c_link; /* " */ 530 u_int8_t c_duration[2]; 531 }; 532 533 struct ray_cmd_rx { 534 u_int8_t c_status; /* ccs generic header */ 535 u_int8_t c_cmd; /* " */ 536 u_int8_t c_link; /* " */ 537 u_int8_t c_bufp[2]; /* buffer pointer */ 538 u_int8_t c_len[2]; /* length */ 539 u_int8_t c_siglev; /* signal level */ 540 u_int8_t c_nextfrag; /* next fragment in packet */ 541 u_int8_t c_pktlen[2]; /* total packet length */ 542 u_int8_t c_antenna; /* antenna with best reception */ 543 u_int8_t c_updbss; /* only 1 for beacon messages */ 544 }; 545 546 #define RAY_TX_PHY_SIZE 0x4 547 548 /* this is used by the user to request objects */ 549 struct ray_param_req { 550 int r_failcause; 551 u_int8_t r_paramid; 552 u_int8_t r_len; 553 u_int8_t r_data[256]; 554 }; 555 #define RAY_FAILCAUSE_EIDRANGE 1 556 #define RAY_FAILCAUSE_ELENGTH 2 557 /* device can possibly return up to 255 */ 558 #define RAY_FAILCAUSE_EDEVSTOP 256 559 560 #ifdef _KERNEL 561 #define RAY_FAILCAUSE_WAITING 257 562 #endif 563 564 /* get a param the data is a ray_param_request structure */ 565 #define SIOCSRAYPARAM SIOCSIFGENERIC 566 #define SIOCGRAYPARAM SIOCGIFGENERIC 567 568 #define RAY_PID_STRINGS { \ 569 "RAY_PID_NET_TYPE", \ 570 "RAY_PID_AP_STATUS", \ 571 "RAY_PID_SSID", \ 572 "RAY_PID_SCAN_MODE", \ 573 "RAY_PID_APM_MODE", \ 574 "RAY_PID_MAC_ADDR", \ 575 "RAY_PID_FRAG_THRESH", \ 576 "RAY_PID_DWELL_TIME", \ 577 "RAY_PID_BEACON_PERIOD", \ 578 "RAY_PID_DTIM_INT", \ 579 "RAY_PID_MAX_RETRY", \ 580 "RAY_PID_ACK_TIMO", \ 581 "RAY_PID_SIFS", \ 582 "RAY_PID_DIFS", \ 583 "RAY_PID_PIFS", \ 584 "RAY_PID_RTS_THRESH", \ 585 "RAY_PID_SCAN_DWELL_PERIOD", \ 586 "RAY_PID_MAX_SCAN_DWELL_PERIOD", \ 587 "RAY_PID_ASSOC_TIMO", \ 588 "RAY_PID_ADHOC_SCAN_CYCLE", \ 589 "RAY_PID_INFRA_SCAN_CYCLE", \ 590 "RAY_PID_INFRA_SUPER_SCAN_CYCLE", \ 591 "RAY_PID_PROMISC", \ 592 "RAY_PID_UNIQ_WORD", \ 593 "RAY_PID_SLOT_TIME", \ 594 "RAY_PID_ROAM_LOW_SNR_THRESH", \ 595 "RAY_PID_LOW_SNR_COUNT", \ 596 "RAY_PID_INFRA_MISSED_BEACON_COUNT", \ 597 "RAY_PID_ADHOC_MISSED_BEACON_COUNT", \ 598 "RAY_PID_COUNTRY_CODE", \ 599 "RAY_PID_HOP_SEQ", \ 600 "RAY_PID_HOP_SEQ_LEN", \ 601 "RAY_PID_CW_MAX", \ 602 "RAY_PID_CW_MIN", \ 603 "RAY_PID_NOISE_FILTER_GAIN", \ 604 "RAY_PID_NOISE_LIMIT_OFFSET", \ 605 "RAY_PID_RSSI_THRESH_OFFSET", \ 606 "RAY_PID_BUSY_THRESH_OFFSET", \ 607 "RAY_PID_SYNC_THRESH", \ 608 "RAY_PID_TEST_MODE", \ 609 "RAY_PID_TEST_MIN_CHAN", \ 610 "RAY_PID_TEST_MAX_CHAN", \ 611 "RAY_PID_ALLOW_PROBE_RESP", \ 612 "RAY_PID_PRIVACY_MUST_START", \ 613 "RAY_PID_PRIVACY_CAN_JOIN", \ 614 "RAY_PID_BASIC_RATE_SET" \ 615 } 616 617 #ifdef RAY_DO_SIGLEV 618 #define SIOCGRAYSIGLEV _IOWR('i', 201, struct ifreq) 619 620 #define RAY_NSIGLEVRECS 8 621 #define RAY_NSIGLEV 8 622 623 struct ray_siglev { 624 u_int8_t rsl_host[ETHER_ADDR_LEN]; /* MAC address */ 625 u_int8_t rsl_siglevs[RAY_NSIGLEV]; /* levels, newest in [0] */ 626 struct timeval rsl_time; /* time of last packet */ 627 }; 628 #endif 629
Indexes created Mon Sep 29 21:09:56 GMT 2025